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1275 |
phoenix |
/*
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* linux/drivers/ide/pci/atiixp.c Version 0.01-bart2 Feb. 26, 2004
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*
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* Copyright (C) 2003 ATI Inc. <hyu@ati.com>
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* Copyright (C) 2004 Bartlomiej Zolnierkiewicz
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*
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*/
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#include <linux/config.h>
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#include <linux/types.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/ioport.h>
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#include <linux/pci.h>
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#include <linux/hdreg.h>
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#include <linux/ide.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <asm/io.h>
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#include "ide_modes.h"
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#define ATIIXP_IDE_PIO_TIMING 0x40
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#define ATIIXP_IDE_MDMA_TIMING 0x44
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#define ATIIXP_IDE_PIO_CONTROL 0x48
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#define ATIIXP_IDE_PIO_MODE 0x4a
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#define ATIIXP_IDE_UDMA_CONTROL 0x54
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#define ATIIXP_IDE_UDMA_MODE 0x56
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typedef struct {
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u8 command_width;
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u8 recover_width;
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} atiixp_ide_timing;
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static atiixp_ide_timing pio_timing[] = {
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{ 0x05, 0x0d },
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{ 0x04, 0x07 },
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{ 0x03, 0x04 },
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{ 0x02, 0x02 },
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{ 0x02, 0x00 },
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};
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static atiixp_ide_timing mdma_timing[] = {
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{ 0x07, 0x07 },
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{ 0x02, 0x01 },
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{ 0x02, 0x00 },
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};
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static int save_mdma_mode[4];
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#define DISPLAY_ATIIXP_TIMINGS
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#if defined(DISPLAY_ATIIXP_TIMINGS) && defined(CONFIG_PROC_FS)
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#include <linux/stat.h>
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#include <linux/proc_fs.h>
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static u8 atiixp_proc;
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static struct pci_dev *bmide_dev;
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/**
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* atiixp_get_info - fill in /proc for ATIIXP IDE
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* @buffer: buffer to fill
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* @addr: address of user start in buffer
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* @offset: offset into 'file'
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* @count: buffer count
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*
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* Output summary data on the tuning.
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*/
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static int atiixp_get_info(char *buffer, char **addr, off_t offset, int count)
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{
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char *p = buffer;
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struct pci_dev *dev = bmide_dev;
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unsigned long bibma = pci_resource_start(dev, 4);
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u32 mdma_timing = 0;
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u16 udma_mode = 0, pio_mode = 0;
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u8 c0, c1, udma_control = 0;
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p += sprintf(p, "\n ATI ");
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p += sprintf(p, "ATIIXP Ultra100 IDE Chipset.\n");
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pci_read_config_byte(dev, ATIIXP_IDE_UDMA_CONTROL, &udma_control);
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pci_read_config_word(dev, ATIIXP_IDE_UDMA_MODE, &udma_mode);
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pci_read_config_word(dev, ATIIXP_IDE_PIO_MODE, &pio_mode);
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pci_read_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, &mdma_timing);
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/*
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* at that point bibma+0x2 et bibma+0xa are byte registers
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* to investigate:
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*/
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c0 = inb(bibma + 0x02);
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c1 = inb(bibma + 0x0a);
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p += sprintf(p, "--------------- Primary Channel "
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"---------------- Secondary Channel "
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"-------------\n");
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p += sprintf(p, " %sabled "
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" %sabled\n",
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(c0 & 0x80) ? "dis" : " en",
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(c1 & 0x80) ? "dis" : " en");
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p += sprintf(p, "--------------- drive0 --------- drive1 "
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"-------- drive0 ---------- drive1 ------\n");
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p += sprintf(p, "DMA enabled: %s %s "
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" %s %s\n",
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(c0 & 0x20) ? "yes" : "no ",
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(c0 & 0x40) ? "yes" : "no ",
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(c1 & 0x20) ? "yes" : "no ",
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(c1 & 0x40) ? "yes" : "no " );
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p += sprintf(p, "UDMA enabled: %s %s "
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" %s %s\n",
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(udma_control & 0x01) ? "yes" : "no ",
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(udma_control & 0x02) ? "yes" : "no ",
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(udma_control & 0x04) ? "yes" : "no ",
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(udma_control & 0x08) ? "yes" : "no " );
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p += sprintf(p, "UDMA mode: %c %c "
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" %c %c\n",
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(udma_control & 0x01) ?
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((udma_mode & 0x07) + 48) : 'X',
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(udma_control & 0x02) ?
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(((udma_mode >> 4) & 0x07) + 48) : 'X',
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(udma_control & 0x04) ?
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(((udma_mode >> 8) & 0x07) + 48) : 'X',
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(udma_control & 0x08) ?
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(((udma_mode >> 12) & 0x07) + 48) : 'X');
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p += sprintf(p, "MDMA mode: %c %c "
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" %c %c\n",
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(save_mdma_mode[0] && (c0 & 0x20)) ?
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((save_mdma_mode[0] & 0xf) + 48) : 'X',
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(save_mdma_mode[1] && (c0 & 0x40)) ?
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((save_mdma_mode[1] & 0xf) + 48) : 'X',
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(save_mdma_mode[2] && (c1 & 0x20)) ?
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((save_mdma_mode[2] & 0xf) + 48) : 'X',
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(save_mdma_mode[3] && (c1 & 0x40)) ?
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((save_mdma_mode[3] & 0xf) + 48) : 'X');
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p += sprintf(p, "PIO mode: %c %c "
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" %c %c\n",
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(c0 & 0x20) ? 'X' : ((pio_mode & 0x07) + 48),
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(c0 & 0x40) ? 'X' : (((pio_mode >> 4) & 0x07) + 48),
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(c1 & 0x20) ? 'X' : (((pio_mode >> 8) & 0x07) + 48),
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(c1 & 0x40) ? 'X' : (((pio_mode >> 12) & 0x07) + 48));
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return p - buffer; /* => must be less than 4k! */
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}
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static ide_pci_host_proc_t atiixp_procs = {
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.name = "atiixp",
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.set = 1,
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.get_info = atiixp_get_info,
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};
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#endif /* defined(DISPLAY_ATIIXP_TIMINGS) && defined(CONFIG_PROC_FS) */
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/**
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* atiixp_ratemask - compute rate mask for ATIIXP IDE
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* @drive: IDE drive to compute for
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*
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* Returns the available modes for the ATIIXP IDE controller.
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*/
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static u8 atiixp_ratemask(ide_drive_t *drive)
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{
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u8 mode = 3;
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if (!eighty_ninty_three(drive))
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mode = min(mode, (u8)1);
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return mode;
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}
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/**
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* atiixp_dma_2_pio - return the PIO mode matching DMA
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* @xfer_rate: transfer speed
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*
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* Returns the nearest equivalent PIO timing for the PIO or DMA
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* mode requested by the controller.
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*/
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static u8 atiixp_dma_2_pio(u8 xfer_rate) {
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switch(xfer_rate) {
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case XFER_UDMA_6:
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case XFER_UDMA_5:
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case XFER_UDMA_4:
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case XFER_UDMA_3:
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case XFER_UDMA_2:
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case XFER_UDMA_1:
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case XFER_UDMA_0:
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case XFER_MW_DMA_2:
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case XFER_PIO_4:
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return 4;
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case XFER_MW_DMA_1:
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case XFER_PIO_3:
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return 3;
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case XFER_SW_DMA_2:
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case XFER_PIO_2:
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return 2;
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case XFER_MW_DMA_0:
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case XFER_SW_DMA_1:
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case XFER_SW_DMA_0:
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case XFER_PIO_1:
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case XFER_PIO_0:
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case XFER_PIO_SLOW:
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default:
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return 0;
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}
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| 205 |
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}
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| 207 |
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static int atiixp_ide_dma_host_on(ide_drive_t *drive)
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{
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struct pci_dev *dev = drive->hwif->pci_dev;
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unsigned long flags;
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u16 tmp16;
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spin_lock_irqsave(&ide_lock, flags);
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| 215 |
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pci_read_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, &tmp16);
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if (save_mdma_mode[drive->dn])
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tmp16 &= ~(1 << drive->dn);
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else
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tmp16 |= (1 << drive->dn);
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pci_write_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, tmp16);
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spin_unlock_irqrestore(&ide_lock, flags);
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| 223 |
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| 224 |
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return __ide_dma_host_on(drive);
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| 225 |
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}
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| 226 |
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| 227 |
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static int atiixp_ide_dma_host_off(ide_drive_t *drive)
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| 228 |
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{
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| 229 |
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struct pci_dev *dev = drive->hwif->pci_dev;
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| 230 |
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unsigned long flags;
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| 231 |
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u16 tmp16;
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| 233 |
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spin_lock_irqsave(&ide_lock, flags);
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| 234 |
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| 235 |
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pci_read_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, &tmp16);
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tmp16 &= ~(1 << drive->dn);
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pci_write_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, tmp16);
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| 238 |
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| 239 |
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spin_unlock_irqrestore(&ide_lock, flags);
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| 240 |
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| 241 |
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return __ide_dma_host_off(drive);
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| 242 |
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}
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| 243 |
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| 244 |
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/**
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* atiixp_tune_drive - tune a drive attached to a ATIIXP
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| 246 |
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* @drive: drive to tune
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| 247 |
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* @pio: desired PIO mode
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| 248 |
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*
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| 249 |
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* Set the interface PIO mode.
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| 250 |
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*/
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| 251 |
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| 252 |
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static void atiixp_tuneproc(ide_drive_t *drive, u8 pio)
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| 253 |
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{
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| 254 |
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struct pci_dev *dev = drive->hwif->pci_dev;
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| 255 |
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unsigned long flags;
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| 256 |
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int timing_shift = (drive->dn & 2) ? 16 : 0 + (drive->dn & 1) ? 0 : 8;
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| 257 |
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u32 pio_timing_data;
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| 258 |
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u16 pio_mode_data;
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| 259 |
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| 260 |
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spin_lock_irqsave(&ide_lock, flags);
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| 261 |
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| 262 |
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pci_read_config_word(dev, ATIIXP_IDE_PIO_MODE, &pio_mode_data);
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| 263 |
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pio_mode_data &= ~(0x07 << (drive->dn * 4));
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| 264 |
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pio_mode_data |= (pio << (drive->dn * 4));
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| 265 |
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pci_write_config_word(dev, ATIIXP_IDE_PIO_MODE, pio_mode_data);
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| 266 |
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| 267 |
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pci_read_config_dword(dev, ATIIXP_IDE_PIO_TIMING, &pio_timing_data);
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| 268 |
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pio_timing_data &= ~(0xff << timing_shift);
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| 269 |
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pio_timing_data |= (pio_timing[pio].recover_width << timing_shift) |
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| 270 |
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(pio_timing[pio].command_width << (timing_shift + 4));
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| 271 |
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pci_write_config_dword(dev, ATIIXP_IDE_PIO_TIMING, pio_timing_data);
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| 272 |
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| 273 |
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spin_unlock_irqrestore(&ide_lock, flags);
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| 274 |
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}
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| 275 |
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| 276 |
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/**
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| 277 |
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* atiixp_tune_chipset - tune a ATIIXP interface
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| 278 |
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* @drive: IDE drive to tune
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| 279 |
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* @xferspeed: speed to configure
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| 280 |
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*
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| 281 |
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* Set a ATIIXP interface channel to the desired speeds. This involves
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| 282 |
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* requires the right timing data into the ATIIXP configuration space
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| 283 |
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* then setting the drive parameters appropriately
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| 284 |
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*/
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| 285 |
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|
| 286 |
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static int atiixp_speedproc(ide_drive_t *drive, u8 xferspeed)
|
| 287 |
|
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{
|
| 288 |
|
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struct pci_dev *dev = drive->hwif->pci_dev;
|
| 289 |
|
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unsigned long flags;
|
| 290 |
|
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int timing_shift = (drive->dn & 2) ? 16 : 0 + (drive->dn & 1) ? 0 : 8;
|
| 291 |
|
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u32 tmp32;
|
| 292 |
|
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u16 tmp16;
|
| 293 |
|
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u8 speed, pio;
|
| 294 |
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| 295 |
|
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speed = ide_rate_filter(atiixp_ratemask(drive), xferspeed);
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| 296 |
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| 297 |
|
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spin_lock_irqsave(&ide_lock, flags);
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| 298 |
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| 299 |
|
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save_mdma_mode[drive->dn] = 0;
|
| 300 |
|
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if (speed >= XFER_UDMA_0) {
|
| 301 |
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pci_read_config_word(dev, ATIIXP_IDE_UDMA_MODE, &tmp16);
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| 302 |
|
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tmp16 &= ~(0x07 << (drive->dn * 4));
|
| 303 |
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tmp16 |= ((speed & 0x07) << (drive->dn * 4));
|
| 304 |
|
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pci_write_config_word(dev, ATIIXP_IDE_UDMA_MODE, tmp16);
|
| 305 |
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} else {
|
| 306 |
|
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if ((speed >= XFER_MW_DMA_0) && (speed <= XFER_MW_DMA_2)) {
|
| 307 |
|
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save_mdma_mode[drive->dn] = speed;
|
| 308 |
|
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pci_read_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, &tmp32);
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| 309 |
|
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tmp32 &= ~(0xff << timing_shift);
|
| 310 |
|
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tmp32 |= (mdma_timing[speed & 0x03].recover_width << timing_shift) |
|
| 311 |
|
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(mdma_timing[speed & 0x03].command_width << (timing_shift + 4));
|
| 312 |
|
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pci_write_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, tmp32);
|
| 313 |
|
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}
|
| 314 |
|
|
}
|
| 315 |
|
|
|
| 316 |
|
|
spin_unlock_irqrestore(&ide_lock, flags);
|
| 317 |
|
|
|
| 318 |
|
|
if (speed >= XFER_SW_DMA_0)
|
| 319 |
|
|
pio = atiixp_dma_2_pio(speed);
|
| 320 |
|
|
else
|
| 321 |
|
|
pio = speed - XFER_PIO_0;
|
| 322 |
|
|
|
| 323 |
|
|
atiixp_tuneproc(drive, pio);
|
| 324 |
|
|
|
| 325 |
|
|
return ide_config_drive_speed(drive, speed);
|
| 326 |
|
|
}
|
| 327 |
|
|
|
| 328 |
|
|
/**
|
| 329 |
|
|
* atiixp_config_drive_for_dma - configure drive for DMA
|
| 330 |
|
|
* @drive: IDE drive to configure
|
| 331 |
|
|
*
|
| 332 |
|
|
* Set up a ATIIXP interface channel for the best available speed.
|
| 333 |
|
|
* We prefer UDMA if it is available and then MWDMA. If DMA is
|
| 334 |
|
|
* not available we switch to PIO and return 0.
|
| 335 |
|
|
*/
|
| 336 |
|
|
|
| 337 |
|
|
static int atiixp_config_drive_for_dma(ide_drive_t *drive)
|
| 338 |
|
|
{
|
| 339 |
|
|
u8 speed = ide_dma_speed(drive, atiixp_ratemask(drive));
|
| 340 |
|
|
|
| 341 |
|
|
/* If no DMA speed was available then disable DMA and use PIO. */
|
| 342 |
|
|
if (!speed) {
|
| 343 |
|
|
u8 tspeed = ide_get_best_pio_mode(drive, 255, 5, NULL);
|
| 344 |
|
|
speed = atiixp_dma_2_pio(XFER_PIO_0 + tspeed) + XFER_PIO_0;
|
| 345 |
|
|
}
|
| 346 |
|
|
|
| 347 |
|
|
(void) atiixp_speedproc(drive, speed);
|
| 348 |
|
|
return ide_dma_enable(drive);
|
| 349 |
|
|
}
|
| 350 |
|
|
|
| 351 |
|
|
/**
|
| 352 |
|
|
* atiixp_dma_check - set up an IDE device
|
| 353 |
|
|
* @drive: IDE drive to configure
|
| 354 |
|
|
*
|
| 355 |
|
|
* Set up the ATIIXP interface for the best available speed on this
|
| 356 |
|
|
* interface, preferring DMA to PIO.
|
| 357 |
|
|
*/
|
| 358 |
|
|
|
| 359 |
|
|
static int atiixp_dma_check(ide_drive_t *drive)
|
| 360 |
|
|
{
|
| 361 |
|
|
ide_hwif_t *hwif = HWIF(drive);
|
| 362 |
|
|
struct hd_driveid *id = drive->id;
|
| 363 |
|
|
u8 tspeed, speed;
|
| 364 |
|
|
|
| 365 |
|
|
drive->init_speed = 0;
|
| 366 |
|
|
|
| 367 |
|
|
if ((id->capability & 1) && drive->autodma) {
|
| 368 |
|
|
/* Consult the list of known "bad" drives */
|
| 369 |
|
|
if (__ide_dma_bad_drive(drive))
|
| 370 |
|
|
goto fast_ata_pio;
|
| 371 |
|
|
if (id->field_valid & 4) {
|
| 372 |
|
|
if (id->dma_ultra & hwif->ultra_mask) {
|
| 373 |
|
|
/* Force if Capable UltraDMA */
|
| 374 |
|
|
if ((id->field_valid & 2) &&
|
| 375 |
|
|
(!atiixp_config_drive_for_dma(drive)))
|
| 376 |
|
|
goto try_dma_modes;
|
| 377 |
|
|
}
|
| 378 |
|
|
} else if (id->field_valid & 2) {
|
| 379 |
|
|
try_dma_modes:
|
| 380 |
|
|
if ((id->dma_mword & hwif->mwdma_mask) ||
|
| 381 |
|
|
(id->dma_1word & hwif->swdma_mask)) {
|
| 382 |
|
|
/* Force if Capable regular DMA modes */
|
| 383 |
|
|
if (!atiixp_config_drive_for_dma(drive))
|
| 384 |
|
|
goto no_dma_set;
|
| 385 |
|
|
}
|
| 386 |
|
|
} else if (__ide_dma_good_drive(drive) &&
|
| 387 |
|
|
(id->eide_dma_time < 150)) {
|
| 388 |
|
|
/* Consult the list of known "good" drives */
|
| 389 |
|
|
if (!atiixp_config_drive_for_dma(drive))
|
| 390 |
|
|
goto no_dma_set;
|
| 391 |
|
|
} else {
|
| 392 |
|
|
goto fast_ata_pio;
|
| 393 |
|
|
}
|
| 394 |
|
|
return hwif->ide_dma_on(drive);
|
| 395 |
|
|
} else if ((id->capability & 8) || (id->field_valid & 2)) {
|
| 396 |
|
|
fast_ata_pio:
|
| 397 |
|
|
no_dma_set:
|
| 398 |
|
|
tspeed = ide_get_best_pio_mode(drive, 255, 5, NULL);
|
| 399 |
|
|
speed = atiixp_dma_2_pio(XFER_PIO_0 + tspeed) + XFER_PIO_0;
|
| 400 |
|
|
hwif->speedproc(drive, speed);
|
| 401 |
|
|
return hwif->ide_dma_off_quietly(drive);
|
| 402 |
|
|
}
|
| 403 |
|
|
/* IORDY not supported */
|
| 404 |
|
|
return 0;
|
| 405 |
|
|
}
|
| 406 |
|
|
|
| 407 |
|
|
/**
|
| 408 |
|
|
* init_chipset_atiixp - set up the ATIIXP chipset
|
| 409 |
|
|
* @dev: PCI device to set up
|
| 410 |
|
|
* @name: Name of the device
|
| 411 |
|
|
*
|
| 412 |
|
|
* Initialize the PCI device as required. For the ATIIXP this turns
|
| 413 |
|
|
* out to be nice and simple
|
| 414 |
|
|
*/
|
| 415 |
|
|
|
| 416 |
|
|
static unsigned int __devinit init_chipset_atiixp(struct pci_dev *dev, const char *name)
|
| 417 |
|
|
{
|
| 418 |
|
|
#if defined(DISPLAY_ATIIXP_TIMINGS) && defined(CONFIG_PROC_FS)
|
| 419 |
|
|
if (!atiixp_proc) {
|
| 420 |
|
|
atiixp_proc = 1;
|
| 421 |
|
|
bmide_dev = dev;
|
| 422 |
|
|
ide_pci_register_host_proc(&atiixp_procs);
|
| 423 |
|
|
}
|
| 424 |
|
|
#endif /* DISPLAY_ATIIXP_TIMINGS && CONFIG_PROC_FS */
|
| 425 |
|
|
return 0;
|
| 426 |
|
|
}
|
| 427 |
|
|
|
| 428 |
|
|
/**
|
| 429 |
|
|
* init_hwif_atiixp - fill in the hwif for the ATIIXP
|
| 430 |
|
|
* @hwif: IDE interface
|
| 431 |
|
|
*
|
| 432 |
|
|
* Set up the ide_hwif_t for the ATIIXP interface according to the
|
| 433 |
|
|
* capabilities of the hardware.
|
| 434 |
|
|
*/
|
| 435 |
|
|
|
| 436 |
|
|
static void __devinit init_hwif_atiixp(ide_hwif_t *hwif)
|
| 437 |
|
|
{
|
| 438 |
|
|
if (!hwif->irq)
|
| 439 |
|
|
hwif->irq = hwif->channel ? 15 : 14;
|
| 440 |
|
|
|
| 441 |
|
|
hwif->autodma = 0;
|
| 442 |
|
|
hwif->tuneproc = &atiixp_tuneproc;
|
| 443 |
|
|
hwif->speedproc = &atiixp_speedproc;
|
| 444 |
|
|
hwif->drives[0].autotune = 1;
|
| 445 |
|
|
hwif->drives[1].autotune = 1;
|
| 446 |
|
|
|
| 447 |
|
|
if (!hwif->dma_base)
|
| 448 |
|
|
return;
|
| 449 |
|
|
|
| 450 |
|
|
hwif->atapi_dma = 1;
|
| 451 |
|
|
hwif->ultra_mask = 0x3f;
|
| 452 |
|
|
hwif->mwdma_mask = 0x06;
|
| 453 |
|
|
hwif->swdma_mask = 0x04;
|
| 454 |
|
|
|
| 455 |
|
|
/* FIXME: proper cable detection needed */
|
| 456 |
|
|
hwif->udma_four = 1;
|
| 457 |
|
|
hwif->ide_dma_host_on = &atiixp_ide_dma_host_on;
|
| 458 |
|
|
hwif->ide_dma_host_off = &atiixp_ide_dma_host_off;
|
| 459 |
|
|
hwif->ide_dma_check = &atiixp_dma_check;
|
| 460 |
|
|
if (!noautodma)
|
| 461 |
|
|
hwif->autodma = 1;
|
| 462 |
|
|
|
| 463 |
|
|
hwif->drives[1].autodma = hwif->autodma;
|
| 464 |
|
|
hwif->drives[0].autodma = hwif->autodma;
|
| 465 |
|
|
}
|
| 466 |
|
|
|
| 467 |
|
|
static ide_pci_device_t atiixp_pci_info[] __devinitdata = {
|
| 468 |
|
|
{ /* 0 */
|
| 469 |
|
|
.vendor = PCI_VENDOR_ID_ATI,
|
| 470 |
|
|
.device = PCI_DEVICE_ID_ATI_IXP_IDE,
|
| 471 |
|
|
.name = "ATIIXP",
|
| 472 |
|
|
.init_chipset = init_chipset_atiixp,
|
| 473 |
|
|
.init_hwif = init_hwif_atiixp,
|
| 474 |
|
|
.channels = 2,
|
| 475 |
|
|
.autodma = AUTODMA,
|
| 476 |
|
|
.enablebits = {{0x48,0x01,0x00}, {0x48,0x08,0x00}},
|
| 477 |
|
|
.bootable = ON_BOARD,
|
| 478 |
|
|
}
|
| 479 |
|
|
};
|
| 480 |
|
|
|
| 481 |
|
|
/**
|
| 482 |
|
|
* atiixp_init_one - called when a ATIIXP is found
|
| 483 |
|
|
* @dev: the atiixp device
|
| 484 |
|
|
* @id: the matching pci id
|
| 485 |
|
|
*
|
| 486 |
|
|
* Called when the PCI registration layer (or the IDE initialization)
|
| 487 |
|
|
* finds a device matching our IDE device tables.
|
| 488 |
|
|
*/
|
| 489 |
|
|
|
| 490 |
|
|
static int __devinit atiixp_init_one(struct pci_dev *dev, const struct pci_device_id *id)
|
| 491 |
|
|
{
|
| 492 |
|
|
ide_pci_device_t *d = &atiixp_pci_info[id->driver_data];
|
| 493 |
|
|
|
| 494 |
|
|
if (dev->device != d->device)
|
| 495 |
|
|
BUG();
|
| 496 |
|
|
ide_setup_pci_device(dev, d);
|
| 497 |
|
|
return 0;
|
| 498 |
|
|
}
|
| 499 |
|
|
|
| 500 |
|
|
static struct pci_device_id atiixp_pci_tbl[] = {
|
| 501 |
|
|
{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
|
| 502 |
|
|
{ 0, },
|
| 503 |
|
|
};
|
| 504 |
|
|
|
| 505 |
|
|
static struct pci_driver driver = {
|
| 506 |
|
|
.name = "ATIIXP IDE",
|
| 507 |
|
|
.id_table = atiixp_pci_tbl,
|
| 508 |
|
|
.probe = atiixp_init_one,
|
| 509 |
|
|
};
|
| 510 |
|
|
|
| 511 |
|
|
static int atiixp_ide_init(void)
|
| 512 |
|
|
{
|
| 513 |
|
|
return ide_pci_register_driver(&driver);
|
| 514 |
|
|
}
|
| 515 |
|
|
|
| 516 |
|
|
module_init(atiixp_ide_init);
|
| 517 |
|
|
|
| 518 |
|
|
MODULE_AUTHOR("HUI YU");
|
| 519 |
|
|
MODULE_DESCRIPTION("PCI driver module for ATI IXP IDE");
|
| 520 |
|
|
MODULE_LICENSE("GPL");
|
| 521 |
|
|
|
| 522 |
|
|
EXPORT_NO_SYMBOLS;
|
