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1275 |
phoenix |
/*
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* linux/drivers/ide/pci/sc1200.c Version 0.91 28-Jan-2003
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*
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* Copyright (C) 2000-2002 Mark Lord <mlord@pobox.com>
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* May be copied or modified under the terms of the GNU General Public License
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*
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* Development of this chipset driver was funded
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* by the nice folks at National Semiconductor.
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*
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* Documentation:
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* Available from National Semiconductor
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*/
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#include <linux/config.h>
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/delay.h>
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#include <linux/timer.h>
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#include <linux/mm.h>
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#include <linux/ioport.h>
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#include <linux/blkdev.h>
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#include <linux/hdreg.h>
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#include <linux/interrupt.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/ide.h>
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#include <linux/pm.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include "ide_modes.h"
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#include "sc1200.h"
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#define DISPLAY_SC1200_TIMINGS
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#if defined(DISPLAY_SC1200_TIMINGS) && defined(CONFIG_PROC_FS)
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#include <linux/stat.h>
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#include <linux/proc_fs.h>
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static int sc1200_get_info(char *, char **, off_t, int);
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extern int (*sc1200_display_info)(char *, char **, off_t, int); /* ide-proc.c */
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extern char *ide_media_verbose(ide_drive_t *);
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static u8 sc1200_proc = 0;
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#define SC1200_REV_A 0x00
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#define SC1200_REV_B1 0x01
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#define SC1200_REV_B3 0x02
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#define SC1200_REV_C1 0x03
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#define SC1200_REV_D1 0x04
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#define PCI_CLK_33 0x00
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#define PCI_CLK_48 0x01
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#define PCI_CLK_66 0x02
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#define PCI_CLK_33A 0x03
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static unsigned short sc1200_get_pci_clock (void)
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{
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unsigned char chip_id, silicon_revision;
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unsigned int pci_clock;
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/*
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* Check the silicon revision, as not all versions of the chip
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* have the register with the fast PCI bus timings.
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*/
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chip_id = inb (0x903c);
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silicon_revision = inb (0x903d);
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// Read the fast pci clock frequency
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if (chip_id == 0x04 && silicon_revision < SC1200_REV_B1) {
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pci_clock = PCI_CLK_33;
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} else {
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// check clock generator configuration (cfcc)
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// the clock is in bits 8 and 9 of this word
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pci_clock = inw (0x901e);
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pci_clock >>= 8;
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pci_clock &= 0x03;
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if (pci_clock == PCI_CLK_33A)
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pci_clock = PCI_CLK_33;
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}
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return pci_clock;
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}
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static struct pci_dev *bmide_dev;
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static int sc1200_get_info (char *buffer, char **addr, off_t offset, int count)
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{
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char *p = buffer;
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unsigned long bibma = pci_resource_start(bmide_dev, 4);
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int len;
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u8 c0 = 0, c1 = 0;
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/*
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* at that point bibma+0x2 et bibma+0xa are byte registers
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* to investigate:
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*/
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c0 = inb_p(bibma + 0x02);
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c1 = inb_p(bibma + 0x0a);
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p += sprintf(p, "\n National SCx200 Chipset.\n");
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p += sprintf(p, "--------------- Primary Channel ---------------- Secondary Channel -------------\n");
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p += sprintf(p, " %sabled %sabled\n",
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(c0&0x80) ? "dis" : " en",
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(c1&0x80) ? "dis" : " en");
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p += sprintf(p, "--------------- drive0 --------- drive1 -------- drive0 ---------- drive1 ------\n");
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p += sprintf(p, "DMA enabled: %s %s %s %s\n",
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(c0&0x20) ? "yes" : "no ", (c0&0x40) ? "yes" : "no ",
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(c1&0x20) ? "yes" : "no ", (c1&0x40) ? "yes" : "no " );
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p += sprintf(p, "UDMA\n");
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p += sprintf(p, "DMA\n");
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p += sprintf(p, "PIO\n");
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len = (p - buffer) - offset;
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*addr = buffer + offset;
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return len > count ? count : len;
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}
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#endif /* DISPLAY_SC1200_TIMINGS && CONFIG_PROC_FS */
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extern char *ide_xfer_verbose (byte xfer_rate);
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/*
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* Set a new transfer mode at the drive
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*/
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int sc1200_set_xfer_mode (ide_drive_t *drive, byte mode)
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{
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printk("%s: sc1200_set_xfer_mode(%s)\n", drive->name, ide_xfer_verbose(mode));
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return ide_config_drive_speed(drive, mode);
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}
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/*
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* Here are the standard PIO mode 0-4 timings for each "format".
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* Format-0 uses fast data reg timings, with slower command reg timings.
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* Format-1 uses fast timings for all registers, but won't work with all drives.
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*/
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static const unsigned int sc1200_pio_timings[4][5] =
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{{0x00009172, 0x00012171, 0x00020080, 0x00032010, 0x00040010}, // format0 33Mhz
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{0xd1329172, 0x71212171, 0x30200080, 0x20102010, 0x00100010}, // format1, 33Mhz
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{0xfaa3f4f3, 0xc23232b2, 0x513101c1, 0x31213121, 0x10211021}, // format1, 48Mhz
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{0xfff4fff4, 0xf35353d3, 0x814102f1, 0x42314231, 0x11311131}}; // format1, 66Mhz
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/*
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* After chip reset, the PIO timings are set to 0x00009172, which is not valid.
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*/
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//#define SC1200_BAD_PIO(timings) (((timings)&~0x80000000)==0x00009172)
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static int sc1200_autoselect_dma_mode (ide_drive_t *drive)
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{
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int udma_ok = 1, mode = 0;
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ide_hwif_t *hwif = HWIF(drive);
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int unit = drive->select.b.unit;
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ide_drive_t *mate = &hwif->drives[unit^1];
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struct hd_driveid *id = drive->id;
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/*
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* The SC1200 specifies that two drives sharing a cable cannot
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* mix UDMA/MDMA. It has to be one or the other, for the pair,
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* though different timings can still be chosen for each drive.
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* We could set the appropriate timing bits on the fly,
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* but that might be a bit confusing. So, for now we statically
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* handle this requirement by looking at our mate drive to see
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* what it is capable of, before choosing a mode for our own drive.
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*/
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if (mate->present) {
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struct hd_driveid *mateid = mate->id;
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if ((mateid->capability & 1) && !hwif->ide_dma_bad_drive(mate)) {
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if ((mateid->field_valid & 4) && (mateid->dma_ultra & 7))
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udma_ok = 1;
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else if ((mateid->field_valid & 2) && (mateid->dma_mword & 7))
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udma_ok = 0;
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else
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udma_ok = 1;
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}
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}
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/*
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* Now see what the current drive is capable of,
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* selecting UDMA only if the mate said it was ok.
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*/
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if ((id->capability & 1) && hwif->autodma && !hwif->ide_dma_bad_drive(drive)) {
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if (udma_ok && (id->field_valid & 4) && (id->dma_ultra & 7)) {
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if (id->dma_ultra & 4)
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mode = XFER_UDMA_2;
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else if (id->dma_ultra & 2)
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mode = XFER_UDMA_1;
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else if (id->dma_ultra & 1)
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mode = XFER_UDMA_0;
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}
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if (!mode && (id->field_valid & 2) && (id->dma_mword & 7)) {
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if (id->dma_mword & 4)
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mode = XFER_MW_DMA_2;
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else if (id->dma_mword & 2)
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mode = XFER_MW_DMA_1;
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else if (id->dma_mword & 1)
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mode = XFER_MW_DMA_0;
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}
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}
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return mode;
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}
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| 202 |
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/*
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* sc1200_config_dma2() handles selection/setting of DMA/UDMA modes
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* for both the chipset and drive.
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*/
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static int sc1200_config_dma2 (ide_drive_t *drive, int mode)
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{
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ide_hwif_t *hwif = HWIF(drive);
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int unit = drive->select.b.unit;
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unsigned int reg, timings;
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unsigned short pci_clock;
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unsigned int basereg = hwif->channel ? 0x50 : 0x40;
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/*
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* Default to DMA-off in case we run into trouble here.
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*/
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hwif->ide_dma_off_quietly(drive); /* turn off DMA while we fiddle */
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outb(inb(hwif->dma_base+2)&~(unit?0x40:0x20), hwif->dma_base+2); /* clear DMA_capable bit */
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/*
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* Tell the drive to switch to the new mode; abort on failure.
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*/
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if (!mode || sc1200_set_xfer_mode(drive, mode)) {
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| 224 |
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printk("SC1200: set xfer mode failure\n");
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| 225 |
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return 1; /* failure */
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| 226 |
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}
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| 227 |
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| 228 |
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pci_clock = sc1200_get_pci_clock();
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| 229 |
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| 230 |
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/*
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* Now tune the chipset to match the drive:
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*
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| 233 |
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* Note that each DMA mode has several timings associated with it.
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* The correct timing depends on the fast PCI clock freq.
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| 235 |
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*/
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| 236 |
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timings = 0;
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| 237 |
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switch (mode) {
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| 238 |
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case XFER_UDMA_0:
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switch (pci_clock) {
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| 240 |
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case PCI_CLK_33: timings = 0x00921250; break;
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| 241 |
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case PCI_CLK_48: timings = 0x00932470; break;
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case PCI_CLK_66: timings = 0x009436a1; break;
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}
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break;
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case XFER_UDMA_1:
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| 246 |
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switch (pci_clock) {
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case PCI_CLK_33: timings = 0x00911140; break;
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| 248 |
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case PCI_CLK_48: timings = 0x00922260; break;
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| 249 |
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case PCI_CLK_66: timings = 0x00933481; break;
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| 250 |
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}
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| 251 |
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break;
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| 252 |
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case XFER_UDMA_2:
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| 253 |
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switch (pci_clock) {
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| 254 |
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case PCI_CLK_33: timings = 0x00911030; break;
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| 255 |
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case PCI_CLK_48: timings = 0x00922140; break;
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| 256 |
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case PCI_CLK_66: timings = 0x00923261; break;
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| 257 |
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}
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| 258 |
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break;
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| 259 |
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case XFER_MW_DMA_0:
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| 260 |
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switch (pci_clock) {
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| 261 |
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case PCI_CLK_33: timings = 0x00077771; break;
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| 262 |
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case PCI_CLK_48: timings = 0x000bbbb2; break;
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| 263 |
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case PCI_CLK_66: timings = 0x000ffff3; break;
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| 264 |
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}
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| 265 |
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break;
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| 266 |
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case XFER_MW_DMA_1:
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| 267 |
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switch (pci_clock) {
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| 268 |
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case PCI_CLK_33: timings = 0x00012121; break;
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| 269 |
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case PCI_CLK_48: timings = 0x00024241; break;
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| 270 |
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case PCI_CLK_66: timings = 0x00035352; break;
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| 271 |
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}
|
| 272 |
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break;
|
| 273 |
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case XFER_MW_DMA_2:
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| 274 |
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switch (pci_clock) {
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| 275 |
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case PCI_CLK_33: timings = 0x00002020; break;
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| 276 |
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case PCI_CLK_48: timings = 0x00013131; break;
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| 277 |
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case PCI_CLK_66: timings = 0x00015151; break;
|
| 278 |
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}
|
| 279 |
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break;
|
| 280 |
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}
|
| 281 |
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|
| 282 |
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if (timings == 0) {
|
| 283 |
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printk("%s: sc1200_config_dma: huh? mode=%02x clk=%x \n", drive->name, mode, pci_clock);
|
| 284 |
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return 1; /* failure */
|
| 285 |
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}
|
| 286 |
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|
| 287 |
|
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if (unit == 0) { /* are we configuring drive0? */
|
| 288 |
|
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pci_read_config_dword(hwif->pci_dev, basereg+4, ®);
|
| 289 |
|
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timings |= reg & 0x80000000; /* preserve PIO format bit */
|
| 290 |
|
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pci_write_config_dword(hwif->pci_dev, basereg+4, timings);
|
| 291 |
|
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} else {
|
| 292 |
|
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pci_write_config_dword(hwif->pci_dev, basereg+12, timings);
|
| 293 |
|
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}
|
| 294 |
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| 295 |
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outb(inb(hwif->dma_base+2)|(unit?0x40:0x20), hwif->dma_base+2); /* set DMA_capable bit */
|
| 296 |
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|
| 297 |
|
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/*
|
| 298 |
|
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* Finally, turn DMA on in software, and exit.
|
| 299 |
|
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*/
|
| 300 |
|
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return hwif->ide_dma_on(drive); /* success */
|
| 301 |
|
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}
|
| 302 |
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|
|
| 303 |
|
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/*
|
| 304 |
|
|
* sc1200_config_dma() handles selection/setting of DMA/UDMA modes
|
| 305 |
|
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* for both the chipset and drive.
|
| 306 |
|
|
*/
|
| 307 |
|
|
static int sc1200_config_dma (ide_drive_t *drive)
|
| 308 |
|
|
{
|
| 309 |
|
|
return sc1200_config_dma2(drive, sc1200_autoselect_dma_mode(drive));
|
| 310 |
|
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}
|
| 311 |
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|
| 312 |
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|
|
| 313 |
|
|
/* Replacement for the standard ide_dma_end action in
|
| 314 |
|
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* dma_proc.
|
| 315 |
|
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*
|
| 316 |
|
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* returns 1 on error, 0 otherwise
|
| 317 |
|
|
*/
|
| 318 |
|
|
int sc1200_ide_dma_end (ide_drive_t *drive)
|
| 319 |
|
|
{
|
| 320 |
|
|
ide_hwif_t *hwif = HWIF(drive);
|
| 321 |
|
|
unsigned long dma_base = hwif->dma_base;
|
| 322 |
|
|
byte dma_stat;
|
| 323 |
|
|
|
| 324 |
|
|
dma_stat = inb(dma_base+2); /* get DMA status */
|
| 325 |
|
|
|
| 326 |
|
|
if (!(dma_stat & 4))
|
| 327 |
|
|
printk(" ide_dma_end dma_stat=%0x err=%x newerr=%x\n",
|
| 328 |
|
|
dma_stat, ((dma_stat&7)!=4), ((dma_stat&2)==2));
|
| 329 |
|
|
|
| 330 |
|
|
outb(dma_stat|0x1b, dma_base+2); /* clear the INTR & ERROR bits */
|
| 331 |
|
|
outb(inb(dma_base)&~1, dma_base); /* !! DO THIS HERE !! stop DMA */
|
| 332 |
|
|
|
| 333 |
|
|
drive->waiting_for_dma = 0;
|
| 334 |
|
|
ide_destroy_dmatable(drive); /* purge DMA mappings */
|
| 335 |
|
|
|
| 336 |
|
|
return (dma_stat & 7) != 4; /* verify good DMA status */
|
| 337 |
|
|
}
|
| 338 |
|
|
|
| 339 |
|
|
/*
|
| 340 |
|
|
* sc1200_tuneproc() handles selection/setting of PIO modes
|
| 341 |
|
|
* for both the chipset and drive.
|
| 342 |
|
|
*
|
| 343 |
|
|
* All existing BIOSs for this chipset guarantee that all drives
|
| 344 |
|
|
* will have valid default PIO timings set up before we get here.
|
| 345 |
|
|
*/
|
| 346 |
|
|
static void sc1200_tuneproc (ide_drive_t *drive, byte pio) /* mode=255 means "autotune" */
|
| 347 |
|
|
{
|
| 348 |
|
|
ide_hwif_t *hwif = HWIF(drive);
|
| 349 |
|
|
unsigned int format;
|
| 350 |
|
|
static byte modes[5] = {XFER_PIO_0, XFER_PIO_1, XFER_PIO_2, XFER_PIO_3, XFER_PIO_4};
|
| 351 |
|
|
int mode = -1;
|
| 352 |
|
|
|
| 353 |
|
|
switch (pio) {
|
| 354 |
|
|
case 200: mode = XFER_UDMA_0; break;
|
| 355 |
|
|
case 201: mode = XFER_UDMA_1; break;
|
| 356 |
|
|
case 202: mode = XFER_UDMA_2; break;
|
| 357 |
|
|
case 100: mode = XFER_MW_DMA_0; break;
|
| 358 |
|
|
case 101: mode = XFER_MW_DMA_1; break;
|
| 359 |
|
|
case 102: mode = XFER_MW_DMA_2; break;
|
| 360 |
|
|
}
|
| 361 |
|
|
if (mode != -1) {
|
| 362 |
|
|
printk("SC1200: %s: changing (U)DMA mode\n", drive->name);
|
| 363 |
|
|
(void)sc1200_config_dma2(drive, mode);
|
| 364 |
|
|
return;
|
| 365 |
|
|
}
|
| 366 |
|
|
|
| 367 |
|
|
pio = ide_get_best_pio_mode(drive, pio, 4, NULL);
|
| 368 |
|
|
printk("SC1200: %s: setting PIO mode%d\n", drive->name, pio);
|
| 369 |
|
|
if (!sc1200_set_xfer_mode(drive, modes[pio])) {
|
| 370 |
|
|
unsigned int basereg = hwif->channel ? 0x50 : 0x40;
|
| 371 |
|
|
pci_read_config_dword (hwif->pci_dev, basereg+4, &format);
|
| 372 |
|
|
format = (format >> 31) & 1;
|
| 373 |
|
|
if (format)
|
| 374 |
|
|
format += sc1200_get_pci_clock();
|
| 375 |
|
|
pci_write_config_dword(hwif->pci_dev, basereg + (drive->select.b.unit << 3), sc1200_pio_timings[format][pio]);
|
| 376 |
|
|
}
|
| 377 |
|
|
}
|
| 378 |
|
|
|
| 379 |
|
|
static ide_hwif_t *lookup_pci_dev (ide_hwif_t *prev, struct pci_dev *dev)
|
| 380 |
|
|
{
|
| 381 |
|
|
int h;
|
| 382 |
|
|
|
| 383 |
|
|
for (h = 0; h < MAX_HWIFS; h++) {
|
| 384 |
|
|
ide_hwif_t *hwif = &ide_hwifs[h];
|
| 385 |
|
|
if (prev) {
|
| 386 |
|
|
if (hwif == prev)
|
| 387 |
|
|
prev = NULL; // found previous, now look for next match
|
| 388 |
|
|
} else {
|
| 389 |
|
|
if (hwif && hwif->pci_dev == dev)
|
| 390 |
|
|
return hwif; // found next match
|
| 391 |
|
|
}
|
| 392 |
|
|
}
|
| 393 |
|
|
return NULL; // not found
|
| 394 |
|
|
}
|
| 395 |
|
|
|
| 396 |
|
|
typedef struct sc1200_saved_state_s {
|
| 397 |
|
|
__u32 regs[4];
|
| 398 |
|
|
} sc1200_saved_state_t;
|
| 399 |
|
|
|
| 400 |
|
|
static int sc1200_save_state (struct pci_dev *dev, u32 state)
|
| 401 |
|
|
{
|
| 402 |
|
|
ide_hwif_t *hwif = NULL;
|
| 403 |
|
|
|
| 404 |
|
|
printk("SC1200: save_state(%u)\n", state);
|
| 405 |
|
|
if (state != 0)
|
| 406 |
|
|
return 0; // we only save state when going from full power to less
|
| 407 |
|
|
//
|
| 408 |
|
|
// Loop over all interfaces that are part of this PCI device:
|
| 409 |
|
|
//
|
| 410 |
|
|
while ((hwif = lookup_pci_dev(hwif, dev)) != NULL) {
|
| 411 |
|
|
sc1200_saved_state_t *ss;
|
| 412 |
|
|
unsigned int basereg, r;
|
| 413 |
|
|
//
|
| 414 |
|
|
// allocate a permanent save area, if not already allocated
|
| 415 |
|
|
//
|
| 416 |
|
|
ss = (sc1200_saved_state_t *)hwif->config_data;
|
| 417 |
|
|
if (ss == NULL) {
|
| 418 |
|
|
ss = kmalloc(sizeof(sc1200_saved_state_t), GFP_KERNEL);
|
| 419 |
|
|
if (ss == NULL)
|
| 420 |
|
|
return -ENOMEM;
|
| 421 |
|
|
(sc1200_saved_state_t *)hwif->config_data = ss;
|
| 422 |
|
|
}
|
| 423 |
|
|
ss = (sc1200_saved_state_t *)hwif->config_data;
|
| 424 |
|
|
//
|
| 425 |
|
|
// Save timing registers: this may be unnecessary if BIOS also does it
|
| 426 |
|
|
//
|
| 427 |
|
|
basereg = hwif->channel ? 0x50 : 0x40;
|
| 428 |
|
|
for (r = 0; r < 4; ++r) {
|
| 429 |
|
|
pci_read_config_dword (hwif->pci_dev, basereg + (r<<2), &ss->regs[r]);
|
| 430 |
|
|
}
|
| 431 |
|
|
}
|
| 432 |
|
|
return 0;
|
| 433 |
|
|
}
|
| 434 |
|
|
|
| 435 |
|
|
static int sc1200_suspend (struct pci_dev *dev, u32 state)
|
| 436 |
|
|
{
|
| 437 |
|
|
printk("SC1200: suspend(%u)\n", state);
|
| 438 |
|
|
/* You don't need to iterate over disks -- sysfs should have done that for you already */
|
| 439 |
|
|
|
| 440 |
|
|
pci_disable_device(dev);
|
| 441 |
|
|
pci_set_power_state(dev,state);
|
| 442 |
|
|
dev->current_state = state;
|
| 443 |
|
|
return 0;
|
| 444 |
|
|
}
|
| 445 |
|
|
|
| 446 |
|
|
static int sc1200_resume (struct pci_dev *dev)
|
| 447 |
|
|
{
|
| 448 |
|
|
ide_hwif_t *hwif = NULL;
|
| 449 |
|
|
|
| 450 |
|
|
printk("SC1200: resume\n");
|
| 451 |
|
|
pci_set_power_state(dev,0); // bring chip back from sleep state
|
| 452 |
|
|
dev->current_state = 0;
|
| 453 |
|
|
pci_enable_device(dev);
|
| 454 |
|
|
//
|
| 455 |
|
|
// loop over all interfaces that are part of this pci device:
|
| 456 |
|
|
//
|
| 457 |
|
|
while ((hwif = lookup_pci_dev(hwif, dev)) != NULL) {
|
| 458 |
|
|
unsigned int basereg, r, d, format;
|
| 459 |
|
|
sc1200_saved_state_t *ss = (sc1200_saved_state_t *)hwif->config_data;
|
| 460 |
|
|
printk("%s: SC1200: resume\n", hwif->name);
|
| 461 |
|
|
|
| 462 |
|
|
//
|
| 463 |
|
|
// Restore timing registers: this may be unnecessary if BIOS also does it
|
| 464 |
|
|
//
|
| 465 |
|
|
basereg = hwif->channel ? 0x50 : 0x40;
|
| 466 |
|
|
if (ss != NULL) {
|
| 467 |
|
|
for (r = 0; r < 4; ++r) {
|
| 468 |
|
|
pci_write_config_dword(hwif->pci_dev, basereg + (r<<2), ss->regs[r]);
|
| 469 |
|
|
}
|
| 470 |
|
|
}
|
| 471 |
|
|
//
|
| 472 |
|
|
// Re-program drive PIO modes
|
| 473 |
|
|
//
|
| 474 |
|
|
pci_read_config_dword(hwif->pci_dev, basereg+4, &format);
|
| 475 |
|
|
format = (format >> 31) & 1;
|
| 476 |
|
|
if (format)
|
| 477 |
|
|
format += sc1200_get_pci_clock();
|
| 478 |
|
|
for (d = 0; d < 2; ++d) {
|
| 479 |
|
|
ide_drive_t *drive = &(hwif->drives[d]);
|
| 480 |
|
|
if (drive->present) {
|
| 481 |
|
|
unsigned int pio, timings;
|
| 482 |
|
|
pci_read_config_dword(hwif->pci_dev, basereg+(drive->select.b.unit << 3), &timings);
|
| 483 |
|
|
for (pio = 0; pio <= 4; ++pio) {
|
| 484 |
|
|
if (sc1200_pio_timings[format][pio] == timings)
|
| 485 |
|
|
break;
|
| 486 |
|
|
}
|
| 487 |
|
|
if (pio > 4)
|
| 488 |
|
|
pio = 255; /* autotune */
|
| 489 |
|
|
(void)sc1200_tuneproc(drive, pio);
|
| 490 |
|
|
}
|
| 491 |
|
|
}
|
| 492 |
|
|
//
|
| 493 |
|
|
// Re-program drive DMA modes
|
| 494 |
|
|
//
|
| 495 |
|
|
for (d = 0; d < MAX_DRIVES; ++d) {
|
| 496 |
|
|
ide_drive_t *drive = &(hwif->drives[d]);
|
| 497 |
|
|
if (drive->present && !hwif->ide_dma_bad_drive(drive)) {
|
| 498 |
|
|
int was_using_dma = drive->using_dma;
|
| 499 |
|
|
hwif->ide_dma_off_quietly(drive);
|
| 500 |
|
|
sc1200_config_dma(drive);
|
| 501 |
|
|
if (!was_using_dma && drive->using_dma) {
|
| 502 |
|
|
hwif->ide_dma_off_quietly(drive);
|
| 503 |
|
|
}
|
| 504 |
|
|
}
|
| 505 |
|
|
}
|
| 506 |
|
|
}
|
| 507 |
|
|
return 0;
|
| 508 |
|
|
}
|
| 509 |
|
|
|
| 510 |
|
|
/*
|
| 511 |
|
|
* Initialize the sc1200 bridge for reliable IDE DMA operation.
|
| 512 |
|
|
*/
|
| 513 |
|
|
static unsigned int __init init_chipset_sc1200 (struct pci_dev *dev, const char *name)
|
| 514 |
|
|
{
|
| 515 |
|
|
#if defined(DISPLAY_SC1200_TIMINGS) && defined(CONFIG_PROC_FS)
|
| 516 |
|
|
if (!bmide_dev) {
|
| 517 |
|
|
sc1200_proc = 1;
|
| 518 |
|
|
bmide_dev = dev;
|
| 519 |
|
|
ide_pci_register_host_proc(&sc1200_procs[0]);
|
| 520 |
|
|
}
|
| 521 |
|
|
#endif /* DISPLAY_SC1200_TIMINGS && CONFIG_PROC_FS */
|
| 522 |
|
|
return 0;
|
| 523 |
|
|
}
|
| 524 |
|
|
|
| 525 |
|
|
/*
|
| 526 |
|
|
* This gets invoked by the IDE driver once for each channel,
|
| 527 |
|
|
* and performs channel-specific pre-initialization before drive probing.
|
| 528 |
|
|
*/
|
| 529 |
|
|
static void __init init_hwif_sc1200 (ide_hwif_t *hwif)
|
| 530 |
|
|
{
|
| 531 |
|
|
if (hwif->mate)
|
| 532 |
|
|
hwif->serialized = hwif->mate->serialized = 1;
|
| 533 |
|
|
hwif->autodma = 0;
|
| 534 |
|
|
if (hwif->dma_base) {
|
| 535 |
|
|
hwif->ide_dma_check = &sc1200_config_dma;
|
| 536 |
|
|
hwif->ide_dma_end = &sc1200_ide_dma_end;
|
| 537 |
|
|
if (!noautodma)
|
| 538 |
|
|
hwif->autodma = 1;
|
| 539 |
|
|
hwif->tuneproc = &sc1200_tuneproc;
|
| 540 |
|
|
}
|
| 541 |
|
|
hwif->atapi_dma = 1;
|
| 542 |
|
|
hwif->ultra_mask = 0x07;
|
| 543 |
|
|
hwif->mwdma_mask = 0x07;
|
| 544 |
|
|
|
| 545 |
|
|
hwif->drives[0].autodma = hwif->autodma;
|
| 546 |
|
|
hwif->drives[1].autodma = hwif->autodma;
|
| 547 |
|
|
}
|
| 548 |
|
|
|
| 549 |
|
|
static void __init init_dma_sc1200 (ide_hwif_t *hwif, unsigned long dmabase)
|
| 550 |
|
|
{
|
| 551 |
|
|
ide_setup_dma(hwif, dmabase, 8);
|
| 552 |
|
|
}
|
| 553 |
|
|
|
| 554 |
|
|
extern void ide_setup_pci_device(struct pci_dev *, ide_pci_device_t *);
|
| 555 |
|
|
|
| 556 |
|
|
|
| 557 |
|
|
static int __devinit sc1200_init_one(struct pci_dev *dev, const struct pci_device_id *id)
|
| 558 |
|
|
{
|
| 559 |
|
|
ide_pci_device_t *d = &sc1200_chipsets[id->driver_data];
|
| 560 |
|
|
if (dev->device != d->device)
|
| 561 |
|
|
BUG();
|
| 562 |
|
|
ide_setup_pci_device(dev, d);
|
| 563 |
|
|
MOD_INC_USE_COUNT;
|
| 564 |
|
|
return 0;
|
| 565 |
|
|
}
|
| 566 |
|
|
|
| 567 |
|
|
static struct pci_device_id sc1200_pci_tbl[] __devinitdata = {
|
| 568 |
|
|
{ PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SCx200_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
|
| 569 |
|
|
{ 0, },
|
| 570 |
|
|
};
|
| 571 |
|
|
|
| 572 |
|
|
static struct pci_driver driver = {
|
| 573 |
|
|
.name = "SC1200 IDE",
|
| 574 |
|
|
.id_table = sc1200_pci_tbl,
|
| 575 |
|
|
.probe = sc1200_init_one,
|
| 576 |
|
|
.save_state = sc1200_save_state,
|
| 577 |
|
|
.suspend = sc1200_suspend,
|
| 578 |
|
|
.resume = sc1200_resume,
|
| 579 |
|
|
};
|
| 580 |
|
|
|
| 581 |
|
|
static int sc1200_ide_init(void)
|
| 582 |
|
|
{
|
| 583 |
|
|
return ide_pci_register_driver(&driver);
|
| 584 |
|
|
}
|
| 585 |
|
|
|
| 586 |
|
|
static void sc1200_ide_exit(void)
|
| 587 |
|
|
{
|
| 588 |
|
|
ide_pci_unregister_driver(&driver);
|
| 589 |
|
|
}
|
| 590 |
|
|
|
| 591 |
|
|
module_init(sc1200_ide_init);
|
| 592 |
|
|
module_exit(sc1200_ide_exit);
|
| 593 |
|
|
|
| 594 |
|
|
MODULE_AUTHOR("Mark Lord");
|
| 595 |
|
|
MODULE_DESCRIPTION("PCI driver module for NS SC1200 IDE");
|
| 596 |
|
|
MODULE_LICENSE("GPL");
|
| 597 |
|
|
|
| 598 |
|
|
EXPORT_NO_SYMBOLS;
|
