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1275 |
phoenix |
/*
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* Copyright (c) 2000-2003 LSI Logic Corporation.
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*
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*
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* Name: MPI_CNFG.H
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* Title: MPI Config message, structures, and Pages
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* Creation Date: July 27, 2000
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*
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* MPI_CNFG.H Version: 01.02.12
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*
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* Version History
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* ---------------
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*
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* Date Version Description
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* -------- -------- ------------------------------------------------------
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* 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
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* 06-06-00 01.00.01 Update version number for 1.0 release.
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* 06-08-00 01.00.02 Added _PAGEVERSION definitions for all pages.
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* Added FcPhLowestVersion, FcPhHighestVersion, Reserved2
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* fields to FC_DEVICE_0 page, updated the page version.
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* Changed _FREE_RUNNING_CLOCK to _PACING_TRANSFERS in
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* SCSI_PORT_0, SCSI_DEVICE_0 and SCSI_DEVICE_1 pages
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* and updated the page versions.
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* Added _RESPONSE_ID_MASK definition to SCSI_PORT_1
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* page and updated the page version.
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* Added Information field and _INFO_PARAMS_NEGOTIATED
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* definitionto SCSI_DEVICE_0 page.
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* 06-22-00 01.00.03 Removed batch controls from LAN_0 page and updated the
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* page version.
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* Added BucketsRemaining to LAN_1 page, redefined the
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* state values, and updated the page version.
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* Revised bus width definitions in SCSI_PORT_0,
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* SCSI_DEVICE_0 and SCSI_DEVICE_1 pages.
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* 06-30-00 01.00.04 Added MaxReplySize to LAN_1 page and updated the page
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* version.
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* Moved FC_DEVICE_0 PageAddress description to spec.
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* 07-27-00 01.00.05 Corrected the SubsystemVendorID and SubsystemID field
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* widths in IOC_0 page and updated the page version.
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* 11-02-00 01.01.01 Original release for post 1.0 work
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* Added Manufacturing pages, IO Unit Page 2, SCSI SPI
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* Port Page 2, FC Port Page 4, FC Port Page 5
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* 11-15-00 01.01.02 Interim changes to match proposals
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* 12-04-00 01.01.03 Config page changes to match MPI rev 1.00.01.
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* 12-05-00 01.01.04 Modified config page actions.
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* 01-09-01 01.01.05 Added defines for page address formats.
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* Data size for Manufacturing pages 2 and 3 no longer
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* defined here.
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* Io Unit Page 2 size is fixed at 4 adapters and some
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* flags were changed.
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* SCSI Port Page 2 Device Settings modified.
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* New fields added to FC Port Page 0 and some flags
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* cleaned up.
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* Removed impedance flash from FC Port Page 1.
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* Added FC Port pages 6 and 7.
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* 01-25-01 01.01.06 Added MaxInitiators field to FcPortPage0.
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* 01-29-01 01.01.07 Changed some defines to make them 32 character unique.
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* Added some LinkType defines for FcPortPage0.
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* 02-20-01 01.01.08 Started using MPI_POINTER.
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* 02-27-01 01.01.09 Replaced MPI_CONFIG_PAGETYPE_SCSI_LUN with
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* MPI_CONFIG_PAGETYPE_RAID_VOLUME.
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* Added definitions and structures for IOC Page 2 and
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* RAID Volume Page 2.
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* 03-27-01 01.01.10 Added CONFIG_PAGE_FC_PORT_8 and CONFIG_PAGE_FC_PORT_9.
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* CONFIG_PAGE_FC_PORT_3 now supports persistent by DID.
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* Added VendorId and ProductRevLevel fields to
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* RAIDVOL2_IM_PHYS_ID struct.
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* Modified values for MPI_FCPORTPAGE0_FLAGS_ATTACH_
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* defines to make them compatible to MPI version 1.0.
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* Added structure offset comments.
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* 04-09-01 01.01.11 Added some new defines for the PageAddress field and
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* removed some obsolete ones.
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* Added IO Unit Page 3.
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* Modified defines for Scsi Port Page 2.
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* Modified RAID Volume Pages.
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* 08-08-01 01.02.01 Original release for v1.2 work.
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* Added SepID and SepBus to RVP2 IMPhysicalDisk struct.
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* Added defines for the SEP bits in RVP2 VolumeSettings.
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* Modified the DeviceSettings field in RVP2 to use the
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* proper structure.
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* Added defines for SES, SAF-TE, and cross channel for
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* IOCPage2 CapabilitiesFlags.
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* Removed define for MPI_IOUNITPAGE2_FLAGS_RAID_DISABLE.
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* Removed define for
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* MPI_SCSIPORTPAGE2_PORT_FLAGS_PARITY_ENABLE.
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* Added define for MPI_CONFIG_PAGEATTR_RO_PERSISTENT.
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* 08-29-01 01.02.02 Fixed value for MPI_MANUFACTPAGE_DEVID_53C1035.
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* Added defines for MPI_FCPORTPAGE1_FLAGS_HARD_ALPA_ONLY
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* and MPI_FCPORTPAGE1_FLAGS_IMMEDIATE_ERROR_REPLY.
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* Removed MPI_SCSIPORTPAGE0_CAP_PACING_TRANSFERS,
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* MPI_SCSIDEVPAGE0_NP_PACING_TRANSFERS, and
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* MPI_SCSIDEVPAGE1_RP_PACING_TRANSFERS, and
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* MPI_SCSIDEVPAGE1_CONF_PPR_ALLOWED.
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* Added defines for MPI_SCSIDEVPAGE1_CONF_WDTR_DISALLOWED
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* and MPI_SCSIDEVPAGE1_CONF_SDTR_DISALLOWED.
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* Added OnBusTimerValue to CONFIG_PAGE_SCSI_PORT_1.
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* Added rejected bits to SCSI Device Page 0 Information.
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* Increased size of ALPA array in FC Port Page 2 by one
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* and removed a one byte reserved field.
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* 09-28-01 01.02.03 Swapped NegWireSpeedLow and NegWireSpeedLow in
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* CONFIG_PAGE_LAN_1 to match preferred 64-bit ordering.
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* Added structures for Manufacturing Page 4, IO Unit
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* Page 3, IOC Page 3, IOC Page 4, RAID Volume Page 0, and
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* RAID PhysDisk Page 0.
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* 10-04-01 01.02.04 Added define for MPI_CONFIG_PAGETYPE_RAID_PHYSDISK.
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* Modified some of the new defines to make them 32
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* character unique.
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* Modified how variable length pages (arrays) are defined.
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* Added generic defines for hot spare pools and RAID
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* volume types.
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* 11-01-01 01.02.05 Added define for MPI_IOUNITPAGE1_DISABLE_IR.
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* 03-14-02 01.02.06 Added PCISlotNum field to CONFIG_PAGE_IOC_1 along with
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* related define, and bumped the page version define.
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* 05-31-02 01.02.07 Added a Flags field to CONFIG_PAGE_IOC_2_RAID_VOL in a
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* reserved byte and added a define.
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* Added define for
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* MPI_RAIDVOL0_STATUS_FLAG_VOLUME_INACTIVE.
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* Added new config page: CONFIG_PAGE_IOC_5.
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* Added MaxAliases, MaxHardAliases, and NumCurrentAliases
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* fields to CONFIG_PAGE_FC_PORT_0.
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* Added AltConnector and NumRequestedAliases fields to
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* CONFIG_PAGE_FC_PORT_1.
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* Added new config page: CONFIG_PAGE_FC_PORT_10.
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* 07-12-02 01.02.08 Added more MPI_MANUFACTPAGE_DEVID_ defines.
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* Added additional MPI_SCSIDEVPAGE0_NP_ defines.
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* Added more MPI_SCSIDEVPAGE1_RP_ defines.
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* Added define for
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* MPI_SCSIDEVPAGE1_CONF_EXTENDED_PARAMS_ENABLE.
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* Added new config page: CONFIG_PAGE_SCSI_DEVICE_3.
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* Modified MPI_FCPORTPAGE5_FLAGS_ defines.
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* 09-16-02 01.02.09 Added MPI_SCSIDEVPAGE1_CONF_FORCE_PPR_MSG define.
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* 11-15-02 01.02.10 Added ConnectedID defines for CONFIG_PAGE_SCSI_PORT_0.
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* Added more Flags defines for CONFIG_PAGE_FC_PORT_1.
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* Added more Flags defines for CONFIG_PAGE_FC_DEVICE_0.
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* 04-01-03 01.02.11 Added RR_TOV field and additional Flags defines for
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* CONFIG_PAGE_FC_PORT_1.
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* Added define MPI_FCPORTPAGE5_FLAGS_DISABLE to disable
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* an alias.
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* Added more device id defines.
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* 06-26-03 01.02.12 Added MPI_IOUNITPAGE1_IR_USE_STATIC_VOLUME_ID define.
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* Added TargetConfig and IDConfig fields to
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* CONFIG_PAGE_SCSI_PORT_1.
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* Added more PortFlags defines for CONFIG_PAGE_SCSI_PORT_2
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* to control DV.
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* Added more Flags defines for CONFIG_PAGE_FC_PORT_1.
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* In CONFIG_PAGE_FC_DEVICE_0, replaced Reserved1 field
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* with ADISCHardALPA.
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* Added MPI_FC_DEVICE_PAGE0_PROT_FCP_RETRY define.
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* --------------------------------------------------------------------------
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*/
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#ifndef MPI_CNFG_H
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#define MPI_CNFG_H
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/*****************************************************************************
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*
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* C o n f i g M e s s a g e a n d S t r u c t u r e s
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*
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*****************************************************************************/
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typedef struct _CONFIG_PAGE_HEADER
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{
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U8 PageVersion; /* 00h */
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U8 PageLength; /* 01h */
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U8 PageNumber; /* 02h */
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U8 PageType; /* 03h */
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} fCONFIG_PAGE_HEADER, MPI_POINTER PTR_CONFIG_PAGE_HEADER,
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ConfigPageHeader_t, MPI_POINTER pConfigPageHeader_t;
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typedef union _CONFIG_PAGE_HEADER_UNION
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{
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ConfigPageHeader_t Struct;
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U8 Bytes[4];
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U16 Word16[2];
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U32 Word32;
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} ConfigPageHeaderUnion, MPI_POINTER pConfigPageHeaderUnion,
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fCONFIG_PAGE_HEADER_UNION, MPI_POINTER PTR_CONFIG_PAGE_HEADER_UNION;
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/****************************************************************************
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* PageType field values
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****************************************************************************/
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#define MPI_CONFIG_PAGEATTR_READ_ONLY (0x00)
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#define MPI_CONFIG_PAGEATTR_CHANGEABLE (0x10)
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#define MPI_CONFIG_PAGEATTR_PERSISTENT (0x20)
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#define MPI_CONFIG_PAGEATTR_RO_PERSISTENT (0x30)
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#define MPI_CONFIG_PAGEATTR_MASK (0xF0)
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#define MPI_CONFIG_PAGETYPE_IO_UNIT (0x00)
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#define MPI_CONFIG_PAGETYPE_IOC (0x01)
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#define MPI_CONFIG_PAGETYPE_BIOS (0x02)
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#define MPI_CONFIG_PAGETYPE_SCSI_PORT (0x03)
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#define MPI_CONFIG_PAGETYPE_SCSI_DEVICE (0x04)
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#define MPI_CONFIG_PAGETYPE_FC_PORT (0x05)
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#define MPI_CONFIG_PAGETYPE_FC_DEVICE (0x06)
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#define MPI_CONFIG_PAGETYPE_LAN (0x07)
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#define MPI_CONFIG_PAGETYPE_RAID_VOLUME (0x08)
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#define MPI_CONFIG_PAGETYPE_MANUFACTURING (0x09)
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#define MPI_CONFIG_PAGETYPE_RAID_PHYSDISK (0x0A)
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#define MPI_CONFIG_PAGETYPE_MASK (0x0F)
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#define MPI_CONFIG_TYPENUM_MASK (0x0FFF)
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/****************************************************************************
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* PageAddress field values
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****************************************************************************/
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#define MPI_SCSI_PORT_PGAD_PORT_MASK (0x000000FF)
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#define MPI_SCSI_DEVICE_TARGET_ID_MASK (0x000000FF)
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#define MPI_SCSI_DEVICE_TARGET_ID_SHIFT (0)
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#define MPI_SCSI_DEVICE_BUS_MASK (0x0000FF00)
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#define MPI_SCSI_DEVICE_BUS_SHIFT (8)
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#define MPI_FC_PORT_PGAD_PORT_MASK (0xF0000000)
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#define MPI_FC_PORT_PGAD_PORT_SHIFT (28)
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#define MPI_FC_PORT_PGAD_FORM_MASK (0x0F000000)
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#define MPI_FC_PORT_PGAD_FORM_INDEX (0x01000000)
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#define MPI_FC_PORT_PGAD_INDEX_MASK (0x0000FFFF)
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#define MPI_FC_PORT_PGAD_INDEX_SHIFT (0)
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#define MPI_FC_DEVICE_PGAD_PORT_MASK (0xF0000000)
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#define MPI_FC_DEVICE_PGAD_PORT_SHIFT (28)
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#define MPI_FC_DEVICE_PGAD_FORM_MASK (0x0F000000)
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#define MPI_FC_DEVICE_PGAD_FORM_NEXT_DID (0x00000000)
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#define MPI_FC_DEVICE_PGAD_ND_PORT_MASK (0xF0000000)
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#define MPI_FC_DEVICE_PGAD_ND_PORT_SHIFT (28)
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#define MPI_FC_DEVICE_PGAD_ND_DID_MASK (0x00FFFFFF)
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#define MPI_FC_DEVICE_PGAD_ND_DID_SHIFT (0)
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#define MPI_FC_DEVICE_PGAD_FORM_BUS_TID (0x01000000)
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#define MPI_FC_DEVICE_PGAD_BT_BUS_MASK (0x0000FF00)
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#define MPI_FC_DEVICE_PGAD_BT_BUS_SHIFT (8)
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#define MPI_FC_DEVICE_PGAD_BT_TID_MASK (0x000000FF)
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#define MPI_FC_DEVICE_PGAD_BT_TID_SHIFT (0)
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#define MPI_PHYSDISK_PGAD_PHYSDISKNUM_MASK (0x000000FF)
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#define MPI_PHYSDISK_PGAD_PHYSDISKNUM_SHIFT (0)
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| 238 |
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| 239 |
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| 241 |
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/****************************************************************************
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| 242 |
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* Config Request Message
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****************************************************************************/
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| 244 |
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typedef struct _MSG_CONFIG
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{
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U8 Action; /* 00h */
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U8 Reserved; /* 01h */
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U8 ChainOffset; /* 02h */
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U8 Function; /* 03h */
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U8 Reserved1[3]; /* 04h */
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U8 MsgFlags; /* 07h */
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U32 MsgContext; /* 08h */
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U8 Reserved2[8]; /* 0Ch */
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| 254 |
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fCONFIG_PAGE_HEADER Header; /* 14h */
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U32 PageAddress; /* 18h */
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SGE_IO_UNION PageBufferSGE; /* 1Ch */
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} MSG_CONFIG, MPI_POINTER PTR_MSG_CONFIG,
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Config_t, MPI_POINTER pConfig_t;
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| 259 |
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/****************************************************************************
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* Action field values
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****************************************************************************/
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#define MPI_CONFIG_ACTION_PAGE_HEADER (0x00)
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#define MPI_CONFIG_ACTION_PAGE_READ_CURRENT (0x01)
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#define MPI_CONFIG_ACTION_PAGE_WRITE_CURRENT (0x02)
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#define MPI_CONFIG_ACTION_PAGE_DEFAULT (0x03)
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#define MPI_CONFIG_ACTION_PAGE_WRITE_NVRAM (0x04)
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#define MPI_CONFIG_ACTION_PAGE_READ_DEFAULT (0x05)
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#define MPI_CONFIG_ACTION_PAGE_READ_NVRAM (0x06)
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/* Config Reply Message */
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typedef struct _MSG_CONFIG_REPLY
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{
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U8 Action; /* 00h */
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U8 Reserved; /* 01h */
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U8 MsgLength; /* 02h */
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U8 Function; /* 03h */
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U8 Reserved1[3]; /* 04h */
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U8 MsgFlags; /* 07h */
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U32 MsgContext; /* 08h */
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U8 Reserved2[2]; /* 0Ch */
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| 284 |
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U16 IOCStatus; /* 0Eh */
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U32 IOCLogInfo; /* 10h */
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fCONFIG_PAGE_HEADER Header; /* 14h */
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|
|
} MSG_CONFIG_REPLY, MPI_POINTER PTR_MSG_CONFIG_REPLY,
|
| 288 |
|
|
ConfigReply_t, MPI_POINTER pConfigReply_t;
|
| 289 |
|
|
|
| 290 |
|
|
|
| 291 |
|
|
|
| 292 |
|
|
/*****************************************************************************
|
| 293 |
|
|
*
|
| 294 |
|
|
* C o n f i g u r a t i o n P a g e s
|
| 295 |
|
|
*
|
| 296 |
|
|
*****************************************************************************/
|
| 297 |
|
|
|
| 298 |
|
|
/****************************************************************************
|
| 299 |
|
|
* Manufacturing Config pages
|
| 300 |
|
|
****************************************************************************/
|
| 301 |
|
|
#define MPI_MANUFACTPAGE_VENDORID_LSILOGIC (0x1000)
|
| 302 |
|
|
#define MPI_MANUFACTPAGE_VENDORID_TREBIA (0x1783)
|
| 303 |
|
|
|
| 304 |
|
|
#define MPI_MANUFACTPAGE_DEVICEID_FC909 (0x0621)
|
| 305 |
|
|
#define MPI_MANUFACTPAGE_DEVICEID_FC919 (0x0624)
|
| 306 |
|
|
#define MPI_MANUFACTPAGE_DEVICEID_FC929 (0x0622)
|
| 307 |
|
|
#define MPI_MANUFACTPAGE_DEVICEID_FC919X (0x0628)
|
| 308 |
|
|
#define MPI_MANUFACTPAGE_DEVICEID_FC929X (0x0626)
|
| 309 |
|
|
|
| 310 |
|
|
#define MPI_MANUFACTPAGE_DEVID_53C1030 (0x0030)
|
| 311 |
|
|
#define MPI_MANUFACTPAGE_DEVID_53C1030ZC (0x0031)
|
| 312 |
|
|
#define MPI_MANUFACTPAGE_DEVID_1030_53C1035 (0x0032)
|
| 313 |
|
|
#define MPI_MANUFACTPAGE_DEVID_1030ZC_53C1035 (0x0033)
|
| 314 |
|
|
#define MPI_MANUFACTPAGE_DEVID_53C1035 (0x0040)
|
| 315 |
|
|
#define MPI_MANUFACTPAGE_DEVID_53C1035ZC (0x0041)
|
| 316 |
|
|
|
| 317 |
|
|
#define MPI_MANUFACTPAGE_DEVID_SA2010 (0x0804)
|
| 318 |
|
|
#define MPI_MANUFACTPAGE_DEVID_SA2010ZC (0x0805)
|
| 319 |
|
|
#define MPI_MANUFACTPAGE_DEVID_SA2020 (0x0806)
|
| 320 |
|
|
#define MPI_MANUFACTPAGE_DEVID_SA2020ZC (0x0807)
|
| 321 |
|
|
|
| 322 |
|
|
#define MPI_MANUFACTPAGE_DEVID_SNP1000 (0x0010)
|
| 323 |
|
|
#define MPI_MANUFACTPAGE_DEVID_SNP500 (0x0020)
|
| 324 |
|
|
|
| 325 |
|
|
|
| 326 |
|
|
|
| 327 |
|
|
typedef struct _CONFIG_PAGE_MANUFACTURING_0
|
| 328 |
|
|
{
|
| 329 |
|
|
fCONFIG_PAGE_HEADER Header; /* 00h */
|
| 330 |
|
|
U8 ChipName[16]; /* 04h */
|
| 331 |
|
|
U8 ChipRevision[8]; /* 14h */
|
| 332 |
|
|
U8 BoardName[16]; /* 1Ch */
|
| 333 |
|
|
U8 BoardAssembly[16]; /* 2Ch */
|
| 334 |
|
|
U8 BoardTracerNumber[16]; /* 3Ch */
|
| 335 |
|
|
|
| 336 |
|
|
} fCONFIG_PAGE_MANUFACTURING_0, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_0,
|
| 337 |
|
|
ManufacturingPage0_t, MPI_POINTER pManufacturingPage0_t;
|
| 338 |
|
|
|
| 339 |
|
|
#define MPI_MANUFACTURING0_PAGEVERSION (0x00)
|
| 340 |
|
|
|
| 341 |
|
|
|
| 342 |
|
|
typedef struct _CONFIG_PAGE_MANUFACTURING_1
|
| 343 |
|
|
{
|
| 344 |
|
|
fCONFIG_PAGE_HEADER Header; /* 00h */
|
| 345 |
|
|
U8 VPD[256]; /* 04h */
|
| 346 |
|
|
} fCONFIG_PAGE_MANUFACTURING_1, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_1,
|
| 347 |
|
|
ManufacturingPage1_t, MPI_POINTER pManufacturingPage1_t;
|
| 348 |
|
|
|
| 349 |
|
|
#define MPI_MANUFACTURING1_PAGEVERSION (0x00)
|
| 350 |
|
|
|
| 351 |
|
|
|
| 352 |
|
|
typedef struct _MPI_CHIP_REVISION_ID
|
| 353 |
|
|
{
|
| 354 |
|
|
U16 DeviceID; /* 00h */
|
| 355 |
|
|
U8 PCIRevisionID; /* 02h */
|
| 356 |
|
|
U8 Reserved; /* 03h */
|
| 357 |
|
|
} MPI_CHIP_REVISION_ID, MPI_POINTER PTR_MPI_CHIP_REVISION_ID,
|
| 358 |
|
|
MpiChipRevisionId_t, MPI_POINTER pMpiChipRevisionId_t;
|
| 359 |
|
|
|
| 360 |
|
|
|
| 361 |
|
|
/*
|
| 362 |
|
|
* Host code (drivers, BIOS, utilities, etc.) should leave this define set to
|
| 363 |
|
|
* one and check Header.PageLength at runtime.
|
| 364 |
|
|
*/
|
| 365 |
|
|
#ifndef MPI_MAN_PAGE_2_HW_SETTINGS_WORDS
|
| 366 |
|
|
#define MPI_MAN_PAGE_2_HW_SETTINGS_WORDS (1)
|
| 367 |
|
|
#endif
|
| 368 |
|
|
|
| 369 |
|
|
typedef struct _CONFIG_PAGE_MANUFACTURING_2
|
| 370 |
|
|
{
|
| 371 |
|
|
fCONFIG_PAGE_HEADER Header; /* 00h */
|
| 372 |
|
|
MPI_CHIP_REVISION_ID ChipId; /* 04h */
|
| 373 |
|
|
U32 HwSettings[MPI_MAN_PAGE_2_HW_SETTINGS_WORDS];/* 08h */
|
| 374 |
|
|
} fCONFIG_PAGE_MANUFACTURING_2, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_2,
|
| 375 |
|
|
ManufacturingPage2_t, MPI_POINTER pManufacturingPage2_t;
|
| 376 |
|
|
|
| 377 |
|
|
#define MPI_MANUFACTURING2_PAGEVERSION (0x00)
|
| 378 |
|
|
|
| 379 |
|
|
|
| 380 |
|
|
/*
|
| 381 |
|
|
* Host code (drivers, BIOS, utilities, etc.) should leave this define set to
|
| 382 |
|
|
* one and check Header.PageLength at runtime.
|
| 383 |
|
|
*/
|
| 384 |
|
|
#ifndef MPI_MAN_PAGE_3_INFO_WORDS
|
| 385 |
|
|
#define MPI_MAN_PAGE_3_INFO_WORDS (1)
|
| 386 |
|
|
#endif
|
| 387 |
|
|
|
| 388 |
|
|
typedef struct _CONFIG_PAGE_MANUFACTURING_3
|
| 389 |
|
|
{
|
| 390 |
|
|
fCONFIG_PAGE_HEADER Header; /* 00h */
|
| 391 |
|
|
MPI_CHIP_REVISION_ID ChipId; /* 04h */
|
| 392 |
|
|
U32 Info[MPI_MAN_PAGE_3_INFO_WORDS];/* 08h */
|
| 393 |
|
|
} fCONFIG_PAGE_MANUFACTURING_3, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_3,
|
| 394 |
|
|
ManufacturingPage3_t, MPI_POINTER pManufacturingPage3_t;
|
| 395 |
|
|
|
| 396 |
|
|
#define MPI_MANUFACTURING3_PAGEVERSION (0x00)
|
| 397 |
|
|
|
| 398 |
|
|
|
| 399 |
|
|
typedef struct _CONFIG_PAGE_MANUFACTURING_4
|
| 400 |
|
|
{
|
| 401 |
|
|
fCONFIG_PAGE_HEADER Header; /* 00h */
|
| 402 |
|
|
U32 Reserved1; /* 04h */
|
| 403 |
|
|
U8 InfoOffset0; /* 08h */
|
| 404 |
|
|
U8 InfoSize0; /* 09h */
|
| 405 |
|
|
U8 InfoOffset1; /* 0Ah */
|
| 406 |
|
|
U8 InfoSize1; /* 0Bh */
|
| 407 |
|
|
U8 InquirySize; /* 0Ch */
|
| 408 |
|
|
U8 Reserved2; /* 0Dh */
|
| 409 |
|
|
U16 Reserved3; /* 0Eh */
|
| 410 |
|
|
U8 InquiryData[56]; /* 10h */
|
| 411 |
|
|
U32 ISVolumeSettings; /* 48h */
|
| 412 |
|
|
U32 IMEVolumeSettings; /* 4Ch */
|
| 413 |
|
|
U32 IMVolumeSettings; /* 50h */
|
| 414 |
|
|
} fCONFIG_PAGE_MANUFACTURING_4, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_4,
|
| 415 |
|
|
ManufacturingPage4_t, MPI_POINTER pManufacturingPage4_t;
|
| 416 |
|
|
|
| 417 |
|
|
#define MPI_MANUFACTURING4_PAGEVERSION (0x00)
|
| 418 |
|
|
|
| 419 |
|
|
|
| 420 |
|
|
/****************************************************************************
|
| 421 |
|
|
* IO Unit Config Pages
|
| 422 |
|
|
****************************************************************************/
|
| 423 |
|
|
|
| 424 |
|
|
typedef struct _CONFIG_PAGE_IO_UNIT_0
|
| 425 |
|
|
{
|
| 426 |
|
|
fCONFIG_PAGE_HEADER Header; /* 00h */
|
| 427 |
|
|
U64 UniqueValue; /* 04h */
|
| 428 |
|
|
} fCONFIG_PAGE_IO_UNIT_0, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_0,
|
| 429 |
|
|
IOUnitPage0_t, MPI_POINTER pIOUnitPage0_t;
|
| 430 |
|
|
|
| 431 |
|
|
#define MPI_IOUNITPAGE0_PAGEVERSION (0x00)
|
| 432 |
|
|
|
| 433 |
|
|
|
| 434 |
|
|
typedef struct _CONFIG_PAGE_IO_UNIT_1
|
| 435 |
|
|
{
|
| 436 |
|
|
fCONFIG_PAGE_HEADER Header; /* 00h */
|
| 437 |
|
|
U32 Flags; /* 04h */
|
| 438 |
|
|
} fCONFIG_PAGE_IO_UNIT_1, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_1,
|
| 439 |
|
|
IOUnitPage1_t, MPI_POINTER pIOUnitPage1_t;
|
| 440 |
|
|
|
| 441 |
|
|
#define MPI_IOUNITPAGE1_PAGEVERSION (0x00)
|
| 442 |
|
|
|
| 443 |
|
|
/* IO Unit Page 1 Flags defines */
|
| 444 |
|
|
|
| 445 |
|
|
#define MPI_IOUNITPAGE1_MULTI_FUNCTION (0x00000000)
|
| 446 |
|
|
#define MPI_IOUNITPAGE1_SINGLE_FUNCTION (0x00000001)
|
| 447 |
|
|
#define MPI_IOUNITPAGE1_MULTI_PATHING (0x00000002)
|
| 448 |
|
|
#define MPI_IOUNITPAGE1_SINGLE_PATHING (0x00000000)
|
| 449 |
|
|
#define MPI_IOUNITPAGE1_IR_USE_STATIC_VOLUME_ID (0x00000004)
|
| 450 |
|
|
#define MPI_IOUNITPAGE1_DISABLE_IR (0x00000040)
|
| 451 |
|
|
#define MPI_IOUNITPAGE1_FORCE_32 (0x00000080)
|
| 452 |
|
|
|
| 453 |
|
|
|
| 454 |
|
|
typedef struct _MPI_ADAPTER_INFO
|
| 455 |
|
|
{
|
| 456 |
|
|
U8 PciBusNumber; /* 00h */
|
| 457 |
|
|
U8 PciDeviceAndFunctionNumber; /* 01h */
|
| 458 |
|
|
U16 AdapterFlags; /* 02h */
|
| 459 |
|
|
} MPI_ADAPTER_INFO, MPI_POINTER PTR_MPI_ADAPTER_INFO,
|
| 460 |
|
|
MpiAdapterInfo_t, MPI_POINTER pMpiAdapterInfo_t;
|
| 461 |
|
|
|
| 462 |
|
|
#define MPI_ADAPTER_INFO_FLAGS_EMBEDDED (0x0001)
|
| 463 |
|
|
#define MPI_ADAPTER_INFO_FLAGS_INIT_STATUS (0x0002)
|
| 464 |
|
|
|
| 465 |
|
|
typedef struct _CONFIG_PAGE_IO_UNIT_2
|
| 466 |
|
|
{
|
| 467 |
|
|
fCONFIG_PAGE_HEADER Header; /* 00h */
|
| 468 |
|
|
U32 Flags; /* 04h */
|
| 469 |
|
|
U32 BiosVersion; /* 08h */
|
| 470 |
|
|
MPI_ADAPTER_INFO AdapterOrder[4]; /* 0Ch */
|
| 471 |
|
|
} fCONFIG_PAGE_IO_UNIT_2, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_2,
|
| 472 |
|
|
IOUnitPage2_t, MPI_POINTER pIOUnitPage2_t;
|
| 473 |
|
|
|
| 474 |
|
|
#define MPI_IOUNITPAGE2_PAGEVERSION (0x00)
|
| 475 |
|
|
|
| 476 |
|
|
#define MPI_IOUNITPAGE2_FLAGS_PAUSE_ON_ERROR (0x00000002)
|
| 477 |
|
|
#define MPI_IOUNITPAGE2_FLAGS_VERBOSE_ENABLE (0x00000004)
|
| 478 |
|
|
#define MPI_IOUNITPAGE2_FLAGS_COLOR_VIDEO_DISABLE (0x00000008)
|
| 479 |
|
|
#define MPI_IOUNITPAGE2_FLAGS_DONT_HOOK_INT_40 (0x00000010)
|
| 480 |
|
|
|
| 481 |
|
|
|
| 482 |
|
|
/*
|
| 483 |
|
|
* Host code (drivers, BIOS, utilities, etc.) should leave this define set to
|
| 484 |
|
|
* one and check Header.PageLength at runtime.
|
| 485 |
|
|
*/
|
| 486 |
|
|
#ifndef MPI_IO_UNIT_PAGE_3_GPIO_VAL_MAX
|
| 487 |
|
|
#define MPI_IO_UNIT_PAGE_3_GPIO_VAL_MAX (1)
|
| 488 |
|
|
#endif
|
| 489 |
|
|
|
| 490 |
|
|
typedef struct _CONFIG_PAGE_IO_UNIT_3
|
| 491 |
|
|
{
|
| 492 |
|
|
fCONFIG_PAGE_HEADER Header; /* 00h */
|
| 493 |
|
|
U8 GPIOCount; /* 04h */
|
| 494 |
|
|
U8 Reserved1; /* 05h */
|
| 495 |
|
|
U16 Reserved2; /* 06h */
|
| 496 |
|
|
U16 GPIOVal[MPI_IO_UNIT_PAGE_3_GPIO_VAL_MAX]; /* 08h */
|
| 497 |
|
|
} fCONFIG_PAGE_IO_UNIT_3, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_3,
|
| 498 |
|
|
IOUnitPage3_t, MPI_POINTER pIOUnitPage3_t;
|
| 499 |
|
|
|
| 500 |
|
|
#define MPI_IOUNITPAGE3_PAGEVERSION (0x01)
|
| 501 |
|
|
|
| 502 |
|
|
#define MPI_IOUNITPAGE3_GPIO_FUNCTION_MASK (0xFC)
|
| 503 |
|
|
#define MPI_IOUNITPAGE3_GPIO_FUNCTION_SHIFT (2)
|
| 504 |
|
|
#define MPI_IOUNITPAGE3_GPIO_SETTING_OFF (0x00)
|
| 505 |
|
|
#define MPI_IOUNITPAGE3_GPIO_SETTING_ON (0x01)
|
| 506 |
|
|
|
| 507 |
|
|
|
| 508 |
|
|
/****************************************************************************
|
| 509 |
|
|
* IOC Config Pages
|
| 510 |
|
|
****************************************************************************/
|
| 511 |
|
|
|
| 512 |
|
|
typedef struct _CONFIG_PAGE_IOC_0
|
| 513 |
|
|
{
|
| 514 |
|
|
fCONFIG_PAGE_HEADER Header; /* 00h */
|
| 515 |
|
|
U32 TotalNVStore; /* 04h */
|
| 516 |
|
|
U32 FreeNVStore; /* 08h */
|
| 517 |
|
|
U16 VendorID; /* 0Ch */
|
| 518 |
|
|
U16 DeviceID; /* 0Eh */
|
| 519 |
|
|
U8 RevisionID; /* 10h */
|
| 520 |
|
|
U8 Reserved[3]; /* 11h */
|
| 521 |
|
|
U32 ClassCode; /* 14h */
|
| 522 |
|
|
U16 SubsystemVendorID; /* 18h */
|
| 523 |
|
|
U16 SubsystemID; /* 1Ah */
|
| 524 |
|
|
} fCONFIG_PAGE_IOC_0, MPI_POINTER PTR_CONFIG_PAGE_IOC_0,
|
| 525 |
|
|
IOCPage0_t, MPI_POINTER pIOCPage0_t;
|
| 526 |
|
|
|
| 527 |
|
|
#define MPI_IOCPAGE0_PAGEVERSION (0x01)
|
| 528 |
|
|
|
| 529 |
|
|
|
| 530 |
|
|
typedef struct _CONFIG_PAGE_IOC_1
|
| 531 |
|
|
{
|
| 532 |
|
|
fCONFIG_PAGE_HEADER Header; /* 00h */
|
| 533 |
|
|
U32 Flags; /* 04h */
|
| 534 |
|
|
U32 CoalescingTimeout; /* 08h */
|
| 535 |
|
|
U8 CoalescingDepth; /* 0Ch */
|
| 536 |
|
|
U8 PCISlotNum; /* 0Dh */
|
| 537 |
|
|
U8 Reserved[2]; /* 0Eh */
|
| 538 |
|
|
} fCONFIG_PAGE_IOC_1, MPI_POINTER PTR_CONFIG_PAGE_IOC_1,
|
| 539 |
|
|
IOCPage1_t, MPI_POINTER pIOCPage1_t;
|
| 540 |
|
|
|
| 541 |
|
|
#define MPI_IOCPAGE1_PAGEVERSION (0x01)
|
| 542 |
|
|
|
| 543 |
|
|
#define MPI_IOCPAGE1_REPLY_COALESCING (0x00000001)
|
| 544 |
|
|
|
| 545 |
|
|
#define MPI_IOCPAGE1_PCISLOTNUM_UNKNOWN (0xFF)
|
| 546 |
|
|
|
| 547 |
|
|
|
| 548 |
|
|
typedef struct _CONFIG_PAGE_IOC_2_RAID_VOL
|
| 549 |
|
|
{
|
| 550 |
|
|
U8 VolumeID; /* 00h */
|
| 551 |
|
|
U8 VolumeBus; /* 01h */
|
| 552 |
|
|
U8 VolumeIOC; /* 02h */
|
| 553 |
|
|
U8 VolumePageNumber; /* 03h */
|
| 554 |
|
|
U8 VolumeType; /* 04h */
|
| 555 |
|
|
U8 Flags; /* 05h */
|
| 556 |
|
|
U16 Reserved3; /* 06h */
|
| 557 |
|
|
} fCONFIG_PAGE_IOC_2_RAID_VOL, MPI_POINTER PTR_CONFIG_PAGE_IOC_2_RAID_VOL,
|
| 558 |
|
|
ConfigPageIoc2RaidVol_t, MPI_POINTER pConfigPageIoc2RaidVol_t;
|
| 559 |
|
|
|
| 560 |
|
|
/* IOC Page 2 Volume RAID Type values, also used in RAID Volume pages */
|
| 561 |
|
|
|
| 562 |
|
|
#define MPI_RAID_VOL_TYPE_IS (0x00)
|
| 563 |
|
|
#define MPI_RAID_VOL_TYPE_IME (0x01)
|
| 564 |
|
|
#define MPI_RAID_VOL_TYPE_IM (0x02)
|
| 565 |
|
|
|
| 566 |
|
|
/* IOC Page 2 Volume Flags values */
|
| 567 |
|
|
|
| 568 |
|
|
#define MPI_IOCPAGE2_FLAG_VOLUME_INACTIVE (0x08)
|
| 569 |
|
|
|
| 570 |
|
|
/*
|
| 571 |
|
|
* Host code (drivers, BIOS, utilities, etc.) should leave this define set to
|
| 572 |
|
|
* one and check Header.PageLength at runtime.
|
| 573 |
|
|
*/
|
| 574 |
|
|
#ifndef MPI_IOC_PAGE_2_RAID_VOLUME_MAX
|
| 575 |
|
|
#define MPI_IOC_PAGE_2_RAID_VOLUME_MAX (1)
|
| 576 |
|
|
#endif
|
| 577 |
|
|
|
| 578 |
|
|
typedef struct _CONFIG_PAGE_IOC_2
|
| 579 |
|
|
{
|
| 580 |
|
|
fCONFIG_PAGE_HEADER Header; /* 00h */
|
| 581 |
|
|
U32 CapabilitiesFlags; /* 04h */
|
| 582 |
|
|
U8 NumActiveVolumes; /* 08h */
|
| 583 |
|
|
U8 MaxVolumes; /* 09h */
|
| 584 |
|
|
U8 NumActivePhysDisks; /* 0Ah */
|
| 585 |
|
|
U8 MaxPhysDisks; /* 0Bh */
|
| 586 |
|
|
fCONFIG_PAGE_IOC_2_RAID_VOL RaidVolume[MPI_IOC_PAGE_2_RAID_VOLUME_MAX];/* 0Ch */
|
| 587 |
|
|
} fCONFIG_PAGE_IOC_2, MPI_POINTER PTR_CONFIG_PAGE_IOC_2,
|
| 588 |
|
|
IOCPage2_t, MPI_POINTER pIOCPage2_t;
|
| 589 |
|
|
|
| 590 |
|
|
#define MPI_IOCPAGE2_PAGEVERSION (0x02)
|
| 591 |
|
|
|
| 592 |
|
|
/* IOC Page 2 Capabilities flags */
|
| 593 |
|
|
|
| 594 |
|
|
#define MPI_IOCPAGE2_CAP_FLAGS_IS_SUPPORT (0x00000001)
|
| 595 |
|
|
#define MPI_IOCPAGE2_CAP_FLAGS_IME_SUPPORT (0x00000002)
|
| 596 |
|
|
#define MPI_IOCPAGE2_CAP_FLAGS_IM_SUPPORT (0x00000004)
|
| 597 |
|
|
#define MPI_IOCPAGE2_CAP_FLAGS_SES_SUPPORT (0x20000000)
|
| 598 |
|
|
#define MPI_IOCPAGE2_CAP_FLAGS_SAFTE_SUPPORT (0x40000000)
|
| 599 |
|
|
#define MPI_IOCPAGE2_CAP_FLAGS_CROSS_CHANNEL_SUPPORT (0x80000000)
|
| 600 |
|
|
|
| 601 |
|
|
|
| 602 |
|
|
typedef struct _IOC_3_PHYS_DISK
|
| 603 |
|
|
{
|
| 604 |
|
|
U8 PhysDiskID; /* 00h */
|
| 605 |
|
|
U8 PhysDiskBus; /* 01h */
|
| 606 |
|
|
U8 PhysDiskIOC; /* 02h */
|
| 607 |
|
|
U8 PhysDiskNum; /* 03h */
|
| 608 |
|
|
} IOC_3_PHYS_DISK, MPI_POINTER PTR_IOC_3_PHYS_DISK,
|
| 609 |
|
|
Ioc3PhysDisk_t, MPI_POINTER pIoc3PhysDisk_t;
|
| 610 |
|
|
|
| 611 |
|
|
/*
|
| 612 |
|
|
* Host code (drivers, BIOS, utilities, etc.) should leave this define set to
|
| 613 |
|
|
* one and check Header.PageLength at runtime.
|
| 614 |
|
|
*/
|
| 615 |
|
|
#ifndef MPI_IOC_PAGE_3_PHYSDISK_MAX
|
| 616 |
|
|
#define MPI_IOC_PAGE_3_PHYSDISK_MAX (1)
|
| 617 |
|
|
#endif
|
| 618 |
|
|
|
| 619 |
|
|
typedef struct _CONFIG_PAGE_IOC_3
|
| 620 |
|
|
{
|
| 621 |
|
|
fCONFIG_PAGE_HEADER Header; /* 00h */
|
| 622 |
|
|
U8 NumPhysDisks; /* 04h */
|
| 623 |
|
|
U8 Reserved1; /* 05h */
|
| 624 |
|
|
U16 Reserved2; /* 06h */
|
| 625 |
|
|
IOC_3_PHYS_DISK PhysDisk[MPI_IOC_PAGE_3_PHYSDISK_MAX]; /* 08h */
|
| 626 |
|
|
} fCONFIG_PAGE_IOC_3, MPI_POINTER PTR_CONFIG_PAGE_IOC_3,
|
| 627 |
|
|
IOCPage3_t, MPI_POINTER pIOCPage3_t;
|
| 628 |
|
|
|
| 629 |
|
|
#define MPI_IOCPAGE3_PAGEVERSION (0x00)
|
| 630 |
|
|
|
| 631 |
|
|
|
| 632 |
|
|
typedef struct _IOC_4_SEP
|
| 633 |
|
|
{
|
| 634 |
|
|
U8 SEPTargetID; /* 00h */
|
| 635 |
|
|
U8 SEPBus; /* 01h */
|
| 636 |
|
|
U16 Reserved; /* 02h */
|
| 637 |
|
|
} IOC_4_SEP, MPI_POINTER PTR_IOC_4_SEP,
|
| 638 |
|
|
Ioc4Sep_t, MPI_POINTER pIoc4Sep_t;
|
| 639 |
|
|
|
| 640 |
|
|
/*
|
| 641 |
|
|
* Host code (drivers, BIOS, utilities, etc.) should leave this define set to
|
| 642 |
|
|
* one and check Header.PageLength at runtime.
|
| 643 |
|
|
*/
|
| 644 |
|
|
#ifndef MPI_IOC_PAGE_4_SEP_MAX
|
| 645 |
|
|
#define MPI_IOC_PAGE_4_SEP_MAX (1)
|
| 646 |
|
|
#endif
|
| 647 |
|
|
|
| 648 |
|
|
typedef struct _CONFIG_PAGE_IOC_4
|
| 649 |
|
|
{
|
| 650 |
|
|
fCONFIG_PAGE_HEADER Header; /* 00h */
|
| 651 |
|
|
U8 ActiveSEP; /* 04h */
|
| 652 |
|
|
U8 MaxSEP; /* 05h */
|
| 653 |
|
|
U16 Reserved1; /* 06h */
|
| 654 |
|
|
IOC_4_SEP SEP[MPI_IOC_PAGE_4_SEP_MAX]; /* 08h */
|
| 655 |
|
|
} fCONFIG_PAGE_IOC_4, MPI_POINTER PTR_CONFIG_PAGE_IOC_4,
|
| 656 |
|
|
IOCPage4_t, MPI_POINTER pIOCPage4_t;
|
| 657 |
|
|
|
| 658 |
|
|
#define MPI_IOCPAGE4_PAGEVERSION (0x00)
|
| 659 |
|
|
|
| 660 |
|
|
|
| 661 |
|
|
typedef struct _IOC_5_HOT_SPARE
|
| 662 |
|
|
{
|
| 663 |
|
|
U8 PhysDiskNum; /* 00h */
|
| 664 |
|
|
U8 Reserved; /* 01h */
|
| 665 |
|
|
U8 HotSparePool; /* 02h */
|
| 666 |
|
|
U8 Flags; /* 03h */
|
| 667 |
|
|
} IOC_5_HOT_SPARE, MPI_POINTER PTR_IOC_5_HOT_SPARE,
|
| 668 |
|
|
Ioc5HotSpare_t, MPI_POINTER pIoc5HotSpare_t;
|
| 669 |
|
|
|
| 670 |
|
|
/* IOC Page 5 HotSpare Flags */
|
| 671 |
|
|
#define MPI_IOC_PAGE_5_HOT_SPARE_ACTIVE (0x01)
|
| 672 |
|
|
|
| 673 |
|
|
/*
|
| 674 |
|
|
* Host code (drivers, BIOS, utilities, etc.) should leave this define set to
|
| 675 |
|
|
* one and check Header.PageLength at runtime.
|
| 676 |
|
|
*/
|
| 677 |
|
|
#ifndef MPI_IOC_PAGE_5_HOT_SPARE_MAX
|
| 678 |
|
|
#define MPI_IOC_PAGE_5_HOT_SPARE_MAX (1)
|
| 679 |
|
|
#endif
|
| 680 |
|
|
|
| 681 |
|
|
typedef struct _CONFIG_PAGE_IOC_5
|
| 682 |
|
|
{
|
| 683 |
|
|
fCONFIG_PAGE_HEADER Header; /* 00h */
|
| 684 |
|
|
U32 Reserved1; /* 04h */
|
| 685 |
|
|
U8 NumHotSpares; /* 08h */
|
| 686 |
|
|
U8 Reserved2; /* 09h */
|
| 687 |
|
|
U16 Reserved3; /* 0Ah */
|
| 688 |
|
|
IOC_5_HOT_SPARE HotSpare[MPI_IOC_PAGE_5_HOT_SPARE_MAX]; /* 0Ch */
|
| 689 |
|
|
} fCONFIG_PAGE_IOC_5, MPI_POINTER PTR_CONFIG_PAGE_IOC_5,
|
| 690 |
|
|
IOCPage5_t, MPI_POINTER pIOCPage5_t;
|
| 691 |
|
|
|
| 692 |
|
|
#define MPI_IOCPAGE5_PAGEVERSION (0x00)
|
| 693 |
|
|
|
| 694 |
|
|
|
| 695 |
|
|
|
| 696 |
|
|
/****************************************************************************
|
| 697 |
|
|
* SCSI Port Config Pages
|
| 698 |
|
|
****************************************************************************/
|
| 699 |
|
|
|
| 700 |
|
|
typedef struct _CONFIG_PAGE_SCSI_PORT_0
|
| 701 |
|
|
{
|
| 702 |
|
|
fCONFIG_PAGE_HEADER Header; /* 00h */
|
| 703 |
|
|
U32 Capabilities; /* 04h */
|
| 704 |
|
|
U32 PhysicalInterface; /* 08h */
|
| 705 |
|
|
} fCONFIG_PAGE_SCSI_PORT_0, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_0,
|
| 706 |
|
|
SCSIPortPage0_t, MPI_POINTER pSCSIPortPage0_t;
|
| 707 |
|
|
|
| 708 |
|
|
#define MPI_SCSIPORTPAGE0_PAGEVERSION (0x01)
|
| 709 |
|
|
|
| 710 |
|
|
#define MPI_SCSIPORTPAGE0_CAP_IU (0x00000001)
|
| 711 |
|
|
#define MPI_SCSIPORTPAGE0_CAP_DT (0x00000002)
|
| 712 |
|
|
#define MPI_SCSIPORTPAGE0_CAP_QAS (0x00000004)
|
| 713 |
|
|
#define MPI_SCSIPORTPAGE0_CAP_MIN_SYNC_PERIOD_MASK (0x0000FF00)
|
| 714 |
|
|
#define MPI_SCSIPORTPAGE0_CAP_MAX_SYNC_OFFSET_MASK (0x00FF0000)
|
| 715 |
|
|
#define MPI_SCSIPORTPAGE0_CAP_WIDE (0x20000000)
|
| 716 |
|
|
#define MPI_SCSIPORTPAGE0_CAP_AIP (0x80000000)
|
| 717 |
|
|
|
| 718 |
|
|
#define MPI_SCSIPORTPAGE0_PHY_SIGNAL_TYPE_MASK (0x00000003)
|
| 719 |
|
|
#define MPI_SCSIPORTPAGE0_PHY_SIGNAL_HVD (0x01)
|
| 720 |
|
|
#define MPI_SCSIPORTPAGE0_PHY_SIGNAL_SE (0x02)
|
| 721 |
|
|
#define MPI_SCSIPORTPAGE0_PHY_SIGNAL_LVD (0x03)
|
| 722 |
|
|
#define MPI_SCSIPORTPAGE0_PHY_MASK_CONNECTED_ID (0xFF000000)
|
| 723 |
|
|
#define MPI_SCSIPORTPAGE0_PHY_SHIFT_CONNECTED_ID (24)
|
| 724 |
|
|
#define MPI_SCSIPORTPAGE0_PHY_BUS_FREE_CONNECTED_ID (0xFE)
|
| 725 |
|
|
#define MPI_SCSIPORTPAGE0_PHY_UNKNOWN_CONNECTED_ID (0xFF)
|
| 726 |
|
|
|
| 727 |
|
|
|
| 728 |
|
|
typedef struct _CONFIG_PAGE_SCSI_PORT_1
|
| 729 |
|
|
{
|
| 730 |
|
|
fCONFIG_PAGE_HEADER Header; /* 00h */
|
| 731 |
|
|
U32 Configuration; /* 04h */
|
| 732 |
|
|
U32 OnBusTimerValue; /* 08h */
|
| 733 |
|
|
U8 TargetConfig; /* 0Ch */
|
| 734 |
|
|
U8 Reserved1; /* 0Dh */
|
| 735 |
|
|
U16 IDConfig; /* 0Eh */
|
| 736 |
|
|
} fCONFIG_PAGE_SCSI_PORT_1, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_1,
|
| 737 |
|
|
SCSIPortPage1_t, MPI_POINTER pSCSIPortPage1_t;
|
| 738 |
|
|
|
| 739 |
|
|
#define MPI_SCSIPORTPAGE1_PAGEVERSION (0x02)
|
| 740 |
|
|
|
| 741 |
|
|
/* Configuration values */
|
| 742 |
|
|
#define MPI_SCSIPORTPAGE1_CFG_PORT_SCSI_ID_MASK (0x000000FF)
|
| 743 |
|
|
#define MPI_SCSIPORTPAGE1_CFG_PORT_RESPONSE_ID_MASK (0xFFFF0000)
|
| 744 |
|
|
|
| 745 |
|
|
/* TargetConfig values */
|
| 746 |
|
|
#define MPI_SCSIPORTPAGE1_TARGCONFIG_TARG_ONLY (0x01)
|
| 747 |
|
|
#define MPI_SCSIPORTPAGE1_TARGCONFIG_INIT_TARG (0x02)
|
| 748 |
|
|
|
| 749 |
|
|
|
| 750 |
|
|
typedef struct _MPI_DEVICE_INFO
|
| 751 |
|
|
{
|
| 752 |
|
|
U8 Timeout; /* 00h */
|
| 753 |
|
|
U8 SyncFactor; /* 01h */
|
| 754 |
|
|
U16 DeviceFlags; /* 02h */
|
| 755 |
|
|
} MPI_DEVICE_INFO, MPI_POINTER PTR_MPI_DEVICE_INFO,
|
| 756 |
|
|
MpiDeviceInfo_t, MPI_POINTER pMpiDeviceInfo_t;
|
| 757 |
|
|
|
| 758 |
|
|
typedef struct _CONFIG_PAGE_SCSI_PORT_2
|
| 759 |
|
|
{
|
| 760 |
|
|
fCONFIG_PAGE_HEADER Header; /* 00h */
|
| 761 |
|
|
U32 PortFlags; /* 04h */
|
| 762 |
|
|
U32 PortSettings; /* 08h */
|
| 763 |
|
|
MPI_DEVICE_INFO DeviceSettings[16]; /* 0Ch */
|
| 764 |
|
|
} fCONFIG_PAGE_SCSI_PORT_2, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_2,
|
| 765 |
|
|
SCSIPortPage2_t, MPI_POINTER pSCSIPortPage2_t;
|
| 766 |
|
|
|
| 767 |
|
|
#define MPI_SCSIPORTPAGE2_PAGEVERSION (0x02)
|
| 768 |
|
|
|
| 769 |
|
|
/* PortFlags values */
|
| 770 |
|
|
#define MPI_SCSIPORTPAGE2_PORT_FLAGS_SCAN_HIGH_TO_LOW (0x00000001)
|
| 771 |
|
|
#define MPI_SCSIPORTPAGE2_PORT_FLAGS_AVOID_SCSI_RESET (0x00000004)
|
| 772 |
|
|
#define MPI_SCSIPORTPAGE2_PORT_FLAGS_ALTERNATE_CHS (0x00000008)
|
| 773 |
|
|
#define MPI_SCSIPORTPAGE2_PORT_FLAGS_TERMINATION_DISABLE (0x00000010)
|
| 774 |
|
|
|
| 775 |
|
|
#define MPI_SCSIPORTPAGE2_PORT_FLAGS_DV_MASK (0x00000060)
|
| 776 |
|
|
#define MPI_SCSIPORTPAGE2_PORT_FLAGS_FULL_DV (0x00000000)
|
| 777 |
|
|
#define MPI_SCSIPORTPAGE2_PORT_FLAGS_BASIC_DV_ONLY (0x00000020)
|
| 778 |
|
|
#define MPI_SCSIPORTPAGE2_PORT_FLAGS_OFF_DV (0x00000060)
|
| 779 |
|
|
|
| 780 |
|
|
/* PortSettings values */
|
| 781 |
|
|
#define MPI_SCSIPORTPAGE2_PORT_HOST_ID_MASK (0x0000000F)
|
| 782 |
|
|
#define MPI_SCSIPORTPAGE2_PORT_MASK_INIT_HBA (0x00000030)
|
| 783 |
|
|
#define MPI_SCSIPORTPAGE2_PORT_DISABLE_INIT_HBA (0x00000000)
|
| 784 |
|
|
#define MPI_SCSIPORTPAGE2_PORT_BIOS_INIT_HBA (0x00000010)
|
| 785 |
|
|
#define MPI_SCSIPORTPAGE2_PORT_OS_INIT_HBA (0x00000020)
|
| 786 |
|
|
#define MPI_SCSIPORTPAGE2_PORT_BIOS_OS_INIT_HBA (0x00000030)
|
| 787 |
|
|
#define MPI_SCSIPORTPAGE2_PORT_REMOVABLE_MEDIA (0x000000C0)
|
| 788 |
|
|
#define MPI_SCSIPORTPAGE2_PORT_SPINUP_DELAY_MASK (0x00000F00)
|
| 789 |
|
|
#define MPI_SCSIPORTPAGE2_PORT_MASK_NEGO_MASTER_SETTINGS (0x00003000)
|
| 790 |
|
|
#define MPI_SCSIPORTPAGE2_PORT_NEGO_MASTER_SETTINGS (0x00000000)
|
| 791 |
|
|
#define MPI_SCSIPORTPAGE2_PORT_NONE_MASTER_SETTINGS (0x00001000)
|
| 792 |
|
|
#define MPI_SCSIPORTPAGE2_PORT_ALL_MASTER_SETTINGS (0x00003000)
|
| 793 |
|
|
|
| 794 |
|
|
#define MPI_SCSIPORTPAGE2_DEVICE_DISCONNECT_ENABLE (0x0001)
|
| 795 |
|
|
#define MPI_SCSIPORTPAGE2_DEVICE_ID_SCAN_ENABLE (0x0002)
|
| 796 |
|
|
#define MPI_SCSIPORTPAGE2_DEVICE_LUN_SCAN_ENABLE (0x0004)
|
| 797 |
|
|
#define MPI_SCSIPORTPAGE2_DEVICE_TAG_QUEUE_ENABLE (0x0008)
|
| 798 |
|
|
#define MPI_SCSIPORTPAGE2_DEVICE_WIDE_DISABLE (0x0010)
|
| 799 |
|
|
#define MPI_SCSIPORTPAGE2_DEVICE_BOOT_CHOICE (0x0020)
|
| 800 |
|
|
|
| 801 |
|
|
|
| 802 |
|
|
/****************************************************************************
|
| 803 |
|
|
* SCSI Target Device Config Pages
|
| 804 |
|
|
****************************************************************************/
|
| 805 |
|
|
|
| 806 |
|
|
typedef struct _CONFIG_PAGE_SCSI_DEVICE_0
|
| 807 |
|
|
{
|
| 808 |
|
|
fCONFIG_PAGE_HEADER Header; /* 00h */
|
| 809 |
|
|
U32 NegotiatedParameters; /* 04h */
|
| 810 |
|
|
U32 Information; /* 08h */
|
| 811 |
|
|
} fCONFIG_PAGE_SCSI_DEVICE_0, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_0,
|
| 812 |
|
|
SCSIDevicePage0_t, MPI_POINTER pSCSIDevicePage0_t;
|
| 813 |
|
|
|
| 814 |
|
|
#define MPI_SCSIDEVPAGE0_PAGEVERSION (0x03)
|
| 815 |
|
|
|
| 816 |
|
|
#define MPI_SCSIDEVPAGE0_NP_IU (0x00000001)
|
| 817 |
|
|
#define MPI_SCSIDEVPAGE0_NP_DT (0x00000002)
|
| 818 |
|
|
#define MPI_SCSIDEVPAGE0_NP_QAS (0x00000004)
|
| 819 |
|
|
#define MPI_SCSIDEVPAGE0_NP_HOLD_MCS (0x00000008)
|
| 820 |
|
|
#define MPI_SCSIDEVPAGE0_NP_WR_FLOW (0x00000010)
|
| 821 |
|
|
#define MPI_SCSIDEVPAGE0_NP_RD_STRM (0x00000020)
|
| 822 |
|
|
#define MPI_SCSIDEVPAGE0_NP_RTI (0x00000040)
|
| 823 |
|
|
#define MPI_SCSIDEVPAGE0_NP_PCOMP_EN (0x00000080)
|
| 824 |
|
|
#define MPI_SCSIDEVPAGE0_NP_NEG_SYNC_PERIOD_MASK (0x0000FF00)
|
| 825 |
|
|
#define MPI_SCSIDEVPAGE0_NP_NEG_SYNC_OFFSET_MASK (0x00FF0000)
|
| 826 |
|
|
#define MPI_SCSIDEVPAGE0_NP_WIDE (0x20000000)
|
| 827 |
|
|
#define MPI_SCSIDEVPAGE0_NP_AIP (0x80000000)
|
| 828 |
|
|
|
| 829 |
|
|
#define MPI_SCSIDEVPAGE0_INFO_PARAMS_NEGOTIATED (0x00000001)
|
| 830 |
|
|
#define MPI_SCSIDEVPAGE0_INFO_SDTR_REJECTED (0x00000002)
|
| 831 |
|
|
#define MPI_SCSIDEVPAGE0_INFO_WDTR_REJECTED (0x00000004)
|
| 832 |
|
|
#define MPI_SCSIDEVPAGE0_INFO_PPR_REJECTED (0x00000008)
|
| 833 |
|
|
|
| 834 |
|
|
|
| 835 |
|
|
typedef struct _CONFIG_PAGE_SCSI_DEVICE_1
|
| 836 |
|
|
{
|
| 837 |
|
|
fCONFIG_PAGE_HEADER Header; /* 00h */
|
| 838 |
|
|
U32 RequestedParameters; /* 04h */
|
| 839 |
|
|
U32 Reserved; /* 08h */
|
| 840 |
|
|
U32 Configuration; /* 0Ch */
|
| 841 |
|
|
} fCONFIG_PAGE_SCSI_DEVICE_1, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_1,
|
| 842 |
|
|
SCSIDevicePage1_t, MPI_POINTER pSCSIDevicePage1_t;
|
| 843 |
|
|
|
| 844 |
|
|
#define MPI_SCSIDEVPAGE1_PAGEVERSION (0x04)
|
| 845 |
|
|
|
| 846 |
|
|
#define MPI_SCSIDEVPAGE1_RP_IU (0x00000001)
|
| 847 |
|
|
#define MPI_SCSIDEVPAGE1_RP_DT (0x00000002)
|
| 848 |
|
|
#define MPI_SCSIDEVPAGE1_RP_QAS (0x00000004)
|
| 849 |
|
|
#define MPI_SCSIDEVPAGE1_RP_HOLD_MCS (0x00000008)
|
| 850 |
|
|
#define MPI_SCSIDEVPAGE1_RP_WR_FLOW (0x00000010)
|
| 851 |
|
|
#define MPI_SCSIDEVPAGE1_RP_RD_STRM (0x00000020)
|
| 852 |
|
|
#define MPI_SCSIDEVPAGE1_RP_RTI (0x00000040)
|
| 853 |
|
|
#define MPI_SCSIDEVPAGE1_RP_PCOMP_EN (0x00000080)
|
| 854 |
|
|
#define MPI_SCSIDEVPAGE1_RP_MIN_SYNC_PERIOD_MASK (0x0000FF00)
|
| 855 |
|
|
#define MPI_SCSIDEVPAGE1_RP_MAX_SYNC_OFFSET_MASK (0x00FF0000)
|
| 856 |
|
|
#define MPI_SCSIDEVPAGE1_RP_WIDE (0x20000000)
|
| 857 |
|
|
#define MPI_SCSIDEVPAGE1_RP_AIP (0x80000000)
|
| 858 |
|
|
|
| 859 |
|
|
#define MPI_SCSIDEVPAGE1_CONF_WDTR_DISALLOWED (0x00000002)
|
| 860 |
|
|
#define MPI_SCSIDEVPAGE1_CONF_SDTR_DISALLOWED (0x00000004)
|
| 861 |
|
|
#define MPI_SCSIDEVPAGE1_CONF_EXTENDED_PARAMS_ENABLE (0x00000008)
|
| 862 |
|
|
#define MPI_SCSIDEVPAGE1_CONF_FORCE_PPR_MSG (0x00000010)
|
| 863 |
|
|
|
| 864 |
|
|
|
| 865 |
|
|
typedef struct _CONFIG_PAGE_SCSI_DEVICE_2
|
| 866 |
|
|
{
|
| 867 |
|
|
fCONFIG_PAGE_HEADER Header; /* 00h */
|
| 868 |
|
|
U32 DomainValidation; /* 04h */
|
| 869 |
|
|
U32 ParityPipeSelect; /* 08h */
|
| 870 |
|
|
U32 DataPipeSelect; /* 0Ch */
|
| 871 |
|
|
} fCONFIG_PAGE_SCSI_DEVICE_2, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_2,
|
| 872 |
|
|
SCSIDevicePage2_t, MPI_POINTER pSCSIDevicePage2_t;
|
| 873 |
|
|
|
| 874 |
|
|
#define MPI_SCSIDEVPAGE2_PAGEVERSION (0x01)
|
| 875 |
|
|
|
| 876 |
|
|
#define MPI_SCSIDEVPAGE2_DV_ISI_ENABLE (0x00000010)
|
| 877 |
|
|
#define MPI_SCSIDEVPAGE2_DV_SECONDARY_DRIVER_ENABLE (0x00000020)
|
| 878 |
|
|
#define MPI_SCSIDEVPAGE2_DV_SLEW_RATE_CTRL (0x00000380)
|
| 879 |
|
|
#define MPI_SCSIDEVPAGE2_DV_PRIM_DRIVE_STR_CTRL (0x00001C00)
|
| 880 |
|
|
#define MPI_SCSIDEVPAGE2_DV_SECOND_DRIVE_STR_CTRL (0x0000E000)
|
| 881 |
|
|
#define MPI_SCSIDEVPAGE2_DV_XCLKH_ST (0x10000000)
|
| 882 |
|
|
#define MPI_SCSIDEVPAGE2_DV_XCLKS_ST (0x20000000)
|
| 883 |
|
|
#define MPI_SCSIDEVPAGE2_DV_XCLKH_DT (0x40000000)
|
| 884 |
|
|
#define MPI_SCSIDEVPAGE2_DV_XCLKS_DT (0x80000000)
|
| 885 |
|
|
|
| 886 |
|
|
#define MPI_SCSIDEVPAGE2_PPS_PPS_MASK (0x00000003)
|
| 887 |
|
|
|
| 888 |
|
|
#define MPI_SCSIDEVPAGE2_DPS_BIT_0_PL_SELECT_MASK (0x00000003)
|
| 889 |
|
|
#define MPI_SCSIDEVPAGE2_DPS_BIT_1_PL_SELECT_MASK (0x0000000C)
|
| 890 |
|
|
#define MPI_SCSIDEVPAGE2_DPS_BIT_2_PL_SELECT_MASK (0x00000030)
|
| 891 |
|
|
#define MPI_SCSIDEVPAGE2_DPS_BIT_3_PL_SELECT_MASK (0x000000C0)
|
| 892 |
|
|
#define MPI_SCSIDEVPAGE2_DPS_BIT_4_PL_SELECT_MASK (0x00000300)
|
| 893 |
|
|
#define MPI_SCSIDEVPAGE2_DPS_BIT_5_PL_SELECT_MASK (0x00000C00)
|
| 894 |
|
|
#define MPI_SCSIDEVPAGE2_DPS_BIT_6_PL_SELECT_MASK (0x00003000)
|
| 895 |
|
|
#define MPI_SCSIDEVPAGE2_DPS_BIT_7_PL_SELECT_MASK (0x0000C000)
|
| 896 |
|
|
#define MPI_SCSIDEVPAGE2_DPS_BIT_8_PL_SELECT_MASK (0x00030000)
|
| 897 |
|
|
#define MPI_SCSIDEVPAGE2_DPS_BIT_9_PL_SELECT_MASK (0x000C0000)
|
| 898 |
|
|
#define MPI_SCSIDEVPAGE2_DPS_BIT_10_PL_SELECT_MASK (0x00300000)
|
| 899 |
|
|
#define MPI_SCSIDEVPAGE2_DPS_BIT_11_PL_SELECT_MASK (0x00C00000)
|
| 900 |
|
|
#define MPI_SCSIDEVPAGE2_DPS_BIT_12_PL_SELECT_MASK (0x03000000)
|
| 901 |
|
|
#define MPI_SCSIDEVPAGE2_DPS_BIT_13_PL_SELECT_MASK (0x0C000000)
|
| 902 |
|
|
#define MPI_SCSIDEVPAGE2_DPS_BIT_14_PL_SELECT_MASK (0x30000000)
|
| 903 |
|
|
#define MPI_SCSIDEVPAGE2_DPS_BIT_15_PL_SELECT_MASK (0xC0000000)
|
| 904 |
|
|
|
| 905 |
|
|
|
| 906 |
|
|
typedef struct _CONFIG_PAGE_SCSI_DEVICE_3
|
| 907 |
|
|
{
|
| 908 |
|
|
fCONFIG_PAGE_HEADER Header; /* 00h */
|
| 909 |
|
|
U16 MsgRejectCount; /* 04h */
|
| 910 |
|
|
U16 PhaseErrorCount; /* 06h */
|
| 911 |
|
|
U16 ParityErrorCount; /* 08h */
|
| 912 |
|
|
U16 Reserved; /* 0Ah */
|
| 913 |
|
|
} fCONFIG_PAGE_SCSI_DEVICE_3, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_3,
|
| 914 |
|
|
SCSIDevicePage3_t, MPI_POINTER pSCSIDevicePage3_t;
|
| 915 |
|
|
|
| 916 |
|
|
#define MPI_SCSIDEVPAGE3_PAGEVERSION (0x00)
|
| 917 |
|
|
|
| 918 |
|
|
#define MPI_SCSIDEVPAGE3_MAX_COUNTER (0xFFFE)
|
| 919 |
|
|
#define MPI_SCSIDEVPAGE3_UNSUPPORTED_COUNTER (0xFFFF)
|
| 920 |
|
|
|
| 921 |
|
|
|
| 922 |
|
|
/****************************************************************************
|
| 923 |
|
|
* FC Port Config Pages
|
| 924 |
|
|
****************************************************************************/
|
| 925 |
|
|
|
| 926 |
|
|
typedef struct _CONFIG_PAGE_FC_PORT_0
|
| 927 |
|
|
{
|
| 928 |
|
|
fCONFIG_PAGE_HEADER Header; /* 00h */
|
| 929 |
|
|
U32 Flags; /* 04h */
|
| 930 |
|
|
U8 MPIPortNumber; /* 08h */
|
| 931 |
|
|
U8 LinkType; /* 09h */
|
| 932 |
|
|
U8 PortState; /* 0Ah */
|
| 933 |
|
|
U8 Reserved; /* 0Bh */
|
| 934 |
|
|
U32 PortIdentifier; /* 0Ch */
|
| 935 |
|
|
U64 WWNN; /* 10h */
|
| 936 |
|
|
U64 WWPN; /* 18h */
|
| 937 |
|
|
U32 SupportedServiceClass; /* 20h */
|
| 938 |
|
|
U32 SupportedSpeeds; /* 24h */
|
| 939 |
|
|
U32 CurrentSpeed; /* 28h */
|
| 940 |
|
|
U32 MaxFrameSize; /* 2Ch */
|
| 941 |
|
|
U64 FabricWWNN; /* 30h */
|
| 942 |
|
|
U64 FabricWWPN; /* 38h */
|
| 943 |
|
|
U32 DiscoveredPortsCount; /* 40h */
|
| 944 |
|
|
U32 MaxInitiators; /* 44h */
|
| 945 |
|
|
U8 MaxAliasesSupported; /* 48h */
|
| 946 |
|
|
U8 MaxHardAliasesSupported; /* 49h */
|
| 947 |
|
|
U8 NumCurrentAliases; /* 4Ah */
|
| 948 |
|
|
U8 Reserved1; /* 4Bh */
|
| 949 |
|
|
} fCONFIG_PAGE_FC_PORT_0, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_0,
|
| 950 |
|
|
FCPortPage0_t, MPI_POINTER pFCPortPage0_t;
|
| 951 |
|
|
|
| 952 |
|
|
#define MPI_FCPORTPAGE0_PAGEVERSION (0x02)
|
| 953 |
|
|
|
| 954 |
|
|
#define MPI_FCPORTPAGE0_FLAGS_PROT_MASK (0x0000000F)
|
| 955 |
|
|
#define MPI_FCPORTPAGE0_FLAGS_PROT_FCP_INIT (MPI_PORTFACTS_PROTOCOL_INITIATOR)
|
| 956 |
|
|
#define MPI_FCPORTPAGE0_FLAGS_PROT_FCP_TARG (MPI_PORTFACTS_PROTOCOL_TARGET)
|
| 957 |
|
|
#define MPI_FCPORTPAGE0_FLAGS_PROT_LAN (MPI_PORTFACTS_PROTOCOL_LAN)
|
| 958 |
|
|
#define MPI_FCPORTPAGE0_FLAGS_PROT_LOGBUSADDR (MPI_PORTFACTS_PROTOCOL_LOGBUSADDR)
|
| 959 |
|
|
|
| 960 |
|
|
#define MPI_FCPORTPAGE0_FLAGS_ALIAS_ALPA_SUPPORTED (0x00000010)
|
| 961 |
|
|
#define MPI_FCPORTPAGE0_FLAGS_ALIAS_WWN_SUPPORTED (0x00000020)
|
| 962 |
|
|
#define MPI_FCPORTPAGE0_FLAGS_FABRIC_WWN_VALID (0x00000040)
|
| 963 |
|
|
|
| 964 |
|
|
#define MPI_FCPORTPAGE0_FLAGS_ATTACH_TYPE_MASK (0x00000F00)
|
| 965 |
|
|
#define MPI_FCPORTPAGE0_FLAGS_ATTACH_NO_INIT (0x00000000)
|
| 966 |
|
|
#define MPI_FCPORTPAGE0_FLAGS_ATTACH_POINT_TO_POINT (0x00000100)
|
| 967 |
|
|
#define MPI_FCPORTPAGE0_FLAGS_ATTACH_PRIVATE_LOOP (0x00000200)
|
| 968 |
|
|
#define MPI_FCPORTPAGE0_FLAGS_ATTACH_FABRIC_DIRECT (0x00000400)
|
| 969 |
|
|
#define MPI_FCPORTPAGE0_FLAGS_ATTACH_PUBLIC_LOOP (0x00000800)
|
| 970 |
|
|
|
| 971 |
|
|
#define MPI_FCPORTPAGE0_LTYPE_RESERVED (0x00)
|
| 972 |
|
|
#define MPI_FCPORTPAGE0_LTYPE_OTHER (0x01)
|
| 973 |
|
|
#define MPI_FCPORTPAGE0_LTYPE_UNKNOWN (0x02)
|
| 974 |
|
|
#define MPI_FCPORTPAGE0_LTYPE_COPPER (0x03)
|
| 975 |
|
|
#define MPI_FCPORTPAGE0_LTYPE_SINGLE_1300 (0x04)
|
| 976 |
|
|
#define MPI_FCPORTPAGE0_LTYPE_SINGLE_1500 (0x05)
|
| 977 |
|
|
#define MPI_FCPORTPAGE0_LTYPE_50_LASER_MULTI (0x06)
|
| 978 |
|
|
#define MPI_FCPORTPAGE0_LTYPE_50_LED_MULTI (0x07)
|
| 979 |
|
|
#define MPI_FCPORTPAGE0_LTYPE_62_LASER_MULTI (0x08)
|
| 980 |
|
|
#define MPI_FCPORTPAGE0_LTYPE_62_LED_MULTI (0x09)
|
| 981 |
|
|
#define MPI_FCPORTPAGE0_LTYPE_MULTI_LONG_WAVE (0x0A)
|
| 982 |
|
|
#define MPI_FCPORTPAGE0_LTYPE_MULTI_SHORT_WAVE (0x0B)
|
| 983 |
|
|
#define MPI_FCPORTPAGE0_LTYPE_LASER_SHORT_WAVE (0x0C)
|
| 984 |
|
|
#define MPI_FCPORTPAGE0_LTYPE_LED_SHORT_WAVE (0x0D)
|
| 985 |
|
|
#define MPI_FCPORTPAGE0_LTYPE_1300_LONG_WAVE (0x0E)
|
| 986 |
|
|
#define MPI_FCPORTPAGE0_LTYPE_1500_LONG_WAVE (0x0F)
|
| 987 |
|
|
|
| 988 |
|
|
#define MPI_FCPORTPAGE0_PORTSTATE_UNKNOWN (0x01) /*(SNIA)HBA_PORTSTATE_UNKNOWN 1 Unknown */
|
| 989 |
|
|
#define MPI_FCPORTPAGE0_PORTSTATE_ONLINE (0x02) /*(SNIA)HBA_PORTSTATE_ONLINE 2 Operational */
|
| 990 |
|
|
#define MPI_FCPORTPAGE0_PORTSTATE_OFFLINE (0x03) /*(SNIA)HBA_PORTSTATE_OFFLINE 3 User Offline */
|
| 991 |
|
|
#define MPI_FCPORTPAGE0_PORTSTATE_BYPASSED (0x04) /*(SNIA)HBA_PORTSTATE_BYPASSED 4 Bypassed */
|
| 992 |
|
|
#define MPI_FCPORTPAGE0_PORTSTATE_DIAGNOST (0x05) /*(SNIA)HBA_PORTSTATE_DIAGNOSTICS 5 In diagnostics mode */
|
| 993 |
|
|
#define MPI_FCPORTPAGE0_PORTSTATE_LINKDOWN (0x06) /*(SNIA)HBA_PORTSTATE_LINKDOWN 6 Link Down */
|
| 994 |
|
|
#define MPI_FCPORTPAGE0_PORTSTATE_ERROR (0x07) /*(SNIA)HBA_PORTSTATE_ERROR 7 Port Error */
|
| 995 |
|
|
#define MPI_FCPORTPAGE0_PORTSTATE_LOOPBACK (0x08) /*(SNIA)HBA_PORTSTATE_LOOPBACK 8 Loopback */
|
| 996 |
|
|
|
| 997 |
|
|
#define MPI_FCPORTPAGE0_SUPPORT_CLASS_1 (0x00000001)
|
| 998 |
|
|
#define MPI_FCPORTPAGE0_SUPPORT_CLASS_2 (0x00000002)
|
| 999 |
|
|
#define MPI_FCPORTPAGE0_SUPPORT_CLASS_3 (0x00000004)
|
| 1000 |
|
|
|
| 1001 |
|
|
#define MPI_FCPORTPAGE0_SUPPORT_1GBIT_SPEED (0x00000001) /* (SNIA)HBA_PORTSPEED_1GBIT 1 1 GBit/sec */
|
| 1002 |
|
|
#define MPI_FCPORTPAGE0_SUPPORT_2GBIT_SPEED (0x00000002) /* (SNIA)HBA_PORTSPEED_2GBIT 2 2 GBit/sec */
|
| 1003 |
|
|
#define MPI_FCPORTPAGE0_SUPPORT_10GBIT_SPEED (0x00000004) /* (SNIA)HBA_PORTSPEED_10GBIT 4 10 GBit/sec */
|
| 1004 |
|
|
|
| 1005 |
|
|
#define MPI_FCPORTPAGE0_CURRENT_SPEED_1GBIT MPI_FCPORTPAGE0_SUPPORT_1GBIT_SPEED
|
| 1006 |
|
|
#define MPI_FCPORTPAGE0_CURRENT_SPEED_2GBIT MPI_FCPORTPAGE0_SUPPORT_2GBIT_SPEED
|
| 1007 |
|
|
#define MPI_FCPORTPAGE0_CURRENT_SPEED_10GBIT MPI_FCPORTPAGE0_SUPPORT_10GBIT_SPEED
|
| 1008 |
|
|
|
| 1009 |
|
|
|
| 1010 |
|
|
typedef struct _CONFIG_PAGE_FC_PORT_1
|
| 1011 |
|
|
{
|
| 1012 |
|
|
fCONFIG_PAGE_HEADER Header; /* 00h */
|
| 1013 |
|
|
U32 Flags; /* 04h */
|
| 1014 |
|
|
U64 NoSEEPROMWWNN; /* 08h */
|
| 1015 |
|
|
U64 NoSEEPROMWWPN; /* 10h */
|
| 1016 |
|
|
U8 HardALPA; /* 18h */
|
| 1017 |
|
|
U8 LinkConfig; /* 19h */
|
| 1018 |
|
|
U8 TopologyConfig; /* 1Ah */
|
| 1019 |
|
|
U8 AltConnector; /* 1Bh */
|
| 1020 |
|
|
U8 NumRequestedAliases; /* 1Ch */
|
| 1021 |
|
|
U8 RR_TOV; /* 1Dh */
|
| 1022 |
|
|
U16 Reserved2; /* 1Eh */
|
| 1023 |
|
|
} fCONFIG_PAGE_FC_PORT_1, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_1,
|
| 1024 |
|
|
FCPortPage1_t, MPI_POINTER pFCPortPage1_t;
|
| 1025 |
|
|
|
| 1026 |
|
|
#define MPI_FCPORTPAGE1_PAGEVERSION (0x05)
|
| 1027 |
|
|
|
| 1028 |
|
|
#define MPI_FCPORTPAGE1_FLAGS_EXT_FCP_STATUS_EN (0x08000000)
|
| 1029 |
|
|
#define MPI_FCPORTPAGE1_FLAGS_IMMEDIATE_ERROR_REPLY (0x04000000)
|
| 1030 |
|
|
#define MPI_FCPORTPAGE1_FLAGS_FORCE_USE_NOSEEPROM_WWNS (0x02000000)
|
| 1031 |
|
|
#define MPI_FCPORTPAGE1_FLAGS_VERBOSE_RESCAN_EVENTS (0x01000000)
|
| 1032 |
|
|
#define MPI_FCPORTPAGE1_FLAGS_TARGET_MODE_OXID (0x00800000)
|
| 1033 |
|
|
#define MPI_FCPORTPAGE1_FLAGS_PORT_OFFLINE (0x00400000)
|
| 1034 |
|
|
#define MPI_FCPORTPAGE1_FLAGS_MASK_RR_TOV_UNITS (0x00000070)
|
| 1035 |
|
|
#define MPI_FCPORTPAGE1_FLAGS_SUPPRESS_PROT_REG (0x00000008)
|
| 1036 |
|
|
#define MPI_FCPORTPAGE1_FLAGS_PLOGI_ON_LOGO (0x00000004)
|
| 1037 |
|
|
#define MPI_FCPORTPAGE1_FLAGS_MAINTAIN_LOGINS (0x00000002)
|
| 1038 |
|
|
#define MPI_FCPORTPAGE1_FLAGS_SORT_BY_DID (0x00000001)
|
| 1039 |
|
|
#define MPI_FCPORTPAGE1_FLAGS_SORT_BY_WWN (0x00000000)
|
| 1040 |
|
|
|
| 1041 |
|
|
#define MPI_FCPORTPAGE1_FLAGS_PROT_MASK (0xF0000000)
|
| 1042 |
|
|
#define MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT (28)
|
| 1043 |
|
|
#define MPI_FCPORTPAGE1_FLAGS_PROT_FCP_INIT ((U32)MPI_PORTFACTS_PROTOCOL_INITIATOR << MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT)
|
| 1044 |
|
|
#define MPI_FCPORTPAGE1_FLAGS_PROT_FCP_TARG ((U32)MPI_PORTFACTS_PROTOCOL_TARGET << MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT)
|
| 1045 |
|
|
#define MPI_FCPORTPAGE1_FLAGS_PROT_LAN ((U32)MPI_PORTFACTS_PROTOCOL_LAN << MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT)
|
| 1046 |
|
|
#define MPI_FCPORTPAGE1_FLAGS_PROT_LOGBUSADDR ((U32)MPI_PORTFACTS_PROTOCOL_LOGBUSADDR << MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT)
|
| 1047 |
|
|
|
| 1048 |
|
|
#define MPI_FCPORTPAGE1_FLAGS_NONE_RR_TOV_UNITS (0x00000000)
|
| 1049 |
|
|
#define MPI_FCPORTPAGE1_FLAGS_THOUSANDTH_RR_TOV_UNITS (0x00000010)
|
| 1050 |
|
|
#define MPI_FCPORTPAGE1_FLAGS_TENTH_RR_TOV_UNITS (0x00000030)
|
| 1051 |
|
|
#define MPI_FCPORTPAGE1_FLAGS_TEN_RR_TOV_UNITS (0x00000050)
|
| 1052 |
|
|
|
| 1053 |
|
|
#define MPI_FCPORTPAGE1_HARD_ALPA_NOT_USED (0xFF)
|
| 1054 |
|
|
|
| 1055 |
|
|
#define MPI_FCPORTPAGE1_LCONFIG_SPEED_MASK (0x0F)
|
| 1056 |
|
|
#define MPI_FCPORTPAGE1_LCONFIG_SPEED_1GIG (0x00)
|
| 1057 |
|
|
#define MPI_FCPORTPAGE1_LCONFIG_SPEED_2GIG (0x01)
|
| 1058 |
|
|
#define MPI_FCPORTPAGE1_LCONFIG_SPEED_4GIG (0x02)
|
| 1059 |
|
|
#define MPI_FCPORTPAGE1_LCONFIG_SPEED_10GIG (0x03)
|
| 1060 |
|
|
#define MPI_FCPORTPAGE1_LCONFIG_SPEED_AUTO (0x0F)
|
| 1061 |
|
|
|
| 1062 |
|
|
#define MPI_FCPORTPAGE1_TOPOLOGY_MASK (0x0F)
|
| 1063 |
|
|
#define MPI_FCPORTPAGE1_TOPOLOGY_NLPORT (0x01)
|
| 1064 |
|
|
#define MPI_FCPORTPAGE1_TOPOLOGY_NPORT (0x02)
|
| 1065 |
|
|
#define MPI_FCPORTPAGE1_TOPOLOGY_AUTO (0x0F)
|
| 1066 |
|
|
|
| 1067 |
|
|
#define MPI_FCPORTPAGE1_ALT_CONN_UNKNOWN (0x00)
|
| 1068 |
|
|
|
| 1069 |
|
|
|
| 1070 |
|
|
typedef struct _CONFIG_PAGE_FC_PORT_2
|
| 1071 |
|
|
{
|
| 1072 |
|
|
fCONFIG_PAGE_HEADER Header; /* 00h */
|
| 1073 |
|
|
U8 NumberActive; /* 04h */
|
| 1074 |
|
|
U8 ALPA[127]; /* 05h */
|
| 1075 |
|
|
} fCONFIG_PAGE_FC_PORT_2, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_2,
|
| 1076 |
|
|
FCPortPage2_t, MPI_POINTER pFCPortPage2_t;
|
| 1077 |
|
|
|
| 1078 |
|
|
#define MPI_FCPORTPAGE2_PAGEVERSION (0x01)
|
| 1079 |
|
|
|
| 1080 |
|
|
|
| 1081 |
|
|
typedef struct _WWN_FORMAT
|
| 1082 |
|
|
{
|
| 1083 |
|
|
U64 WWNN; /* 00h */
|
| 1084 |
|
|
U64 WWPN; /* 08h */
|
| 1085 |
|
|
} WWN_FORMAT, MPI_POINTER PTR_WWN_FORMAT,
|
| 1086 |
|
|
WWNFormat, MPI_POINTER pWWNFormat;
|
| 1087 |
|
|
|
| 1088 |
|
|
typedef union _FC_PORT_PERSISTENT_PHYSICAL_ID
|
| 1089 |
|
|
{
|
| 1090 |
|
|
WWN_FORMAT WWN;
|
| 1091 |
|
|
U32 Did;
|
| 1092 |
|
|
} FC_PORT_PERSISTENT_PHYSICAL_ID, MPI_POINTER PTR_FC_PORT_PERSISTENT_PHYSICAL_ID,
|
| 1093 |
|
|
PersistentPhysicalId_t, MPI_POINTER pPersistentPhysicalId_t;
|
| 1094 |
|
|
|
| 1095 |
|
|
typedef struct _FC_PORT_PERSISTENT
|
| 1096 |
|
|
{
|
| 1097 |
|
|
FC_PORT_PERSISTENT_PHYSICAL_ID PhysicalIdentifier; /* 00h */
|
| 1098 |
|
|
U8 TargetID; /* 10h */
|
| 1099 |
|
|
U8 Bus; /* 11h */
|
| 1100 |
|
|
U16 Flags; /* 12h */
|
| 1101 |
|
|
} FC_PORT_PERSISTENT, MPI_POINTER PTR_FC_PORT_PERSISTENT,
|
| 1102 |
|
|
PersistentData_t, MPI_POINTER pPersistentData_t;
|
| 1103 |
|
|
|
| 1104 |
|
|
#define MPI_PERSISTENT_FLAGS_SHIFT (16)
|
| 1105 |
|
|
#define MPI_PERSISTENT_FLAGS_ENTRY_VALID (0x0001)
|
| 1106 |
|
|
#define MPI_PERSISTENT_FLAGS_SCAN_ID (0x0002)
|
| 1107 |
|
|
#define MPI_PERSISTENT_FLAGS_SCAN_LUNS (0x0004)
|
| 1108 |
|
|
#define MPI_PERSISTENT_FLAGS_BOOT_DEVICE (0x0008)
|
| 1109 |
|
|
#define MPI_PERSISTENT_FLAGS_BY_DID (0x0080)
|
| 1110 |
|
|
|
| 1111 |
|
|
/*
|
| 1112 |
|
|
* Host code (drivers, BIOS, utilities, etc.) should leave this define set to
|
| 1113 |
|
|
* one and check Header.PageLength at runtime.
|
| 1114 |
|
|
*/
|
| 1115 |
|
|
#ifndef MPI_FC_PORT_PAGE_3_ENTRY_MAX
|
| 1116 |
|
|
#define MPI_FC_PORT_PAGE_3_ENTRY_MAX (1)
|
| 1117 |
|
|
#endif
|
| 1118 |
|
|
|
| 1119 |
|
|
typedef struct _CONFIG_PAGE_FC_PORT_3
|
| 1120 |
|
|
{
|
| 1121 |
|
|
fCONFIG_PAGE_HEADER Header; /* 00h */
|
| 1122 |
|
|
FC_PORT_PERSISTENT Entry[MPI_FC_PORT_PAGE_3_ENTRY_MAX]; /* 04h */
|
| 1123 |
|
|
} fCONFIG_PAGE_FC_PORT_3, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_3,
|
| 1124 |
|
|
FCPortPage3_t, MPI_POINTER pFCPortPage3_t;
|
| 1125 |
|
|
|
| 1126 |
|
|
#define MPI_FCPORTPAGE3_PAGEVERSION (0x01)
|
| 1127 |
|
|
|
| 1128 |
|
|
|
| 1129 |
|
|
typedef struct _CONFIG_PAGE_FC_PORT_4
|
| 1130 |
|
|
{
|
| 1131 |
|
|
fCONFIG_PAGE_HEADER Header; /* 00h */
|
| 1132 |
|
|
U32 PortFlags; /* 04h */
|
| 1133 |
|
|
U32 PortSettings; /* 08h */
|
| 1134 |
|
|
} fCONFIG_PAGE_FC_PORT_4, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_4,
|
| 1135 |
|
|
FCPortPage4_t, MPI_POINTER pFCPortPage4_t;
|
| 1136 |
|
|
|
| 1137 |
|
|
#define MPI_FCPORTPAGE4_PAGEVERSION (0x00)
|
| 1138 |
|
|
|
| 1139 |
|
|
#define MPI_FCPORTPAGE4_PORT_FLAGS_ALTERNATE_CHS (0x00000008)
|
| 1140 |
|
|
|
| 1141 |
|
|
#define MPI_FCPORTPAGE4_PORT_MASK_INIT_HBA (0x00000030)
|
| 1142 |
|
|
#define MPI_FCPORTPAGE4_PORT_DISABLE_INIT_HBA (0x00000000)
|
| 1143 |
|
|
#define MPI_FCPORTPAGE4_PORT_BIOS_INIT_HBA (0x00000010)
|
| 1144 |
|
|
#define MPI_FCPORTPAGE4_PORT_OS_INIT_HBA (0x00000020)
|
| 1145 |
|
|
#define MPI_FCPORTPAGE4_PORT_BIOS_OS_INIT_HBA (0x00000030)
|
| 1146 |
|
|
#define MPI_FCPORTPAGE4_PORT_REMOVABLE_MEDIA (0x000000C0)
|
| 1147 |
|
|
#define MPI_FCPORTPAGE4_PORT_SPINUP_DELAY_MASK (0x00000F00)
|
| 1148 |
|
|
|
| 1149 |
|
|
|
| 1150 |
|
|
typedef struct _CONFIG_PAGE_FC_PORT_5_ALIAS_INFO
|
| 1151 |
|
|
{
|
| 1152 |
|
|
U8 Flags; /* 00h */
|
| 1153 |
|
|
U8 AliasAlpa; /* 01h */
|
| 1154 |
|
|
U16 Reserved; /* 02h */
|
| 1155 |
|
|
U64 AliasWWNN; /* 04h */
|
| 1156 |
|
|
U64 AliasWWPN; /* 0Ch */
|
| 1157 |
|
|
} fCONFIG_PAGE_FC_PORT_5_ALIAS_INFO,
|
| 1158 |
|
|
MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_5_ALIAS_INFO,
|
| 1159 |
|
|
FcPortPage5AliasInfo_t, MPI_POINTER pFcPortPage5AliasInfo_t;
|
| 1160 |
|
|
|
| 1161 |
|
|
typedef struct _CONFIG_PAGE_FC_PORT_5
|
| 1162 |
|
|
{
|
| 1163 |
|
|
fCONFIG_PAGE_HEADER Header; /* 00h */
|
| 1164 |
|
|
fCONFIG_PAGE_FC_PORT_5_ALIAS_INFO AliasInfo; /* 04h */
|
| 1165 |
|
|
} fCONFIG_PAGE_FC_PORT_5, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_5,
|
| 1166 |
|
|
FCPortPage5_t, MPI_POINTER pFCPortPage5_t;
|
| 1167 |
|
|
|
| 1168 |
|
|
#define MPI_FCPORTPAGE5_PAGEVERSION (0x02)
|
| 1169 |
|
|
|
| 1170 |
|
|
#define MPI_FCPORTPAGE5_FLAGS_ALPA_ACQUIRED (0x01)
|
| 1171 |
|
|
#define MPI_FCPORTPAGE5_FLAGS_HARD_ALPA (0x02)
|
| 1172 |
|
|
#define MPI_FCPORTPAGE5_FLAGS_HARD_WWNN (0x04)
|
| 1173 |
|
|
#define MPI_FCPORTPAGE5_FLAGS_HARD_WWPN (0x08)
|
| 1174 |
|
|
#define MPI_FCPORTPAGE5_FLAGS_DISABLE (0x10)
|
| 1175 |
|
|
|
| 1176 |
|
|
typedef struct _CONFIG_PAGE_FC_PORT_6
|
| 1177 |
|
|
{
|
| 1178 |
|
|
fCONFIG_PAGE_HEADER Header; /* 00h */
|
| 1179 |
|
|
U32 Reserved; /* 04h */
|
| 1180 |
|
|
U64 TimeSinceReset; /* 08h */
|
| 1181 |
|
|
U64 TxFrames; /* 10h */
|
| 1182 |
|
|
U64 RxFrames; /* 18h */
|
| 1183 |
|
|
U64 TxWords; /* 20h */
|
| 1184 |
|
|
U64 RxWords; /* 28h */
|
| 1185 |
|
|
U64 LipCount; /* 30h */
|
| 1186 |
|
|
U64 NosCount; /* 38h */
|
| 1187 |
|
|
U64 ErrorFrames; /* 40h */
|
| 1188 |
|
|
U64 DumpedFrames; /* 48h */
|
| 1189 |
|
|
U64 LinkFailureCount; /* 50h */
|
| 1190 |
|
|
U64 LossOfSyncCount; /* 58h */
|
| 1191 |
|
|
U64 LossOfSignalCount; /* 60h */
|
| 1192 |
|
|
U64 PrimativeSeqErrCount; /* 68h */
|
| 1193 |
|
|
U64 InvalidTxWordCount; /* 70h */
|
| 1194 |
|
|
U64 InvalidCrcCount; /* 78h */
|
| 1195 |
|
|
U64 FcpInitiatorIoCount; /* 80h */
|
| 1196 |
|
|
} fCONFIG_PAGE_FC_PORT_6, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_6,
|
| 1197 |
|
|
FCPortPage6_t, MPI_POINTER pFCPortPage6_t;
|
| 1198 |
|
|
|
| 1199 |
|
|
#define MPI_FCPORTPAGE6_PAGEVERSION (0x00)
|
| 1200 |
|
|
|
| 1201 |
|
|
|
| 1202 |
|
|
typedef struct _CONFIG_PAGE_FC_PORT_7
|
| 1203 |
|
|
{
|
| 1204 |
|
|
fCONFIG_PAGE_HEADER Header; /* 00h */
|
| 1205 |
|
|
U32 Reserved; /* 04h */
|
| 1206 |
|
|
U8 PortSymbolicName[256]; /* 08h */
|
| 1207 |
|
|
} fCONFIG_PAGE_FC_PORT_7, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_7,
|
| 1208 |
|
|
FCPortPage7_t, MPI_POINTER pFCPortPage7_t;
|
| 1209 |
|
|
|
| 1210 |
|
|
#define MPI_FCPORTPAGE7_PAGEVERSION (0x00)
|
| 1211 |
|
|
|
| 1212 |
|
|
|
| 1213 |
|
|
typedef struct _CONFIG_PAGE_FC_PORT_8
|
| 1214 |
|
|
{
|
| 1215 |
|
|
fCONFIG_PAGE_HEADER Header; /* 00h */
|
| 1216 |
|
|
U32 BitVector[8]; /* 04h */
|
| 1217 |
|
|
} fCONFIG_PAGE_FC_PORT_8, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_8,
|
| 1218 |
|
|
FCPortPage8_t, MPI_POINTER pFCPortPage8_t;
|
| 1219 |
|
|
|
| 1220 |
|
|
#define MPI_FCPORTPAGE8_PAGEVERSION (0x00)
|
| 1221 |
|
|
|
| 1222 |
|
|
|
| 1223 |
|
|
typedef struct _CONFIG_PAGE_FC_PORT_9
|
| 1224 |
|
|
{
|
| 1225 |
|
|
fCONFIG_PAGE_HEADER Header; /* 00h */
|
| 1226 |
|
|
U32 Reserved; /* 04h */
|
| 1227 |
|
|
U64 GlobalWWPN; /* 08h */
|
| 1228 |
|
|
U64 GlobalWWNN; /* 10h */
|
| 1229 |
|
|
U32 UnitType; /* 18h */
|
| 1230 |
|
|
U32 PhysicalPortNumber; /* 1Ch */
|
| 1231 |
|
|
U32 NumAttachedNodes; /* 20h */
|
| 1232 |
|
|
U16 IPVersion; /* 24h */
|
| 1233 |
|
|
U16 UDPPortNumber; /* 26h */
|
| 1234 |
|
|
U8 IPAddress[16]; /* 28h */
|
| 1235 |
|
|
U16 Reserved1; /* 38h */
|
| 1236 |
|
|
U16 TopologyDiscoveryFlags; /* 3Ah */
|
| 1237 |
|
|
} fCONFIG_PAGE_FC_PORT_9, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_9,
|
| 1238 |
|
|
FCPortPage9_t, MPI_POINTER pFCPortPage9_t;
|
| 1239 |
|
|
|
| 1240 |
|
|
#define MPI_FCPORTPAGE9_PAGEVERSION (0x00)
|
| 1241 |
|
|
|
| 1242 |
|
|
|
| 1243 |
|
|
typedef struct _CONFIG_PAGE_FC_PORT_10_BASE_SFP_DATA
|
| 1244 |
|
|
{
|
| 1245 |
|
|
U8 Id; /* 10h */
|
| 1246 |
|
|
U8 ExtId; /* 11h */
|
| 1247 |
|
|
U8 Connector; /* 12h */
|
| 1248 |
|
|
U8 Transceiver[8]; /* 13h */
|
| 1249 |
|
|
U8 Encoding; /* 1Bh */
|
| 1250 |
|
|
U8 BitRate_100mbs; /* 1Ch */
|
| 1251 |
|
|
U8 Reserved1; /* 1Dh */
|
| 1252 |
|
|
U8 Length9u_km; /* 1Eh */
|
| 1253 |
|
|
U8 Length9u_100m; /* 1Fh */
|
| 1254 |
|
|
U8 Length50u_10m; /* 20h */
|
| 1255 |
|
|
U8 Length62p5u_10m; /* 21h */
|
| 1256 |
|
|
U8 LengthCopper_m; /* 22h */
|
| 1257 |
|
|
U8 Reseverved2; /* 22h */
|
| 1258 |
|
|
U8 VendorName[16]; /* 24h */
|
| 1259 |
|
|
U8 Reserved3; /* 34h */
|
| 1260 |
|
|
U8 VendorOUI[3]; /* 35h */
|
| 1261 |
|
|
U8 VendorPN[16]; /* 38h */
|
| 1262 |
|
|
U8 VendorRev[4]; /* 48h */
|
| 1263 |
|
|
U16 Reserved4; /* 4Ch */
|
| 1264 |
|
|
U8 Reserved5; /* 4Eh */
|
| 1265 |
|
|
U8 CC_BASE; /* 4Fh */
|
| 1266 |
|
|
} fCONFIG_PAGE_FC_PORT_10_BASE_SFP_DATA,
|
| 1267 |
|
|
MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_10_BASE_SFP_DATA,
|
| 1268 |
|
|
FCPortPage10BaseSfpData_t, MPI_POINTER pFCPortPage10BaseSfpData_t;
|
| 1269 |
|
|
|
| 1270 |
|
|
#define MPI_FCPORT10_BASE_ID_UNKNOWN (0x00)
|
| 1271 |
|
|
#define MPI_FCPORT10_BASE_ID_GBIC (0x01)
|
| 1272 |
|
|
#define MPI_FCPORT10_BASE_ID_FIXED (0x02)
|
| 1273 |
|
|
#define MPI_FCPORT10_BASE_ID_SFP (0x03)
|
| 1274 |
|
|
#define MPI_FCPORT10_BASE_ID_SFP_MIN (0x04)
|
| 1275 |
|
|
#define MPI_FCPORT10_BASE_ID_SFP_MAX (0x7F)
|
| 1276 |
|
|
#define MPI_FCPORT10_BASE_ID_VEND_SPEC_MASK (0x80)
|
| 1277 |
|
|
|
| 1278 |
|
|
#define MPI_FCPORT10_BASE_EXTID_UNKNOWN (0x00)
|
| 1279 |
|
|
#define MPI_FCPORT10_BASE_EXTID_MODDEF1 (0x01)
|
| 1280 |
|
|
#define MPI_FCPORT10_BASE_EXTID_MODDEF2 (0x02)
|
| 1281 |
|
|
#define MPI_FCPORT10_BASE_EXTID_MODDEF3 (0x03)
|
| 1282 |
|
|
#define MPI_FCPORT10_BASE_EXTID_SEEPROM (0x04)
|
| 1283 |
|
|
#define MPI_FCPORT10_BASE_EXTID_MODDEF5 (0x05)
|
| 1284 |
|
|
#define MPI_FCPORT10_BASE_EXTID_MODDEF6 (0x06)
|
| 1285 |
|
|
#define MPI_FCPORT10_BASE_EXTID_MODDEF7 (0x07)
|
| 1286 |
|
|
#define MPI_FCPORT10_BASE_EXTID_VNDSPC_MASK (0x80)
|
| 1287 |
|
|
|
| 1288 |
|
|
#define MPI_FCPORT10_BASE_CONN_UNKNOWN (0x00)
|
| 1289 |
|
|
#define MPI_FCPORT10_BASE_CONN_SC (0x01)
|
| 1290 |
|
|
#define MPI_FCPORT10_BASE_CONN_COPPER1 (0x02)
|
| 1291 |
|
|
#define MPI_FCPORT10_BASE_CONN_COPPER2 (0x03)
|
| 1292 |
|
|
#define MPI_FCPORT10_BASE_CONN_BNC_TNC (0x04)
|
| 1293 |
|
|
#define MPI_FCPORT10_BASE_CONN_COAXIAL (0x05)
|
| 1294 |
|
|
#define MPI_FCPORT10_BASE_CONN_FIBERJACK (0x06)
|
| 1295 |
|
|
#define MPI_FCPORT10_BASE_CONN_LC (0x07)
|
| 1296 |
|
|
#define MPI_FCPORT10_BASE_CONN_MT_RJ (0x08)
|
| 1297 |
|
|
#define MPI_FCPORT10_BASE_CONN_MU (0x09)
|
| 1298 |
|
|
#define MPI_FCPORT10_BASE_CONN_SG (0x0A)
|
| 1299 |
|
|
#define MPI_FCPORT10_BASE_CONN_OPT_PIGT (0x0B)
|
| 1300 |
|
|
#define MPI_FCPORT10_BASE_CONN_RSV1_MIN (0x0C)
|
| 1301 |
|
|
#define MPI_FCPORT10_BASE_CONN_RSV1_MAX (0x1F)
|
| 1302 |
|
|
#define MPI_FCPORT10_BASE_CONN_HSSDC_II (0x20)
|
| 1303 |
|
|
#define MPI_FCPORT10_BASE_CONN_CPR_PIGT (0x21)
|
| 1304 |
|
|
#define MPI_FCPORT10_BASE_CONN_RSV2_MIN (0x22)
|
| 1305 |
|
|
#define MPI_FCPORT10_BASE_CONN_RSV2_MAX (0x7F)
|
| 1306 |
|
|
#define MPI_FCPORT10_BASE_CONN_VNDSPC_MASK (0x80)
|
| 1307 |
|
|
|
| 1308 |
|
|
#define MPI_FCPORT10_BASE_ENCODE_UNSPEC (0x00)
|
| 1309 |
|
|
#define MPI_FCPORT10_BASE_ENCODE_8B10B (0x01)
|
| 1310 |
|
|
#define MPI_FCPORT10_BASE_ENCODE_4B5B (0x02)
|
| 1311 |
|
|
#define MPI_FCPORT10_BASE_ENCODE_NRZ (0x03)
|
| 1312 |
|
|
#define MPI_FCPORT10_BASE_ENCODE_MANCHESTER (0x04)
|
| 1313 |
|
|
|
| 1314 |
|
|
|
| 1315 |
|
|
typedef struct _CONFIG_PAGE_FC_PORT_10_EXTENDED_SFP_DATA
|
| 1316 |
|
|
{
|
| 1317 |
|
|
U8 Options[2]; /* 50h */
|
| 1318 |
|
|
U8 BitRateMax; /* 52h */
|
| 1319 |
|
|
U8 BitRateMin; /* 53h */
|
| 1320 |
|
|
U8 VendorSN[16]; /* 54h */
|
| 1321 |
|
|
U8 DateCode[8]; /* 64h */
|
| 1322 |
|
|
U8 Reserved5[3]; /* 6Ch */
|
| 1323 |
|
|
U8 CC_EXT; /* 6Fh */
|
| 1324 |
|
|
} fCONFIG_PAGE_FC_PORT_10_EXTENDED_SFP_DATA,
|
| 1325 |
|
|
MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_10_EXTENDED_SFP_DATA,
|
| 1326 |
|
|
FCPortPage10ExtendedSfpData_t, MPI_POINTER pFCPortPage10ExtendedSfpData_t;
|
| 1327 |
|
|
|
| 1328 |
|
|
#define MPI_FCPORT10_EXT_OPTION1_RATESEL (0x20)
|
| 1329 |
|
|
#define MPI_FCPORT10_EXT_OPTION1_TX_DISABLE (0x10)
|
| 1330 |
|
|
#define MPI_FCPORT10_EXT_OPTION1_TX_FAULT (0x08)
|
| 1331 |
|
|
#define MPI_FCPORT10_EXT_OPTION1_LOS_INVERT (0x04)
|
| 1332 |
|
|
#define MPI_FCPORT10_EXT_OPTION1_LOS (0x02)
|
| 1333 |
|
|
|
| 1334 |
|
|
|
| 1335 |
|
|
typedef struct _CONFIG_PAGE_FC_PORT_10
|
| 1336 |
|
|
{
|
| 1337 |
|
|
fCONFIG_PAGE_HEADER Header; /* 00h */
|
| 1338 |
|
|
U8 Flags; /* 04h */
|
| 1339 |
|
|
U8 Reserved1; /* 05h */
|
| 1340 |
|
|
U16 Reserved2; /* 06h */
|
| 1341 |
|
|
U32 HwConfig1; /* 08h */
|
| 1342 |
|
|
U32 HwConfig2; /* 0Ch */
|
| 1343 |
|
|
fCONFIG_PAGE_FC_PORT_10_BASE_SFP_DATA Base; /* 10h */
|
| 1344 |
|
|
fCONFIG_PAGE_FC_PORT_10_EXTENDED_SFP_DATA Extended; /* 50h */
|
| 1345 |
|
|
U8 VendorSpecific[32]; /* 70h */
|
| 1346 |
|
|
} fCONFIG_PAGE_FC_PORT_10, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_10,
|
| 1347 |
|
|
FCPortPage10_t, MPI_POINTER pFCPortPage10_t;
|
| 1348 |
|
|
|
| 1349 |
|
|
#define MPI_FCPORTPAGE10_PAGEVERSION (0x00)
|
| 1350 |
|
|
|
| 1351 |
|
|
/* standard MODDEF pin definitions (from GBIC spec.) */
|
| 1352 |
|
|
#define MPI_FCPORTPAGE10_FLAGS_MODDEF_MASK (0x00000007)
|
| 1353 |
|
|
#define MPI_FCPORTPAGE10_FLAGS_MODDEF2 (0x00000001)
|
| 1354 |
|
|
#define MPI_FCPORTPAGE10_FLAGS_MODDEF1 (0x00000002)
|
| 1355 |
|
|
#define MPI_FCPORTPAGE10_FLAGS_MODDEF0 (0x00000004)
|
| 1356 |
|
|
#define MPI_FCPORTPAGE10_FLAGS_MODDEF_NOGBIC (0x00000007)
|
| 1357 |
|
|
#define MPI_FCPORTPAGE10_FLAGS_MODDEF_CPR_IEEE_CX (0x00000006)
|
| 1358 |
|
|
#define MPI_FCPORTPAGE10_FLAGS_MODDEF_COPPER (0x00000005)
|
| 1359 |
|
|
#define MPI_FCPORTPAGE10_FLAGS_MODDEF_OPTICAL_LW (0x00000004)
|
| 1360 |
|
|
#define MPI_FCPORTPAGE10_FLAGS_MODDEF_SEEPROM (0x00000003)
|
| 1361 |
|
|
#define MPI_FCPORTPAGE10_FLAGS_MODDEF_SW_OPTICAL (0x00000002)
|
| 1362 |
|
|
#define MPI_FCPORTPAGE10_FLAGS_MODDEF_LX_IEEE_OPT_LW (0x00000001)
|
| 1363 |
|
|
#define MPI_FCPORTPAGE10_FLAGS_MODDEF_SX_IEEE_OPT_SW (0x00000000)
|
| 1364 |
|
|
|
| 1365 |
|
|
#define MPI_FCPORTPAGE10_FLAGS_CC_BASE_OK (0x00000010)
|
| 1366 |
|
|
#define MPI_FCPORTPAGE10_FLAGS_CC_EXT_OK (0x00000020)
|
| 1367 |
|
|
|
| 1368 |
|
|
|
| 1369 |
|
|
/****************************************************************************
|
| 1370 |
|
|
* FC Device Config Pages
|
| 1371 |
|
|
****************************************************************************/
|
| 1372 |
|
|
|
| 1373 |
|
|
typedef struct _CONFIG_PAGE_FC_DEVICE_0
|
| 1374 |
|
|
{
|
| 1375 |
|
|
fCONFIG_PAGE_HEADER Header; /* 00h */
|
| 1376 |
|
|
U64 WWNN; /* 04h */
|
| 1377 |
|
|
U64 WWPN; /* 0Ch */
|
| 1378 |
|
|
U32 PortIdentifier; /* 14h */
|
| 1379 |
|
|
U8 Protocol; /* 18h */
|
| 1380 |
|
|
U8 Flags; /* 19h */
|
| 1381 |
|
|
U16 BBCredit; /* 1Ah */
|
| 1382 |
|
|
U16 MaxRxFrameSize; /* 1Ch */
|
| 1383 |
|
|
U8 ADISCHardALPA; /* 1Eh */
|
| 1384 |
|
|
U8 PortNumber; /* 1Fh */
|
| 1385 |
|
|
U8 FcPhLowestVersion; /* 20h */
|
| 1386 |
|
|
U8 FcPhHighestVersion; /* 21h */
|
| 1387 |
|
|
U8 CurrentTargetID; /* 22h */
|
| 1388 |
|
|
U8 CurrentBus; /* 23h */
|
| 1389 |
|
|
} fCONFIG_PAGE_FC_DEVICE_0, MPI_POINTER PTR_CONFIG_PAGE_FC_DEVICE_0,
|
| 1390 |
|
|
FCDevicePage0_t, MPI_POINTER pFCDevicePage0_t;
|
| 1391 |
|
|
|
| 1392 |
|
|
#define MPI_FC_DEVICE_PAGE0_PAGEVERSION (0x03)
|
| 1393 |
|
|
|
| 1394 |
|
|
#define MPI_FC_DEVICE_PAGE0_FLAGS_TARGETID_BUS_VALID (0x01)
|
| 1395 |
|
|
#define MPI_FC_DEVICE_PAGE0_FLAGS_PLOGI_INVALID (0x02)
|
| 1396 |
|
|
#define MPI_FC_DEVICE_PAGE0_FLAGS_PRLI_INVALID (0x04)
|
| 1397 |
|
|
|
| 1398 |
|
|
#define MPI_FC_DEVICE_PAGE0_PROT_IP (0x01)
|
| 1399 |
|
|
#define MPI_FC_DEVICE_PAGE0_PROT_FCP_TARGET (0x02)
|
| 1400 |
|
|
#define MPI_FC_DEVICE_PAGE0_PROT_FCP_INITIATOR (0x04)
|
| 1401 |
|
|
#define MPI_FC_DEVICE_PAGE0_PROT_FCP_RETRY (0x08)
|
| 1402 |
|
|
|
| 1403 |
|
|
#define MPI_FC_DEVICE_PAGE0_PGAD_PORT_MASK (MPI_FC_DEVICE_PGAD_PORT_MASK)
|
| 1404 |
|
|
#define MPI_FC_DEVICE_PAGE0_PGAD_FORM_MASK (MPI_FC_DEVICE_PGAD_FORM_MASK)
|
| 1405 |
|
|
#define MPI_FC_DEVICE_PAGE0_PGAD_FORM_NEXT_DID (MPI_FC_DEVICE_PGAD_FORM_NEXT_DID)
|
| 1406 |
|
|
#define MPI_FC_DEVICE_PAGE0_PGAD_FORM_BUS_TID (MPI_FC_DEVICE_PGAD_FORM_BUS_TID)
|
| 1407 |
|
|
#define MPI_FC_DEVICE_PAGE0_PGAD_DID_MASK (MPI_FC_DEVICE_PGAD_ND_DID_MASK)
|
| 1408 |
|
|
#define MPI_FC_DEVICE_PAGE0_PGAD_BUS_MASK (MPI_FC_DEVICE_PGAD_BT_BUS_MASK)
|
| 1409 |
|
|
#define MPI_FC_DEVICE_PAGE0_PGAD_BUS_SHIFT (MPI_FC_DEVICE_PGAD_BT_BUS_SHIFT)
|
| 1410 |
|
|
#define MPI_FC_DEVICE_PAGE0_PGAD_TID_MASK (MPI_FC_DEVICE_PGAD_BT_TID_MASK)
|
| 1411 |
|
|
|
| 1412 |
|
|
#define MPI_FC_DEVICE_PAGE0_HARD_ALPA_UNKNOWN (0xFF)
|
| 1413 |
|
|
|
| 1414 |
|
|
/****************************************************************************
|
| 1415 |
|
|
* RAID Volume Config Pages
|
| 1416 |
|
|
****************************************************************************/
|
| 1417 |
|
|
|
| 1418 |
|
|
typedef struct _RAID_VOL0_PHYS_DISK
|
| 1419 |
|
|
{
|
| 1420 |
|
|
U16 Reserved; /* 00h */
|
| 1421 |
|
|
U8 PhysDiskMap; /* 02h */
|
| 1422 |
|
|
U8 PhysDiskNum; /* 03h */
|
| 1423 |
|
|
} RAID_VOL0_PHYS_DISK, MPI_POINTER PTR_RAID_VOL0_PHYS_DISK,
|
| 1424 |
|
|
RaidVol0PhysDisk_t, MPI_POINTER pRaidVol0PhysDisk_t;
|
| 1425 |
|
|
|
| 1426 |
|
|
#define MPI_RAIDVOL0_PHYSDISK_PRIMARY (0x01)
|
| 1427 |
|
|
#define MPI_RAIDVOL0_PHYSDISK_SECONDARY (0x02)
|
| 1428 |
|
|
|
| 1429 |
|
|
typedef struct _RAID_VOL0_STATUS
|
| 1430 |
|
|
{
|
| 1431 |
|
|
U8 Flags; /* 00h */
|
| 1432 |
|
|
U8 State; /* 01h */
|
| 1433 |
|
|
U16 Reserved; /* 02h */
|
| 1434 |
|
|
} RAID_VOL0_STATUS, MPI_POINTER PTR_RAID_VOL0_STATUS,
|
| 1435 |
|
|
RaidVol0Status_t, MPI_POINTER pRaidVol0Status_t;
|
| 1436 |
|
|
|
| 1437 |
|
|
/* RAID Volume Page 0 VolumeStatus defines */
|
| 1438 |
|
|
|
| 1439 |
|
|
#define MPI_RAIDVOL0_STATUS_FLAG_ENABLED (0x01)
|
| 1440 |
|
|
#define MPI_RAIDVOL0_STATUS_FLAG_QUIESCED (0x02)
|
| 1441 |
|
|
#define MPI_RAIDVOL0_STATUS_FLAG_RESYNC_IN_PROGRESS (0x04)
|
| 1442 |
|
|
#define MPI_RAIDVOL0_STATUS_FLAG_VOLUME_INACTIVE (0x08)
|
| 1443 |
|
|
|
| 1444 |
|
|
#define MPI_RAIDVOL0_STATUS_STATE_OPTIMAL (0x00)
|
| 1445 |
|
|
#define MPI_RAIDVOL0_STATUS_STATE_DEGRADED (0x01)
|
| 1446 |
|
|
#define MPI_RAIDVOL0_STATUS_STATE_FAILED (0x02)
|
| 1447 |
|
|
|
| 1448 |
|
|
typedef struct _RAID_VOL0_SETTINGS
|
| 1449 |
|
|
{
|
| 1450 |
|
|
U16 Settings; /* 00h */
|
| 1451 |
|
|
U8 HotSparePool; /* 01h */ /* MPI_RAID_HOT_SPARE_POOL_ */
|
| 1452 |
|
|
U8 Reserved; /* 02h */
|
| 1453 |
|
|
} RAID_VOL0_SETTINGS, MPI_POINTER PTR_RAID_VOL0_SETTINGS,
|
| 1454 |
|
|
RaidVol0Settings, MPI_POINTER pRaidVol0Settings;
|
| 1455 |
|
|
|
| 1456 |
|
|
/* RAID Volume Page 0 VolumeSettings defines */
|
| 1457 |
|
|
|
| 1458 |
|
|
#define MPI_RAIDVOL0_SETTING_WRITE_CACHING_ENABLE (0x0001)
|
| 1459 |
|
|
#define MPI_RAIDVOL0_SETTING_OFFLINE_ON_SMART (0x0002)
|
| 1460 |
|
|
#define MPI_RAIDVOL0_SETTING_AUTO_CONFIGURE (0x0004)
|
| 1461 |
|
|
#define MPI_RAIDVOL0_SETTING_PRIORITY_RESYNC (0x0008)
|
| 1462 |
|
|
#define MPI_RAIDVOL0_SETTING_USE_PRODUCT_ID_SUFFIX (0x0010)
|
| 1463 |
|
|
#define MPI_RAIDVOL0_SETTING_USE_DEFAULTS (0x8000)
|
| 1464 |
|
|
|
| 1465 |
|
|
/* RAID Volume Page 0 HotSparePool defines, also used in RAID Physical Disk */
|
| 1466 |
|
|
#define MPI_RAID_HOT_SPARE_POOL_0 (0x01)
|
| 1467 |
|
|
#define MPI_RAID_HOT_SPARE_POOL_1 (0x02)
|
| 1468 |
|
|
#define MPI_RAID_HOT_SPARE_POOL_2 (0x04)
|
| 1469 |
|
|
#define MPI_RAID_HOT_SPARE_POOL_3 (0x08)
|
| 1470 |
|
|
#define MPI_RAID_HOT_SPARE_POOL_4 (0x10)
|
| 1471 |
|
|
#define MPI_RAID_HOT_SPARE_POOL_5 (0x20)
|
| 1472 |
|
|
#define MPI_RAID_HOT_SPARE_POOL_6 (0x40)
|
| 1473 |
|
|
#define MPI_RAID_HOT_SPARE_POOL_7 (0x80)
|
| 1474 |
|
|
|
| 1475 |
|
|
/*
|
| 1476 |
|
|
* Host code (drivers, BIOS, utilities, etc.) should leave this define set to
|
| 1477 |
|
|
* one and check Header.PageLength at runtime.
|
| 1478 |
|
|
*/
|
| 1479 |
|
|
#ifndef MPI_RAID_VOL_PAGE_0_PHYSDISK_MAX
|
| 1480 |
|
|
#define MPI_RAID_VOL_PAGE_0_PHYSDISK_MAX (1)
|
| 1481 |
|
|
#endif
|
| 1482 |
|
|
|
| 1483 |
|
|
typedef struct _CONFIG_PAGE_RAID_VOL_0
|
| 1484 |
|
|
{
|
| 1485 |
|
|
fCONFIG_PAGE_HEADER Header; /* 00h */
|
| 1486 |
|
|
U8 VolumeID; /* 04h */
|
| 1487 |
|
|
U8 VolumeBus; /* 05h */
|
| 1488 |
|
|
U8 VolumeIOC; /* 06h */
|
| 1489 |
|
|
U8 VolumeType; /* 07h */ /* MPI_RAID_VOL_TYPE_ */
|
| 1490 |
|
|
RAID_VOL0_STATUS VolumeStatus; /* 08h */
|
| 1491 |
|
|
RAID_VOL0_SETTINGS VolumeSettings; /* 0Ch */
|
| 1492 |
|
|
U32 MaxLBA; /* 10h */
|
| 1493 |
|
|
U32 Reserved1; /* 14h */
|
| 1494 |
|
|
U32 StripeSize; /* 18h */
|
| 1495 |
|
|
U32 Reserved2; /* 1Ch */
|
| 1496 |
|
|
U32 Reserved3; /* 20h */
|
| 1497 |
|
|
U8 NumPhysDisks; /* 24h */
|
| 1498 |
|
|
U8 Reserved4; /* 25h */
|
| 1499 |
|
|
U16 Reserved5; /* 26h */
|
| 1500 |
|
|
RAID_VOL0_PHYS_DISK PhysDisk[MPI_RAID_VOL_PAGE_0_PHYSDISK_MAX];/* 28h */
|
| 1501 |
|
|
} fCONFIG_PAGE_RAID_VOL_0, MPI_POINTER PTR_CONFIG_PAGE_RAID_VOL_0,
|
| 1502 |
|
|
RaidVolumePage0_t, MPI_POINTER pRaidVolumePage0_t;
|
| 1503 |
|
|
|
| 1504 |
|
|
#define MPI_RAIDVOLPAGE0_PAGEVERSION (0x01)
|
| 1505 |
|
|
|
| 1506 |
|
|
|
| 1507 |
|
|
/****************************************************************************
|
| 1508 |
|
|
* RAID Physical Disk Config Pages
|
| 1509 |
|
|
****************************************************************************/
|
| 1510 |
|
|
|
| 1511 |
|
|
typedef struct _RAID_PHYS_DISK0_ERROR_DATA
|
| 1512 |
|
|
{
|
| 1513 |
|
|
U8 ErrorCdbByte; /* 00h */
|
| 1514 |
|
|
U8 ErrorSenseKey; /* 01h */
|
| 1515 |
|
|
U16 Reserved; /* 02h */
|
| 1516 |
|
|
U16 ErrorCount; /* 04h */
|
| 1517 |
|
|
U8 ErrorASC; /* 06h */
|
| 1518 |
|
|
U8 ErrorASCQ; /* 07h */
|
| 1519 |
|
|
U16 SmartCount; /* 08h */
|
| 1520 |
|
|
U8 SmartASC; /* 0Ah */
|
| 1521 |
|
|
U8 SmartASCQ; /* 0Bh */
|
| 1522 |
|
|
} RAID_PHYS_DISK0_ERROR_DATA, MPI_POINTER PTR_RAID_PHYS_DISK0_ERROR_DATA,
|
| 1523 |
|
|
RaidPhysDisk0ErrorData_t, MPI_POINTER pRaidPhysDisk0ErrorData_t;
|
| 1524 |
|
|
|
| 1525 |
|
|
typedef struct _RAID_PHYS_DISK_INQUIRY_DATA
|
| 1526 |
|
|
{
|
| 1527 |
|
|
U8 VendorID[8]; /* 00h */
|
| 1528 |
|
|
U8 ProductID[16]; /* 08h */
|
| 1529 |
|
|
U8 ProductRevLevel[4]; /* 18h */
|
| 1530 |
|
|
U8 Info[32]; /* 1Ch */
|
| 1531 |
|
|
} RAID_PHYS_DISK0_INQUIRY_DATA, MPI_POINTER PTR_RAID_PHYS_DISK0_INQUIRY_DATA,
|
| 1532 |
|
|
RaidPhysDisk0InquiryData, MPI_POINTER pRaidPhysDisk0InquiryData;
|
| 1533 |
|
|
|
| 1534 |
|
|
typedef struct _RAID_PHYS_DISK0_SETTINGS
|
| 1535 |
|
|
{
|
| 1536 |
|
|
U8 SepID; /* 00h */
|
| 1537 |
|
|
U8 SepBus; /* 01h */
|
| 1538 |
|
|
U8 HotSparePool; /* 02h */ /* MPI_RAID_HOT_SPARE_POOL_ */
|
| 1539 |
|
|
U8 PhysDiskSettings; /* 03h */
|
| 1540 |
|
|
} RAID_PHYS_DISK0_SETTINGS, MPI_POINTER PTR_RAID_PHYS_DISK0_SETTINGS,
|
| 1541 |
|
|
RaidPhysDiskSettings_t, MPI_POINTER pRaidPhysDiskSettings_t;
|
| 1542 |
|
|
|
| 1543 |
|
|
typedef struct _RAID_PHYS_DISK0_STATUS
|
| 1544 |
|
|
{
|
| 1545 |
|
|
U8 Flags; /* 00h */
|
| 1546 |
|
|
U8 State; /* 01h */
|
| 1547 |
|
|
U16 Reserved; /* 02h */
|
| 1548 |
|
|
} RAID_PHYS_DISK0_STATUS, MPI_POINTER PTR_RAID_PHYS_DISK0_STATUS,
|
| 1549 |
|
|
RaidPhysDiskStatus_t, MPI_POINTER pRaidPhysDiskStatus_t;
|
| 1550 |
|
|
|
| 1551 |
|
|
/* RAID Volume 2 IM Physical Disk DiskStatus flags */
|
| 1552 |
|
|
|
| 1553 |
|
|
#define MPI_PHYSDISK0_STATUS_FLAG_OUT_OF_SYNC (0x01)
|
| 1554 |
|
|
#define MPI_PHYSDISK0_STATUS_FLAG_QUIESCED (0x02)
|
| 1555 |
|
|
|
| 1556 |
|
|
#define MPI_PHYSDISK0_STATUS_ONLINE (0x00)
|
| 1557 |
|
|
#define MPI_PHYSDISK0_STATUS_MISSING (0x01)
|
| 1558 |
|
|
#define MPI_PHYSDISK0_STATUS_NOT_COMPATIBLE (0x02)
|
| 1559 |
|
|
#define MPI_PHYSDISK0_STATUS_FAILED (0x03)
|
| 1560 |
|
|
#define MPI_PHYSDISK0_STATUS_INITIALIZING (0x04)
|
| 1561 |
|
|
#define MPI_PHYSDISK0_STATUS_OFFLINE_REQUESTED (0x05)
|
| 1562 |
|
|
#define MPI_PHYSDISK0_STATUS_FAILED_REQUESTED (0x06)
|
| 1563 |
|
|
#define MPI_PHYSDISK0_STATUS_OTHER_OFFLINE (0xFF)
|
| 1564 |
|
|
|
| 1565 |
|
|
typedef struct _CONFIG_PAGE_RAID_PHYS_DISK_0
|
| 1566 |
|
|
{
|
| 1567 |
|
|
fCONFIG_PAGE_HEADER Header; /* 00h */
|
| 1568 |
|
|
U8 PhysDiskID; /* 04h */
|
| 1569 |
|
|
U8 PhysDiskBus; /* 05h */
|
| 1570 |
|
|
U8 PhysDiskIOC; /* 06h */
|
| 1571 |
|
|
U8 PhysDiskNum; /* 07h */
|
| 1572 |
|
|
RAID_PHYS_DISK0_SETTINGS PhysDiskSettings; /* 08h */
|
| 1573 |
|
|
U32 Reserved1; /* 0Ch */
|
| 1574 |
|
|
U32 Reserved2; /* 10h */
|
| 1575 |
|
|
U32 Reserved3; /* 14h */
|
| 1576 |
|
|
U8 DiskIdentifier[16]; /* 18h */
|
| 1577 |
|
|
RAID_PHYS_DISK0_INQUIRY_DATA InquiryData; /* 28h */
|
| 1578 |
|
|
RAID_PHYS_DISK0_STATUS PhysDiskStatus; /* 64h */
|
| 1579 |
|
|
U32 MaxLBA; /* 68h */
|
| 1580 |
|
|
RAID_PHYS_DISK0_ERROR_DATA ErrorData; /* 6Ch */
|
| 1581 |
|
|
} fCONFIG_PAGE_RAID_PHYS_DISK_0, MPI_POINTER PTR_CONFIG_PAGE_RAID_PHYS_DISK_0,
|
| 1582 |
|
|
RaidPhysDiskPage0_t, MPI_POINTER pRaidPhysDiskPage0_t;
|
| 1583 |
|
|
|
| 1584 |
|
|
#define MPI_RAIDPHYSDISKPAGE0_PAGEVERSION (0x00)
|
| 1585 |
|
|
|
| 1586 |
|
|
|
| 1587 |
|
|
/****************************************************************************
|
| 1588 |
|
|
* LAN Config Pages
|
| 1589 |
|
|
****************************************************************************/
|
| 1590 |
|
|
|
| 1591 |
|
|
typedef struct _CONFIG_PAGE_LAN_0
|
| 1592 |
|
|
{
|
| 1593 |
|
|
ConfigPageHeader_t Header; /* 00h */
|
| 1594 |
|
|
U16 TxRxModes; /* 04h */
|
| 1595 |
|
|
U16 Reserved; /* 06h */
|
| 1596 |
|
|
U32 PacketPrePad; /* 08h */
|
| 1597 |
|
|
} fCONFIG_PAGE_LAN_0, MPI_POINTER PTR_CONFIG_PAGE_LAN_0,
|
| 1598 |
|
|
LANPage0_t, MPI_POINTER pLANPage0_t;
|
| 1599 |
|
|
|
| 1600 |
|
|
#define MPI_LAN_PAGE0_PAGEVERSION (0x01)
|
| 1601 |
|
|
|
| 1602 |
|
|
#define MPI_LAN_PAGE0_RETURN_LOOPBACK (0x0000)
|
| 1603 |
|
|
#define MPI_LAN_PAGE0_SUPPRESS_LOOPBACK (0x0001)
|
| 1604 |
|
|
#define MPI_LAN_PAGE0_LOOPBACK_MASK (0x0001)
|
| 1605 |
|
|
|
| 1606 |
|
|
typedef struct _CONFIG_PAGE_LAN_1
|
| 1607 |
|
|
{
|
| 1608 |
|
|
ConfigPageHeader_t Header; /* 00h */
|
| 1609 |
|
|
U16 Reserved; /* 04h */
|
| 1610 |
|
|
U8 CurrentDeviceState; /* 06h */
|
| 1611 |
|
|
U8 Reserved1; /* 07h */
|
| 1612 |
|
|
U32 MinPacketSize; /* 08h */
|
| 1613 |
|
|
U32 MaxPacketSize; /* 0Ch */
|
| 1614 |
|
|
U32 HardwareAddressLow; /* 10h */
|
| 1615 |
|
|
U32 HardwareAddressHigh; /* 14h */
|
| 1616 |
|
|
U32 MaxWireSpeedLow; /* 18h */
|
| 1617 |
|
|
U32 MaxWireSpeedHigh; /* 1Ch */
|
| 1618 |
|
|
U32 BucketsRemaining; /* 20h */
|
| 1619 |
|
|
U32 MaxReplySize; /* 24h */
|
| 1620 |
|
|
U32 NegWireSpeedLow; /* 28h */
|
| 1621 |
|
|
U32 NegWireSpeedHigh; /* 2Ch */
|
| 1622 |
|
|
} fCONFIG_PAGE_LAN_1, MPI_POINTER PTR_CONFIG_PAGE_LAN_1,
|
| 1623 |
|
|
LANPage1_t, MPI_POINTER pLANPage1_t;
|
| 1624 |
|
|
|
| 1625 |
|
|
#define MPI_LAN_PAGE1_PAGEVERSION (0x03)
|
| 1626 |
|
|
|
| 1627 |
|
|
#define MPI_LAN_PAGE1_DEV_STATE_RESET (0x00)
|
| 1628 |
|
|
#define MPI_LAN_PAGE1_DEV_STATE_OPERATIONAL (0x01)
|
| 1629 |
|
|
|
| 1630 |
|
|
#endif
|
| 1631 |
|
|
|
