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[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [drivers/] [message/] [i2o/] [i2o_pci.c] - Blame information for rev 1765

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Line No. Rev Author Line
1 1275 phoenix
/*
2
 *      Find I2O capable controllers on the PCI bus, and register/install
3
 *      them with the I2O layer
4
 *
5
 *      (C) Copyright 1999   Red Hat Software
6
 *
7
 *      Written by Alan Cox, Building Number Three Ltd
8
 *      Modified by Deepak Saxena <deepak@plexity.net>
9
 *      Modified by Boji T Kannanthanam <boji.t.kannanthanam@intel.com>
10
 *
11
 *      This program is free software; you can redistribute it and/or
12
 *      modify it under the terms of the GNU General Public License
13
 *      as published by the Free Software Foundation; either version
14
 *      2 of the License, or (at your option) any later version.
15
 *
16
 *      TODO:
17
 *              Support polled I2O PCI controllers.
18
 *              2.4 hotplug support
19
 *              Finish verifying 64bit/bigendian clean
20
 */
21
 
22
#include <linux/config.h>
23
#include <linux/module.h>
24
#include <linux/kernel.h>
25
#include <linux/pci.h>
26
#include <linux/i2o.h>
27
#include <linux/errno.h>
28
#include <linux/init.h>
29
#include <linux/slab.h>
30
#include <asm/io.h>
31
 
32
#ifdef CONFIG_MTRR
33
#include <asm/mtrr.h>
34
#endif // CONFIG_MTRR
35
 
36
static int dpt = 0;
37
 
38
extern void i2o_sys_init(void);
39
 
40
/**
41
 *      i2o_pci_dispose         -       Free bus specific resources
42
 *      @c: I2O controller
43
 *
44
 *      Disable interrupts and then free interrupt, I/O and mtrr resources
45
 *      used by this controller. Called by the I2O core on unload.
46
 */
47
 
48
static void i2o_pci_dispose(struct i2o_controller *c)
49
{
50
        I2O_IRQ_WRITE32(c,0xFFFFFFFF);
51
        if(c->bus.pci.irq > 0)
52
                free_irq(c->bus.pci.irq, c);
53
        iounmap(((u8 *)c->post_port)-0x40);
54
 
55
#ifdef CONFIG_MTRR
56
        if(c->bus.pci.mtrr_reg0 > 0)
57
                mtrr_del(c->bus.pci.mtrr_reg0, 0, 0);
58
        if(c->bus.pci.mtrr_reg1 > 0)
59
                mtrr_del(c->bus.pci.mtrr_reg1, 0, 0);
60
#endif
61
}
62
 
63
/**
64
 *      i2o_pci_bind            -       Bind controller and devices
65
 *      @c: i2o controller
66
 *      @dev: i2o device
67
 *
68
 *      Bind a device driver to a controller. In the case of PCI all we need to do
69
 *      is module housekeeping.
70
 */
71
 
72
static int i2o_pci_bind(struct i2o_controller *c, struct i2o_device *dev)
73
{
74
        MOD_INC_USE_COUNT;
75
        return 0;
76
}
77
 
78
/**
79
 *      i2o_pci_unbind          -       Bind controller and devices
80
 *      @c: i2o controller
81
 *      @dev: i2o device
82
 *
83
 *      Unbind a device driver from a controller. In the case of PCI all we need to do
84
 *      is module housekeeping.
85
 */
86
 
87
 
88
static int i2o_pci_unbind(struct i2o_controller *c, struct i2o_device *dev)
89
{
90
        MOD_DEC_USE_COUNT;
91
        return 0;
92
}
93
 
94
/**
95
 *      i2o_pci_enable          -       Enable controller
96
 *      @c: controller
97
 *
98
 *      Called by the I2O core code in order to enable bus specific
99
 *      resources for this controller. In our case that means unmasking the
100
 *      interrupt line.
101
 */
102
 
103
static void i2o_pci_enable(struct i2o_controller *c)
104
{
105
        I2O_IRQ_WRITE32(c, 0);
106
        c->enabled = 1;
107
}
108
 
109
/**
110
 *      i2o_pci_disable         -       Enable controller
111
 *      @c: controller
112
 *
113
 *      Called by the I2O core code in order to enable bus specific
114
 *      resources for this controller. In our case that means masking the
115
 *      interrupt line.
116
 */
117
 
118
static void i2o_pci_disable(struct i2o_controller *c)
119
{
120
        I2O_IRQ_WRITE32(c, 0xFFFFFFFF);
121
        c->enabled = 0;
122
}
123
 
124
/**
125
 *      i2o_pci_interrupt       -       Bus specific interrupt handler
126
 *      @irq: interrupt line
127
 *      @dev_id: cookie
128
 *
129
 *      Handle an interrupt from a PCI based I2O controller. This turns out
130
 *      to be rather simple. We keep the controller pointer in the cookie.
131
 */
132
 
133
static void i2o_pci_interrupt(int irq, void *dev_id, struct pt_regs *r)
134
{
135
        struct i2o_controller *c = dev_id;
136
        i2o_run_queue(c);
137
}
138
 
139
/**
140
 *      i2o_pci_install         -       Install a PCI i2o controller
141
 *      @dev: PCI device of the I2O controller
142
 *
143
 *      Install a PCI (or in theory AGP) i2o controller. Devices are
144
 *      initialized, configured and registered with the i2o core subsystem. Be
145
 *      very careful with ordering. There may be pending interrupts.
146
 *
147
 *      To Do: Add support for polled controllers
148
 */
149
 
150
int __init i2o_pci_install(struct pci_dev *dev)
151
{
152
        struct i2o_controller *c=kmalloc(sizeof(struct i2o_controller),
153
                                                GFP_KERNEL);
154
        unsigned long mem;
155
        u32 memptr = 0;
156
        u32 size;
157
 
158
        int i;
159
 
160
        if(c==NULL)
161
        {
162
                printk(KERN_ERR "i2o: Insufficient memory to add controller.\n");
163
                return -ENOMEM;
164
        }
165
        memset(c, 0, sizeof(*c));
166
 
167
        for(i=0; i<6; i++)
168
        {
169
                /* Skip I/O spaces */
170
                if(!(pci_resource_flags(dev, i) & IORESOURCE_IO))
171
                {
172
                        memptr = pci_resource_start(dev, i);
173
                        break;
174
                }
175
        }
176
 
177
        if(i==6)
178
        {
179
                printk(KERN_ERR "i2o: I2O controller has no memory regions defined.\n");
180
                kfree(c);
181
                return -EINVAL;
182
        }
183
 
184
        size = dev->resource[i].end-dev->resource[i].start+1;
185
        /* Map the I2O controller */
186
 
187
        printk(KERN_INFO "i2o: PCI I2O controller at 0x%08X size=%d\n", memptr, size);
188
        mem = (unsigned long)ioremap(memptr, size);
189
        if(mem==0)
190
        {
191
                printk(KERN_ERR "i2o: Unable to map controller.\n");
192
                kfree(c);
193
                return -EINVAL;
194
        }
195
 
196
        c->bus.pci.irq = -1;
197
        c->bus.pci.dpt = 0;
198
        c->bus.pci.short_req = 0;
199
        c->pdev = dev;
200
 
201
        c->irq_mask = mem+0x34;
202
        c->post_port = mem+0x40;
203
        c->reply_port = mem+0x44;
204
 
205
        c->mem_phys = memptr;
206
        c->mem_offset = mem;
207
        c->destructor = i2o_pci_dispose;
208
 
209
        c->bind = i2o_pci_bind;
210
        c->unbind = i2o_pci_unbind;
211
        c->bus_enable = i2o_pci_enable;
212
        c->bus_disable = i2o_pci_disable;
213
 
214
        c->type = I2O_TYPE_PCI;
215
 
216
        /*
217
         *      Cards that fall apart if you hit them with large I/O
218
         *      loads...
219
         */
220
 
221
        if(dev->vendor == PCI_VENDOR_ID_NCR && dev->device == 0x0630)
222
        {
223
                c->bus.pci.short_req = 1;
224
                printk(KERN_INFO "I2O: Symbios FC920 workarounds activated.\n");
225
        }
226
        if(dev->subsystem_vendor == PCI_VENDOR_ID_PROMISE)
227
        {
228
                c->bus.pci.promise = 1;
229
                printk(KERN_INFO "I2O: Promise workarounds activated.\n");
230
        }
231
 
232
        /*
233
         *      Cards that go bananas if you quiesce them before you reset
234
         *      them
235
         */
236
 
237
        if(dev->vendor == PCI_VENDOR_ID_DPT)
238
                c->bus.pci.dpt=1;
239
 
240
        /*
241
         * Enable Write Combining MTRR for IOP's memory region
242
         */
243
#ifdef CONFIG_MTRR
244
        c->bus.pci.mtrr_reg0 =
245
                mtrr_add(c->mem_phys, size, MTRR_TYPE_WRCOMB, 1);
246
        /*
247
         * If it is an INTEL i960 I/O processor then set the first 64K to
248
         * Uncacheable since the region contains the Messaging unit which
249
         * shouldn't be cached.
250
         */
251
        c->bus.pci.mtrr_reg1 = -1;
252
        if(dev->vendor == PCI_VENDOR_ID_INTEL || dev->vendor == PCI_VENDOR_ID_DPT)
253
        {
254
                printk(KERN_INFO "I2O: MTRR workaround for Intel i960 processor\n");
255
                c->bus.pci.mtrr_reg1 =  mtrr_add(c->mem_phys, 65536, MTRR_TYPE_UNCACHABLE, 1);
256
                if(c->bus.pci.mtrr_reg1< 0)
257
                {
258
                        printk(KERN_INFO "i2o_pci: Error in setting MTRR_TYPE_UNCACHABLE\n");
259
                        mtrr_del(c->bus.pci.mtrr_reg0, c->mem_phys, size);
260
                        c->bus.pci.mtrr_reg0 = -1;
261
                }
262
        }
263
 
264
#endif
265
 
266
        I2O_IRQ_WRITE32(c,0xFFFFFFFF);
267
 
268
        i = i2o_install_controller(c);
269
 
270
        if(i<0)
271
        {
272
                printk(KERN_ERR "i2o: Unable to install controller.\n");
273
                kfree(c);
274
                iounmap((void *)mem);
275
                return i;
276
        }
277
 
278
        c->bus.pci.irq = dev->irq;
279
        if(c->bus.pci.irq)
280
        {
281
                i=request_irq(dev->irq, i2o_pci_interrupt, SA_SHIRQ,
282
                        c->name, c);
283
                if(i<0)
284
                {
285
                        printk(KERN_ERR "%s: unable to allocate interrupt %d.\n",
286
                                c->name, dev->irq);
287
                        c->bus.pci.irq = -1;
288
                        i2o_delete_controller(c);
289
                        iounmap((void *)mem);
290
                        return -EBUSY;
291
                }
292
        }
293
 
294
        printk(KERN_INFO "%s: Installed at IRQ%d\n", c->name, dev->irq);
295
        I2O_IRQ_WRITE32(c,0x0);
296
        c->enabled = 1;
297
        return 0;
298
}
299
 
300
/**
301
 *      i2o_pci_scan    -       Scan the pci bus for controllers
302
 *
303
 *      Scan the PCI devices on the system looking for any device which is a
304
 *      memory of the Intelligent, I2O class. We attempt to set up each such device
305
 *      and register it with the core.
306
 *
307
 *      Returns the number of controllers registered
308
 */
309
 
310
int __init i2o_pci_scan(void)
311
{
312
        struct pci_dev *dev;
313
        int count=0;
314
 
315
        printk(KERN_INFO "i2o: Checking for PCI I2O controllers...\n");
316
 
317
        pci_for_each_dev(dev)
318
        {
319
                if((dev->class>>8)!=PCI_CLASS_INTELLIGENT_I2O)
320
                        continue;
321
                if(dev->vendor == PCI_VENDOR_ID_DPT && !dpt)
322
                {
323
                        if(dev->device == 0xA501 || dev->device == 0xA511)
324
                        {
325
                                printk(KERN_INFO "i2o: Skipping Adaptec/DPT I2O raid with preferred native driver.\n");
326
                                continue;
327
                        }
328
                }
329
                if((dev->class&0xFF)>1)
330
                {
331
                        printk(KERN_INFO "i2o: I2O Controller found but does not support I2O 1.5 (skipping).\n");
332
                        continue;
333
                }
334
                if (pci_enable_device(dev))
335
                        continue;
336
                printk(KERN_INFO "i2o: I2O controller on bus %d at %d.\n",
337
                        dev->bus->number, dev->devfn);
338
                if(pci_set_dma_mask(dev, 0xffffffff))
339
                {
340
                        printk(KERN_WARNING "I2O controller on bus %d at %d : No suitable DMA available\n", dev->bus->number, dev->devfn);
341
                        continue;
342
                }
343
                pci_set_master(dev);
344
                if(i2o_pci_install(dev)==0)
345
                        count++;
346
        }
347
        if(count)
348
                printk(KERN_INFO "i2o: %d I2O controller%s found and installed.\n", count,
349
                        count==1?"":"s");
350
        return count?count:-ENODEV;
351
}
352
 
353
 
354
/**
355
 *      i2o_pci_core_attach     -       PCI initialisation for I2O
356
 *
357
 *      Find any I2O controllers and if present initialise them and bring up
358
 *      the I2O subsystem.
359
 *
360
 *      Returns 0 on success or an error code
361
 */
362
 
363
static int i2o_pci_core_attach(void)
364
{
365
        printk(KERN_INFO "Linux I2O PCI support (c) 1999 Red Hat Software.\n");
366
        if(i2o_pci_scan()>0)
367
        {
368
                i2o_sys_init();
369
                return 0;
370
        }
371
        return -ENODEV;
372
}
373
 
374
/**
375
 *      i2o_pci_core_detach     -       PCI unload for I2O
376
 *
377
 *      Free up any resources not released when the controllers themselves were
378
 *      shutdown and unbound from the bus and drivers
379
 */
380
 
381
static void i2o_pci_core_detach(void)
382
{
383
}
384
 
385
MODULE_AUTHOR("Red Hat Software");
386
MODULE_DESCRIPTION("I2O PCI Interface");
387
MODULE_LICENSE("GPL");
388
 
389
MODULE_PARM(dpt, "i");
390
MODULE_PARM_DESC(dpt, "Set this if you want to drive DPT cards normally handled by dpt_i2o");
391
module_init(i2o_pci_core_attach);
392
module_exit(i2o_pci_core_detach);
393
 

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