1 |
1275 |
phoenix |
/*
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2 |
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* drivers/mtd/nand.c
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3 |
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*
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4 |
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* Overview:
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* This is the generic MTD driver for NAND flash devices. It should be
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* capable of working with almost all NAND chips currently available.
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*
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* Additional technical information is available on
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* http://www.linux-mtd.infradead.org/tech/nand.html
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*
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* Copyright (C) 2000 Steven J. Hill (sjhill@cotw.com)
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* 2002 Thomas Gleixner (tglx@linutronix.de)
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*
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* 10-29-2001 Thomas Gleixner (tglx@linutronix.de)
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* - Changed nand_chip structure for controlline function to
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* support different hardware structures (Access to
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* controllines ALE,CLE,NCE via hardware specific function.
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* - exit out of "failed erase block" changed, to avoid
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* driver hangup
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* - init_waitqueue_head added in function nand_scan !!
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*
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* 01-30-2002 Thomas Gleixner (tglx@linutronix.de)
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* change in nand_writev to block invalid vecs entries
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*
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* 02-11-2002 Thomas Gleixner (tglx@linutronix.de)
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* - major rewrite to avoid duplicated code
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* common nand_write_page function
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* common get_chip function
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* - added oob_config structure for out of band layouts
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* - write_oob changed for partial programming
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* - read cache for faster access for subsequent reads
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* from the same page.
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* - support for different read/write address
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* - support for device ready/busy line
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* - read oob for more than one page enabled
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*
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* 02-27-2002 Thomas Gleixner (tglx@linutronix.de)
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* - command-delay can be programmed
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* - fixed exit from erase with callback-function enabled
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*
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* 03-21-2002 Thomas Gleixner (tglx@linutronix.de)
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* - DEBUG improvements provided by Elizabeth Clarke
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* (eclarke@aminocom.com)
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* - added zero check for this->chip_delay
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*
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* 04-03-2002 Thomas Gleixner (tglx@linutronix.de)
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* - added added hw-driver supplied command and wait functions
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* - changed blocking for erase (erase suspend enabled)
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* - check pointers before accessing flash provided by
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* John Hall (john.hall@optionexist.co.uk)
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*
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* 04-09-2002 Thomas Gleixner (tglx@linutronix.de)
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* - nand_wait repaired
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*
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* 04-28-2002 Thomas Gleixner (tglx@linutronix.de)
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* - OOB config defines moved to nand.h
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*
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* 08-01-2002 Thomas Gleixner (tglx@linutronix.de)
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* - changed my mailaddress, added pointer to tech/nand.html
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*
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* 08-07-2002 Thomas Gleixner (tglx@linutronix.de)
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* forced bad block location to byte 5 of OOB, even if
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* CONFIG_MTD_NAND_ECC_JFFS2 is not set, to prevent
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* erase /dev/mtdX from erasing bad blocks and destroying
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* bad block info
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*
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* 08-10-2002 Thomas Gleixner (tglx@linutronix.de)
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* Fixed writing tail of data. Thanks to Alice Hennessy
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* <ahennessy@mvista.com>.
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*
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* 08-10-2002 Thomas Gleixner (tglx@linutronix.de)
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* nand_read_ecc and nand_write_page restructured to support
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* hardware ECC. Thanks to Steven Hein (ssh@sgi.com)
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* for basic implementation and suggestions.
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* 3 new pointers in nand_chip structure:
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* calculate_ecc, correct_data, enabled_hwecc
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* forcing all hw-drivers to support page cache
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* eccvalid_pos is now mandatory
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*
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* 08-17-2002 tglx: fixed signed/unsigned missmatch in write.c
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* Thanks to Ken Offer <koffer@arlut.utexas.edu>
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*
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* 08-29-2002 tglx: use buffered read/write only for non pagealigned
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* access, speed up the aligned path by using the fs-buffer
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* reset chip removed from nand_select(), implicit done
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* only, when erase is interrupted
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* waitfuntion use yield, instead of schedule_timeout
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* support for 6byte/512byte hardware ECC
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* read_ecc, write_ecc extended for different oob-layout
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* selections: Implemented NAND_NONE_OOB, NAND_JFFS2_OOB,
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* NAND_YAFFS_OOB. fs-driver gives one of these constants
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* to select the oob-layout fitting the filesystem.
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* oobdata can be read together with the raw data, when
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* the fs-driver supplies a big enough buffer.
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* size = 12 * number of pages to read (256B pagesize)
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* 24 * number of pages to read (512B pagesize)
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* the buffer contains 8/16 byte oobdata and 4/8 byte
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* returncode from calculate_ecc
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* oobdata can be given from filesystem to program them
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* in one go together with the raw data. ECC codes are
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* filled in at the place selected by oobsel.
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*
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* 09-04-2002 tglx: fixed write_verify (John Hall (john.hall@optionexist.co.uk))
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*
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* 11-11-2002 tglx: fixed debug output in nand_write_page
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* (John Hall (john.hall@optionexist.co.uk))
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*
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* 11-25-2002 tglx: Moved device ID/ manufacturer ID from nand_ids.h
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* Splitted device ID and manufacturer ID table.
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* Removed CONFIG_MTD_NAND_ECC, as it defaults to ECC_NONE for
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* mtd->read / mtd->write and is controllable by the fs driver
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* for mtd->read_ecc / mtd->write_ecc
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* some minor cleanups
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*
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* 12-05-2000 tglx: Dave Ellis (DGE@sixnetio) provided the fix for
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* WRITE_VERIFY long time ago. Thanks for remembering me.
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*
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* $Id: nand.c,v 1.1.1.1 2004-04-15 01:51:58 phoenix Exp $
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/delay.h>
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <linux/types.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/nand_ecc.h>
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#include <linux/interrupt.h>
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#include <asm/io.h>
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/*
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* Macros for low-level register control
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*/
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#define nand_select() this->hwcontrol(NAND_CTL_SETNCE);
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#define nand_deselect() this->hwcontrol(NAND_CTL_CLRNCE);
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/*
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* out of band configuration for different filesystems
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*/
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static int oobconfigs[][6] = {
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{ 0,0,0,0,0,0},
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148 |
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149 |
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{ NAND_JFFS2_OOB_ECCPOS0, NAND_JFFS2_OOB_ECCPOS1, NAND_JFFS2_OOB_ECCPOS2,
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NAND_JFFS2_OOB_ECCPOS3, NAND_JFFS2_OOB_ECCPOS4, NAND_JFFS2_OOB_ECCPOS5 },
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{ NAND_YAFFS_OOB_ECCPOS0, NAND_YAFFS_OOB_ECCPOS1, NAND_YAFFS_OOB_ECCPOS2,
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NAND_YAFFS_OOB_ECCPOS3, NAND_YAFFS_OOB_ECCPOS4, NAND_YAFFS_OOB_ECCPOS5 }
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};
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/*
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* NAND low-level MTD interface functions
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*/
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static int nand_read (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf);
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static int nand_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
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size_t * retlen, u_char * buf, u_char * eccbuf, int oobsel);
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static int nand_read_oob (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf);
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static int nand_write (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char * buf);
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static int nand_write_ecc (struct mtd_info *mtd, loff_t to, size_t len,
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size_t * retlen, const u_char * buf, u_char * eccbuf, int oobsel);
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static int nand_write_oob (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char *buf);
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static int nand_writev (struct mtd_info *mtd, const struct iovec *vecs,
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unsigned long count, loff_t to, size_t * retlen);
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static int nand_writev_ecc (struct mtd_info *mtd, const struct iovec *vecs,
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unsigned long count, loff_t to, size_t * retlen, u_char *eccbuf, int oobsel);
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static int nand_erase (struct mtd_info *mtd, struct erase_info *instr);
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172 |
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static void nand_sync (struct mtd_info *mtd);
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173 |
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static int nand_write_page (struct mtd_info *mtd, struct nand_chip *this, int page, int col,
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int last, u_char *oob_buf, int oobsel);
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175 |
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/*
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* Send command to NAND device
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177 |
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*/
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178 |
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static void nand_command (struct mtd_info *mtd, unsigned command, int column, int page_addr)
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{
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180 |
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register struct nand_chip *this = mtd->priv;
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181 |
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register unsigned long NAND_IO_ADDR = this->IO_ADDR_W;
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182 |
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183 |
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/* Begin command latch cycle */
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184 |
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this->hwcontrol (NAND_CTL_SETCLE);
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185 |
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/*
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186 |
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* Write out the command to the device.
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187 |
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*/
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188 |
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if (command != NAND_CMD_SEQIN)
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189 |
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writeb (command, NAND_IO_ADDR);
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else {
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191 |
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if (mtd->oobblock == 256 && column >= 256) {
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192 |
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column -= 256;
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193 |
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writeb (NAND_CMD_READOOB, NAND_IO_ADDR);
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194 |
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writeb (NAND_CMD_SEQIN, NAND_IO_ADDR);
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195 |
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} else if (mtd->oobblock == 512 && column >= 256) {
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196 |
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if (column < 512) {
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197 |
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column -= 256;
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198 |
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writeb (NAND_CMD_READ1, NAND_IO_ADDR);
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199 |
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writeb (NAND_CMD_SEQIN, NAND_IO_ADDR);
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200 |
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} else {
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201 |
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column -= 512;
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202 |
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writeb (NAND_CMD_READOOB, NAND_IO_ADDR);
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203 |
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writeb (NAND_CMD_SEQIN, NAND_IO_ADDR);
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204 |
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}
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205 |
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} else {
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206 |
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writeb (NAND_CMD_READ0, NAND_IO_ADDR);
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207 |
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writeb (NAND_CMD_SEQIN, NAND_IO_ADDR);
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208 |
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}
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209 |
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}
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210 |
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211 |
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/* Set ALE and clear CLE to start address cycle */
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212 |
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this->hwcontrol (NAND_CTL_CLRCLE);
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213 |
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214 |
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if (column != -1 || page_addr != -1) {
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215 |
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this->hwcontrol (NAND_CTL_SETALE);
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216 |
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217 |
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/* Serially input address */
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218 |
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if (column != -1)
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219 |
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writeb (column, NAND_IO_ADDR);
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220 |
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if (page_addr != -1) {
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221 |
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writeb ((unsigned char) (page_addr & 0xff), NAND_IO_ADDR);
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222 |
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writeb ((unsigned char) ((page_addr >> 8) & 0xff), NAND_IO_ADDR);
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223 |
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/* One more address cycle for higher density devices */
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224 |
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if (mtd->size & 0x0c000000)
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225 |
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writeb ((unsigned char) ((page_addr >> 16) & 0x0f), NAND_IO_ADDR);
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226 |
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}
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227 |
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/* Latch in address */
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228 |
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this->hwcontrol (NAND_CTL_CLRALE);
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229 |
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}
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230 |
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|
231 |
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/*
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232 |
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* program and erase have their own busy handlers
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233 |
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* status and sequential in needs no delay
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234 |
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*/
|
235 |
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switch (command) {
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236 |
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|
237 |
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case NAND_CMD_PAGEPROG:
|
238 |
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case NAND_CMD_ERASE1:
|
239 |
|
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case NAND_CMD_ERASE2:
|
240 |
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case NAND_CMD_SEQIN:
|
241 |
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case NAND_CMD_STATUS:
|
242 |
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return;
|
243 |
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|
244 |
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case NAND_CMD_RESET:
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245 |
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if (this->dev_ready)
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246 |
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break;
|
247 |
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this->hwcontrol (NAND_CTL_SETCLE);
|
248 |
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writeb (NAND_CMD_STATUS, NAND_IO_ADDR);
|
249 |
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this->hwcontrol (NAND_CTL_CLRCLE);
|
250 |
|
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while ( !(readb (this->IO_ADDR_R) & 0x40));
|
251 |
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return;
|
252 |
|
|
|
253 |
|
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/* This applies to read commands */
|
254 |
|
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default:
|
255 |
|
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/*
|
256 |
|
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* If we don't have access to the busy pin, we apply the given
|
257 |
|
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* command delay
|
258 |
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*/
|
259 |
|
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if (!this->dev_ready) {
|
260 |
|
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udelay (this->chip_delay);
|
261 |
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return;
|
262 |
|
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}
|
263 |
|
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}
|
264 |
|
|
|
265 |
|
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/* wait until command is processed */
|
266 |
|
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while (!this->dev_ready());
|
267 |
|
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}
|
268 |
|
|
|
269 |
|
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/*
|
270 |
|
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* Get chip for selected access
|
271 |
|
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*/
|
272 |
|
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static inline void nand_get_chip (struct nand_chip *this, struct mtd_info *mtd, int new_state, int *erase_state)
|
273 |
|
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{
|
274 |
|
|
|
275 |
|
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DECLARE_WAITQUEUE (wait, current);
|
276 |
|
|
|
277 |
|
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/*
|
278 |
|
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* Grab the lock and see if the device is available
|
279 |
|
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* For erasing, we keep the spinlock until the
|
280 |
|
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* erase command is written.
|
281 |
|
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*/
|
282 |
|
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retry:
|
283 |
|
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spin_lock_bh (&this->chip_lock);
|
284 |
|
|
|
285 |
|
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if (this->state == FL_READY) {
|
286 |
|
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this->state = new_state;
|
287 |
|
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if (new_state != FL_ERASING)
|
288 |
|
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spin_unlock_bh (&this->chip_lock);
|
289 |
|
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return;
|
290 |
|
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}
|
291 |
|
|
|
292 |
|
|
if (this->state == FL_ERASING) {
|
293 |
|
|
if (new_state != FL_ERASING) {
|
294 |
|
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this->state = new_state;
|
295 |
|
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spin_unlock_bh (&this->chip_lock);
|
296 |
|
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nand_select (); /* select in any case */
|
297 |
|
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this->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
|
298 |
|
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return;
|
299 |
|
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}
|
300 |
|
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}
|
301 |
|
|
|
302 |
|
|
set_current_state (TASK_UNINTERRUPTIBLE);
|
303 |
|
|
add_wait_queue (&this->wq, &wait);
|
304 |
|
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spin_unlock_bh (&this->chip_lock);
|
305 |
|
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schedule ();
|
306 |
|
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remove_wait_queue (&this->wq, &wait);
|
307 |
|
|
goto retry;
|
308 |
|
|
}
|
309 |
|
|
|
310 |
|
|
/*
|
311 |
|
|
* Wait for command done. This applies to erase and program only
|
312 |
|
|
* Erase can take up to 400ms and program up to 20ms according to
|
313 |
|
|
* general NAND and SmartMedia specs
|
314 |
|
|
*
|
315 |
|
|
*/
|
316 |
|
|
static int nand_wait(struct mtd_info *mtd, struct nand_chip *this, int state)
|
317 |
|
|
{
|
318 |
|
|
|
319 |
|
|
unsigned long timeo = jiffies;
|
320 |
|
|
int status;
|
321 |
|
|
|
322 |
|
|
if (state == FL_ERASING)
|
323 |
|
|
timeo += (HZ * 400) / 1000;
|
324 |
|
|
else
|
325 |
|
|
timeo += (HZ * 20) / 1000;
|
326 |
|
|
|
327 |
|
|
spin_lock_bh (&this->chip_lock);
|
328 |
|
|
this->cmdfunc (mtd, NAND_CMD_STATUS, -1, -1);
|
329 |
|
|
|
330 |
|
|
while (time_before(jiffies, timeo)) {
|
331 |
|
|
/* Check, if we were interrupted */
|
332 |
|
|
if (this->state != state) {
|
333 |
|
|
spin_unlock_bh (&this->chip_lock);
|
334 |
|
|
return 0;
|
335 |
|
|
}
|
336 |
|
|
if (this->dev_ready) {
|
337 |
|
|
if (this->dev_ready ())
|
338 |
|
|
break;
|
339 |
|
|
}
|
340 |
|
|
if (readb (this->IO_ADDR_R) & 0x40)
|
341 |
|
|
break;
|
342 |
|
|
|
343 |
|
|
spin_unlock_bh (&this->chip_lock);
|
344 |
|
|
yield ();
|
345 |
|
|
spin_lock_bh (&this->chip_lock);
|
346 |
|
|
}
|
347 |
|
|
status = (int) readb (this->IO_ADDR_R);
|
348 |
|
|
spin_unlock_bh (&this->chip_lock);
|
349 |
|
|
|
350 |
|
|
return status;
|
351 |
|
|
}
|
352 |
|
|
|
353 |
|
|
/*
|
354 |
|
|
* Nand_page_program function is used for write and writev !
|
355 |
|
|
*/
|
356 |
|
|
static int nand_write_page (struct mtd_info *mtd, struct nand_chip *this,
|
357 |
|
|
int page, int col, int last, u_char *oob_buf, int oobsel)
|
358 |
|
|
{
|
359 |
|
|
int i, status;
|
360 |
|
|
u_char ecc_code[6], *oob_data;
|
361 |
|
|
int eccmode = oobsel ? this->eccmode : NAND_ECC_NONE;
|
362 |
|
|
int *oob_config = oobconfigs[oobsel];
|
363 |
|
|
|
364 |
|
|
/* pad oob area, if we have no oob buffer from fs-driver */
|
365 |
|
|
if (!oob_buf) {
|
366 |
|
|
oob_data = &this->data_buf[mtd->oobblock];
|
367 |
|
|
for (i = 0; i < mtd->oobsize; i++)
|
368 |
|
|
oob_data[i] = 0xff;
|
369 |
|
|
} else
|
370 |
|
|
oob_data = oob_buf;
|
371 |
|
|
|
372 |
|
|
/* software ecc 3 Bytes ECC / 256 Byte Data ? */
|
373 |
|
|
if (eccmode == NAND_ECC_SOFT) {
|
374 |
|
|
/* Read back previous written data, if col > 0 */
|
375 |
|
|
if (col) {
|
376 |
|
|
this->cmdfunc (mtd, NAND_CMD_READ0, 0, page);
|
377 |
|
|
for (i = 0; i < col; i++)
|
378 |
|
|
this->data_poi[i] = readb (this->IO_ADDR_R);
|
379 |
|
|
}
|
380 |
|
|
if ((col < this->eccsize) && (last >= this->eccsize)) {
|
381 |
|
|
this->calculate_ecc (&this->data_poi[0], &(ecc_code[0]));
|
382 |
|
|
for (i = 0; i < 3; i++)
|
383 |
|
|
oob_data[oob_config[i]] = ecc_code[i];
|
384 |
|
|
}
|
385 |
|
|
/* Calculate and write the second ECC if we have enough data */
|
386 |
|
|
if ((mtd->oobblock == 512) && (last == 512)) {
|
387 |
|
|
this->calculate_ecc (&this->data_poi[256], &(ecc_code[3]));
|
388 |
|
|
for (i = 3; i < 6; i++)
|
389 |
|
|
oob_data[oob_config[i]] = ecc_code[i];
|
390 |
|
|
}
|
391 |
|
|
} else {
|
392 |
|
|
/* For hardware ECC skip ECC, if we have no full page write */
|
393 |
|
|
if (eccmode != NAND_ECC_NONE && (col || last != mtd->oobblock))
|
394 |
|
|
eccmode = NAND_ECC_NONE;
|
395 |
|
|
}
|
396 |
|
|
|
397 |
|
|
/* Prepad for partial page programming !!! */
|
398 |
|
|
for (i = 0; i < col; i++)
|
399 |
|
|
this->data_poi[i] = 0xff;
|
400 |
|
|
|
401 |
|
|
/* Postpad for partial page programming !!! oob is already padded */
|
402 |
|
|
for (i = last; i < mtd->oobblock; i++)
|
403 |
|
|
this->data_poi[i] = 0xff;
|
404 |
|
|
|
405 |
|
|
/* Send command to begin auto page programming */
|
406 |
|
|
this->cmdfunc (mtd, NAND_CMD_SEQIN, 0x00, page);
|
407 |
|
|
|
408 |
|
|
/* Write out complete page of data, take care of eccmode */
|
409 |
|
|
switch (this->eccmode) {
|
410 |
|
|
/* No ecc and software ecc 3/256, write all */
|
411 |
|
|
case NAND_ECC_NONE:
|
412 |
|
|
case NAND_ECC_SOFT:
|
413 |
|
|
for (i = 0; i < mtd->oobblock; i++)
|
414 |
|
|
writeb ( this->data_poi[i] , this->IO_ADDR_W);
|
415 |
|
|
break;
|
416 |
|
|
|
417 |
|
|
/* Hardware ecc 3 byte / 256 data, write first half, get ecc, then second, if 512 byte pagesize */
|
418 |
|
|
case NAND_ECC_HW3_256:
|
419 |
|
|
this->enable_hwecc (NAND_ECC_WRITE); /* enable hardware ecc logic for write */
|
420 |
|
|
for (i = 0; i < mtd->eccsize; i++)
|
421 |
|
|
writeb ( this->data_poi[i] , this->IO_ADDR_W);
|
422 |
|
|
|
423 |
|
|
this->calculate_ecc (NULL, &(ecc_code[0]));
|
424 |
|
|
for (i = 0; i < 3; i++)
|
425 |
|
|
oob_data[oob_config[i]] = ecc_code[i];
|
426 |
|
|
|
427 |
|
|
if (mtd->oobblock == 512) {
|
428 |
|
|
this->enable_hwecc (NAND_ECC_WRITE); /* enable hardware ecc logic for write*/
|
429 |
|
|
for (i = mtd->eccsize; i < mtd->oobblock; i++)
|
430 |
|
|
writeb ( this->data_poi[i] , this->IO_ADDR_W);
|
431 |
|
|
this->calculate_ecc (NULL, &(ecc_code[3]));
|
432 |
|
|
for (i = 3; i < 6; i++)
|
433 |
|
|
oob_data[oob_config[i]] = ecc_code[i];
|
434 |
|
|
}
|
435 |
|
|
break;
|
436 |
|
|
|
437 |
|
|
/* Hardware ecc 3 byte / 512 byte data, write full page */
|
438 |
|
|
case NAND_ECC_HW3_512:
|
439 |
|
|
this->enable_hwecc (NAND_ECC_WRITE); /* enable hardware ecc logic */
|
440 |
|
|
for (i = 0; i < mtd->oobblock; i++)
|
441 |
|
|
writeb ( this->data_poi[i] , this->IO_ADDR_W);
|
442 |
|
|
this->calculate_ecc (NULL, &(ecc_code[0]));
|
443 |
|
|
for (i = 0; i < 3; i++)
|
444 |
|
|
oob_data[oob_config[i]] = ecc_code[i];
|
445 |
|
|
break;
|
446 |
|
|
|
447 |
|
|
/* Hardware ecc 6 byte / 512 byte data, write full page */
|
448 |
|
|
case NAND_ECC_HW6_512:
|
449 |
|
|
this->enable_hwecc (NAND_ECC_WRITE); /* enable hardware ecc logic */
|
450 |
|
|
for (i = 0; i < mtd->oobblock; i++)
|
451 |
|
|
writeb ( this->data_poi[i] , this->IO_ADDR_W);
|
452 |
|
|
this->calculate_ecc (NULL, &(ecc_code[0]));
|
453 |
|
|
for (i = 0; i < 6; i++)
|
454 |
|
|
oob_data[oob_config[i]] = ecc_code[i];
|
455 |
|
|
break;
|
456 |
|
|
|
457 |
|
|
default:
|
458 |
|
|
printk (KERN_WARNING "Invalid NAND_ECC_MODE %d\n", this->eccmode);
|
459 |
|
|
BUG();
|
460 |
|
|
}
|
461 |
|
|
|
462 |
|
|
/* Write out OOB data */
|
463 |
|
|
for (i = 0; i < mtd->oobsize; i++)
|
464 |
|
|
writeb ( oob_data[i] , this->IO_ADDR_W);
|
465 |
|
|
|
466 |
|
|
/* Send command to actually program the data */
|
467 |
|
|
this->cmdfunc (mtd, NAND_CMD_PAGEPROG, -1, -1);
|
468 |
|
|
|
469 |
|
|
/* call wait ready function */
|
470 |
|
|
status = this->waitfunc (mtd, this, FL_WRITING);
|
471 |
|
|
|
472 |
|
|
/* See if device thinks it succeeded */
|
473 |
|
|
if (status & 0x01) {
|
474 |
|
|
DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write, page 0x%08x, ", __FUNCTION__, page);
|
475 |
|
|
return -EIO;
|
476 |
|
|
}
|
477 |
|
|
|
478 |
|
|
#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
|
479 |
|
|
/*
|
480 |
|
|
* The NAND device assumes that it is always writing to
|
481 |
|
|
* a cleanly erased page. Hence, it performs its internal
|
482 |
|
|
* write verification only on bits that transitioned from
|
483 |
|
|
* 1 to 0. The device does NOT verify the whole page on a
|
484 |
|
|
* byte by byte basis. It is possible that the page was
|
485 |
|
|
* not completely erased or the page is becoming unusable
|
486 |
|
|
* due to wear. The read with ECC would catch the error
|
487 |
|
|
* later when the ECC page check fails, but we would rather
|
488 |
|
|
* catch it early in the page write stage. Better to write
|
489 |
|
|
* no data than invalid data.
|
490 |
|
|
*/
|
491 |
|
|
|
492 |
|
|
/* Send command to read back the page */
|
493 |
|
|
this->cmdfunc (mtd, NAND_CMD_READ0, col, page);
|
494 |
|
|
/* Loop through and verify the data */
|
495 |
|
|
for (i = col; i < last; i++) {
|
496 |
|
|
if (this->data_poi[i] != readb (this->IO_ADDR_R)) {
|
497 |
|
|
DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page);
|
498 |
|
|
return -EIO;
|
499 |
|
|
}
|
500 |
|
|
}
|
501 |
|
|
|
502 |
|
|
/* check, if we have a fs-supplied oob-buffer */
|
503 |
|
|
if (oob_buf) {
|
504 |
|
|
for (i = 0; i < mtd->oobsize; i++) {
|
505 |
|
|
if (oob_data[i] != readb (this->IO_ADDR_R)) {
|
506 |
|
|
DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page);
|
507 |
|
|
return -EIO;
|
508 |
|
|
}
|
509 |
|
|
}
|
510 |
|
|
} else {
|
511 |
|
|
if (eccmode != NAND_ECC_NONE && !col && last == mtd->oobblock) {
|
512 |
|
|
int ecc_bytes = 0;
|
513 |
|
|
|
514 |
|
|
switch (this->eccmode) {
|
515 |
|
|
case NAND_ECC_SOFT:
|
516 |
|
|
case NAND_ECC_HW3_256: ecc_bytes = (mtd->oobblock == 512) ? 6 : 3; break;
|
517 |
|
|
case NAND_ECC_HW3_512: ecc_bytes = 3; break;
|
518 |
|
|
case NAND_ECC_HW6_512: ecc_bytes = 6; break;
|
519 |
|
|
}
|
520 |
|
|
|
521 |
|
|
for (i = 0; i < mtd->oobsize; i++)
|
522 |
|
|
oob_data[i] = readb (this->IO_ADDR_R);
|
523 |
|
|
|
524 |
|
|
for (i = 0; i < ecc_bytes; i++) {
|
525 |
|
|
if (oob_data[oob_config[i]] != ecc_code[i]) {
|
526 |
|
|
DEBUG (MTD_DEBUG_LEVEL0,
|
527 |
|
|
"%s: Failed ECC write "
|
528 |
|
|
"verify, page 0x%08x, " "%6i bytes were succesful\n", __FUNCTION__, page, i);
|
529 |
|
|
return -EIO;
|
530 |
|
|
}
|
531 |
|
|
}
|
532 |
|
|
}
|
533 |
|
|
}
|
534 |
|
|
#endif
|
535 |
|
|
return 0;
|
536 |
|
|
}
|
537 |
|
|
|
538 |
|
|
/*
|
539 |
|
|
* Use NAND read ECC
|
540 |
|
|
*/
|
541 |
|
|
static int nand_read (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf)
|
542 |
|
|
{
|
543 |
|
|
return (nand_read_ecc (mtd, from, len, retlen, buf, NULL, 0));
|
544 |
|
|
}
|
545 |
|
|
|
546 |
|
|
|
547 |
|
|
/*
|
548 |
|
|
* NAND read with ECC
|
549 |
|
|
*/
|
550 |
|
|
static int nand_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
|
551 |
|
|
size_t * retlen, u_char * buf, u_char * oob_buf, int oobsel)
|
552 |
|
|
{
|
553 |
|
|
int j, col, page, end, ecc;
|
554 |
|
|
int erase_state = 0;
|
555 |
|
|
int read = 0, oob = 0, ecc_status = 0, ecc_failed = 0;
|
556 |
|
|
struct nand_chip *this = mtd->priv;
|
557 |
|
|
u_char *data_poi, *oob_data = oob_buf;
|
558 |
|
|
u_char ecc_calc[6];
|
559 |
|
|
u_char ecc_code[6];
|
560 |
|
|
int eccmode = oobsel ? this->eccmode : NAND_ECC_NONE;
|
561 |
|
|
|
562 |
|
|
int *oob_config = oobconfigs[oobsel];
|
563 |
|
|
|
564 |
|
|
DEBUG (MTD_DEBUG_LEVEL3, "nand_read_ecc: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
|
565 |
|
|
|
566 |
|
|
/* Do not allow reads past end of device */
|
567 |
|
|
if ((from + len) > mtd->size) {
|
568 |
|
|
DEBUG (MTD_DEBUG_LEVEL0, "nand_read_ecc: Attempt read beyond end of device\n");
|
569 |
|
|
*retlen = 0;
|
570 |
|
|
return -EINVAL;
|
571 |
|
|
}
|
572 |
|
|
|
573 |
|
|
/* Grab the lock and see if the device is available */
|
574 |
|
|
nand_get_chip (this, mtd ,FL_READING, &erase_state);
|
575 |
|
|
|
576 |
|
|
/* Select the NAND device */
|
577 |
|
|
nand_select ();
|
578 |
|
|
|
579 |
|
|
/* First we calculate the starting page */
|
580 |
|
|
page = from >> this->page_shift;
|
581 |
|
|
|
582 |
|
|
/* Get raw starting column */
|
583 |
|
|
col = from & (mtd->oobblock - 1);
|
584 |
|
|
|
585 |
|
|
end = mtd->oobblock;
|
586 |
|
|
ecc = mtd->eccsize;
|
587 |
|
|
|
588 |
|
|
/* Send the read command */
|
589 |
|
|
this->cmdfunc (mtd, NAND_CMD_READ0, 0x00, page);
|
590 |
|
|
|
591 |
|
|
/* Loop until all data read */
|
592 |
|
|
while (read < len) {
|
593 |
|
|
|
594 |
|
|
/* If we have consequent page reads, apply delay or wait for ready/busy pin */
|
595 |
|
|
if (read) {
|
596 |
|
|
if (!this->dev_ready)
|
597 |
|
|
udelay (this->chip_delay);
|
598 |
|
|
else
|
599 |
|
|
while (!this->dev_ready());
|
600 |
|
|
}
|
601 |
|
|
|
602 |
|
|
/*
|
603 |
|
|
* If the read is not page aligned, we have to read into data buffer
|
604 |
|
|
* due to ecc, else we read into return buffer direct
|
605 |
|
|
*/
|
606 |
|
|
if (!col && (len - read) >= end)
|
607 |
|
|
data_poi = &buf[read];
|
608 |
|
|
else
|
609 |
|
|
data_poi = this->data_buf;
|
610 |
|
|
|
611 |
|
|
/* get oob area, if we have no oob buffer from fs-driver */
|
612 |
|
|
if (!oob_buf) {
|
613 |
|
|
oob_data = &this->data_buf[end];
|
614 |
|
|
oob = 0;
|
615 |
|
|
}
|
616 |
|
|
|
617 |
|
|
j = 0;
|
618 |
|
|
switch (eccmode) {
|
619 |
|
|
case NAND_ECC_NONE: /* No ECC, Read in a page */
|
620 |
|
|
while (j < end)
|
621 |
|
|
data_poi[j++] = readb (this->IO_ADDR_R);
|
622 |
|
|
break;
|
623 |
|
|
|
624 |
|
|
case NAND_ECC_SOFT: /* Software ECC 3/256: Read in a page + oob data */
|
625 |
|
|
while (j < end)
|
626 |
|
|
data_poi[j++] = readb (this->IO_ADDR_R);
|
627 |
|
|
this->calculate_ecc (&data_poi[0], &ecc_calc[0]);
|
628 |
|
|
if (mtd->oobblock == 512)
|
629 |
|
|
this->calculate_ecc (&data_poi[256], &ecc_calc[3]);
|
630 |
|
|
break;
|
631 |
|
|
|
632 |
|
|
case NAND_ECC_HW3_256: /* Hardware ECC 3 byte /256 byte data: Read in first 256 byte, get ecc, */
|
633 |
|
|
this->enable_hwecc (NAND_ECC_READ);
|
634 |
|
|
while (j < ecc)
|
635 |
|
|
data_poi[j++] = readb (this->IO_ADDR_R);
|
636 |
|
|
this->calculate_ecc (&data_poi[0], &ecc_calc[0]); /* read from hardware */
|
637 |
|
|
|
638 |
|
|
if (mtd->oobblock == 512) { /* read second, if pagesize = 512 */
|
639 |
|
|
this->enable_hwecc (NAND_ECC_READ);
|
640 |
|
|
while (j < end)
|
641 |
|
|
data_poi[j++] = readb (this->IO_ADDR_R);
|
642 |
|
|
this->calculate_ecc (&data_poi[256], &ecc_calc[3]); /* read from hardware */
|
643 |
|
|
}
|
644 |
|
|
break;
|
645 |
|
|
|
646 |
|
|
case NAND_ECC_HW3_512:
|
647 |
|
|
case NAND_ECC_HW6_512: /* Hardware ECC 3/6 byte / 512 byte data : Read in a page */
|
648 |
|
|
this->enable_hwecc (NAND_ECC_READ);
|
649 |
|
|
while (j < end)
|
650 |
|
|
data_poi[j++] = readb (this->IO_ADDR_R);
|
651 |
|
|
this->calculate_ecc (&data_poi[0], &ecc_calc[0]); /* read from hardware */
|
652 |
|
|
break;
|
653 |
|
|
|
654 |
|
|
default:
|
655 |
|
|
printk (KERN_WARNING "Invalid NAND_ECC_MODE %d\n", this->eccmode);
|
656 |
|
|
BUG();
|
657 |
|
|
}
|
658 |
|
|
|
659 |
|
|
/* read oobdata */
|
660 |
|
|
for (j = 0; j < mtd->oobsize; j++)
|
661 |
|
|
oob_data[oob + j] = readb (this->IO_ADDR_R);
|
662 |
|
|
|
663 |
|
|
/* Skip ECC, if not active */
|
664 |
|
|
if (eccmode == NAND_ECC_NONE)
|
665 |
|
|
goto readdata;
|
666 |
|
|
|
667 |
|
|
/* Pick the ECC bytes out of the oob data */
|
668 |
|
|
for (j = 0; j < 6; j++)
|
669 |
|
|
ecc_code[j] = oob_data[oob + oob_config[j]];
|
670 |
|
|
|
671 |
|
|
/* correct data, if neccecary */
|
672 |
|
|
ecc_status = this->correct_data (&data_poi[0], &ecc_code[0], &ecc_calc[0]);
|
673 |
|
|
/* check, if we have a fs supplied oob-buffer */
|
674 |
|
|
if (oob_buf) {
|
675 |
|
|
oob += mtd->oobsize;
|
676 |
|
|
*((int *)&oob_data[oob]) = ecc_status;
|
677 |
|
|
oob += sizeof(int);
|
678 |
|
|
}
|
679 |
|
|
if (ecc_status == -1) {
|
680 |
|
|
DEBUG (MTD_DEBUG_LEVEL0, "nand_read_ecc: " "Failed ECC read, page 0x%08x\n", page);
|
681 |
|
|
ecc_failed++;
|
682 |
|
|
}
|
683 |
|
|
|
684 |
|
|
if (mtd->oobblock == 512 && eccmode != NAND_ECC_HW3_512) {
|
685 |
|
|
ecc_status = this->correct_data (&data_poi[256], &ecc_code[3], &ecc_calc[3]);
|
686 |
|
|
if (oob_buf) {
|
687 |
|
|
*((int *)&oob_data[oob]) = ecc_status;
|
688 |
|
|
oob += sizeof(int);
|
689 |
|
|
}
|
690 |
|
|
if (ecc_status == -1) {
|
691 |
|
|
DEBUG (MTD_DEBUG_LEVEL0, "nand_read_ecc: " "Failed ECC read, page 0x%08x\n", page);
|
692 |
|
|
ecc_failed++;
|
693 |
|
|
}
|
694 |
|
|
}
|
695 |
|
|
readdata:
|
696 |
|
|
if (col || (len - read) < end) {
|
697 |
|
|
for (j = col; j < end && read < len; j++)
|
698 |
|
|
buf[read++] = data_poi[j];
|
699 |
|
|
} else
|
700 |
|
|
read += mtd->oobblock;
|
701 |
|
|
/* For subsequent reads align to page boundary. */
|
702 |
|
|
col = 0;
|
703 |
|
|
/* Increment page address */
|
704 |
|
|
page++;
|
705 |
|
|
}
|
706 |
|
|
|
707 |
|
|
/* De-select the NAND device */
|
708 |
|
|
nand_deselect ();
|
709 |
|
|
|
710 |
|
|
/* Wake up anyone waiting on the device */
|
711 |
|
|
spin_lock_bh (&this->chip_lock);
|
712 |
|
|
this->state = FL_READY;
|
713 |
|
|
wake_up (&this->wq);
|
714 |
|
|
spin_unlock_bh (&this->chip_lock);
|
715 |
|
|
|
716 |
|
|
/*
|
717 |
|
|
* Return success, if no ECC failures, else -EIO
|
718 |
|
|
* fs driver will take care of that, because
|
719 |
|
|
* retlen == desired len and result == -EIO
|
720 |
|
|
*/
|
721 |
|
|
*retlen = read;
|
722 |
|
|
return ecc_failed ? -EIO : 0;
|
723 |
|
|
}
|
724 |
|
|
|
725 |
|
|
/*
|
726 |
|
|
* NAND read out-of-band
|
727 |
|
|
*/
|
728 |
|
|
static int nand_read_oob (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf)
|
729 |
|
|
{
|
730 |
|
|
int i, col, page;
|
731 |
|
|
int erase_state = 0;
|
732 |
|
|
struct nand_chip *this = mtd->priv;
|
733 |
|
|
|
734 |
|
|
DEBUG (MTD_DEBUG_LEVEL3, "nand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
|
735 |
|
|
|
736 |
|
|
/* Shift to get page */
|
737 |
|
|
page = ((int) from) >> this->page_shift;
|
738 |
|
|
|
739 |
|
|
/* Mask to get column */
|
740 |
|
|
col = from & 0x0f;
|
741 |
|
|
|
742 |
|
|
/* Initialize return length value */
|
743 |
|
|
*retlen = 0;
|
744 |
|
|
|
745 |
|
|
/* Do not allow reads past end of device */
|
746 |
|
|
if ((from + len) > mtd->size) {
|
747 |
|
|
DEBUG (MTD_DEBUG_LEVEL0, "nand_read_oob: Attempt read beyond end of device\n");
|
748 |
|
|
*retlen = 0;
|
749 |
|
|
return -EINVAL;
|
750 |
|
|
}
|
751 |
|
|
|
752 |
|
|
/* Grab the lock and see if the device is available */
|
753 |
|
|
nand_get_chip (this, mtd , FL_READING, &erase_state);
|
754 |
|
|
|
755 |
|
|
/* Select the NAND device */
|
756 |
|
|
nand_select ();
|
757 |
|
|
|
758 |
|
|
/* Send the read command */
|
759 |
|
|
this->cmdfunc (mtd, NAND_CMD_READOOB, col, page);
|
760 |
|
|
/*
|
761 |
|
|
* Read the data, if we read more than one page
|
762 |
|
|
* oob data, let the device transfer the data !
|
763 |
|
|
*/
|
764 |
|
|
for (i = 0; i < len; i++) {
|
765 |
|
|
buf[i] = readb (this->IO_ADDR_R);
|
766 |
|
|
if ((col++ & (mtd->oobsize - 1)) == (mtd->oobsize - 1))
|
767 |
|
|
udelay (this->chip_delay);
|
768 |
|
|
}
|
769 |
|
|
/* De-select the NAND device */
|
770 |
|
|
nand_deselect ();
|
771 |
|
|
|
772 |
|
|
/* Wake up anyone waiting on the device */
|
773 |
|
|
spin_lock_bh (&this->chip_lock);
|
774 |
|
|
this->state = FL_READY;
|
775 |
|
|
wake_up (&this->wq);
|
776 |
|
|
spin_unlock_bh (&this->chip_lock);
|
777 |
|
|
|
778 |
|
|
/* Return happy */
|
779 |
|
|
*retlen = len;
|
780 |
|
|
return 0;
|
781 |
|
|
}
|
782 |
|
|
|
783 |
|
|
/*
|
784 |
|
|
* Use NAND write ECC
|
785 |
|
|
*/
|
786 |
|
|
static int nand_write (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char * buf)
|
787 |
|
|
{
|
788 |
|
|
return (nand_write_ecc (mtd, to, len, retlen, buf, NULL, 0));
|
789 |
|
|
}
|
790 |
|
|
/*
|
791 |
|
|
* NAND write with ECC
|
792 |
|
|
*/
|
793 |
|
|
static int nand_write_ecc (struct mtd_info *mtd, loff_t to, size_t len,
|
794 |
|
|
size_t * retlen, const u_char * buf, u_char * eccbuf, int oobsel)
|
795 |
|
|
{
|
796 |
|
|
int i, page, col, cnt, ret = 0, oob = 0, written = 0;
|
797 |
|
|
struct nand_chip *this = mtd->priv;
|
798 |
|
|
|
799 |
|
|
DEBUG (MTD_DEBUG_LEVEL3, "nand_write_ecc: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
|
800 |
|
|
|
801 |
|
|
/* Do not allow write past end of device */
|
802 |
|
|
if ((to + len) > mtd->size) {
|
803 |
|
|
DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: Attempt to write past end of page\n");
|
804 |
|
|
return -EINVAL;
|
805 |
|
|
}
|
806 |
|
|
|
807 |
|
|
/* Shift to get page */
|
808 |
|
|
page = ((int) to) >> this->page_shift;
|
809 |
|
|
|
810 |
|
|
/* Get the starting column */
|
811 |
|
|
col = to & (mtd->oobblock - 1);
|
812 |
|
|
|
813 |
|
|
/* Grab the lock and see if the device is available */
|
814 |
|
|
nand_get_chip (this, mtd, FL_WRITING, NULL);
|
815 |
|
|
|
816 |
|
|
/* Select the NAND device */
|
817 |
|
|
nand_select ();
|
818 |
|
|
|
819 |
|
|
/* Check the WP bit */
|
820 |
|
|
this->cmdfunc (mtd, NAND_CMD_STATUS, -1, -1);
|
821 |
|
|
if (!(readb (this->IO_ADDR_R) & 0x80)) {
|
822 |
|
|
DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: Device is write protected!!!\n");
|
823 |
|
|
ret = -EIO;
|
824 |
|
|
goto out;
|
825 |
|
|
}
|
826 |
|
|
|
827 |
|
|
/* Loop until all data is written */
|
828 |
|
|
while (written < len) {
|
829 |
|
|
/*
|
830 |
|
|
* Check, if we have a full page write, then we can
|
831 |
|
|
* use the given buffer, else we have to copy
|
832 |
|
|
*/
|
833 |
|
|
if (!col && (len - written) >= mtd->oobblock) {
|
834 |
|
|
this->data_poi = (u_char*) &buf[written];
|
835 |
|
|
cnt = mtd->oobblock;
|
836 |
|
|
} else {
|
837 |
|
|
cnt = 0;
|
838 |
|
|
for (i = col; i < len && i < mtd->oobblock; i++) {
|
839 |
|
|
this->data_buf[i] = buf[written + i];
|
840 |
|
|
cnt++;
|
841 |
|
|
}
|
842 |
|
|
this->data_poi = this->data_buf;
|
843 |
|
|
}
|
844 |
|
|
/* We use the same function for write and writev !) */
|
845 |
|
|
if (eccbuf) {
|
846 |
|
|
ret = nand_write_page (mtd, this, page, col, cnt ,&eccbuf[oob], oobsel);
|
847 |
|
|
oob += mtd->oobsize;
|
848 |
|
|
} else
|
849 |
|
|
ret = nand_write_page (mtd, this, page, col, cnt, NULL, oobsel);
|
850 |
|
|
|
851 |
|
|
if (ret)
|
852 |
|
|
goto out;
|
853 |
|
|
|
854 |
|
|
/* Update written bytes count */
|
855 |
|
|
written += cnt;
|
856 |
|
|
/* Next write is aligned */
|
857 |
|
|
col = 0;
|
858 |
|
|
/* Increment page address */
|
859 |
|
|
page++;
|
860 |
|
|
}
|
861 |
|
|
|
862 |
|
|
out:
|
863 |
|
|
/* De-select the NAND device */
|
864 |
|
|
nand_deselect ();
|
865 |
|
|
|
866 |
|
|
/* Wake up anyone waiting on the device */
|
867 |
|
|
spin_lock_bh (&this->chip_lock);
|
868 |
|
|
this->state = FL_READY;
|
869 |
|
|
wake_up (&this->wq);
|
870 |
|
|
spin_unlock_bh (&this->chip_lock);
|
871 |
|
|
|
872 |
|
|
*retlen = written;
|
873 |
|
|
return ret;
|
874 |
|
|
}
|
875 |
|
|
|
876 |
|
|
/*
|
877 |
|
|
* NAND write out-of-band
|
878 |
|
|
*/
|
879 |
|
|
static int nand_write_oob (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char * buf)
|
880 |
|
|
{
|
881 |
|
|
int i, column, page, status, ret = 0;
|
882 |
|
|
struct nand_chip *this = mtd->priv;
|
883 |
|
|
|
884 |
|
|
DEBUG (MTD_DEBUG_LEVEL3, "nand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
|
885 |
|
|
|
886 |
|
|
/* Shift to get page */
|
887 |
|
|
page = ((int) to) >> this->page_shift;
|
888 |
|
|
|
889 |
|
|
/* Mask to get column */
|
890 |
|
|
column = to & 0x1f;
|
891 |
|
|
|
892 |
|
|
/* Initialize return length value */
|
893 |
|
|
*retlen = 0;
|
894 |
|
|
|
895 |
|
|
/* Do not allow write past end of page */
|
896 |
|
|
if ((column + len) > mtd->oobsize) {
|
897 |
|
|
DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: Attempt to write past end of page\n");
|
898 |
|
|
return -EINVAL;
|
899 |
|
|
}
|
900 |
|
|
|
901 |
|
|
/* Grab the lock and see if the device is available */
|
902 |
|
|
nand_get_chip (this, mtd, FL_WRITING, NULL);
|
903 |
|
|
|
904 |
|
|
/* Select the NAND device */
|
905 |
|
|
nand_select ();
|
906 |
|
|
|
907 |
|
|
/* Check the WP bit */
|
908 |
|
|
this->cmdfunc (mtd, NAND_CMD_STATUS, -1, -1);
|
909 |
|
|
if (!(readb (this->IO_ADDR_R) & 0x80)) {
|
910 |
|
|
DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: Device is write protected!!!\n");
|
911 |
|
|
ret = -EIO;
|
912 |
|
|
goto out;
|
913 |
|
|
}
|
914 |
|
|
|
915 |
|
|
/* Write out desired data */
|
916 |
|
|
this->cmdfunc (mtd, NAND_CMD_SEQIN, mtd->oobblock, page);
|
917 |
|
|
/* prepad 0xff for partial programming */
|
918 |
|
|
for (i = 0; i < column; i++)
|
919 |
|
|
writeb (0xff, this->IO_ADDR_W);
|
920 |
|
|
/* write data */
|
921 |
|
|
for (i = 0; i < len; i++)
|
922 |
|
|
writeb (buf[i], this->IO_ADDR_W);
|
923 |
|
|
/* postpad 0xff for partial programming */
|
924 |
|
|
for (i = len + column; i < mtd->oobsize; i++)
|
925 |
|
|
writeb (0xff, this->IO_ADDR_W);
|
926 |
|
|
|
927 |
|
|
/* Send command to program the OOB data */
|
928 |
|
|
this->cmdfunc (mtd, NAND_CMD_PAGEPROG, -1, -1);
|
929 |
|
|
|
930 |
|
|
status = this->waitfunc (mtd, this, FL_WRITING);
|
931 |
|
|
|
932 |
|
|
/* See if device thinks it succeeded */
|
933 |
|
|
if (status & 0x01) {
|
934 |
|
|
DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: " "Failed write, page 0x%08x\n", page);
|
935 |
|
|
ret = -EIO;
|
936 |
|
|
goto out;
|
937 |
|
|
}
|
938 |
|
|
/* Return happy */
|
939 |
|
|
*retlen = len;
|
940 |
|
|
|
941 |
|
|
#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
|
942 |
|
|
/* Send command to read back the data */
|
943 |
|
|
this->cmdfunc (mtd, NAND_CMD_READOOB, column, page);
|
944 |
|
|
|
945 |
|
|
/* Loop through and verify the data */
|
946 |
|
|
for (i = 0; i < len; i++) {
|
947 |
|
|
if (buf[i] != readb (this->IO_ADDR_R)) {
|
948 |
|
|
DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: " "Failed write verify, page 0x%08x\n", page);
|
949 |
|
|
ret = -EIO;
|
950 |
|
|
goto out;
|
951 |
|
|
}
|
952 |
|
|
}
|
953 |
|
|
#endif
|
954 |
|
|
|
955 |
|
|
out:
|
956 |
|
|
/* De-select the NAND device */
|
957 |
|
|
nand_deselect ();
|
958 |
|
|
|
959 |
|
|
/* Wake up anyone waiting on the device */
|
960 |
|
|
spin_lock_bh (&this->chip_lock);
|
961 |
|
|
this->state = FL_READY;
|
962 |
|
|
wake_up (&this->wq);
|
963 |
|
|
spin_unlock_bh (&this->chip_lock);
|
964 |
|
|
|
965 |
|
|
return ret;
|
966 |
|
|
}
|
967 |
|
|
|
968 |
|
|
|
969 |
|
|
/*
|
970 |
|
|
* NAND write with iovec
|
971 |
|
|
*/
|
972 |
|
|
static int nand_writev (struct mtd_info *mtd, const struct iovec *vecs, unsigned long count,
|
973 |
|
|
loff_t to, size_t * retlen)
|
974 |
|
|
{
|
975 |
|
|
return (nand_writev_ecc (mtd, vecs, count, to, retlen, NULL, 0));
|
976 |
|
|
}
|
977 |
|
|
|
978 |
|
|
static int nand_writev_ecc (struct mtd_info *mtd, const struct iovec *vecs, unsigned long count,
|
979 |
|
|
loff_t to, size_t * retlen, u_char *eccbuf, int oobsel)
|
980 |
|
|
{
|
981 |
|
|
int i, page, col, cnt, len, total_len, ret = 0, written = 0;
|
982 |
|
|
struct nand_chip *this = mtd->priv;
|
983 |
|
|
|
984 |
|
|
/* Calculate total length of data */
|
985 |
|
|
total_len = 0;
|
986 |
|
|
for (i = 0; i < count; i++)
|
987 |
|
|
total_len += (int) vecs[i].iov_len;
|
988 |
|
|
|
989 |
|
|
DEBUG (MTD_DEBUG_LEVEL3,
|
990 |
|
|
"nand_writev: to = 0x%08x, len = %i, count = %ld\n", (unsigned int) to, (unsigned int) total_len, count);
|
991 |
|
|
|
992 |
|
|
/* Do not allow write past end of page */
|
993 |
|
|
if ((to + total_len) > mtd->size) {
|
994 |
|
|
DEBUG (MTD_DEBUG_LEVEL0, "nand_writev: Attempted write past end of device\n");
|
995 |
|
|
return -EINVAL;
|
996 |
|
|
}
|
997 |
|
|
|
998 |
|
|
/* Shift to get page */
|
999 |
|
|
page = ((int) to) >> this->page_shift;
|
1000 |
|
|
|
1001 |
|
|
/* Get the starting column */
|
1002 |
|
|
col = to & (mtd->oobblock - 1);
|
1003 |
|
|
|
1004 |
|
|
/* Grab the lock and see if the device is available */
|
1005 |
|
|
nand_get_chip (this, mtd, FL_WRITING, NULL);
|
1006 |
|
|
|
1007 |
|
|
/* Select the NAND device */
|
1008 |
|
|
nand_select ();
|
1009 |
|
|
|
1010 |
|
|
/* Check the WP bit */
|
1011 |
|
|
this->cmdfunc (mtd, NAND_CMD_STATUS, -1, -1);
|
1012 |
|
|
if (!(readb (this->IO_ADDR_R) & 0x80)) {
|
1013 |
|
|
DEBUG (MTD_DEBUG_LEVEL0, "nand_writev: Device is write protected!!!\n");
|
1014 |
|
|
ret = -EIO;
|
1015 |
|
|
goto out;
|
1016 |
|
|
}
|
1017 |
|
|
|
1018 |
|
|
/* Loop until all iovecs' data has been written */
|
1019 |
|
|
cnt = col;
|
1020 |
|
|
len = 0;
|
1021 |
|
|
|
1022 |
|
|
while (count) {
|
1023 |
|
|
/*
|
1024 |
|
|
* Check, if we write from offset 0 and if the tuple
|
1025 |
|
|
* gives us not enough data for a full page write. Then we
|
1026 |
|
|
* can use the iov direct, else we have to copy into
|
1027 |
|
|
* data_buf.
|
1028 |
|
|
*/
|
1029 |
|
|
if (!cnt && (vecs->iov_len - len) >= mtd->oobblock) {
|
1030 |
|
|
cnt = mtd->oobblock;
|
1031 |
|
|
this->data_poi = (u_char *) vecs->iov_base;
|
1032 |
|
|
this->data_poi += len;
|
1033 |
|
|
len += mtd->oobblock;
|
1034 |
|
|
/* Check, if we have to switch to the next tuple */
|
1035 |
|
|
if (len >= (int) vecs->iov_len) {
|
1036 |
|
|
vecs++;
|
1037 |
|
|
len = 0;
|
1038 |
|
|
count--;
|
1039 |
|
|
}
|
1040 |
|
|
} else {
|
1041 |
|
|
/*
|
1042 |
|
|
* Read data out of each tuple until we have a full page
|
1043 |
|
|
* to write or we've read all the tuples.
|
1044 |
|
|
*/
|
1045 |
|
|
while ((cnt < mtd->oobblock) && count) {
|
1046 |
|
|
if (vecs->iov_base != NULL && vecs->iov_len) {
|
1047 |
|
|
this->data_buf[cnt++] = ((u_char *) vecs->iov_base)[len++];
|
1048 |
|
|
}
|
1049 |
|
|
/* Check, if we have to switch to the next tuple */
|
1050 |
|
|
if (len >= (int) vecs->iov_len) {
|
1051 |
|
|
vecs++;
|
1052 |
|
|
len = 0;
|
1053 |
|
|
count--;
|
1054 |
|
|
}
|
1055 |
|
|
}
|
1056 |
|
|
this->data_poi = this->data_buf;
|
1057 |
|
|
}
|
1058 |
|
|
|
1059 |
|
|
/* We use the same function for write and writev !) */
|
1060 |
|
|
ret = nand_write_page (mtd, this, page, col, cnt, NULL, oobsel);
|
1061 |
|
|
if (ret)
|
1062 |
|
|
goto out;
|
1063 |
|
|
|
1064 |
|
|
/* Update written bytes count */
|
1065 |
|
|
written += (cnt - col);
|
1066 |
|
|
|
1067 |
|
|
/* Reset written byte counter and column */
|
1068 |
|
|
col = cnt = 0;
|
1069 |
|
|
|
1070 |
|
|
/* Increment page address */
|
1071 |
|
|
page++;
|
1072 |
|
|
}
|
1073 |
|
|
|
1074 |
|
|
out:
|
1075 |
|
|
/* De-select the NAND device */
|
1076 |
|
|
nand_deselect ();
|
1077 |
|
|
|
1078 |
|
|
/* Wake up anyone waiting on the device */
|
1079 |
|
|
spin_lock_bh (&this->chip_lock);
|
1080 |
|
|
this->state = FL_READY;
|
1081 |
|
|
wake_up (&this->wq);
|
1082 |
|
|
spin_unlock_bh (&this->chip_lock);
|
1083 |
|
|
|
1084 |
|
|
*retlen = written;
|
1085 |
|
|
return ret;
|
1086 |
|
|
}
|
1087 |
|
|
|
1088 |
|
|
/*
|
1089 |
|
|
* NAND erase a block
|
1090 |
|
|
*/
|
1091 |
|
|
static int nand_erase (struct mtd_info *mtd, struct erase_info *instr)
|
1092 |
|
|
{
|
1093 |
|
|
int page, len, status, pages_per_block, ret;
|
1094 |
|
|
struct nand_chip *this = mtd->priv;
|
1095 |
|
|
DECLARE_WAITQUEUE (wait, current);
|
1096 |
|
|
|
1097 |
|
|
DEBUG (MTD_DEBUG_LEVEL3,
|
1098 |
|
|
"nand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
|
1099 |
|
|
|
1100 |
|
|
/* Start address must align on block boundary */
|
1101 |
|
|
if (instr->addr & (mtd->erasesize - 1)) {
|
1102 |
|
|
DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Unaligned address\n");
|
1103 |
|
|
return -EINVAL;
|
1104 |
|
|
}
|
1105 |
|
|
|
1106 |
|
|
/* Length must align on block boundary */
|
1107 |
|
|
if (instr->len & (mtd->erasesize - 1)) {
|
1108 |
|
|
DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Length not block aligned\n");
|
1109 |
|
|
return -EINVAL;
|
1110 |
|
|
}
|
1111 |
|
|
|
1112 |
|
|
/* Do not allow erase past end of device */
|
1113 |
|
|
if ((instr->len + instr->addr) > mtd->size) {
|
1114 |
|
|
DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Erase past end of device\n");
|
1115 |
|
|
return -EINVAL;
|
1116 |
|
|
}
|
1117 |
|
|
|
1118 |
|
|
/* Grab the lock and see if the device is available */
|
1119 |
|
|
nand_get_chip (this, mtd, FL_ERASING, NULL);
|
1120 |
|
|
|
1121 |
|
|
/* Shift to get first page */
|
1122 |
|
|
page = (int) (instr->addr >> this->page_shift);
|
1123 |
|
|
|
1124 |
|
|
/* Calculate pages in each block */
|
1125 |
|
|
pages_per_block = mtd->erasesize / mtd->oobblock;
|
1126 |
|
|
|
1127 |
|
|
/* Select the NAND device */
|
1128 |
|
|
nand_select ();
|
1129 |
|
|
|
1130 |
|
|
/* Check the WP bit */
|
1131 |
|
|
this->cmdfunc (mtd, NAND_CMD_STATUS, -1, -1);
|
1132 |
|
|
if (!(readb (this->IO_ADDR_R) & 0x80)) {
|
1133 |
|
|
DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Device is write protected!!!\n");
|
1134 |
|
|
instr->state = MTD_ERASE_FAILED;
|
1135 |
|
|
goto erase_exit;
|
1136 |
|
|
}
|
1137 |
|
|
|
1138 |
|
|
/* Loop through the pages */
|
1139 |
|
|
len = instr->len;
|
1140 |
|
|
|
1141 |
|
|
instr->state = MTD_ERASING;
|
1142 |
|
|
|
1143 |
|
|
while (len) {
|
1144 |
|
|
/* Check if we have a bad block, we do not erase bad blocks ! */
|
1145 |
|
|
this->cmdfunc (mtd, NAND_CMD_READOOB, NAND_BADBLOCK_POS, page);
|
1146 |
|
|
if (readb (this->IO_ADDR_R) != 0xff) {
|
1147 |
|
|
printk (KERN_WARNING "nand_erase: attempt to erase a bad block at page 0x%08x\n", page);
|
1148 |
|
|
instr->state = MTD_ERASE_FAILED;
|
1149 |
|
|
goto erase_exit;
|
1150 |
|
|
}
|
1151 |
|
|
|
1152 |
|
|
/* Send commands to erase a page */
|
1153 |
|
|
this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page);
|
1154 |
|
|
this->cmdfunc (mtd, NAND_CMD_ERASE2, -1, -1);
|
1155 |
|
|
|
1156 |
|
|
spin_unlock_bh (&this->chip_lock);
|
1157 |
|
|
status = this->waitfunc (mtd, this, FL_ERASING);
|
1158 |
|
|
|
1159 |
|
|
/* Get spinlock, in case we exit */
|
1160 |
|
|
spin_lock_bh (&this->chip_lock);
|
1161 |
|
|
/* See if block erase succeeded */
|
1162 |
|
|
if (status & 0x01) {
|
1163 |
|
|
DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: " "Failed erase, page 0x%08x\n", page);
|
1164 |
|
|
instr->state = MTD_ERASE_FAILED;
|
1165 |
|
|
goto erase_exit;
|
1166 |
|
|
}
|
1167 |
|
|
|
1168 |
|
|
/* Check, if we were interupted */
|
1169 |
|
|
if (this->state == FL_ERASING) {
|
1170 |
|
|
/* Increment page address and decrement length */
|
1171 |
|
|
len -= mtd->erasesize;
|
1172 |
|
|
page += pages_per_block;
|
1173 |
|
|
}
|
1174 |
|
|
/* Release the spin lock */
|
1175 |
|
|
spin_unlock_bh (&this->chip_lock);
|
1176 |
|
|
erase_retry:
|
1177 |
|
|
spin_lock_bh (&this->chip_lock);
|
1178 |
|
|
/* Check the state and sleep if it changed */
|
1179 |
|
|
if (this->state == FL_ERASING || this->state == FL_READY) {
|
1180 |
|
|
/* Select the NAND device again, if we were interrupted */
|
1181 |
|
|
this->state = FL_ERASING;
|
1182 |
|
|
nand_select ();
|
1183 |
|
|
continue;
|
1184 |
|
|
} else {
|
1185 |
|
|
set_current_state (TASK_UNINTERRUPTIBLE);
|
1186 |
|
|
add_wait_queue (&this->wq, &wait);
|
1187 |
|
|
spin_unlock_bh (&this->chip_lock);
|
1188 |
|
|
schedule ();
|
1189 |
|
|
remove_wait_queue (&this->wq, &wait);
|
1190 |
|
|
goto erase_retry;
|
1191 |
|
|
}
|
1192 |
|
|
}
|
1193 |
|
|
instr->state = MTD_ERASE_DONE;
|
1194 |
|
|
|
1195 |
|
|
erase_exit:
|
1196 |
|
|
/* De-select the NAND device */
|
1197 |
|
|
nand_deselect ();
|
1198 |
|
|
spin_unlock_bh (&this->chip_lock);
|
1199 |
|
|
|
1200 |
|
|
ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;;
|
1201 |
|
|
/* Do call back function */
|
1202 |
|
|
if (!ret && instr->callback)
|
1203 |
|
|
instr->callback (instr);
|
1204 |
|
|
|
1205 |
|
|
/* The device is ready */
|
1206 |
|
|
spin_lock_bh (&this->chip_lock);
|
1207 |
|
|
this->state = FL_READY;
|
1208 |
|
|
spin_unlock_bh (&this->chip_lock);
|
1209 |
|
|
|
1210 |
|
|
/* Return more or less happy */
|
1211 |
|
|
return ret;
|
1212 |
|
|
}
|
1213 |
|
|
|
1214 |
|
|
/*
|
1215 |
|
|
* NAND sync
|
1216 |
|
|
*/
|
1217 |
|
|
static void nand_sync (struct mtd_info *mtd)
|
1218 |
|
|
{
|
1219 |
|
|
struct nand_chip *this = mtd->priv;
|
1220 |
|
|
DECLARE_WAITQUEUE (wait, current);
|
1221 |
|
|
|
1222 |
|
|
DEBUG (MTD_DEBUG_LEVEL3, "nand_sync: called\n");
|
1223 |
|
|
|
1224 |
|
|
retry:
|
1225 |
|
|
/* Grab the spinlock */
|
1226 |
|
|
spin_lock_bh (&this->chip_lock);
|
1227 |
|
|
|
1228 |
|
|
/* See what's going on */
|
1229 |
|
|
switch (this->state) {
|
1230 |
|
|
case FL_READY:
|
1231 |
|
|
case FL_SYNCING:
|
1232 |
|
|
this->state = FL_SYNCING;
|
1233 |
|
|
spin_unlock_bh (&this->chip_lock);
|
1234 |
|
|
break;
|
1235 |
|
|
|
1236 |
|
|
default:
|
1237 |
|
|
/* Not an idle state */
|
1238 |
|
|
add_wait_queue (&this->wq, &wait);
|
1239 |
|
|
spin_unlock_bh (&this->chip_lock);
|
1240 |
|
|
schedule ();
|
1241 |
|
|
|
1242 |
|
|
remove_wait_queue (&this->wq, &wait);
|
1243 |
|
|
goto retry;
|
1244 |
|
|
}
|
1245 |
|
|
|
1246 |
|
|
/* Lock the device */
|
1247 |
|
|
spin_lock_bh (&this->chip_lock);
|
1248 |
|
|
|
1249 |
|
|
/* Set the device to be ready again */
|
1250 |
|
|
if (this->state == FL_SYNCING) {
|
1251 |
|
|
this->state = FL_READY;
|
1252 |
|
|
wake_up (&this->wq);
|
1253 |
|
|
}
|
1254 |
|
|
|
1255 |
|
|
/* Unlock the device */
|
1256 |
|
|
spin_unlock_bh (&this->chip_lock);
|
1257 |
|
|
}
|
1258 |
|
|
|
1259 |
|
|
/*
|
1260 |
|
|
* Scan for the NAND device
|
1261 |
|
|
*/
|
1262 |
|
|
int nand_scan (struct mtd_info *mtd)
|
1263 |
|
|
{
|
1264 |
|
|
int i, nand_maf_id, nand_dev_id;
|
1265 |
|
|
struct nand_chip *this = mtd->priv;
|
1266 |
|
|
|
1267 |
|
|
/* check for proper chip_delay setup, set 20us if not */
|
1268 |
|
|
if (!this->chip_delay)
|
1269 |
|
|
this->chip_delay = 20;
|
1270 |
|
|
|
1271 |
|
|
/* check, if a user supplied command function given */
|
1272 |
|
|
if (this->cmdfunc == NULL)
|
1273 |
|
|
this->cmdfunc = nand_command;
|
1274 |
|
|
|
1275 |
|
|
/* check, if a user supplied wait function given */
|
1276 |
|
|
if (this->waitfunc == NULL)
|
1277 |
|
|
this->waitfunc = nand_wait;
|
1278 |
|
|
|
1279 |
|
|
/* Select the device */
|
1280 |
|
|
nand_select ();
|
1281 |
|
|
|
1282 |
|
|
/* Send the command for reading device ID */
|
1283 |
|
|
this->cmdfunc (mtd, NAND_CMD_READID, 0x00, -1);
|
1284 |
|
|
|
1285 |
|
|
/* Read manufacturer and device IDs */
|
1286 |
|
|
nand_maf_id = readb (this->IO_ADDR_R);
|
1287 |
|
|
nand_dev_id = readb (this->IO_ADDR_R);
|
1288 |
|
|
|
1289 |
|
|
/* Print and store flash device information */
|
1290 |
|
|
for (i = 0; nand_flash_ids[i].name != NULL; i++) {
|
1291 |
|
|
if (nand_dev_id == nand_flash_ids[i].id && !mtd->size) {
|
1292 |
|
|
mtd->name = nand_flash_ids[i].name;
|
1293 |
|
|
mtd->erasesize = nand_flash_ids[i].erasesize;
|
1294 |
|
|
mtd->size = (1 << nand_flash_ids[i].chipshift);
|
1295 |
|
|
mtd->eccsize = 256;
|
1296 |
|
|
if (nand_flash_ids[i].page256) {
|
1297 |
|
|
mtd->oobblock = 256;
|
1298 |
|
|
mtd->oobsize = 8;
|
1299 |
|
|
this->page_shift = 8;
|
1300 |
|
|
} else {
|
1301 |
|
|
mtd->oobblock = 512;
|
1302 |
|
|
mtd->oobsize = 16;
|
1303 |
|
|
this->page_shift = 9;
|
1304 |
|
|
}
|
1305 |
|
|
/* Try to identify manufacturer */
|
1306 |
|
|
for (i = 0; nand_manuf_ids[i].id != 0x0; i++) {
|
1307 |
|
|
if (nand_manuf_ids[i].id == nand_maf_id)
|
1308 |
|
|
break;
|
1309 |
|
|
}
|
1310 |
|
|
printk (KERN_INFO "NAND device: Manufacture ID:"
|
1311 |
|
|
" 0x%02x, Chip ID: 0x%02x (%s %s)\n", nand_maf_id, nand_dev_id,
|
1312 |
|
|
nand_manuf_ids[i].name , mtd->name);
|
1313 |
|
|
break;
|
1314 |
|
|
}
|
1315 |
|
|
}
|
1316 |
|
|
|
1317 |
|
|
/*
|
1318 |
|
|
* check ECC mode, default to software
|
1319 |
|
|
* if 3byte/512byte hardware ECC is selected and we have 256 byte pagesize
|
1320 |
|
|
* fallback to software ECC
|
1321 |
|
|
*/
|
1322 |
|
|
this->eccsize = 256; /* set default eccsize */
|
1323 |
|
|
|
1324 |
|
|
switch (this->eccmode) {
|
1325 |
|
|
|
1326 |
|
|
case NAND_ECC_HW3_512:
|
1327 |
|
|
if (mtd->oobblock == 256) {
|
1328 |
|
|
printk (KERN_WARNING "512 byte HW ECC not possible on 256 Byte pagesize, fallback to SW ECC \n");
|
1329 |
|
|
this->eccmode = NAND_ECC_SOFT;
|
1330 |
|
|
this->calculate_ecc = nand_calculate_ecc;
|
1331 |
|
|
this->correct_data = nand_correct_data;
|
1332 |
|
|
break;
|
1333 |
|
|
} else
|
1334 |
|
|
this->eccsize = 512; /* set eccsize to 512 and fall through for function check */
|
1335 |
|
|
|
1336 |
|
|
case NAND_ECC_HW3_256:
|
1337 |
|
|
if (this->calculate_ecc && this->correct_data && this->enable_hwecc)
|
1338 |
|
|
break;
|
1339 |
|
|
printk (KERN_WARNING "No ECC functions supplied, Hardware ECC not possible\n");
|
1340 |
|
|
BUG();
|
1341 |
|
|
|
1342 |
|
|
case NAND_ECC_NONE:
|
1343 |
|
|
this->eccmode = NAND_ECC_NONE;
|
1344 |
|
|
break;
|
1345 |
|
|
|
1346 |
|
|
case NAND_ECC_SOFT:
|
1347 |
|
|
this->calculate_ecc = nand_calculate_ecc;
|
1348 |
|
|
this->correct_data = nand_correct_data;
|
1349 |
|
|
break;
|
1350 |
|
|
|
1351 |
|
|
default:
|
1352 |
|
|
printk (KERN_WARNING "Invalid NAND_ECC_MODE %d\n", this->eccmode);
|
1353 |
|
|
BUG();
|
1354 |
|
|
}
|
1355 |
|
|
|
1356 |
|
|
/* Initialize state, waitqueue and spinlock */
|
1357 |
|
|
this->state = FL_READY;
|
1358 |
|
|
init_waitqueue_head (&this->wq);
|
1359 |
|
|
spin_lock_init (&this->chip_lock);
|
1360 |
|
|
|
1361 |
|
|
/* De-select the device */
|
1362 |
|
|
nand_deselect ();
|
1363 |
|
|
|
1364 |
|
|
/* Print warning message for no device */
|
1365 |
|
|
if (!mtd->size) {
|
1366 |
|
|
printk (KERN_WARNING "No NAND device found!!!\n");
|
1367 |
|
|
return 1;
|
1368 |
|
|
}
|
1369 |
|
|
|
1370 |
|
|
/* Fill in remaining MTD driver data */
|
1371 |
|
|
mtd->type = MTD_NANDFLASH;
|
1372 |
|
|
mtd->flags = MTD_CAP_NANDFLASH | MTD_ECC;
|
1373 |
|
|
mtd->module = THIS_MODULE;
|
1374 |
|
|
mtd->ecctype = MTD_ECC_SW;
|
1375 |
|
|
mtd->erase = nand_erase;
|
1376 |
|
|
mtd->point = NULL;
|
1377 |
|
|
mtd->unpoint = NULL;
|
1378 |
|
|
mtd->read = nand_read;
|
1379 |
|
|
mtd->write = nand_write;
|
1380 |
|
|
mtd->read_ecc = nand_read_ecc;
|
1381 |
|
|
mtd->write_ecc = nand_write_ecc;
|
1382 |
|
|
mtd->read_oob = nand_read_oob;
|
1383 |
|
|
mtd->write_oob = nand_write_oob;
|
1384 |
|
|
mtd->readv = NULL;
|
1385 |
|
|
mtd->writev = nand_writev;
|
1386 |
|
|
mtd->writev_ecc = nand_writev_ecc;
|
1387 |
|
|
mtd->sync = nand_sync;
|
1388 |
|
|
mtd->lock = NULL;
|
1389 |
|
|
mtd->unlock = NULL;
|
1390 |
|
|
mtd->suspend = NULL;
|
1391 |
|
|
mtd->resume = NULL;
|
1392 |
|
|
|
1393 |
|
|
/* Return happy */
|
1394 |
|
|
return 0;
|
1395 |
|
|
}
|
1396 |
|
|
|
1397 |
|
|
EXPORT_SYMBOL (nand_scan);
|
1398 |
|
|
|
1399 |
|
|
MODULE_LICENSE ("GPL");
|
1400 |
|
|
MODULE_AUTHOR ("Steven J. Hill <sjhill@cotw.com>, Thomas Gleixner <tglx@linutronix.de>");
|
1401 |
|
|
MODULE_DESCRIPTION ("Generic NAND flash driver code");
|