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[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [drivers/] [net/] [sunhme.c] - Blame information for rev 1765

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1 1275 phoenix
/* $Id: sunhme.c,v 1.1.1.1 2004-04-15 01:40:14 phoenix Exp $
2
 * sunhme.c: Sparc HME/BigMac 10/100baseT half/full duplex auto switching,
3
 *           auto carrier detecting ethernet driver.  Also known as the
4
 *           "Happy Meal Ethernet" found on SunSwift SBUS cards.
5
 *
6
 * Copyright (C) 1996, 1998, 1999, 2002 David S. Miller (davem@redhat.com)
7
 *
8
 * Changes :
9
 * 2000/11/11 Willy Tarreau <willy AT meta-x.org>
10
 *   - port to non-sparc architectures. Tested only on x86 and
11
 *     only currently works with QFE PCI cards.
12
 *   - ability to specify the MAC address at module load time by passing this
13
 *     argument : macaddr=0x00,0x10,0x20,0x30,0x40,0x50
14
 */
15
 
16
static char version[] =
17
        "sunhme.c:v2.01 26/Mar/2002 David S. Miller (davem@redhat.com)\n";
18
 
19
#include <linux/module.h>
20
 
21
#include <linux/config.h>
22
#include <linux/kernel.h>
23
#include <linux/sched.h>
24
#include <linux/types.h>
25
#include <linux/fcntl.h>
26
#include <linux/interrupt.h>
27
#include <linux/ptrace.h>
28
#include <linux/ioport.h>
29
#include <linux/in.h>
30
#include <linux/slab.h>
31
#include <linux/string.h>
32
#include <linux/delay.h>
33
#include <linux/init.h>
34
#include <linux/ethtool.h>
35
#include <linux/mii.h>
36
#include <linux/crc32.h>
37
#include <linux/random.h>
38
#include <asm/system.h>
39
#include <asm/bitops.h>
40
#include <asm/io.h>
41
#include <asm/dma.h>
42
#include <linux/errno.h>
43
#include <asm/byteorder.h>
44
 
45
#ifdef __sparc__
46
#include <asm/idprom.h>
47
#include <asm/sbus.h>
48
#include <asm/openprom.h>
49
#include <asm/oplib.h>
50
#include <asm/auxio.h>
51
#ifndef __sparc_v9__
52
#include <asm/io-unit.h>
53
#endif
54
#endif
55
#include <asm/uaccess.h>
56
 
57
#include <asm/pgtable.h>
58
#include <asm/irq.h>
59
 
60
#include <linux/netdevice.h>
61
#include <linux/etherdevice.h>
62
#include <linux/skbuff.h>
63
 
64
#ifdef CONFIG_PCI
65
#include <linux/pci.h>
66
#ifdef __sparc__
67
#include <asm/pbm.h>
68
#endif
69
#endif
70
 
71
#include "sunhme.h"
72
 
73
 
74
static int macaddr[6];
75
 
76
/* accept MAC address of the form macaddr=0x08,0x00,0x20,0x30,0x40,0x50 */
77
MODULE_PARM(macaddr, "6i");
78
MODULE_PARM_DESC(macaddr, "Happy Meal MAC address to set");
79
MODULE_LICENSE("GPL");
80
 
81
static struct happy_meal *root_happy_dev;
82
 
83
#ifdef CONFIG_SBUS
84
static struct quattro *qfe_sbus_list;
85
#endif
86
 
87
#ifdef CONFIG_PCI
88
static struct quattro *qfe_pci_list;
89
#endif
90
 
91
#undef HMEDEBUG
92
#undef SXDEBUG
93
#undef RXDEBUG
94
#undef TXDEBUG
95
#undef TXLOGGING
96
 
97
#ifdef TXLOGGING
98
struct hme_tx_logent {
99
        unsigned int tstamp;
100
        int tx_new, tx_old;
101
        unsigned int action;
102
#define TXLOG_ACTION_IRQ        0x01
103
#define TXLOG_ACTION_TXMIT      0x02
104
#define TXLOG_ACTION_TBUSY      0x04
105
#define TXLOG_ACTION_NBUFS      0x08
106
        unsigned int status;
107
};
108
#define TX_LOG_LEN      128
109
static struct hme_tx_logent tx_log[TX_LOG_LEN];
110
static int txlog_cur_entry;
111
static __inline__ void tx_add_log(struct happy_meal *hp, unsigned int a, unsigned int s)
112
{
113
        struct hme_tx_logent *tlp;
114
        unsigned long flags;
115
 
116
        save_and_cli(flags);
117
        tlp = &tx_log[txlog_cur_entry];
118
        tlp->tstamp = (unsigned int)jiffies;
119
        tlp->tx_new = hp->tx_new;
120
        tlp->tx_old = hp->tx_old;
121
        tlp->action = a;
122
        tlp->status = s;
123
        txlog_cur_entry = (txlog_cur_entry + 1) & (TX_LOG_LEN - 1);
124
        restore_flags(flags);
125
}
126
static __inline__ void tx_dump_log(void)
127
{
128
        int i, this;
129
 
130
        this = txlog_cur_entry;
131
        for (i = 0; i < TX_LOG_LEN; i++) {
132
                printk("TXLOG[%d]: j[%08x] tx[N(%d)O(%d)] action[%08x] stat[%08x]\n", i,
133
                       tx_log[this].tstamp,
134
                       tx_log[this].tx_new, tx_log[this].tx_old,
135
                       tx_log[this].action, tx_log[this].status);
136
                this = (this + 1) & (TX_LOG_LEN - 1);
137
        }
138
}
139
static __inline__ void tx_dump_ring(struct happy_meal *hp)
140
{
141
        struct hmeal_init_block *hb = hp->happy_block;
142
        struct happy_meal_txd *tp = &hb->happy_meal_txd[0];
143
        int i;
144
 
145
        for (i = 0; i < TX_RING_SIZE; i+=4) {
146
                printk("TXD[%d..%d]: [%08x:%08x] [%08x:%08x] [%08x:%08x] [%08x:%08x]\n",
147
                       i, i + 4,
148
                       le32_to_cpu(tp[i].tx_flags), le32_to_cpu(tp[i].tx_addr),
149
                       le32_to_cpu(tp[i + 1].tx_flags), le32_to_cpu(tp[i + 1].tx_addr),
150
                       le32_to_cpu(tp[i + 2].tx_flags), le32_to_cpu(tp[i + 2].tx_addr),
151
                       le32_to_cpu(tp[i + 3].tx_flags), le32_to_cpu(tp[i + 3].tx_addr));
152
        }
153
}
154
#else
155
#define tx_add_log(hp, a, s)            do { } while(0)
156
#define tx_dump_log()                   do { } while(0)
157
#define tx_dump_ring(hp)                do { } while(0)
158
#endif
159
 
160
#ifdef HMEDEBUG
161
#define HMD(x)  printk x
162
#else
163
#define HMD(x)
164
#endif
165
 
166
/* #define AUTO_SWITCH_DEBUG */
167
 
168
#ifdef AUTO_SWITCH_DEBUG
169
#define ASD(x)  printk x
170
#else
171
#define ASD(x)
172
#endif
173
 
174
#define DEFAULT_IPG0      16 /* For lance-mode only */
175
#define DEFAULT_IPG1       8 /* For all modes */
176
#define DEFAULT_IPG2       4 /* For all modes */
177
#define DEFAULT_JAMSIZE    4 /* Toe jam */
178
 
179
#ifdef CONFIG_PCI
180
/* This happy_pci_ids is declared __initdata because it is only used
181
   as an advisory to depmod.  If this is ported to the new PCI interface
182
   where it could be referenced at any time due to hot plugging,
183
   it should be changed to __devinitdata. */
184
 
185
struct pci_device_id happymeal_pci_ids[] __initdata = {
186
        {
187
          vendor: PCI_VENDOR_ID_SUN,
188
          device: PCI_DEVICE_ID_SUN_HAPPYMEAL,
189
          subvendor: PCI_ANY_ID,
190
          subdevice: PCI_ANY_ID,
191
        },
192
        { }                     /* Terminating entry */
193
};
194
 
195
MODULE_DEVICE_TABLE(pci, happymeal_pci_ids);
196
 
197
#endif
198
 
199
/* NOTE: In the descriptor writes one _must_ write the address
200
 *       member _first_.  The card must not be allowed to see
201
 *       the updated descriptor flags until the address is
202
 *       correct.  I've added a write memory barrier between
203
 *       the two stores so that I can sleep well at night... -DaveM
204
 */
205
 
206
#if defined(CONFIG_SBUS) && defined(CONFIG_PCI)
207
static void sbus_hme_write32(unsigned long reg, u32 val)
208
{
209
        sbus_writel(val, reg);
210
}
211
 
212
static u32 sbus_hme_read32(unsigned long reg)
213
{
214
        return sbus_readl(reg);
215
}
216
 
217
static void sbus_hme_write_rxd(struct happy_meal_rxd *rxd, u32 flags, u32 addr)
218
{
219
        rxd->rx_addr = addr;
220
        wmb();
221
        rxd->rx_flags = flags;
222
}
223
 
224
static void sbus_hme_write_txd(struct happy_meal_txd *txd, u32 flags, u32 addr)
225
{
226
        txd->tx_addr = addr;
227
        wmb();
228
        txd->tx_flags = flags;
229
}
230
 
231
static u32 sbus_hme_read_desc32(u32 *p)
232
{
233
        return *p;
234
}
235
 
236
static void pci_hme_write32(unsigned long reg, u32 val)
237
{
238
        writel(val, reg);
239
}
240
 
241
static u32 pci_hme_read32(unsigned long reg)
242
{
243
        return readl(reg);
244
}
245
 
246
static void pci_hme_write_rxd(struct happy_meal_rxd *rxd, u32 flags, u32 addr)
247
{
248
        rxd->rx_addr = cpu_to_le32(addr);
249
        wmb();
250
        rxd->rx_flags = cpu_to_le32(flags);
251
}
252
 
253
static void pci_hme_write_txd(struct happy_meal_txd *txd, u32 flags, u32 addr)
254
{
255
        txd->tx_addr = cpu_to_le32(addr);
256
        wmb();
257
        txd->tx_flags = cpu_to_le32(flags);
258
}
259
 
260
static u32 pci_hme_read_desc32(u32 *p)
261
{
262
        return cpu_to_le32p(p);
263
}
264
 
265
#define hme_write32(__hp, __reg, __val) \
266
        ((__hp)->write32((__reg), (__val)))
267
#define hme_read32(__hp, __reg) \
268
        ((__hp)->read32(__reg))
269
#define hme_write_rxd(__hp, __rxd, __flags, __addr) \
270
        ((__hp)->write_rxd((__rxd), (__flags), (__addr)))
271
#define hme_write_txd(__hp, __txd, __flags, __addr) \
272
        ((__hp)->write_txd((__txd), (__flags), (__addr)))
273
#define hme_read_desc32(__hp, __p) \
274
        ((__hp)->read_desc32(__p))
275
#define hme_dma_map(__hp, __ptr, __size, __dir) \
276
        ((__hp)->dma_map((__hp)->happy_dev, (__ptr), (__size), (__dir)))
277
#define hme_dma_unmap(__hp, __addr, __size, __dir) \
278
        ((__hp)->dma_unmap((__hp)->happy_dev, (__addr), (__size), (__dir)))
279
#define hme_dma_sync(__hp, __addr, __size, __dir) \
280
        ((__hp)->dma_sync((__hp)->happy_dev, (__addr), (__size), (__dir)))
281
#else
282
#ifdef CONFIG_SBUS
283
/* SBUS only compilation */
284
#define hme_write32(__hp, __reg, __val) \
285
        sbus_writel((__val), (__reg))
286
#define hme_read32(__hp, __reg) \
287
        sbus_readl(__reg)
288
#define hme_write_rxd(__hp, __rxd, __flags, __addr) \
289
do {    (__rxd)->rx_addr = (__addr); \
290
        wmb(); \
291
        (__rxd)->rx_flags = (__flags); \
292
} while(0)
293
#define hme_write_txd(__hp, __txd, __flags, __addr) \
294
do {    (__txd)->tx_addr = (__addr); \
295
        wmb(); \
296
        (__txd)->tx_flags = (__flags); \
297
} while(0)
298
#define hme_read_desc32(__hp, __p)      (*(__p))
299
#define hme_dma_map(__hp, __ptr, __size, __dir) \
300
        sbus_map_single((__hp)->happy_dev, (__ptr), (__size), (__dir))
301
#define hme_dma_unmap(__hp, __addr, __size, __dir) \
302
        sbus_unmap_single((__hp)->happy_dev, (__addr), (__size), (__dir))
303
#define hme_dma_sync(__hp, __addr, __size, __dir) \
304
        sbus_dma_sync_single((__hp)->happy_dev, (__addr), (__size), (__dir))
305
#else
306
/* PCI only compilation */
307
#define hme_write32(__hp, __reg, __val) \
308
        writel((__val), (__reg))
309
#define hme_read32(__hp, __reg) \
310
        readl(__reg)
311
#define hme_write_rxd(__hp, __rxd, __flags, __addr) \
312
do {    (__rxd)->rx_addr = cpu_to_le32(__addr); \
313
        wmb(); \
314
        (__rxd)->rx_flags = cpu_to_le32(__flags); \
315
} while(0)
316
#define hme_write_txd(__hp, __txd, __flags, __addr) \
317
do {    (__txd)->tx_addr = cpu_to_le32(__addr); \
318
        wmb(); \
319
        (__txd)->tx_flags = cpu_to_le32(__flags); \
320
} while(0)
321
#define hme_read_desc32(__hp, __p)      cpu_to_le32p(__p)
322
#define hme_dma_map(__hp, __ptr, __size, __dir) \
323
        pci_map_single((__hp)->happy_dev, (__ptr), (__size), (__dir))
324
#define hme_dma_unmap(__hp, __addr, __size, __dir) \
325
        pci_unmap_single((__hp)->happy_dev, (__addr), (__size), (__dir))
326
#define hme_dma_sync(__hp, __addr, __size, __dir) \
327
        pci_dma_sync_single((__hp)->happy_dev, (__addr), (__size), (__dir))
328
#endif
329
#endif
330
 
331
 
332
#ifdef SBUS_DMA_BIDIRECTIONAL
333
#       define DMA_BIDIRECTIONAL        SBUS_DMA_BIDIRECTIONAL
334
#else
335
#       define DMA_BIDIRECTIONAL        0
336
#endif
337
 
338
#ifdef SBUS_DMA_FROMDEVICE
339
#       define DMA_FROMDEVICE           SBUS_DMA_FROMDEVICE
340
#else
341
#       define DMA_TODEVICE             1
342
#endif
343
 
344
#ifdef SBUS_DMA_TODEVICE
345
#       define DMA_TODEVICE             SBUS_DMA_TODEVICE
346
#else
347
#       define DMA_FROMDEVICE           2
348
#endif
349
 
350
 
351
/* Oh yes, the MIF BitBang is mighty fun to program.  BitBucket is more like it. */
352
static void BB_PUT_BIT(struct happy_meal *hp, unsigned long tregs, int bit)
353
{
354
        hme_write32(hp, tregs + TCVR_BBDATA, bit);
355
        hme_write32(hp, tregs + TCVR_BBCLOCK, 0);
356
        hme_write32(hp, tregs + TCVR_BBCLOCK, 1);
357
}
358
 
359
#if 0
360
static u32 BB_GET_BIT(struct happy_meal *hp, unsigned long tregs, int internal)
361
{
362
        u32 ret;
363
 
364
        hme_write32(hp, tregs + TCVR_BBCLOCK, 0);
365
        hme_write32(hp, tregs + TCVR_BBCLOCK, 1);
366
        ret = hme_read32(hp, tregs + TCVR_CFG);
367
        if (internal)
368
                ret &= TCV_CFG_MDIO0;
369
        else
370
                ret &= TCV_CFG_MDIO1;
371
 
372
        return ret;
373
}
374
#endif
375
 
376
static u32 BB_GET_BIT2(struct happy_meal *hp, unsigned long tregs, int internal)
377
{
378
        u32 retval;
379
 
380
        hme_write32(hp, tregs + TCVR_BBCLOCK, 0);
381
        udelay(1);
382
        retval = hme_read32(hp, tregs + TCVR_CFG);
383
        if (internal)
384
                retval &= TCV_CFG_MDIO0;
385
        else
386
                retval &= TCV_CFG_MDIO1;
387
        hme_write32(hp, tregs + TCVR_BBCLOCK, 1);
388
 
389
        return retval;
390
}
391
 
392
#define TCVR_FAILURE      0x80000000     /* Impossible MIF read value */
393
 
394
static int happy_meal_bb_read(struct happy_meal *hp,
395
                              unsigned long tregs, int reg)
396
{
397
        u32 tmp;
398
        int retval = 0;
399
        int i;
400
 
401
        ASD(("happy_meal_bb_read: reg=%d ", reg));
402
 
403
        /* Enable the MIF BitBang outputs. */
404
        hme_write32(hp, tregs + TCVR_BBOENAB, 1);
405
 
406
        /* Force BitBang into the idle state. */
407
        for (i = 0; i < 32; i++)
408
                BB_PUT_BIT(hp, tregs, 1);
409
 
410
        /* Give it the read sequence. */
411
        BB_PUT_BIT(hp, tregs, 0);
412
        BB_PUT_BIT(hp, tregs, 1);
413
        BB_PUT_BIT(hp, tregs, 1);
414
        BB_PUT_BIT(hp, tregs, 0);
415
 
416
        /* Give it the PHY address. */
417
        tmp = hp->paddr & 0xff;
418
        for (i = 4; i >= 0; i--)
419
                BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
420
 
421
        /* Tell it what register we want to read. */
422
        tmp = (reg & 0xff);
423
        for (i = 4; i >= 0; i--)
424
                BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
425
 
426
        /* Close down the MIF BitBang outputs. */
427
        hme_write32(hp, tregs + TCVR_BBOENAB, 0);
428
 
429
        /* Now read in the value. */
430
        (void) BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
431
        for (i = 15; i >= 0; i--)
432
                retval |= BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
433
        (void) BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
434
        (void) BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
435
        (void) BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
436
        ASD(("value=%x\n", retval));
437
        return retval;
438
}
439
 
440
static void happy_meal_bb_write(struct happy_meal *hp,
441
                                unsigned long tregs, int reg,
442
                                unsigned short value)
443
{
444
        u32 tmp;
445
        int i;
446
 
447
        ASD(("happy_meal_bb_write: reg=%d value=%x\n", reg, value));
448
 
449
        /* Enable the MIF BitBang outputs. */
450
        hme_write32(hp, tregs + TCVR_BBOENAB, 1);
451
 
452
        /* Force BitBang into the idle state. */
453
        for (i = 0; i < 32; i++)
454
                BB_PUT_BIT(hp, tregs, 1);
455
 
456
        /* Give it write sequence. */
457
        BB_PUT_BIT(hp, tregs, 0);
458
        BB_PUT_BIT(hp, tregs, 1);
459
        BB_PUT_BIT(hp, tregs, 0);
460
        BB_PUT_BIT(hp, tregs, 1);
461
 
462
        /* Give it the PHY address. */
463
        tmp = (hp->paddr & 0xff);
464
        for (i = 4; i >= 0; i--)
465
                BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
466
 
467
        /* Tell it what register we will be writing. */
468
        tmp = (reg & 0xff);
469
        for (i = 4; i >= 0; i--)
470
                BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
471
 
472
        /* Tell it to become ready for the bits. */
473
        BB_PUT_BIT(hp, tregs, 1);
474
        BB_PUT_BIT(hp, tregs, 0);
475
 
476
        for (i = 15; i >= 0; i--)
477
                BB_PUT_BIT(hp, tregs, ((value >> i) & 1));
478
 
479
        /* Close down the MIF BitBang outputs. */
480
        hme_write32(hp, tregs + TCVR_BBOENAB, 0);
481
}
482
 
483
#define TCVR_READ_TRIES   16
484
 
485
static int happy_meal_tcvr_read(struct happy_meal *hp,
486
                                unsigned long tregs, int reg)
487
{
488
        int tries = TCVR_READ_TRIES;
489
        int retval;
490
 
491
        ASD(("happy_meal_tcvr_read: reg=0x%02x ", reg));
492
        if (hp->tcvr_type == none) {
493
                ASD(("no transceiver, value=TCVR_FAILURE\n"));
494
                return TCVR_FAILURE;
495
        }
496
 
497
        if (!(hp->happy_flags & HFLAG_FENABLE)) {
498
                ASD(("doing bit bang\n"));
499
                return happy_meal_bb_read(hp, tregs, reg);
500
        }
501
 
502
        hme_write32(hp, tregs + TCVR_FRAME,
503
                    (FRAME_READ | (hp->paddr << 23) | ((reg & 0xff) << 18)));
504
        while (!(hme_read32(hp, tregs + TCVR_FRAME) & 0x10000) && --tries)
505
                udelay(20);
506
        if (!tries) {
507
                printk(KERN_ERR "happy meal: Aieee, transceiver MIF read bolixed\n");
508
                return TCVR_FAILURE;
509
        }
510
        retval = hme_read32(hp, tregs + TCVR_FRAME) & 0xffff;
511
        ASD(("value=%04x\n", retval));
512
        return retval;
513
}
514
 
515
#define TCVR_WRITE_TRIES  16
516
 
517
static void happy_meal_tcvr_write(struct happy_meal *hp,
518
                                  unsigned long tregs, int reg,
519
                                  unsigned short value)
520
{
521
        int tries = TCVR_WRITE_TRIES;
522
 
523
        ASD(("happy_meal_tcvr_write: reg=0x%02x value=%04x\n", reg, value));
524
 
525
        /* Welcome to Sun Microsystems, can I take your order please? */
526
        if (!(hp->happy_flags & HFLAG_FENABLE))
527
                return happy_meal_bb_write(hp, tregs, reg, value);
528
 
529
        /* Would you like fries with that? */
530
        hme_write32(hp, tregs + TCVR_FRAME,
531
                    (FRAME_WRITE | (hp->paddr << 23) |
532
                     ((reg & 0xff) << 18) | (value & 0xffff)));
533
        while (!(hme_read32(hp, tregs + TCVR_FRAME) & 0x10000) && --tries)
534
                udelay(20);
535
 
536
        /* Anything else? */
537
        if (!tries)
538
                printk(KERN_ERR "happy meal: Aieee, transceiver MIF write bolixed\n");
539
 
540
        /* Fifty-two cents is your change, have a nice day. */
541
}
542
 
543
/* Auto negotiation.  The scheme is very simple.  We have a timer routine
544
 * that keeps watching the auto negotiation process as it progresses.
545
 * The DP83840 is first told to start doing it's thing, we set up the time
546
 * and place the timer state machine in it's initial state.
547
 *
548
 * Here the timer peeks at the DP83840 status registers at each click to see
549
 * if the auto negotiation has completed, we assume here that the DP83840 PHY
550
 * will time out at some point and just tell us what (didn't) happen.  For
551
 * complete coverage we only allow so many of the ticks at this level to run,
552
 * when this has expired we print a warning message and try another strategy.
553
 * This "other" strategy is to force the interface into various speed/duplex
554
 * configurations and we stop when we see a link-up condition before the
555
 * maximum number of "peek" ticks have occurred.
556
 *
557
 * Once a valid link status has been detected we configure the BigMAC and
558
 * the rest of the Happy Meal to speak the most efficient protocol we could
559
 * get a clean link for.  The priority for link configurations, highest first
560
 * is:
561
 *                 100 Base-T Full Duplex
562
 *                 100 Base-T Half Duplex
563
 *                 10 Base-T Full Duplex
564
 *                 10 Base-T Half Duplex
565
 *
566
 * We start a new timer now, after a successful auto negotiation status has
567
 * been detected.  This timer just waits for the link-up bit to get set in
568
 * the BMCR of the DP83840.  When this occurs we print a kernel log message
569
 * describing the link type in use and the fact that it is up.
570
 *
571
 * If a fatal error of some sort is signalled and detected in the interrupt
572
 * service routine, and the chip is reset, or the link is ifconfig'd down
573
 * and then back up, this entire process repeats itself all over again.
574
 */
575
static int try_next_permutation(struct happy_meal *hp, unsigned long tregs)
576
{
577
        hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
578
 
579
        /* Downgrade from full to half duplex.  Only possible
580
         * via ethtool.
581
         */
582
        if (hp->sw_bmcr & BMCR_FULLDPLX) {
583
                hp->sw_bmcr &= ~(BMCR_FULLDPLX);
584
                happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
585
                return 0;
586
        }
587
 
588
        /* Downgrade from 100 to 10. */
589
        if (hp->sw_bmcr & BMCR_SPEED100) {
590
                hp->sw_bmcr &= ~(BMCR_SPEED100);
591
                happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
592
                return 0;
593
        }
594
 
595
        /* We've tried everything. */
596
        return -1;
597
}
598
 
599
static void display_link_mode(struct happy_meal *hp, unsigned long tregs)
600
{
601
        printk(KERN_INFO "%s: Link is up using ", hp->dev->name);
602
        if (hp->tcvr_type == external)
603
                printk("external ");
604
        else
605
                printk("internal ");
606
        printk("transceiver at ");
607
        hp->sw_lpa = happy_meal_tcvr_read(hp, tregs, MII_LPA);
608
        if (hp->sw_lpa & (LPA_100HALF | LPA_100FULL)) {
609
                if (hp->sw_lpa & LPA_100FULL)
610
                        printk("100Mb/s, Full Duplex.\n");
611
                else
612
                        printk("100Mb/s, Half Duplex.\n");
613
        } else {
614
                if (hp->sw_lpa & LPA_10FULL)
615
                        printk("10Mb/s, Full Duplex.\n");
616
                else
617
                        printk("10Mb/s, Half Duplex.\n");
618
        }
619
}
620
 
621
static void display_forced_link_mode(struct happy_meal *hp, unsigned long tregs)
622
{
623
        printk(KERN_INFO "%s: Link has been forced up using ", hp->dev->name);
624
        if (hp->tcvr_type == external)
625
                printk("external ");
626
        else
627
                printk("internal ");
628
        printk("transceiver at ");
629
        hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
630
        if (hp->sw_bmcr & BMCR_SPEED100)
631
                printk("100Mb/s, ");
632
        else
633
                printk("10Mb/s, ");
634
        if (hp->sw_bmcr & BMCR_FULLDPLX)
635
                printk("Full Duplex.\n");
636
        else
637
                printk("Half Duplex.\n");
638
}
639
 
640
static int set_happy_link_modes(struct happy_meal *hp, unsigned long tregs)
641
{
642
        int full;
643
 
644
        /* All we care about is making sure the bigmac tx_cfg has a
645
         * proper duplex setting.
646
         */
647
        if (hp->timer_state == arbwait) {
648
                hp->sw_lpa = happy_meal_tcvr_read(hp, tregs, MII_LPA);
649
                if (!(hp->sw_lpa & (LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL)))
650
                        goto no_response;
651
                if (hp->sw_lpa & LPA_100FULL)
652
                        full = 1;
653
                else if (hp->sw_lpa & LPA_100HALF)
654
                        full = 0;
655
                else if (hp->sw_lpa & LPA_10FULL)
656
                        full = 1;
657
                else
658
                        full = 0;
659
        } else {
660
                /* Forcing a link mode. */
661
                hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
662
                if (hp->sw_bmcr & BMCR_FULLDPLX)
663
                        full = 1;
664
                else
665
                        full = 0;
666
        }
667
 
668
        /* Before changing other bits in the tx_cfg register, and in
669
         * general any of other the TX config registers too, you
670
         * must:
671
         * 1) Clear Enable
672
         * 2) Poll with reads until that bit reads back as zero
673
         * 3) Make TX configuration changes
674
         * 4) Set Enable once more
675
         */
676
        hme_write32(hp, hp->bigmacregs + BMAC_TXCFG,
677
                    hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) &
678
                    ~(BIGMAC_TXCFG_ENABLE));
679
        while (hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) & BIGMAC_TXCFG_ENABLE)
680
                barrier();
681
        if (full) {
682
                hp->happy_flags |= HFLAG_FULL;
683
                hme_write32(hp, hp->bigmacregs + BMAC_TXCFG,
684
                            hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) |
685
                            BIGMAC_TXCFG_FULLDPLX);
686
        } else {
687
                hp->happy_flags &= ~(HFLAG_FULL);
688
                hme_write32(hp, hp->bigmacregs + BMAC_TXCFG,
689
                            hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) &
690
                            ~(BIGMAC_TXCFG_FULLDPLX));
691
        }
692
        hme_write32(hp, hp->bigmacregs + BMAC_TXCFG,
693
                    hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) |
694
                    BIGMAC_TXCFG_ENABLE);
695
        return 0;
696
no_response:
697
        return 1;
698
}
699
 
700
static int happy_meal_init(struct happy_meal *hp);
701
 
702
static int is_lucent_phy(struct happy_meal *hp)
703
{
704
        unsigned long tregs = hp->tcvregs;
705
        unsigned short mr2, mr3;
706
        int ret = 0;
707
 
708
        mr2 = happy_meal_tcvr_read(hp, tregs, 2);
709
        mr3 = happy_meal_tcvr_read(hp, tregs, 3);
710
        if ((mr2 & 0xffff) == 0x0180 &&
711
            ((mr3 & 0xffff) >> 10) == 0x1d)
712
                ret = 1;
713
 
714
        return ret;
715
}
716
 
717
static void happy_meal_timer(unsigned long data)
718
{
719
        struct happy_meal *hp = (struct happy_meal *) data;
720
        unsigned long tregs = hp->tcvregs;
721
        int restart_timer = 0;
722
 
723
        spin_lock_irq(&hp->happy_lock);
724
 
725
        hp->timer_ticks++;
726
        switch(hp->timer_state) {
727
        case arbwait:
728
                /* Only allow for 5 ticks, thats 10 seconds and much too
729
                 * long to wait for arbitration to complete.
730
                 */
731
                if (hp->timer_ticks >= 10) {
732
                        /* Enter force mode. */
733
        do_force_mode:
734
                        hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
735
                        printk(KERN_NOTICE "%s: Auto-Negotiation unsuccessful, trying force link mode\n",
736
                               hp->dev->name);
737
                        hp->sw_bmcr = BMCR_SPEED100;
738
                        happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
739
 
740
                        if (!is_lucent_phy(hp)) {
741
                                /* OK, seems we need do disable the transceiver for the first
742
                                 * tick to make sure we get an accurate link state at the
743
                                 * second tick.
744
                                 */
745
                                hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs, DP83840_CSCONFIG);
746
                                hp->sw_csconfig &= ~(CSCONFIG_TCVDISAB);
747
                                happy_meal_tcvr_write(hp, tregs, DP83840_CSCONFIG, hp->sw_csconfig);
748
                        }
749
                        hp->timer_state = ltrywait;
750
                        hp->timer_ticks = 0;
751
                        restart_timer = 1;
752
                } else {
753
                        /* Anything interesting happen? */
754
                        hp->sw_bmsr = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
755
                        if (hp->sw_bmsr & BMSR_ANEGCOMPLETE) {
756
                                int ret;
757
 
758
                                /* Just what we've been waiting for... */
759
                                ret = set_happy_link_modes(hp, tregs);
760
                                if (ret) {
761
                                        /* Ooops, something bad happened, go to force
762
                                         * mode.
763
                                         *
764
                                         * XXX Broken hubs which don't support 802.3u
765
                                         * XXX auto-negotiation make this happen as well.
766
                                         */
767
                                        goto do_force_mode;
768
                                }
769
 
770
                                /* Success, at least so far, advance our state engine. */
771
                                hp->timer_state = lupwait;
772
                                restart_timer = 1;
773
                        } else {
774
                                restart_timer = 1;
775
                        }
776
                }
777
                break;
778
 
779
        case lupwait:
780
                /* Auto negotiation was successful and we are awaiting a
781
                 * link up status.  I have decided to let this timer run
782
                 * forever until some sort of error is signalled, reporting
783
                 * a message to the user at 10 second intervals.
784
                 */
785
                hp->sw_bmsr = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
786
                if (hp->sw_bmsr & BMSR_LSTATUS) {
787
                        /* Wheee, it's up, display the link mode in use and put
788
                         * the timer to sleep.
789
                         */
790
                        display_link_mode(hp, tregs);
791
                        hp->timer_state = asleep;
792
                        restart_timer = 0;
793
                } else {
794
                        if (hp->timer_ticks >= 10) {
795
                                printk(KERN_NOTICE "%s: Auto negotiation successful, link still "
796
                                       "not completely up.\n", hp->dev->name);
797
                                hp->timer_ticks = 0;
798
                                restart_timer = 1;
799
                        } else {
800
                                restart_timer = 1;
801
                        }
802
                }
803
                break;
804
 
805
        case ltrywait:
806
                /* Making the timeout here too long can make it take
807
                 * annoyingly long to attempt all of the link mode
808
                 * permutations, but then again this is essentially
809
                 * error recovery code for the most part.
810
                 */
811
                hp->sw_bmsr = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
812
                hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs, DP83840_CSCONFIG);
813
                if (hp->timer_ticks == 1) {
814
                        if (!is_lucent_phy(hp)) {
815
                                /* Re-enable transceiver, we'll re-enable the transceiver next
816
                                 * tick, then check link state on the following tick.
817
                                 */
818
                                hp->sw_csconfig |= CSCONFIG_TCVDISAB;
819
                                happy_meal_tcvr_write(hp, tregs,
820
                                                      DP83840_CSCONFIG, hp->sw_csconfig);
821
                        }
822
                        restart_timer = 1;
823
                        break;
824
                }
825
                if (hp->timer_ticks == 2) {
826
                        if (!is_lucent_phy(hp)) {
827
                                hp->sw_csconfig &= ~(CSCONFIG_TCVDISAB);
828
                                happy_meal_tcvr_write(hp, tregs,
829
                                                      DP83840_CSCONFIG, hp->sw_csconfig);
830
                        }
831
                        restart_timer = 1;
832
                        break;
833
                }
834
                if (hp->sw_bmsr & BMSR_LSTATUS) {
835
                        /* Force mode selection success. */
836
                        display_forced_link_mode(hp, tregs);
837
                        set_happy_link_modes(hp, tregs); /* XXX error? then what? */
838
                        hp->timer_state = asleep;
839
                        restart_timer = 0;
840
                } else {
841
                        if (hp->timer_ticks >= 4) { /* 6 seconds or so... */
842
                                int ret;
843
 
844
                                ret = try_next_permutation(hp, tregs);
845
                                if (ret == -1) {
846
                                        /* Aieee, tried them all, reset the
847
                                         * chip and try all over again.
848
                                         */
849
 
850
                                        /* Let the user know... */
851
                                        printk(KERN_NOTICE "%s: Link down, cable problem?\n",
852
                                               hp->dev->name);
853
 
854
                                        ret = happy_meal_init(hp);
855
                                        if (ret) {
856
                                                /* ho hum... */
857
                                                printk(KERN_ERR "%s: Error, cannot re-init the "
858
                                                       "Happy Meal.\n", hp->dev->name);
859
                                        }
860
                                        goto out;
861
                                }
862
                                if (!is_lucent_phy(hp)) {
863
                                        hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs,
864
                                                                               DP83840_CSCONFIG);
865
                                        hp->sw_csconfig |= CSCONFIG_TCVDISAB;
866
                                        happy_meal_tcvr_write(hp, tregs,
867
                                                              DP83840_CSCONFIG, hp->sw_csconfig);
868
                                }
869
                                hp->timer_ticks = 0;
870
                                restart_timer = 1;
871
                        } else {
872
                                restart_timer = 1;
873
                        }
874
                }
875
                break;
876
 
877
        case asleep:
878
        default:
879
                /* Can't happens.... */
880
                printk(KERN_ERR "%s: Aieee, link timer is asleep but we got one anyways!\n",
881
                       hp->dev->name);
882
                restart_timer = 0;
883
                hp->timer_ticks = 0;
884
                hp->timer_state = asleep; /* foo on you */
885
                break;
886
        };
887
 
888
        if (restart_timer) {
889
                hp->happy_timer.expires = jiffies + ((12 * HZ)/10); /* 1.2 sec. */
890
                add_timer(&hp->happy_timer);
891
        }
892
 
893
out:
894
        spin_unlock_irq(&hp->happy_lock);
895
}
896
 
897
#define TX_RESET_TRIES     32
898
#define RX_RESET_TRIES     32
899
 
900
/* hp->happy_lock must be held */
901
static void happy_meal_tx_reset(struct happy_meal *hp, unsigned long bregs)
902
{
903
        int tries = TX_RESET_TRIES;
904
 
905
        HMD(("happy_meal_tx_reset: reset, "));
906
 
907
        /* Would you like to try our SMCC Delux? */
908
        hme_write32(hp, bregs + BMAC_TXSWRESET, 0);
909
        while ((hme_read32(hp, bregs + BMAC_TXSWRESET) & 1) && --tries)
910
                udelay(20);
911
 
912
        /* Lettuce, tomato, buggy hardware (no extra charge)? */
913
        if (!tries)
914
                printk(KERN_ERR "happy meal: Transceiver BigMac ATTACK!");
915
 
916
        /* Take care. */
917
        HMD(("done\n"));
918
}
919
 
920
/* hp->happy_lock must be held */
921
static void happy_meal_rx_reset(struct happy_meal *hp, unsigned long bregs)
922
{
923
        int tries = RX_RESET_TRIES;
924
 
925
        HMD(("happy_meal_rx_reset: reset, "));
926
 
927
        /* We have a special on GNU/Viking hardware bugs today. */
928
        hme_write32(hp, bregs + BMAC_RXSWRESET, 0);
929
        while ((hme_read32(hp, bregs + BMAC_RXSWRESET) & 1) && --tries)
930
                udelay(20);
931
 
932
        /* Will that be all? */
933
        if (!tries)
934
                printk(KERN_ERR "happy meal: Receiver BigMac ATTACK!");
935
 
936
        /* Don't forget your vik_1137125_wa.  Have a nice day. */
937
        HMD(("done\n"));
938
}
939
 
940
#define STOP_TRIES         16
941
 
942
/* hp->happy_lock must be held */
943
static void happy_meal_stop(struct happy_meal *hp, unsigned long gregs)
944
{
945
        int tries = STOP_TRIES;
946
 
947
        HMD(("happy_meal_stop: reset, "));
948
 
949
        /* We're consolidating our STB products, it's your lucky day. */
950
        hme_write32(hp, gregs + GREG_SWRESET, GREG_RESET_ALL);
951
        while (hme_read32(hp, gregs + GREG_SWRESET) && --tries)
952
                udelay(20);
953
 
954
        /* Come back next week when we are "Sun Microelectronics". */
955
        if (!tries)
956
                printk(KERN_ERR "happy meal: Fry guys.");
957
 
958
        /* Remember: "Different name, same old buggy as shit hardware." */
959
        HMD(("done\n"));
960
}
961
 
962
/* hp->happy_lock must be held */
963
static void happy_meal_get_counters(struct happy_meal *hp, unsigned long bregs)
964
{
965
        struct net_device_stats *stats = &hp->net_stats;
966
 
967
        stats->rx_crc_errors += hme_read32(hp, bregs + BMAC_RCRCECTR);
968
        hme_write32(hp, bregs + BMAC_RCRCECTR, 0);
969
 
970
        stats->rx_frame_errors += hme_read32(hp, bregs + BMAC_UNALECTR);
971
        hme_write32(hp, bregs + BMAC_UNALECTR, 0);
972
 
973
        stats->rx_length_errors += hme_read32(hp, bregs + BMAC_GLECTR);
974
        hme_write32(hp, bregs + BMAC_GLECTR, 0);
975
 
976
        stats->tx_aborted_errors += hme_read32(hp, bregs + BMAC_EXCTR);
977
 
978
        stats->collisions +=
979
                (hme_read32(hp, bregs + BMAC_EXCTR) +
980
                 hme_read32(hp, bregs + BMAC_LTCTR));
981
        hme_write32(hp, bregs + BMAC_EXCTR, 0);
982
        hme_write32(hp, bregs + BMAC_LTCTR, 0);
983
}
984
 
985
/* hp->happy_lock must be held */
986
static void happy_meal_poll_stop(struct happy_meal *hp, unsigned long tregs)
987
{
988
        ASD(("happy_meal_poll_stop: "));
989
 
990
        /* If polling disabled or not polling already, nothing to do. */
991
        if ((hp->happy_flags & (HFLAG_POLLENABLE | HFLAG_POLL)) !=
992
           (HFLAG_POLLENABLE | HFLAG_POLL)) {
993
                HMD(("not polling, return\n"));
994
                return;
995
        }
996
 
997
        /* Shut up the MIF. */
998
        ASD(("were polling, mif ints off, "));
999
        hme_write32(hp, tregs + TCVR_IMASK, 0xffff);
1000
 
1001
        /* Turn off polling. */
1002
        ASD(("polling off, "));
1003
        hme_write32(hp, tregs + TCVR_CFG,
1004
                    hme_read32(hp, tregs + TCVR_CFG) & ~(TCV_CFG_PENABLE));
1005
 
1006
        /* We are no longer polling. */
1007
        hp->happy_flags &= ~(HFLAG_POLL);
1008
 
1009
        /* Let the bits set. */
1010
        udelay(200);
1011
        ASD(("done\n"));
1012
}
1013
 
1014
/* Only Sun can take such nice parts and fuck up the programming interface
1015
 * like this.  Good job guys...
1016
 */
1017
#define TCVR_RESET_TRIES       16 /* It should reset quickly        */
1018
#define TCVR_UNISOLATE_TRIES   32 /* Dis-isolation can take longer. */
1019
 
1020
/* hp->happy_lock must be held */
1021
static int happy_meal_tcvr_reset(struct happy_meal *hp, unsigned long tregs)
1022
{
1023
        u32 tconfig;
1024
        int result, tries = TCVR_RESET_TRIES;
1025
 
1026
        tconfig = hme_read32(hp, tregs + TCVR_CFG);
1027
        ASD(("happy_meal_tcvr_reset: tcfg<%08lx> ", tconfig));
1028
        if (hp->tcvr_type == external) {
1029
                ASD(("external<"));
1030
                hme_write32(hp, tregs + TCVR_CFG, tconfig & ~(TCV_CFG_PSELECT));
1031
                hp->tcvr_type = internal;
1032
                hp->paddr = TCV_PADDR_ITX;
1033
                ASD(("ISOLATE,"));
1034
                happy_meal_tcvr_write(hp, tregs, MII_BMCR,
1035
                                      (BMCR_LOOPBACK|BMCR_PDOWN|BMCR_ISOLATE));
1036
                result = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1037
                if (result == TCVR_FAILURE) {
1038
                        ASD(("phyread_fail>\n"));
1039
                        return -1;
1040
                }
1041
                ASD(("phyread_ok,PSELECT>"));
1042
                hme_write32(hp, tregs + TCVR_CFG, tconfig | TCV_CFG_PSELECT);
1043
                hp->tcvr_type = external;
1044
                hp->paddr = TCV_PADDR_ETX;
1045
        } else {
1046
                if (tconfig & TCV_CFG_MDIO1) {
1047
                        ASD(("internal<PSELECT,"));
1048
                        hme_write32(hp, tregs + TCVR_CFG, (tconfig | TCV_CFG_PSELECT));
1049
                        ASD(("ISOLATE,"));
1050
                        happy_meal_tcvr_write(hp, tregs, MII_BMCR,
1051
                                              (BMCR_LOOPBACK|BMCR_PDOWN|BMCR_ISOLATE));
1052
                        result = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1053
                        if (result == TCVR_FAILURE) {
1054
                                ASD(("phyread_fail>\n"));
1055
                                return -1;
1056
                        }
1057
                        ASD(("phyread_ok,~PSELECT>"));
1058
                        hme_write32(hp, tregs + TCVR_CFG, (tconfig & ~(TCV_CFG_PSELECT)));
1059
                        hp->tcvr_type = internal;
1060
                        hp->paddr = TCV_PADDR_ITX;
1061
                }
1062
        }
1063
 
1064
        ASD(("BMCR_RESET "));
1065
        happy_meal_tcvr_write(hp, tregs, MII_BMCR, BMCR_RESET);
1066
 
1067
        while (--tries) {
1068
                result = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1069
                if (result == TCVR_FAILURE)
1070
                        return -1;
1071
                hp->sw_bmcr = result;
1072
                if (!(result & BMCR_RESET))
1073
                        break;
1074
                udelay(20);
1075
        }
1076
        if (!tries) {
1077
                ASD(("BMCR RESET FAILED!\n"));
1078
                return -1;
1079
        }
1080
        ASD(("RESET_OK\n"));
1081
 
1082
        /* Get fresh copies of the PHY registers. */
1083
        hp->sw_bmsr      = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
1084
        hp->sw_physid1   = happy_meal_tcvr_read(hp, tregs, MII_PHYSID1);
1085
        hp->sw_physid2   = happy_meal_tcvr_read(hp, tregs, MII_PHYSID2);
1086
        hp->sw_advertise = happy_meal_tcvr_read(hp, tregs, MII_ADVERTISE);
1087
 
1088
        ASD(("UNISOLATE"));
1089
        hp->sw_bmcr &= ~(BMCR_ISOLATE);
1090
        happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1091
 
1092
        tries = TCVR_UNISOLATE_TRIES;
1093
        while (--tries) {
1094
                result = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1095
                if (result == TCVR_FAILURE)
1096
                        return -1;
1097
                if (!(result & BMCR_ISOLATE))
1098
                        break;
1099
                udelay(20);
1100
        }
1101
        if (!tries) {
1102
                ASD((" FAILED!\n"));
1103
                return -1;
1104
        }
1105
        ASD((" SUCCESS and CSCONFIG_DFBYPASS\n"));
1106
        if (!is_lucent_phy(hp)) {
1107
                result = happy_meal_tcvr_read(hp, tregs,
1108
                                              DP83840_CSCONFIG);
1109
                happy_meal_tcvr_write(hp, tregs,
1110
                                      DP83840_CSCONFIG, (result | CSCONFIG_DFBYPASS));
1111
        }
1112
        return 0;
1113
}
1114
 
1115
/* Figure out whether we have an internal or external transceiver.
1116
 *
1117
 * hp->happy_lock must be held
1118
 */
1119
static void happy_meal_transceiver_check(struct happy_meal *hp, unsigned long tregs)
1120
{
1121
        unsigned long tconfig = hme_read32(hp, tregs + TCVR_CFG);
1122
 
1123
        ASD(("happy_meal_transceiver_check: tcfg=%08lx ", tconfig));
1124
        if (hp->happy_flags & HFLAG_POLL) {
1125
                /* If we are polling, we must stop to get the transceiver type. */
1126
                ASD(("<polling> "));
1127
                if (hp->tcvr_type == internal) {
1128
                        if (tconfig & TCV_CFG_MDIO1) {
1129
                                ASD(("<internal> <poll stop> "));
1130
                                happy_meal_poll_stop(hp, tregs);
1131
                                hp->paddr = TCV_PADDR_ETX;
1132
                                hp->tcvr_type = external;
1133
                                ASD(("<external>\n"));
1134
                                tconfig &= ~(TCV_CFG_PENABLE);
1135
                                tconfig |= TCV_CFG_PSELECT;
1136
                                hme_write32(hp, tregs + TCVR_CFG, tconfig);
1137
                        }
1138
                } else {
1139
                        if (hp->tcvr_type == external) {
1140
                                ASD(("<external> "));
1141
                                if (!(hme_read32(hp, tregs + TCVR_STATUS) >> 16)) {
1142
                                        ASD(("<poll stop> "));
1143
                                        happy_meal_poll_stop(hp, tregs);
1144
                                        hp->paddr = TCV_PADDR_ITX;
1145
                                        hp->tcvr_type = internal;
1146
                                        ASD(("<internal>\n"));
1147
                                        hme_write32(hp, tregs + TCVR_CFG,
1148
                                                    hme_read32(hp, tregs + TCVR_CFG) &
1149
                                                    ~(TCV_CFG_PSELECT));
1150
                                }
1151
                                ASD(("\n"));
1152
                        } else {
1153
                                ASD(("<none>\n"));
1154
                        }
1155
                }
1156
        } else {
1157
                u32 reread = hme_read32(hp, tregs + TCVR_CFG);
1158
 
1159
                /* Else we can just work off of the MDIO bits. */
1160
                ASD(("<not polling> "));
1161
                if (reread & TCV_CFG_MDIO1) {
1162
                        hme_write32(hp, tregs + TCVR_CFG, tconfig | TCV_CFG_PSELECT);
1163
                        hp->paddr = TCV_PADDR_ETX;
1164
                        hp->tcvr_type = external;
1165
                        ASD(("<external>\n"));
1166
                } else {
1167
                        if (reread & TCV_CFG_MDIO0) {
1168
                                hme_write32(hp, tregs + TCVR_CFG,
1169
                                            tconfig & ~(TCV_CFG_PSELECT));
1170
                                hp->paddr = TCV_PADDR_ITX;
1171
                                hp->tcvr_type = internal;
1172
                                ASD(("<internal>\n"));
1173
                        } else {
1174
                                printk(KERN_ERR "happy meal: Transceiver and a coke please.");
1175
                                hp->tcvr_type = none; /* Grrr... */
1176
                                ASD(("<none>\n"));
1177
                        }
1178
                }
1179
        }
1180
}
1181
 
1182
/* The receive ring buffers are a bit tricky to get right.  Here goes...
1183
 *
1184
 * The buffers we dma into must be 64 byte aligned.  So we use a special
1185
 * alloc_skb() routine for the happy meal to allocate 64 bytes more than
1186
 * we really need.
1187
 *
1188
 * We use skb_reserve() to align the data block we get in the skb.  We
1189
 * also program the etxregs->cfg register to use an offset of 2.  This
1190
 * imperical constant plus the ethernet header size will always leave
1191
 * us with a nicely aligned ip header once we pass things up to the
1192
 * protocol layers.
1193
 *
1194
 * The numbers work out to:
1195
 *
1196
 *         Max ethernet frame size         1518
1197
 *         Ethernet header size              14
1198
 *         Happy Meal base offset             2
1199
 *
1200
 * Say a skb data area is at 0xf001b010, and its size alloced is
1201
 * (ETH_FRAME_LEN + 64 + 2) = (1514 + 64 + 2) = 1580 bytes.
1202
 *
1203
 * First our alloc_skb() routine aligns the data base to a 64 byte
1204
 * boundry.  We now have 0xf001b040 as our skb data address.  We
1205
 * plug this into the receive descriptor address.
1206
 *
1207
 * Next, we skb_reserve() 2 bytes to account for the Happy Meal offset.
1208
 * So now the data we will end up looking at starts at 0xf001b042.  When
1209
 * the packet arrives, we will check out the size received and subtract
1210
 * this from the skb->length.  Then we just pass the packet up to the
1211
 * protocols as is, and allocate a new skb to replace this slot we have
1212
 * just received from.
1213
 *
1214
 * The ethernet layer will strip the ether header from the front of the
1215
 * skb we just sent to it, this leaves us with the ip header sitting
1216
 * nicely aligned at 0xf001b050.  Also, for tcp and udp packets the
1217
 * Happy Meal has even checksummed the tcp/udp data for us.  The 16
1218
 * bit checksum is obtained from the low bits of the receive descriptor
1219
 * flags, thus:
1220
 *
1221
 *      skb->csum = rxd->rx_flags & 0xffff;
1222
 *      skb->ip_summed = CHECKSUM_HW;
1223
 *
1224
 * before sending off the skb to the protocols, and we are good as gold.
1225
 */
1226
static void happy_meal_clean_rings(struct happy_meal *hp)
1227
{
1228
        int i;
1229
 
1230
        for (i = 0; i < RX_RING_SIZE; i++) {
1231
                if (hp->rx_skbs[i] != NULL) {
1232
                        struct sk_buff *skb = hp->rx_skbs[i];
1233
                        struct happy_meal_rxd *rxd;
1234
                        u32 dma_addr;
1235
 
1236
                        rxd = &hp->happy_block->happy_meal_rxd[i];
1237
                        dma_addr = hme_read_desc32(hp, &rxd->rx_addr);
1238
                        hme_dma_unmap(hp, dma_addr, RX_BUF_ALLOC_SIZE, DMA_FROMDEVICE);
1239
                        dev_kfree_skb_any(skb);
1240
                        hp->rx_skbs[i] = NULL;
1241
                }
1242
        }
1243
 
1244
        for (i = 0; i < TX_RING_SIZE; i++) {
1245
                if (hp->tx_skbs[i] != NULL) {
1246
                        struct sk_buff *skb = hp->tx_skbs[i];
1247
                        struct happy_meal_txd *txd;
1248
                        u32 dma_addr;
1249
                        int frag;
1250
 
1251
                        hp->tx_skbs[i] = NULL;
1252
 
1253
                        for (frag = 0; frag <= skb_shinfo(skb)->nr_frags; frag++) {
1254
                                txd = &hp->happy_block->happy_meal_txd[i];
1255
                                dma_addr = hme_read_desc32(hp, &txd->tx_addr);
1256
                                hme_dma_unmap(hp, dma_addr,
1257
                                              (hme_read_desc32(hp, &txd->tx_flags)
1258
                                               & TXFLAG_SIZE),
1259
                                              DMA_TODEVICE);
1260
 
1261
                                if (frag != skb_shinfo(skb)->nr_frags)
1262
                                        i++;
1263
                        }
1264
 
1265
                        dev_kfree_skb_any(skb);
1266
                }
1267
        }
1268
}
1269
 
1270
/* hp->happy_lock must be held */
1271
static void happy_meal_init_rings(struct happy_meal *hp)
1272
{
1273
        struct hmeal_init_block *hb = hp->happy_block;
1274
        struct net_device *dev = hp->dev;
1275
        int i;
1276
 
1277
        HMD(("happy_meal_init_rings: counters to zero, "));
1278
        hp->rx_new = hp->rx_old = hp->tx_new = hp->tx_old = 0;
1279
 
1280
        /* Free any skippy bufs left around in the rings. */
1281
        HMD(("clean, "));
1282
        happy_meal_clean_rings(hp);
1283
 
1284
        /* Now get new skippy bufs for the receive ring. */
1285
        HMD(("init rxring, "));
1286
        for (i = 0; i < RX_RING_SIZE; i++) {
1287
                struct sk_buff *skb;
1288
 
1289
                skb = happy_meal_alloc_skb(RX_BUF_ALLOC_SIZE, GFP_ATOMIC);
1290
                if (!skb) {
1291
                        hme_write_rxd(hp, &hb->happy_meal_rxd[i], 0, 0);
1292
                        continue;
1293
                }
1294
                hp->rx_skbs[i] = skb;
1295
                skb->dev = dev;
1296
 
1297
                /* Because we reserve afterwards. */
1298
                skb_put(skb, (ETH_FRAME_LEN + RX_OFFSET));
1299
                hme_write_rxd(hp, &hb->happy_meal_rxd[i],
1300
                              (RXFLAG_OWN | ((RX_BUF_ALLOC_SIZE - RX_OFFSET) << 16)),
1301
                              hme_dma_map(hp, skb->data, RX_BUF_ALLOC_SIZE, DMA_FROMDEVICE));
1302
                skb_reserve(skb, RX_OFFSET);
1303
        }
1304
 
1305
        HMD(("init txring, "));
1306
        for (i = 0; i < TX_RING_SIZE; i++)
1307
                hme_write_txd(hp, &hb->happy_meal_txd[i], 0, 0);
1308
 
1309
        HMD(("done\n"));
1310
}
1311
 
1312
/* hp->happy_lock must be held */
1313
static void happy_meal_begin_auto_negotiation(struct happy_meal *hp,
1314
                                              unsigned long tregs,
1315
                                              struct ethtool_cmd *ep)
1316
{
1317
        int timeout;
1318
 
1319
        /* Read all of the registers we are interested in now. */
1320
        hp->sw_bmsr      = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
1321
        hp->sw_bmcr      = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1322
        hp->sw_physid1   = happy_meal_tcvr_read(hp, tregs, MII_PHYSID1);
1323
        hp->sw_physid2   = happy_meal_tcvr_read(hp, tregs, MII_PHYSID2);
1324
 
1325
        /* XXX Check BMSR_ANEGCAPABLE, should not be necessary though. */
1326
 
1327
        hp->sw_advertise = happy_meal_tcvr_read(hp, tregs, MII_ADVERTISE);
1328
        if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
1329
                /* Advertise everything we can support. */
1330
                if (hp->sw_bmsr & BMSR_10HALF)
1331
                        hp->sw_advertise |= (ADVERTISE_10HALF);
1332
                else
1333
                        hp->sw_advertise &= ~(ADVERTISE_10HALF);
1334
 
1335
                if (hp->sw_bmsr & BMSR_10FULL)
1336
                        hp->sw_advertise |= (ADVERTISE_10FULL);
1337
                else
1338
                        hp->sw_advertise &= ~(ADVERTISE_10FULL);
1339
                if (hp->sw_bmsr & BMSR_100HALF)
1340
                        hp->sw_advertise |= (ADVERTISE_100HALF);
1341
                else
1342
                        hp->sw_advertise &= ~(ADVERTISE_100HALF);
1343
                if (hp->sw_bmsr & BMSR_100FULL)
1344
                        hp->sw_advertise |= (ADVERTISE_100FULL);
1345
                else
1346
                        hp->sw_advertise &= ~(ADVERTISE_100FULL);
1347
                happy_meal_tcvr_write(hp, tregs, MII_ADVERTISE, hp->sw_advertise);
1348
 
1349
                /* XXX Currently no Happy Meal cards I know off support 100BaseT4,
1350
                 * XXX and this is because the DP83840 does not support it, changes
1351
                 * XXX would need to be made to the tx/rx logic in the driver as well
1352
                 * XXX so I completely skip checking for it in the BMSR for now.
1353
                 */
1354
 
1355
#ifdef AUTO_SWITCH_DEBUG
1356
                ASD(("%s: Advertising [ ", hp->dev->name));
1357
                if (hp->sw_advertise & ADVERTISE_10HALF)
1358
                        ASD(("10H "));
1359
                if (hp->sw_advertise & ADVERTISE_10FULL)
1360
                        ASD(("10F "));
1361
                if (hp->sw_advertise & ADVERTISE_100HALF)
1362
                        ASD(("100H "));
1363
                if (hp->sw_advertise & ADVERTISE_100FULL)
1364
                        ASD(("100F "));
1365
#endif
1366
 
1367
                /* Enable Auto-Negotiation, this is usually on already... */
1368
                hp->sw_bmcr |= BMCR_ANENABLE;
1369
                happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1370
 
1371
                /* Restart it to make sure it is going. */
1372
                hp->sw_bmcr |= BMCR_ANRESTART;
1373
                happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1374
 
1375
                /* BMCR_ANRESTART self clears when the process has begun. */
1376
 
1377
                timeout = 64;  /* More than enough. */
1378
                while (--timeout) {
1379
                        hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1380
                        if (!(hp->sw_bmcr & BMCR_ANRESTART))
1381
                                break; /* got it. */
1382
                        udelay(10);
1383
                }
1384
                if (!timeout) {
1385
                        printk(KERN_ERR "%s: Happy Meal would not start auto negotiation "
1386
                               "BMCR=0x%04x\n", hp->dev->name, hp->sw_bmcr);
1387
                        printk(KERN_NOTICE "%s: Performing force link detection.\n",
1388
                               hp->dev->name);
1389
                        goto force_link;
1390
                } else {
1391
                        hp->timer_state = arbwait;
1392
                }
1393
        } else {
1394
force_link:
1395
                /* Force the link up, trying first a particular mode.
1396
                 * Either we are here at the request of ethtool or
1397
                 * because the Happy Meal would not start to autoneg.
1398
                 */
1399
 
1400
                /* Disable auto-negotiation in BMCR, enable the duplex and
1401
                 * speed setting, init the timer state machine, and fire it off.
1402
                 */
1403
                if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
1404
                        hp->sw_bmcr = BMCR_SPEED100;
1405
                } else {
1406
                        if (ep->speed == SPEED_100)
1407
                                hp->sw_bmcr = BMCR_SPEED100;
1408
                        else
1409
                                hp->sw_bmcr = 0;
1410
                        if (ep->duplex == DUPLEX_FULL)
1411
                                hp->sw_bmcr |= BMCR_FULLDPLX;
1412
                }
1413
                happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1414
 
1415
                if (!is_lucent_phy(hp)) {
1416
                        /* OK, seems we need do disable the transceiver for the first
1417
                         * tick to make sure we get an accurate link state at the
1418
                         * second tick.
1419
                         */
1420
                        hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs,
1421
                                                               DP83840_CSCONFIG);
1422
                        hp->sw_csconfig &= ~(CSCONFIG_TCVDISAB);
1423
                        happy_meal_tcvr_write(hp, tregs, DP83840_CSCONFIG,
1424
                                              hp->sw_csconfig);
1425
                }
1426
                hp->timer_state = ltrywait;
1427
        }
1428
 
1429
        hp->timer_ticks = 0;
1430
        hp->happy_timer.expires = jiffies + (12 * HZ)/10;  /* 1.2 sec. */
1431
        hp->happy_timer.data = (unsigned long) hp;
1432
        hp->happy_timer.function = &happy_meal_timer;
1433
        add_timer(&hp->happy_timer);
1434
}
1435
 
1436
/* hp->happy_lock must be held */
1437
static int happy_meal_init(struct happy_meal *hp)
1438
{
1439
        unsigned long gregs        = hp->gregs;
1440
        unsigned long etxregs      = hp->etxregs;
1441
        unsigned long erxregs      = hp->erxregs;
1442
        unsigned long bregs        = hp->bigmacregs;
1443
        unsigned long tregs        = hp->tcvregs;
1444
        u32 regtmp, rxcfg;
1445
        unsigned char *e = &hp->dev->dev_addr[0];
1446
 
1447
        /* If auto-negotiation timer is running, kill it. */
1448
        del_timer(&hp->happy_timer);
1449
 
1450
        HMD(("happy_meal_init: happy_flags[%08x] ",
1451
             hp->happy_flags));
1452
        if (!(hp->happy_flags & HFLAG_INIT)) {
1453
                HMD(("set HFLAG_INIT, "));
1454
                hp->happy_flags |= HFLAG_INIT;
1455
                happy_meal_get_counters(hp, bregs);
1456
        }
1457
 
1458
        /* Stop polling. */
1459
        HMD(("to happy_meal_poll_stop\n"));
1460
        happy_meal_poll_stop(hp, tregs);
1461
 
1462
        /* Stop transmitter and receiver. */
1463
        HMD(("happy_meal_init: to happy_meal_stop\n"));
1464
        happy_meal_stop(hp, gregs);
1465
 
1466
        /* Alloc and reset the tx/rx descriptor chains. */
1467
        HMD(("happy_meal_init: to happy_meal_init_rings\n"));
1468
        happy_meal_init_rings(hp);
1469
 
1470
        /* Shut up the MIF. */
1471
        HMD(("happy_meal_init: Disable all MIF irqs (old[%08x]), ",
1472
             hme_read32(hp, tregs + TCVR_IMASK)));
1473
        hme_write32(hp, tregs + TCVR_IMASK, 0xffff);
1474
 
1475
        /* See if we can enable the MIF frame on this card to speak to the DP83840. */
1476
        if (hp->happy_flags & HFLAG_FENABLE) {
1477
                HMD(("use frame old[%08x], ",
1478
                     hme_read32(hp, tregs + TCVR_CFG)));
1479
                hme_write32(hp, tregs + TCVR_CFG,
1480
                            hme_read32(hp, tregs + TCVR_CFG) & ~(TCV_CFG_BENABLE));
1481
        } else {
1482
                HMD(("use bitbang old[%08x], ",
1483
                     hme_read32(hp, tregs + TCVR_CFG)));
1484
                hme_write32(hp, tregs + TCVR_CFG,
1485
                            hme_read32(hp, tregs + TCVR_CFG) | TCV_CFG_BENABLE);
1486
        }
1487
 
1488
        /* Check the state of the transceiver. */
1489
        HMD(("to happy_meal_transceiver_check\n"));
1490
        happy_meal_transceiver_check(hp, tregs);
1491
 
1492
        /* Put the Big Mac into a sane state. */
1493
        HMD(("happy_meal_init: "));
1494
        switch(hp->tcvr_type) {
1495
        case none:
1496
                /* Cannot operate if we don't know the transceiver type! */
1497
                HMD(("AAIEEE no transceiver type, EAGAIN"));
1498
                return -EAGAIN;
1499
 
1500
        case internal:
1501
                /* Using the MII buffers. */
1502
                HMD(("internal, using MII, "));
1503
                hme_write32(hp, bregs + BMAC_XIFCFG, 0);
1504
                break;
1505
 
1506
        case external:
1507
                /* Not using the MII, disable it. */
1508
                HMD(("external, disable MII, "));
1509
                hme_write32(hp, bregs + BMAC_XIFCFG, BIGMAC_XCFG_MIIDISAB);
1510
                break;
1511
        };
1512
 
1513
        if (happy_meal_tcvr_reset(hp, tregs))
1514
                return -EAGAIN;
1515
 
1516
        /* Reset the Happy Meal Big Mac transceiver and the receiver. */
1517
        HMD(("tx/rx reset, "));
1518
        happy_meal_tx_reset(hp, bregs);
1519
        happy_meal_rx_reset(hp, bregs);
1520
 
1521
        /* Set jam size and inter-packet gaps to reasonable defaults. */
1522
        HMD(("jsize/ipg1/ipg2, "));
1523
        hme_write32(hp, bregs + BMAC_JSIZE, DEFAULT_JAMSIZE);
1524
        hme_write32(hp, bregs + BMAC_IGAP1, DEFAULT_IPG1);
1525
        hme_write32(hp, bregs + BMAC_IGAP2, DEFAULT_IPG2);
1526
 
1527
        /* Load up the MAC address and random seed. */
1528
        HMD(("rseed/macaddr, "));
1529
 
1530
        /* The docs recommend to use the 10LSB of our MAC here. */
1531
        hme_write32(hp, bregs + BMAC_RSEED, ((e[5] | e[4]<<8)&0x3ff));
1532
 
1533
        hme_write32(hp, bregs + BMAC_MACADDR2, ((e[4] << 8) | e[5]));
1534
        hme_write32(hp, bregs + BMAC_MACADDR1, ((e[2] << 8) | e[3]));
1535
        hme_write32(hp, bregs + BMAC_MACADDR0, ((e[0] << 8) | e[1]));
1536
 
1537
        HMD(("htable, "));
1538
        if ((hp->dev->flags & IFF_ALLMULTI) ||
1539
            (hp->dev->mc_count > 64)) {
1540
                hme_write32(hp, bregs + BMAC_HTABLE0, 0xffff);
1541
                hme_write32(hp, bregs + BMAC_HTABLE1, 0xffff);
1542
                hme_write32(hp, bregs + BMAC_HTABLE2, 0xffff);
1543
                hme_write32(hp, bregs + BMAC_HTABLE3, 0xffff);
1544
        } else if ((hp->dev->flags & IFF_PROMISC) == 0) {
1545
                u16 hash_table[4];
1546
                struct dev_mc_list *dmi = hp->dev->mc_list;
1547
                char *addrs;
1548
                int i;
1549
                u32 crc;
1550
 
1551
                for (i = 0; i < 4; i++)
1552
                        hash_table[i] = 0;
1553
 
1554
                for (i = 0; i < hp->dev->mc_count; i++) {
1555
                        addrs = dmi->dmi_addr;
1556
                        dmi = dmi->next;
1557
 
1558
                        if (!(*addrs & 1))
1559
                                continue;
1560
 
1561
                        crc = ether_crc_le(6, addrs);
1562
                        crc >>= 26;
1563
                        hash_table[crc >> 4] |= 1 << (crc & 0xf);
1564
                }
1565
                hme_write32(hp, bregs + BMAC_HTABLE0, hash_table[0]);
1566
                hme_write32(hp, bregs + BMAC_HTABLE1, hash_table[1]);
1567
                hme_write32(hp, bregs + BMAC_HTABLE2, hash_table[2]);
1568
                hme_write32(hp, bregs + BMAC_HTABLE3, hash_table[3]);
1569
        } else {
1570
                hme_write32(hp, bregs + BMAC_HTABLE3, 0);
1571
                hme_write32(hp, bregs + BMAC_HTABLE2, 0);
1572
                hme_write32(hp, bregs + BMAC_HTABLE1, 0);
1573
                hme_write32(hp, bregs + BMAC_HTABLE0, 0);
1574
        }
1575
 
1576
        /* Set the RX and TX ring ptrs. */
1577
        HMD(("ring ptrs rxr[%08x] txr[%08x]\n",
1578
             ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_rxd, 0)),
1579
             ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_txd, 0))));
1580
        hme_write32(hp, erxregs + ERX_RING,
1581
                    ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_rxd, 0)));
1582
        hme_write32(hp, etxregs + ETX_RING,
1583
                    ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_txd, 0)));
1584
 
1585
        /* Parity issues in the ERX unit of some HME revisions can cause some
1586
         * registers to not be written unless their parity is even.  Detect such
1587
         * lost writes and simply rewrite with a low bit set (which will be ignored
1588
         * since the rxring needs to be 2K aligned).
1589
         */
1590
        if (hme_read32(hp, erxregs + ERX_RING) !=
1591
            ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_rxd, 0)))
1592
                hme_write32(hp, erxregs + ERX_RING,
1593
                            ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_rxd, 0))
1594
                            | 0x4);
1595
 
1596
        /* Set the supported burst sizes. */
1597
        HMD(("happy_meal_init: old[%08x] bursts<",
1598
             hme_read32(hp, gregs + GREG_CFG)));
1599
 
1600
#ifndef __sparc__
1601
        /* It is always PCI and can handle 64byte bursts. */
1602
        hme_write32(hp, gregs + GREG_CFG, GREG_CFG_BURST64);
1603
#else
1604
        if ((hp->happy_bursts & DMA_BURST64) &&
1605
            ((hp->happy_flags & HFLAG_PCI) != 0
1606
#ifdef CONFIG_SBUS
1607
             || sbus_can_burst64(hp->happy_dev)
1608
#endif
1609
             || 0)) {
1610
                u32 gcfg = GREG_CFG_BURST64;
1611
 
1612
                /* I have no idea if I should set the extended
1613
                 * transfer mode bit for Cheerio, so for now I
1614
                 * do not.  -DaveM
1615
                 */
1616
#ifdef CONFIG_SBUS
1617
                if ((hp->happy_flags & HFLAG_PCI) == 0 &&
1618
                    sbus_can_dma_64bit(hp->happy_dev)) {
1619
                        sbus_set_sbus64(hp->happy_dev,
1620
                                        hp->happy_bursts);
1621
                        gcfg |= GREG_CFG_64BIT;
1622
                }
1623
#endif
1624
 
1625
                HMD(("64>"));
1626
                hme_write32(hp, gregs + GREG_CFG, gcfg);
1627
        } else if (hp->happy_bursts & DMA_BURST32) {
1628
                HMD(("32>"));
1629
                hme_write32(hp, gregs + GREG_CFG, GREG_CFG_BURST32);
1630
        } else if (hp->happy_bursts & DMA_BURST16) {
1631
                HMD(("16>"));
1632
                hme_write32(hp, gregs + GREG_CFG, GREG_CFG_BURST16);
1633
        } else {
1634
                HMD(("XXX>"));
1635
                hme_write32(hp, gregs + GREG_CFG, 0);
1636
        }
1637
#endif /* __sparc__ */
1638
 
1639
        /* Turn off interrupts we do not want to hear. */
1640
        HMD((", enable global interrupts, "));
1641
        hme_write32(hp, gregs + GREG_IMASK,
1642
                    (GREG_IMASK_GOTFRAME | GREG_IMASK_RCNTEXP |
1643
                     GREG_IMASK_SENTFRAME | GREG_IMASK_TXPERR));
1644
 
1645
        /* Set the transmit ring buffer size. */
1646
        HMD(("tx rsize=%d oreg[%08x], ", (int)TX_RING_SIZE,
1647
             hme_read32(hp, etxregs + ETX_RSIZE)));
1648
        hme_write32(hp, etxregs + ETX_RSIZE, (TX_RING_SIZE >> ETX_RSIZE_SHIFT) - 1);
1649
 
1650
        /* Enable transmitter DVMA. */
1651
        HMD(("tx dma enable old[%08x], ",
1652
             hme_read32(hp, etxregs + ETX_CFG)));
1653
        hme_write32(hp, etxregs + ETX_CFG,
1654
                    hme_read32(hp, etxregs + ETX_CFG) | ETX_CFG_DMAENABLE);
1655
 
1656
        /* This chip really rots, for the receiver sometimes when you
1657
         * write to it's control registers not all the bits get there
1658
         * properly.  I cannot think of a sane way to provide complete
1659
         * coverage for this hardware bug yet.
1660
         */
1661
        HMD(("erx regs bug old[%08x]\n",
1662
             hme_read32(hp, erxregs + ERX_CFG)));
1663
        hme_write32(hp, erxregs + ERX_CFG, ERX_CFG_DEFAULT(RX_OFFSET));
1664
        regtmp = hme_read32(hp, erxregs + ERX_CFG);
1665
        hme_write32(hp, erxregs + ERX_CFG, ERX_CFG_DEFAULT(RX_OFFSET));
1666
        if (hme_read32(hp, erxregs + ERX_CFG) != ERX_CFG_DEFAULT(RX_OFFSET)) {
1667
                printk(KERN_ERR "happy meal: Eieee, rx config register gets greasy fries.\n");
1668
                printk(KERN_ERR "happy meal: Trying to set %08x, reread gives %08x\n",
1669
                       ERX_CFG_DEFAULT(RX_OFFSET), regtmp);
1670
                /* XXX Should return failure here... */
1671
        }
1672
 
1673
        /* Enable Big Mac hash table filter. */
1674
        HMD(("happy_meal_init: enable hash rx_cfg_old[%08x], ",
1675
             hme_read32(hp, bregs + BMAC_RXCFG)));
1676
        rxcfg = BIGMAC_RXCFG_HENABLE | BIGMAC_RXCFG_REJME;
1677
        if (hp->dev->flags & IFF_PROMISC)
1678
                rxcfg |= BIGMAC_RXCFG_PMISC;
1679
        hme_write32(hp, bregs + BMAC_RXCFG, rxcfg);
1680
 
1681
        /* Let the bits settle in the chip. */
1682
        udelay(10);
1683
 
1684
        /* Ok, configure the Big Mac transmitter. */
1685
        HMD(("BIGMAC init, "));
1686
        regtmp = 0;
1687
        if (hp->happy_flags & HFLAG_FULL)
1688
                regtmp |= BIGMAC_TXCFG_FULLDPLX;
1689
 
1690
        /* Don't turn on the "don't give up" bit for now.  It could cause hme
1691
         * to deadlock with the PHY if a Jabber occurs.
1692
         */
1693
        hme_write32(hp, bregs + BMAC_TXCFG, regtmp /*| BIGMAC_TXCFG_DGIVEUP*/);
1694
 
1695
        /* Give up after 16 TX attempts. */
1696
        hme_write32(hp, bregs + BMAC_ALIMIT, 16);
1697
 
1698
        /* Enable the output drivers no matter what. */
1699
        regtmp = BIGMAC_XCFG_ODENABLE;
1700
 
1701
        /* If card can do lance mode, enable it. */
1702
        if (hp->happy_flags & HFLAG_LANCE)
1703
                regtmp |= (DEFAULT_IPG0 << 5) | BIGMAC_XCFG_LANCE;
1704
 
1705
        /* Disable the MII buffers if using external transceiver. */
1706
        if (hp->tcvr_type == external)
1707
                regtmp |= BIGMAC_XCFG_MIIDISAB;
1708
 
1709
        HMD(("XIF config old[%08x], ",
1710
             hme_read32(hp, bregs + BMAC_XIFCFG)));
1711
        hme_write32(hp, bregs + BMAC_XIFCFG, regtmp);
1712
 
1713
        /* Start things up. */
1714
        HMD(("tx old[%08x] and rx [%08x] ON!\n",
1715
             hme_read32(hp, bregs + BMAC_TXCFG),
1716
             hme_read32(hp, bregs + BMAC_RXCFG)));
1717
        hme_write32(hp, bregs + BMAC_TXCFG,
1718
                    hme_read32(hp, bregs + BMAC_TXCFG) | BIGMAC_TXCFG_ENABLE);
1719
        hme_write32(hp, bregs + BMAC_RXCFG,
1720
                    hme_read32(hp, bregs + BMAC_RXCFG) | BIGMAC_RXCFG_ENABLE);
1721
 
1722
        /* Get the autonegotiation started, and the watch timer ticking. */
1723
        happy_meal_begin_auto_negotiation(hp, tregs, NULL);
1724
 
1725
        /* Success. */
1726
        return 0;
1727
}
1728
 
1729
/* hp->happy_lock must be held */
1730
static void happy_meal_set_initial_advertisement(struct happy_meal *hp)
1731
{
1732
        unsigned long tregs     = hp->tcvregs;
1733
        unsigned long bregs     = hp->bigmacregs;
1734
        unsigned long gregs     = hp->gregs;
1735
 
1736
        happy_meal_stop(hp, gregs);
1737
        hme_write32(hp, tregs + TCVR_IMASK, 0xffff);
1738
        if (hp->happy_flags & HFLAG_FENABLE)
1739
                hme_write32(hp, tregs + TCVR_CFG,
1740
                            hme_read32(hp, tregs + TCVR_CFG) & ~(TCV_CFG_BENABLE));
1741
        else
1742
                hme_write32(hp, tregs + TCVR_CFG,
1743
                            hme_read32(hp, tregs + TCVR_CFG) | TCV_CFG_BENABLE);
1744
        happy_meal_transceiver_check(hp, tregs);
1745
        switch(hp->tcvr_type) {
1746
        case none:
1747
                return;
1748
        case internal:
1749
                hme_write32(hp, bregs + BMAC_XIFCFG, 0);
1750
                break;
1751
        case external:
1752
                hme_write32(hp, bregs + BMAC_XIFCFG, BIGMAC_XCFG_MIIDISAB);
1753
                break;
1754
        };
1755
        if (happy_meal_tcvr_reset(hp, tregs))
1756
                return;
1757
 
1758
        /* Latch PHY registers as of now. */
1759
        hp->sw_bmsr      = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
1760
        hp->sw_advertise = happy_meal_tcvr_read(hp, tregs, MII_ADVERTISE);
1761
 
1762
        /* Advertise everything we can support. */
1763
        if (hp->sw_bmsr & BMSR_10HALF)
1764
                hp->sw_advertise |= (ADVERTISE_10HALF);
1765
        else
1766
                hp->sw_advertise &= ~(ADVERTISE_10HALF);
1767
 
1768
        if (hp->sw_bmsr & BMSR_10FULL)
1769
                hp->sw_advertise |= (ADVERTISE_10FULL);
1770
        else
1771
                hp->sw_advertise &= ~(ADVERTISE_10FULL);
1772
        if (hp->sw_bmsr & BMSR_100HALF)
1773
                hp->sw_advertise |= (ADVERTISE_100HALF);
1774
        else
1775
                hp->sw_advertise &= ~(ADVERTISE_100HALF);
1776
        if (hp->sw_bmsr & BMSR_100FULL)
1777
                hp->sw_advertise |= (ADVERTISE_100FULL);
1778
        else
1779
                hp->sw_advertise &= ~(ADVERTISE_100FULL);
1780
 
1781
        /* Update the PHY advertisement register. */
1782
        happy_meal_tcvr_write(hp, tregs, MII_ADVERTISE, hp->sw_advertise);
1783
}
1784
 
1785
/* Once status is latched (by happy_meal_interrupt) it is cleared by
1786
 * the hardware, so we cannot re-read it and get a correct value.
1787
 *
1788
 * hp->happy_lock must be held
1789
 */
1790
static int happy_meal_is_not_so_happy(struct happy_meal *hp, u32 status)
1791
{
1792
        int reset = 0;
1793
 
1794
        /* Only print messages for non-counter related interrupts. */
1795
        if (status & (GREG_STAT_STSTERR | GREG_STAT_TFIFO_UND |
1796
                      GREG_STAT_MAXPKTERR | GREG_STAT_RXERR |
1797
                      GREG_STAT_RXPERR | GREG_STAT_RXTERR | GREG_STAT_EOPERR |
1798
                      GREG_STAT_MIFIRQ | GREG_STAT_TXEACK | GREG_STAT_TXLERR |
1799
                      GREG_STAT_TXPERR | GREG_STAT_TXTERR | GREG_STAT_SLVERR |
1800
                      GREG_STAT_SLVPERR))
1801
                printk(KERN_ERR "%s: Error interrupt for happy meal, status = %08x\n",
1802
                       hp->dev->name, status);
1803
 
1804
        if (status & GREG_STAT_RFIFOVF) {
1805
                /* Receive FIFO overflow is harmless and the hardware will take
1806
                   care of it, just some packets are lost. Who cares. */
1807
                printk(KERN_DEBUG "%s: Happy Meal receive FIFO overflow.\n", hp->dev->name);
1808
        }
1809
 
1810
        if (status & GREG_STAT_STSTERR) {
1811
                /* BigMAC SQE link test failed. */
1812
                printk(KERN_ERR "%s: Happy Meal BigMAC SQE test failed.\n", hp->dev->name);
1813
                reset = 1;
1814
        }
1815
 
1816
        if (status & GREG_STAT_TFIFO_UND) {
1817
                /* Transmit FIFO underrun, again DMA error likely. */
1818
                printk(KERN_ERR "%s: Happy Meal transmitter FIFO underrun, DMA error.\n",
1819
                       hp->dev->name);
1820
                reset = 1;
1821
        }
1822
 
1823
        if (status & GREG_STAT_MAXPKTERR) {
1824
                /* Driver error, tried to transmit something larger
1825
                 * than ethernet max mtu.
1826
                 */
1827
                printk(KERN_ERR "%s: Happy Meal MAX Packet size error.\n", hp->dev->name);
1828
                reset = 1;
1829
        }
1830
 
1831
        if (status & GREG_STAT_NORXD) {
1832
                /* This is harmless, it just means the system is
1833
                 * quite loaded and the incoming packet rate was
1834
                 * faster than the interrupt handler could keep up
1835
                 * with.
1836
                 */
1837
                printk(KERN_INFO "%s: Happy Meal out of receive "
1838
                       "descriptors, packet dropped.\n",
1839
                       hp->dev->name);
1840
        }
1841
 
1842
        if (status & (GREG_STAT_RXERR|GREG_STAT_RXPERR|GREG_STAT_RXTERR)) {
1843
                /* All sorts of DMA receive errors. */
1844
                printk(KERN_ERR "%s: Happy Meal rx DMA errors [ ", hp->dev->name);
1845
                if (status & GREG_STAT_RXERR)
1846
                        printk("GenericError ");
1847
                if (status & GREG_STAT_RXPERR)
1848
                        printk("ParityError ");
1849
                if (status & GREG_STAT_RXTERR)
1850
                        printk("RxTagBotch ");
1851
                printk("]\n");
1852
                reset = 1;
1853
        }
1854
 
1855
        if (status & GREG_STAT_EOPERR) {
1856
                /* Driver bug, didn't set EOP bit in tx descriptor given
1857
                 * to the happy meal.
1858
                 */
1859
                printk(KERN_ERR "%s: EOP not set in happy meal transmit descriptor!\n",
1860
                       hp->dev->name);
1861
                reset = 1;
1862
        }
1863
 
1864
        if (status & GREG_STAT_MIFIRQ) {
1865
                /* MIF signalled an interrupt, were we polling it? */
1866
                printk(KERN_ERR "%s: Happy Meal MIF interrupt.\n", hp->dev->name);
1867
        }
1868
 
1869
        if (status &
1870
            (GREG_STAT_TXEACK|GREG_STAT_TXLERR|GREG_STAT_TXPERR|GREG_STAT_TXTERR)) {
1871
                /* All sorts of transmit DMA errors. */
1872
                printk(KERN_ERR "%s: Happy Meal tx DMA errors [ ", hp->dev->name);
1873
                if (status & GREG_STAT_TXEACK)
1874
                        printk("GenericError ");
1875
                if (status & GREG_STAT_TXLERR)
1876
                        printk("LateError ");
1877
                if (status & GREG_STAT_TXPERR)
1878
                        printk("ParityErro ");
1879
                if (status & GREG_STAT_TXTERR)
1880
                        printk("TagBotch ");
1881
                printk("]\n");
1882
                reset = 1;
1883
        }
1884
 
1885
        if (status & (GREG_STAT_SLVERR|GREG_STAT_SLVPERR)) {
1886
                /* Bus or parity error when cpu accessed happy meal registers
1887
                 * or it's internal FIFO's.  Should never see this.
1888
                 */
1889
                printk(KERN_ERR "%s: Happy Meal register access SBUS slave (%s) error.\n",
1890
                       hp->dev->name,
1891
                       (status & GREG_STAT_SLVPERR) ? "parity" : "generic");
1892
                reset = 1;
1893
        }
1894
 
1895
        if (reset) {
1896
                printk(KERN_NOTICE "%s: Resetting...\n", hp->dev->name);
1897
                happy_meal_init(hp);
1898
                return 1;
1899
        }
1900
        return 0;
1901
}
1902
 
1903
/* hp->happy_lock must be held */
1904
static void happy_meal_mif_interrupt(struct happy_meal *hp)
1905
{
1906
        unsigned long tregs = hp->tcvregs;
1907
 
1908
        printk(KERN_INFO "%s: Link status change.\n", hp->dev->name);
1909
        hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1910
        hp->sw_lpa = happy_meal_tcvr_read(hp, tregs, MII_LPA);
1911
 
1912
        /* Use the fastest transmission protocol possible. */
1913
        if (hp->sw_lpa & LPA_100FULL) {
1914
                printk(KERN_INFO "%s: Switching to 100Mbps at full duplex.", hp->dev->name);
1915
                hp->sw_bmcr |= (BMCR_FULLDPLX | BMCR_SPEED100);
1916
        } else if (hp->sw_lpa & LPA_100HALF) {
1917
                printk(KERN_INFO "%s: Switching to 100MBps at half duplex.", hp->dev->name);
1918
                hp->sw_bmcr |= BMCR_SPEED100;
1919
        } else if (hp->sw_lpa & LPA_10FULL) {
1920
                printk(KERN_INFO "%s: Switching to 10MBps at full duplex.", hp->dev->name);
1921
                hp->sw_bmcr |= BMCR_FULLDPLX;
1922
        } else {
1923
                printk(KERN_INFO "%s: Using 10Mbps at half duplex.", hp->dev->name);
1924
        }
1925
        happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1926
 
1927
        /* Finally stop polling and shut up the MIF. */
1928
        happy_meal_poll_stop(hp, tregs);
1929
}
1930
 
1931
#ifdef TXDEBUG
1932
#define TXD(x) printk x
1933
#else
1934
#define TXD(x)
1935
#endif
1936
 
1937
/* hp->happy_lock must be held */
1938
static void happy_meal_tx(struct happy_meal *hp)
1939
{
1940
        struct happy_meal_txd *txbase = &hp->happy_block->happy_meal_txd[0];
1941
        struct happy_meal_txd *this;
1942
        struct net_device *dev = hp->dev;
1943
        int elem;
1944
 
1945
        elem = hp->tx_old;
1946
        TXD(("TX<"));
1947
        while (elem != hp->tx_new) {
1948
                struct sk_buff *skb;
1949
                u32 flags, dma_addr, dma_len;
1950
                int frag;
1951
 
1952
                TXD(("[%d]", elem));
1953
                this = &txbase[elem];
1954
                flags = hme_read_desc32(hp, &this->tx_flags);
1955
                if (flags & TXFLAG_OWN)
1956
                        break;
1957
                skb = hp->tx_skbs[elem];
1958
                if (skb_shinfo(skb)->nr_frags) {
1959
                        int last;
1960
 
1961
                        last = elem + skb_shinfo(skb)->nr_frags;
1962
                        last &= (TX_RING_SIZE - 1);
1963
                        flags = hme_read_desc32(hp, &txbase[last].tx_flags);
1964
                        if (flags & TXFLAG_OWN)
1965
                                break;
1966
                }
1967
                hp->tx_skbs[elem] = NULL;
1968
                hp->net_stats.tx_bytes += skb->len;
1969
 
1970
                for (frag = 0; frag <= skb_shinfo(skb)->nr_frags; frag++) {
1971
                        dma_addr = hme_read_desc32(hp, &this->tx_addr);
1972
                        dma_len = hme_read_desc32(hp, &this->tx_flags);
1973
 
1974
                        dma_len &= TXFLAG_SIZE;
1975
                        hme_dma_unmap(hp, dma_addr, dma_len, DMA_TODEVICE);
1976
 
1977
                        elem = NEXT_TX(elem);
1978
                        this = &txbase[elem];
1979
                }
1980
 
1981
                dev_kfree_skb_irq(skb);
1982
                hp->net_stats.tx_packets++;
1983
        }
1984
        hp->tx_old = elem;
1985
        TXD((">"));
1986
 
1987
        if (netif_queue_stopped(dev) &&
1988
            TX_BUFFS_AVAIL(hp) > (MAX_SKB_FRAGS + 1))
1989
                netif_wake_queue(dev);
1990
}
1991
 
1992
#ifdef RXDEBUG
1993
#define RXD(x) printk x
1994
#else
1995
#define RXD(x)
1996
#endif
1997
 
1998
/* Originally I used to handle the allocation failure by just giving back just
1999
 * that one ring buffer to the happy meal.  Problem is that usually when that
2000
 * condition is triggered, the happy meal expects you to do something reasonable
2001
 * with all of the packets it has DMA'd in.  So now I just drop the entire
2002
 * ring when we cannot get a new skb and give them all back to the happy meal,
2003
 * maybe things will be "happier" now.
2004
 *
2005
 * hp->happy_lock must be held
2006
 */
2007
static void happy_meal_rx(struct happy_meal *hp, struct net_device *dev)
2008
{
2009
        struct happy_meal_rxd *rxbase = &hp->happy_block->happy_meal_rxd[0];
2010
        struct happy_meal_rxd *this;
2011
        int elem = hp->rx_new, drops = 0;
2012
        u32 flags;
2013
 
2014
        RXD(("RX<"));
2015
        this = &rxbase[elem];
2016
        while (!((flags = hme_read_desc32(hp, &this->rx_flags)) & RXFLAG_OWN)) {
2017
                struct sk_buff *skb;
2018
                int len = flags >> 16;
2019
                u16 csum = flags & RXFLAG_CSUM;
2020
                u32 dma_addr = hme_read_desc32(hp, &this->rx_addr);
2021
 
2022
                RXD(("[%d ", elem));
2023
 
2024
                /* Check for errors. */
2025
                if ((len < ETH_ZLEN) || (flags & RXFLAG_OVERFLOW)) {
2026
                        RXD(("ERR(%08x)]", flags));
2027
                        hp->net_stats.rx_errors++;
2028
                        if (len < ETH_ZLEN)
2029
                                hp->net_stats.rx_length_errors++;
2030
                        if (len & (RXFLAG_OVERFLOW >> 16)) {
2031
                                hp->net_stats.rx_over_errors++;
2032
                                hp->net_stats.rx_fifo_errors++;
2033
                        }
2034
 
2035
                        /* Return it to the Happy meal. */
2036
        drop_it:
2037
                        hp->net_stats.rx_dropped++;
2038
                        hme_write_rxd(hp, this,
2039
                                      (RXFLAG_OWN|((RX_BUF_ALLOC_SIZE-RX_OFFSET)<<16)),
2040
                                      dma_addr);
2041
                        goto next;
2042
                }
2043
                skb = hp->rx_skbs[elem];
2044
                if (len > RX_COPY_THRESHOLD) {
2045
                        struct sk_buff *new_skb;
2046
 
2047
                        /* Now refill the entry, if we can. */
2048
                        new_skb = happy_meal_alloc_skb(RX_BUF_ALLOC_SIZE, GFP_ATOMIC);
2049
                        if (new_skb == NULL) {
2050
                                drops++;
2051
                                goto drop_it;
2052
                        }
2053
                        hme_dma_unmap(hp, dma_addr, RX_BUF_ALLOC_SIZE, DMA_FROMDEVICE);
2054
                        hp->rx_skbs[elem] = new_skb;
2055
                        new_skb->dev = dev;
2056
                        skb_put(new_skb, (ETH_FRAME_LEN + RX_OFFSET));
2057
                        hme_write_rxd(hp, this,
2058
                                      (RXFLAG_OWN|((RX_BUF_ALLOC_SIZE-RX_OFFSET)<<16)),
2059
                                      hme_dma_map(hp, new_skb->data, RX_BUF_ALLOC_SIZE, DMA_FROMDEVICE));
2060
                        skb_reserve(new_skb, RX_OFFSET);
2061
 
2062
                        /* Trim the original skb for the netif. */
2063
                        skb_trim(skb, len);
2064
                } else {
2065
                        struct sk_buff *copy_skb = dev_alloc_skb(len + 2);
2066
 
2067
                        if (copy_skb == NULL) {
2068
                                drops++;
2069
                                goto drop_it;
2070
                        }
2071
 
2072
                        copy_skb->dev = dev;
2073
                        skb_reserve(copy_skb, 2);
2074
                        skb_put(copy_skb, len);
2075
                        hme_dma_sync(hp, dma_addr, len, DMA_FROMDEVICE);
2076
                        memcpy(copy_skb->data, skb->data, len);
2077
 
2078
                        /* Reuse original ring buffer. */
2079
                        hme_write_rxd(hp, this,
2080
                                      (RXFLAG_OWN|((RX_BUF_ALLOC_SIZE-RX_OFFSET)<<16)),
2081
                                      dma_addr);
2082
 
2083
                        skb = copy_skb;
2084
                }
2085
 
2086
                /* This card is _fucking_ hot... */
2087
                skb->csum = ntohs(csum ^ 0xffff);
2088
                skb->ip_summed = CHECKSUM_HW;
2089
 
2090
                RXD(("len=%d csum=%4x]", len, csum));
2091
                skb->protocol = eth_type_trans(skb, dev);
2092
                netif_rx(skb);
2093
 
2094
                dev->last_rx = jiffies;
2095
                hp->net_stats.rx_packets++;
2096
                hp->net_stats.rx_bytes += len;
2097
        next:
2098
                elem = NEXT_RX(elem);
2099
                this = &rxbase[elem];
2100
        }
2101
        hp->rx_new = elem;
2102
        if (drops)
2103
                printk(KERN_INFO "%s: Memory squeeze, deferring packet.\n", hp->dev->name);
2104
        RXD((">"));
2105
}
2106
 
2107
static void happy_meal_interrupt(int irq, void *dev_id, struct pt_regs *regs)
2108
{
2109
        struct net_device *dev = (struct net_device *) dev_id;
2110
        struct happy_meal *hp  = dev->priv;
2111
        u32 happy_status       = hme_read32(hp, hp->gregs + GREG_STAT);
2112
 
2113
        HMD(("happy_meal_interrupt: status=%08x ", happy_status));
2114
 
2115
        spin_lock(&hp->happy_lock);
2116
 
2117
        if (happy_status & GREG_STAT_ERRORS) {
2118
                HMD(("ERRORS "));
2119
                if (happy_meal_is_not_so_happy(hp, /* un- */ happy_status))
2120
                        goto out;
2121
        }
2122
 
2123
        if (happy_status & GREG_STAT_MIFIRQ) {
2124
                HMD(("MIFIRQ "));
2125
                happy_meal_mif_interrupt(hp);
2126
        }
2127
 
2128
        if (happy_status & GREG_STAT_TXALL) {
2129
                HMD(("TXALL "));
2130
                happy_meal_tx(hp);
2131
        }
2132
 
2133
        if (happy_status & GREG_STAT_RXTOHOST) {
2134
                HMD(("RXTOHOST "));
2135
                happy_meal_rx(hp, dev);
2136
        }
2137
 
2138
        HMD(("done\n"));
2139
out:
2140
        spin_unlock(&hp->happy_lock);
2141
}
2142
 
2143
#ifdef CONFIG_SBUS
2144
static void quattro_sbus_interrupt(int irq, void *cookie, struct pt_regs *ptregs)
2145
{
2146
        struct quattro *qp = (struct quattro *) cookie;
2147
        int i;
2148
 
2149
        for (i = 0; i < 4; i++) {
2150
                struct net_device *dev = qp->happy_meals[i];
2151
                struct happy_meal *hp  = dev->priv;
2152
                u32 happy_status       = hme_read32(hp, hp->gregs + GREG_STAT);
2153
 
2154
                HMD(("quattro_interrupt: status=%08x ", happy_status));
2155
 
2156
                if (!(happy_status & (GREG_STAT_ERRORS |
2157
                                      GREG_STAT_MIFIRQ |
2158
                                      GREG_STAT_TXALL |
2159
                                      GREG_STAT_RXTOHOST)))
2160
                        continue;
2161
 
2162
                spin_lock(&hp->happy_lock);
2163
 
2164
                if (happy_status & GREG_STAT_ERRORS) {
2165
                        HMD(("ERRORS "));
2166
                        if (happy_meal_is_not_so_happy(hp, happy_status))
2167
                                goto next;
2168
                }
2169
 
2170
                if (happy_status & GREG_STAT_MIFIRQ) {
2171
                        HMD(("MIFIRQ "));
2172
                        happy_meal_mif_interrupt(hp);
2173
                }
2174
 
2175
                if (happy_status & GREG_STAT_TXALL) {
2176
                        HMD(("TXALL "));
2177
                        happy_meal_tx(hp);
2178
                }
2179
 
2180
                if (happy_status & GREG_STAT_RXTOHOST) {
2181
                        HMD(("RXTOHOST "));
2182
                        happy_meal_rx(hp, dev);
2183
                }
2184
 
2185
        next:
2186
                spin_unlock(&hp->happy_lock);
2187
        }
2188
        HMD(("done\n"));
2189
}
2190
#endif
2191
 
2192
static int happy_meal_open(struct net_device *dev)
2193
{
2194
        struct happy_meal *hp = dev->priv;
2195
        int res;
2196
 
2197
        HMD(("happy_meal_open: "));
2198
 
2199
        /* On SBUS Quattro QFE cards, all hme interrupts are concentrated
2200
         * into a single source which we register handling at probe time.
2201
         */
2202
        if ((hp->happy_flags & (HFLAG_QUATTRO|HFLAG_PCI)) != HFLAG_QUATTRO) {
2203
                if (request_irq(dev->irq, &happy_meal_interrupt,
2204
                                SA_SHIRQ, dev->name, (void *)dev)) {
2205
                        HMD(("EAGAIN\n"));
2206
#ifdef __sparc__
2207
                        printk(KERN_ERR "happy_meal(SBUS): Can't order irq %s to go.\n",
2208
                               __irq_itoa(dev->irq));
2209
#else
2210
                        printk(KERN_ERR "happy_meal(SBUS): Can't order irq %d to go.\n",
2211
                               dev->irq);
2212
#endif
2213
 
2214
                        return -EAGAIN;
2215
                }
2216
        }
2217
 
2218
        HMD(("to happy_meal_init\n"));
2219
 
2220
        spin_lock_irq(&hp->happy_lock);
2221
        res = happy_meal_init(hp);
2222
        spin_unlock_irq(&hp->happy_lock);
2223
 
2224
        if (res && ((hp->happy_flags & (HFLAG_QUATTRO|HFLAG_PCI)) != HFLAG_QUATTRO))
2225
                free_irq(dev->irq, dev);
2226
        return res;
2227
}
2228
 
2229
static int happy_meal_close(struct net_device *dev)
2230
{
2231
        struct happy_meal *hp = dev->priv;
2232
 
2233
        spin_lock_irq(&hp->happy_lock);
2234
        happy_meal_stop(hp, hp->gregs);
2235
        happy_meal_clean_rings(hp);
2236
 
2237
        /* If auto-negotiation timer is running, kill it. */
2238
        del_timer(&hp->happy_timer);
2239
 
2240
        spin_unlock_irq(&hp->happy_lock);
2241
 
2242
        /* On Quattro QFE cards, all hme interrupts are concentrated
2243
         * into a single source which we register handling at probe
2244
         * time and never unregister.
2245
         */
2246
        if ((hp->happy_flags & (HFLAG_QUATTRO|HFLAG_PCI)) != HFLAG_QUATTRO)
2247
                free_irq(dev->irq, dev);
2248
 
2249
        return 0;
2250
}
2251
 
2252
#ifdef SXDEBUG
2253
#define SXD(x) printk x
2254
#else
2255
#define SXD(x)
2256
#endif
2257
 
2258
static void happy_meal_tx_timeout(struct net_device *dev)
2259
{
2260
        struct happy_meal *hp = dev->priv;
2261
 
2262
        printk (KERN_ERR "%s: transmit timed out, resetting\n", dev->name);
2263
        tx_dump_log();
2264
        printk (KERN_ERR "%s: Happy Status %08x TX[%08x:%08x]\n", dev->name,
2265
                hme_read32(hp, hp->gregs + GREG_STAT),
2266
                hme_read32(hp, hp->etxregs + ETX_CFG),
2267
                hme_read32(hp, hp->bigmacregs + BMAC_TXCFG));
2268
 
2269
        spin_lock_irq(&hp->happy_lock);
2270
        happy_meal_init(hp);
2271
        spin_unlock_irq(&hp->happy_lock);
2272
 
2273
        netif_wake_queue(dev);
2274
}
2275
 
2276
static int happy_meal_start_xmit(struct sk_buff *skb, struct net_device *dev)
2277
{
2278
        struct happy_meal *hp = dev->priv;
2279
        int entry;
2280
        u32 tx_flags;
2281
 
2282
        tx_flags = TXFLAG_OWN;
2283
        if (skb->ip_summed == CHECKSUM_HW) {
2284
                u32 csum_start_off, csum_stuff_off;
2285
 
2286
                csum_start_off = (u32) (skb->h.raw - skb->data);
2287
                csum_stuff_off = (u32) ((skb->h.raw + skb->csum) - skb->data);
2288
 
2289
                tx_flags = (TXFLAG_OWN | TXFLAG_CSENABLE |
2290
                            ((csum_start_off << 14) & TXFLAG_CSBUFBEGIN) |
2291
                            ((csum_stuff_off << 20) & TXFLAG_CSLOCATION));
2292
        }
2293
 
2294
        spin_lock_irq(&hp->happy_lock);
2295
 
2296
        if (TX_BUFFS_AVAIL(hp) <= (skb_shinfo(skb)->nr_frags + 1)) {
2297
                netif_stop_queue(dev);
2298
                spin_unlock_irq(&hp->happy_lock);
2299
                printk(KERN_ERR "%s: BUG! Tx Ring full when queue awake!\n",
2300
                       dev->name);
2301
                return 1;
2302
        }
2303
 
2304
        entry = hp->tx_new;
2305
        SXD(("SX<l[%d]e[%d]>", len, entry));
2306
        hp->tx_skbs[entry] = skb;
2307
 
2308
        if (skb_shinfo(skb)->nr_frags == 0) {
2309
                u32 mapping, len;
2310
 
2311
                len = skb->len;
2312
                mapping = hme_dma_map(hp, skb->data, len, DMA_TODEVICE);
2313
                tx_flags |= (TXFLAG_SOP | TXFLAG_EOP);
2314
                hme_write_txd(hp, &hp->happy_block->happy_meal_txd[entry],
2315
                              (tx_flags | (len & TXFLAG_SIZE)),
2316
                              mapping);
2317
                entry = NEXT_TX(entry);
2318
        } else {
2319
                u32 first_len, first_mapping;
2320
                int frag, first_entry = entry;
2321
 
2322
                /* We must give this initial chunk to the device last.
2323
                 * Otherwise we could race with the device.
2324
                 */
2325
                first_len = skb->len - skb->data_len;
2326
                first_mapping = hme_dma_map(hp, skb->data, first_len, DMA_TODEVICE);
2327
                entry = NEXT_TX(entry);
2328
 
2329
                for (frag = 0; frag < skb_shinfo(skb)->nr_frags; frag++) {
2330
                        skb_frag_t *this_frag = &skb_shinfo(skb)->frags[frag];
2331
                        u32 len, mapping, this_txflags;
2332
 
2333
                        len = this_frag->size;
2334
                        mapping = hme_dma_map(hp,
2335
                                              ((void *) page_address(this_frag->page) +
2336
                                               this_frag->page_offset),
2337
                                              len, DMA_TODEVICE);
2338
                        this_txflags = tx_flags;
2339
                        if (frag == skb_shinfo(skb)->nr_frags - 1)
2340
                                this_txflags |= TXFLAG_EOP;
2341
                        hme_write_txd(hp, &hp->happy_block->happy_meal_txd[entry],
2342
                                      (this_txflags | (len & TXFLAG_SIZE)),
2343
                                      mapping);
2344
                        entry = NEXT_TX(entry);
2345
                }
2346
                hme_write_txd(hp, &hp->happy_block->happy_meal_txd[first_entry],
2347
                              (tx_flags | TXFLAG_SOP | (first_len & TXFLAG_SIZE)),
2348
                              first_mapping);
2349
        }
2350
 
2351
        hp->tx_new = entry;
2352
 
2353
        if (TX_BUFFS_AVAIL(hp) <= (MAX_SKB_FRAGS + 1))
2354
                netif_stop_queue(dev);
2355
 
2356
        /* Get it going. */
2357
        hme_write32(hp, hp->etxregs + ETX_PENDING, ETX_TP_DMAWAKEUP);
2358
 
2359
        spin_unlock_irq(&hp->happy_lock);
2360
 
2361
        dev->trans_start = jiffies;
2362
 
2363
        tx_add_log(hp, TXLOG_ACTION_TXMIT, 0);
2364
        return 0;
2365
}
2366
 
2367
static struct net_device_stats *happy_meal_get_stats(struct net_device *dev)
2368
{
2369
        struct happy_meal *hp = dev->priv;
2370
 
2371
        spin_lock_irq(&hp->happy_lock);
2372
        happy_meal_get_counters(hp, hp->bigmacregs);
2373
        spin_unlock_irq(&hp->happy_lock);
2374
 
2375
        return &hp->net_stats;
2376
}
2377
 
2378
static void happy_meal_set_multicast(struct net_device *dev)
2379
{
2380
        struct happy_meal *hp = dev->priv;
2381
        unsigned long bregs = hp->bigmacregs;
2382
        struct dev_mc_list *dmi = dev->mc_list;
2383
        char *addrs;
2384
        int i;
2385
        u32 crc;
2386
 
2387
        spin_lock_irq(&hp->happy_lock);
2388
 
2389
        netif_stop_queue(dev);
2390
 
2391
        if ((dev->flags & IFF_ALLMULTI) || (dev->mc_count > 64)) {
2392
                hme_write32(hp, bregs + BMAC_HTABLE0, 0xffff);
2393
                hme_write32(hp, bregs + BMAC_HTABLE1, 0xffff);
2394
                hme_write32(hp, bregs + BMAC_HTABLE2, 0xffff);
2395
                hme_write32(hp, bregs + BMAC_HTABLE3, 0xffff);
2396
        } else if (dev->flags & IFF_PROMISC) {
2397
                hme_write32(hp, bregs + BMAC_RXCFG,
2398
                            hme_read32(hp, bregs + BMAC_RXCFG) | BIGMAC_RXCFG_PMISC);
2399
        } else {
2400
                u16 hash_table[4];
2401
 
2402
                for (i = 0; i < 4; i++)
2403
                        hash_table[i] = 0;
2404
 
2405
                for (i = 0; i < dev->mc_count; i++) {
2406
                        addrs = dmi->dmi_addr;
2407
                        dmi = dmi->next;
2408
 
2409
                        if (!(*addrs & 1))
2410
                                continue;
2411
 
2412
                        crc = ether_crc_le(6, addrs);
2413
                        crc >>= 26;
2414
                        hash_table[crc >> 4] |= 1 << (crc & 0xf);
2415
                }
2416
                hme_write32(hp, bregs + BMAC_HTABLE0, hash_table[0]);
2417
                hme_write32(hp, bregs + BMAC_HTABLE1, hash_table[1]);
2418
                hme_write32(hp, bregs + BMAC_HTABLE2, hash_table[2]);
2419
                hme_write32(hp, bregs + BMAC_HTABLE3, hash_table[3]);
2420
        }
2421
 
2422
        netif_wake_queue(dev);
2423
 
2424
        spin_unlock_irq(&hp->happy_lock);
2425
}
2426
 
2427
/* Ethtool support... */
2428
static int happy_meal_ioctl(struct net_device *dev,
2429
                            struct ifreq *rq, int cmd)
2430
{
2431
        struct happy_meal *hp = dev->priv;
2432
        struct ethtool_cmd *ep_user = (struct ethtool_cmd *) rq->ifr_data;
2433
        struct ethtool_cmd ecmd;
2434
 
2435
        if (cmd != SIOCETHTOOL)
2436
                return -EOPNOTSUPP;
2437
        if (copy_from_user(&ecmd, ep_user, sizeof(ecmd)))
2438
                return -EFAULT;
2439
 
2440
        if (ecmd.cmd == ETHTOOL_GSET) {
2441
                ecmd.supported =
2442
                        (SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
2443
                         SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |
2444
                         SUPPORTED_Autoneg | SUPPORTED_TP | SUPPORTED_MII);
2445
 
2446
                /* XXX hardcoded stuff for now */
2447
                ecmd.port = PORT_TP; /* XXX no MII support */
2448
                ecmd.transceiver = XCVR_INTERNAL; /* XXX no external xcvr support */
2449
                ecmd.phy_address = 0; /* XXX fixed PHYAD */
2450
 
2451
                /* Record PHY settings. */
2452
                spin_lock_irq(&hp->happy_lock);
2453
                hp->sw_bmcr = happy_meal_tcvr_read(hp, hp->tcvregs, MII_BMCR);
2454
                hp->sw_lpa = happy_meal_tcvr_read(hp, hp->tcvregs, MII_LPA);
2455
                spin_unlock_irq(&hp->happy_lock);
2456
 
2457
                if (hp->sw_bmcr & BMCR_ANENABLE) {
2458
                        ecmd.autoneg = AUTONEG_ENABLE;
2459
                        ecmd.speed =
2460
                                (hp->sw_lpa & (LPA_100HALF | LPA_100FULL)) ?
2461
                                SPEED_100 : SPEED_10;
2462
                        if (ecmd.speed == SPEED_100)
2463
                                ecmd.duplex =
2464
                                        (hp->sw_lpa & (LPA_100FULL)) ?
2465
                                        DUPLEX_FULL : DUPLEX_HALF;
2466
                        else
2467
                                ecmd.duplex =
2468
                                        (hp->sw_lpa & (LPA_10FULL)) ?
2469
                                        DUPLEX_FULL : DUPLEX_HALF;
2470
                } else {
2471
                        ecmd.autoneg = AUTONEG_DISABLE;
2472
                        ecmd.speed =
2473
                                (hp->sw_bmcr & BMCR_SPEED100) ?
2474
                                SPEED_100 : SPEED_10;
2475
                        ecmd.duplex =
2476
                                (hp->sw_bmcr & BMCR_FULLDPLX) ?
2477
                                DUPLEX_FULL : DUPLEX_HALF;
2478
                }
2479
                if (copy_to_user(ep_user, &ecmd, sizeof(ecmd)))
2480
                        return -EFAULT;
2481
                return 0;
2482
        } else if (ecmd.cmd == ETHTOOL_SSET) {
2483
                /* Verify the settings we care about. */
2484
                if (ecmd.autoneg != AUTONEG_ENABLE &&
2485
                    ecmd.autoneg != AUTONEG_DISABLE)
2486
                        return -EINVAL;
2487
                if (ecmd.autoneg == AUTONEG_DISABLE &&
2488
                    ((ecmd.speed != SPEED_100 &&
2489
                      ecmd.speed != SPEED_10) ||
2490
                     (ecmd.duplex != DUPLEX_HALF &&
2491
                      ecmd.duplex != DUPLEX_FULL)))
2492
                        return -EINVAL;
2493
 
2494
                /* Ok, do it to it. */
2495
                spin_lock_irq(&hp->happy_lock);
2496
                del_timer(&hp->happy_timer);
2497
                happy_meal_begin_auto_negotiation(hp,
2498
                                                  hp->tcvregs,
2499
                                                  &ecmd);
2500
                spin_unlock_irq(&hp->happy_lock);
2501
 
2502
                return 0;
2503
        } else
2504
                return -EOPNOTSUPP;
2505
}
2506
 
2507
static int hme_version_printed;
2508
 
2509
#ifdef CONFIG_SBUS
2510
void __init quattro_get_ranges(struct quattro *qp)
2511
{
2512
        struct sbus_dev *sdev = qp->quattro_dev;
2513
        int err;
2514
 
2515
        err = prom_getproperty(sdev->prom_node,
2516
                               "ranges",
2517
                               (char *)&qp->ranges[0],
2518
                               sizeof(qp->ranges));
2519
        if (err == 0 || err == -1) {
2520
                qp->nranges = 0;
2521
                return;
2522
        }
2523
        qp->nranges = (err / sizeof(struct linux_prom_ranges));
2524
}
2525
 
2526
static void __init quattro_apply_ranges(struct quattro *qp, struct happy_meal *hp)
2527
{
2528
        struct sbus_dev *sdev = hp->happy_dev;
2529
        int rng;
2530
 
2531
        for (rng = 0; rng < qp->nranges; rng++) {
2532
                struct linux_prom_ranges *rngp = &qp->ranges[rng];
2533
                int reg;
2534
 
2535
                for (reg = 0; reg < 5; reg++) {
2536
                        if (sdev->reg_addrs[reg].which_io ==
2537
                            rngp->ot_child_space)
2538
                                break;
2539
                }
2540
                if (reg == 5)
2541
                        continue;
2542
 
2543
                sdev->reg_addrs[reg].which_io = rngp->ot_parent_space;
2544
                sdev->reg_addrs[reg].phys_addr += rngp->ot_parent_base;
2545
        }
2546
}
2547
 
2548
/* Given a happy meal sbus device, find it's quattro parent.
2549
 * If none exist, allocate and return a new one.
2550
 *
2551
 * Return NULL on failure.
2552
 */
2553
static struct quattro * __init quattro_sbus_find(struct sbus_dev *goal_sdev)
2554
{
2555
        struct sbus_bus *sbus;
2556
        struct sbus_dev *sdev;
2557
        struct quattro *qp;
2558
        int i;
2559
 
2560
        if (qfe_sbus_list == NULL)
2561
                goto found;
2562
 
2563
        for (qp = qfe_sbus_list; qp != NULL; qp = qp->next) {
2564
                for (i = 0, sdev = qp->quattro_dev;
2565
                     (sdev != NULL) && (i < 4);
2566
                     sdev = sdev->next, i++) {
2567
                        if (sdev == goal_sdev)
2568
                                return qp;
2569
                }
2570
        }
2571
        for_each_sbus(sbus) {
2572
                for_each_sbusdev(sdev, sbus) {
2573
                        if (sdev == goal_sdev)
2574
                                goto found;
2575
                }
2576
        }
2577
 
2578
        /* Cannot find quattro parent, fail. */
2579
        return NULL;
2580
 
2581
found:
2582
        qp = kmalloc(sizeof(struct quattro), GFP_KERNEL);
2583
        if (qp != NULL) {
2584
                int i;
2585
 
2586
                for (i = 0; i < 4; i++)
2587
                        qp->happy_meals[i] = NULL;
2588
 
2589
                qp->quattro_dev = goal_sdev;
2590
                qp->next = qfe_sbus_list;
2591
                qfe_sbus_list = qp;
2592
                quattro_get_ranges(qp);
2593
        }
2594
        return qp;
2595
}
2596
 
2597
/* After all quattro cards have been probed, we call these functions
2598
 * to register the IRQ handlers.
2599
 */
2600
static void __init quattro_sbus_register_irqs(void)
2601
{
2602
        struct quattro *qp;
2603
 
2604
        for (qp = qfe_sbus_list; qp != NULL; qp = qp->next) {
2605
                struct sbus_dev *sdev = qp->quattro_dev;
2606
                int err;
2607
 
2608
                err = request_irq(sdev->irqs[0],
2609
                                  quattro_sbus_interrupt,
2610
                                  SA_SHIRQ, "Quattro",
2611
                                  qp);
2612
                if (err != 0) {
2613
                        printk(KERN_ERR "Quattro: Fatal IRQ registery error %d.\n", err);
2614
                        panic("QFE request irq");
2615
                }
2616
        }
2617
}
2618
#endif /* CONFIG_SBUS */
2619
 
2620
#ifdef CONFIG_PCI
2621
static struct quattro * __init quattro_pci_find(struct pci_dev *pdev)
2622
{
2623
        struct pci_dev *bdev = pdev->bus->self;
2624
        struct quattro *qp;
2625
 
2626
        if (!bdev) return NULL;
2627
        for (qp = qfe_pci_list; qp != NULL; qp = qp->next) {
2628
                struct pci_dev *qpdev = qp->quattro_dev;
2629
 
2630
                if (qpdev == bdev)
2631
                        return qp;
2632
        }
2633
        qp = kmalloc(sizeof(struct quattro), GFP_KERNEL);
2634
        if (qp != NULL) {
2635
                int i;
2636
 
2637
                for (i = 0; i < 4; i++)
2638
                        qp->happy_meals[i] = NULL;
2639
 
2640
                qp->quattro_dev = bdev;
2641
                qp->next = qfe_pci_list;
2642
                qfe_pci_list = qp;
2643
 
2644
                /* No range tricks necessary on PCI. */
2645
                qp->nranges = 0;
2646
        }
2647
        return qp;
2648
}
2649
#endif /* CONFIG_PCI */
2650
 
2651
#ifdef CONFIG_SBUS
2652
static int __init happy_meal_sbus_init(struct sbus_dev *sdev, int is_qfe)
2653
{
2654
        struct quattro *qp = NULL;
2655
        struct happy_meal *hp;
2656
        struct net_device *dev;
2657
        int i, qfe_slot = -1;
2658
        int err = -ENODEV;
2659
 
2660
        if (is_qfe) {
2661
                qp = quattro_sbus_find(sdev);
2662
                if (qp == NULL)
2663
                        goto err_out;
2664
                for (qfe_slot = 0; qfe_slot < 4; qfe_slot++)
2665
                        if (qp->happy_meals[qfe_slot] == NULL)
2666
                                break;
2667
                if (qfe_slot == 4)
2668
                        goto err_out;
2669
        }
2670
 
2671
        err = -ENOMEM;
2672
        dev = alloc_etherdev(sizeof(struct happy_meal));
2673
        if (!dev)
2674
                goto err_out;
2675
        SET_MODULE_OWNER(dev);
2676
 
2677
        if (hme_version_printed++ == 0)
2678
                printk(KERN_INFO "%s", version);
2679
 
2680
        /* If user did not specify a MAC address specifically, use
2681
         * the Quattro local-mac-address property...
2682
         */
2683
        for (i = 0; i < 6; i++) {
2684
                if (macaddr[i] != 0)
2685
                        break;
2686
        }
2687
        if (i < 6) { /* a mac address was given */
2688
                for (i = 0; i < 6; i++)
2689
                        dev->dev_addr[i] = macaddr[i];
2690
                macaddr[5]++;
2691
        } else if (qfe_slot != -1 &&
2692
                   prom_getproplen(sdev->prom_node,
2693
                                   "local-mac-address") == 6) {
2694
                prom_getproperty(sdev->prom_node, "local-mac-address",
2695
                                 dev->dev_addr, 6);
2696
        } else {
2697
                memcpy(dev->dev_addr, idprom->id_ethaddr, 6);
2698
        }
2699
 
2700
        hp = dev->priv;
2701
 
2702
        hp->happy_dev = sdev;
2703
 
2704
        spin_lock_init(&hp->happy_lock);
2705
 
2706
        err = -ENODEV;
2707
        if (sdev->num_registers != 5) {
2708
                printk(KERN_ERR "happymeal: Device does not have 5 regs, it has %d.\n",
2709
                       sdev->num_registers);
2710
                printk(KERN_ERR "happymeal: Would you like that for here or to go?\n");
2711
                goto err_out_free_netdev;
2712
        }
2713
 
2714
        if (qp != NULL) {
2715
                hp->qfe_parent = qp;
2716
                hp->qfe_ent = qfe_slot;
2717
                qp->happy_meals[qfe_slot] = dev;
2718
                quattro_apply_ranges(qp, hp);
2719
        }
2720
 
2721
        hp->gregs = sbus_ioremap(&sdev->resource[0], 0,
2722
                                 GREG_REG_SIZE, "HME Global Regs");
2723
        if (!hp->gregs) {
2724
                printk(KERN_ERR "happymeal: Cannot map Happy Meal global registers.\n");
2725
                goto err_out_free_netdev;
2726
        }
2727
 
2728
        hp->etxregs = sbus_ioremap(&sdev->resource[1], 0,
2729
                                   ETX_REG_SIZE, "HME TX Regs");
2730
        if (!hp->etxregs) {
2731
                printk(KERN_ERR "happymeal: Cannot map Happy Meal MAC Transmit registers.\n");
2732
                goto err_out_iounmap;
2733
        }
2734
 
2735
        hp->erxregs = sbus_ioremap(&sdev->resource[2], 0,
2736
                                   ERX_REG_SIZE, "HME RX Regs");
2737
        if (!hp->erxregs) {
2738
                printk(KERN_ERR "happymeal: Cannot map Happy Meal MAC Receive registers.\n");
2739
                goto err_out_iounmap;
2740
        }
2741
 
2742
        hp->bigmacregs = sbus_ioremap(&sdev->resource[3], 0,
2743
                                      BMAC_REG_SIZE, "HME BIGMAC Regs");
2744
        if (!hp->bigmacregs) {
2745
                printk(KERN_ERR "happymeal: Cannot map Happy Meal BIGMAC registers.\n");
2746
                goto err_out_iounmap;
2747
        }
2748
 
2749
        hp->tcvregs = sbus_ioremap(&sdev->resource[4], 0,
2750
                                   TCVR_REG_SIZE, "HME Tranceiver Regs");
2751
        if (!hp->tcvregs) {
2752
                printk(KERN_ERR "happymeal: Cannot map Happy Meal Tranceiver registers.\n");
2753
                goto err_out_iounmap;
2754
        }
2755
 
2756
        hp->hm_revision = prom_getintdefault(sdev->prom_node, "hm-rev", 0xff);
2757
        if (hp->hm_revision == 0xff)
2758
                hp->hm_revision = 0xa0;
2759
 
2760
        /* Now enable the feature flags we can. */
2761
        if (hp->hm_revision == 0x20 || hp->hm_revision == 0x21)
2762
                hp->happy_flags = HFLAG_20_21;
2763
        else if (hp->hm_revision != 0xa0)
2764
                hp->happy_flags = HFLAG_NOT_A0;
2765
 
2766
        if (qp != NULL)
2767
                hp->happy_flags |= HFLAG_QUATTRO;
2768
 
2769
        /* Get the supported DVMA burst sizes from our Happy SBUS. */
2770
        hp->happy_bursts = prom_getintdefault(sdev->bus->prom_node,
2771
                                              "burst-sizes", 0x00);
2772
 
2773
        hp->happy_block = sbus_alloc_consistent(hp->happy_dev,
2774
                                                PAGE_SIZE,
2775
                                                &hp->hblock_dvma);
2776
        err = -ENOMEM;
2777
        if (!hp->happy_block) {
2778
                printk(KERN_ERR "happymeal: Cannot allocate descriptors.\n");
2779
                goto err_out_iounmap;
2780
        }
2781
 
2782
        /* Force check of the link first time we are brought up. */
2783
        hp->linkcheck = 0;
2784
 
2785
        /* Force timer state to 'asleep' with count of zero. */
2786
        hp->timer_state = asleep;
2787
        hp->timer_ticks = 0;
2788
 
2789
        init_timer(&hp->happy_timer);
2790
 
2791
        hp->dev = dev;
2792
        dev->open = &happy_meal_open;
2793
        dev->stop = &happy_meal_close;
2794
        dev->hard_start_xmit = &happy_meal_start_xmit;
2795
        dev->get_stats = &happy_meal_get_stats;
2796
        dev->set_multicast_list = &happy_meal_set_multicast;
2797
        dev->tx_timeout = &happy_meal_tx_timeout;
2798
        dev->watchdog_timeo = 5*HZ;
2799
        dev->do_ioctl = &happy_meal_ioctl;
2800
 
2801
        /* Happy Meal can do it all... except VLAN. */
2802
        dev->features |= NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_VLAN_CHALLENGED;
2803
 
2804
        dev->irq = sdev->irqs[0];
2805
 
2806
#if defined(CONFIG_SBUS) && defined(CONFIG_PCI)
2807
        /* Hook up PCI register/dma accessors. */
2808
        hp->read_desc32 = sbus_hme_read_desc32;
2809
        hp->write_txd = sbus_hme_write_txd;
2810
        hp->write_rxd = sbus_hme_write_rxd;
2811
        hp->dma_map = (u32 (*)(void *, void *, long, int))sbus_map_single;
2812
        hp->dma_unmap = (void (*)(void *, u32, long, int))sbus_unmap_single;
2813
        hp->dma_sync = (void (*)(void *, u32, long, int))sbus_dma_sync_single;
2814
        hp->read32 = sbus_hme_read32;
2815
        hp->write32 = sbus_hme_write32;
2816
#endif
2817
 
2818
        /* Grrr, Happy Meal comes up by default not advertising
2819
         * full duplex 100baseT capabilities, fix this.
2820
         */
2821
        spin_lock_irq(&hp->happy_lock);
2822
        happy_meal_set_initial_advertisement(hp);
2823
        spin_unlock_irq(&hp->happy_lock);
2824
 
2825
        if (register_netdev(hp->dev)) {
2826
                printk(KERN_ERR "happymeal: Cannot register net device, "
2827
                       "aborting.\n");
2828
                goto err_out_free_consistent;
2829
        }
2830
 
2831
        if (qfe_slot != -1)
2832
                printk(KERN_INFO "%s: Quattro HME slot %d (SBUS) 10/100baseT Ethernet ",
2833
                       dev->name, qfe_slot);
2834
        else
2835
                printk(KERN_INFO "%s: HAPPY MEAL (SBUS) 10/100baseT Ethernet ",
2836
                       dev->name);
2837
 
2838
        for (i = 0; i < 6; i++)
2839
                printk("%2.2x%c",
2840
                       dev->dev_addr[i], i == 5 ? ' ' : ':');
2841
        printk("\n");
2842
 
2843
        /* We are home free at this point, link us in to the happy
2844
         * device list.
2845
         */
2846
        hp->next_module = root_happy_dev;
2847
        root_happy_dev = hp;
2848
 
2849
        return 0;
2850
 
2851
err_out_free_consistent:
2852
        sbus_free_consistent(hp->happy_dev,
2853
                             PAGE_SIZE,
2854
                             hp->happy_block,
2855
                             hp->hblock_dvma);
2856
 
2857
err_out_iounmap:
2858
        if (hp->gregs)
2859
                sbus_iounmap(hp->gregs, GREG_REG_SIZE);
2860
        if (hp->etxregs)
2861
                sbus_iounmap(hp->etxregs, ETX_REG_SIZE);
2862
        if (hp->erxregs)
2863
                sbus_iounmap(hp->erxregs, ERX_REG_SIZE);
2864
        if (hp->bigmacregs)
2865
                sbus_iounmap(hp->bigmacregs, BMAC_REG_SIZE);
2866
        if (hp->tcvregs)
2867
                sbus_iounmap(hp->tcvregs, TCVR_REG_SIZE);
2868
 
2869
err_out_free_netdev:
2870
        kfree(dev);
2871
 
2872
err_out:
2873
        return err;
2874
}
2875
#endif
2876
 
2877
#ifdef CONFIG_PCI
2878
#ifndef __sparc__
2879
static int is_quattro_p(struct pci_dev *pdev)
2880
{
2881
        struct pci_dev *busdev = pdev->bus->self;
2882
        struct list_head *tmp;
2883
        int n_hmes;
2884
 
2885
        if (busdev->vendor != PCI_VENDOR_ID_DEC ||
2886
            busdev->device != PCI_DEVICE_ID_DEC_21153)
2887
                return 0;
2888
 
2889
        n_hmes = 0;
2890
        tmp = pdev->bus->devices.next;
2891
        while (tmp != &pdev->bus->devices) {
2892
                struct pci_dev *this_pdev = pci_dev_b(tmp);
2893
 
2894
                if (this_pdev->vendor == PCI_VENDOR_ID_SUN &&
2895
                    this_pdev->device == PCI_DEVICE_ID_SUN_HAPPYMEAL)
2896
                        n_hmes++;
2897
 
2898
                tmp = tmp->next;
2899
        }
2900
 
2901
        if (n_hmes != 4)
2902
                return 0;
2903
 
2904
        return 1;
2905
}
2906
 
2907
/* Fetch MAC address from vital product data of PCI ROM. */
2908
static void find_eth_addr_in_vpd(void *rom_base, int len, int index, unsigned char *dev_addr)
2909
{
2910
        int this_offset;
2911
 
2912
        for (this_offset = 0x20; this_offset < len; this_offset++) {
2913
                void *p = rom_base + this_offset;
2914
 
2915
                if (readb(p + 0) != 0x90 ||
2916
                    readb(p + 1) != 0x00 ||
2917
                    readb(p + 2) != 0x09 ||
2918
                    readb(p + 3) != 0x4e ||
2919
                    readb(p + 4) != 0x41 ||
2920
                    readb(p + 5) != 0x06)
2921
                        continue;
2922
 
2923
                this_offset += 6;
2924
                p += 6;
2925
 
2926
                if (index == 0) {
2927
                        int i;
2928
 
2929
                        for (i = 0; i < 6; i++)
2930
                                dev_addr[i] = readb(p + i);
2931
                        break;
2932
                }
2933
                index--;
2934
        }
2935
}
2936
 
2937
static void get_hme_mac_nonsparc(struct pci_dev *pdev, unsigned char *dev_addr)
2938
{
2939
        u32 rom_reg_orig;
2940
        void *p;
2941
        int index;
2942
 
2943
        index = 0;
2944
        if (is_quattro_p(pdev))
2945
                index = PCI_SLOT(pdev->devfn);
2946
 
2947
        if (pdev->resource[PCI_ROM_RESOURCE].parent == NULL) {
2948
                if (pci_assign_resource(pdev, PCI_ROM_RESOURCE) < 0)
2949
                        goto use_random;
2950
        }
2951
 
2952
        pci_read_config_dword(pdev, pdev->rom_base_reg, &rom_reg_orig);
2953
        pci_write_config_dword(pdev, pdev->rom_base_reg,
2954
                               rom_reg_orig | PCI_ROM_ADDRESS_ENABLE);
2955
 
2956
        p = ioremap(pci_resource_start(pdev, PCI_ROM_RESOURCE), (64 * 1024));
2957
        if (p != NULL && readb(p) == 0x55 && readb(p + 1) == 0xaa)
2958
                find_eth_addr_in_vpd(p, (64 * 1024), index, dev_addr);
2959
 
2960
        if (p != NULL)
2961
                iounmap(p);
2962
 
2963
        pci_write_config_dword(pdev, pdev->rom_base_reg, rom_reg_orig);
2964
        return;
2965
 
2966
use_random:
2967
        /* Sun MAC prefix then 3 random bytes. */
2968
        dev_addr[0] = 0x08;
2969
        dev_addr[1] = 0x00;
2970
        dev_addr[2] = 0x20;
2971
        get_random_bytes(&dev_addr[3], 3);
2972
        return;
2973
}
2974
#endif /* !(__sparc__) */
2975
 
2976
static int __init happy_meal_pci_init(struct pci_dev *pdev)
2977
{
2978
        struct quattro *qp = NULL;
2979
#ifdef __sparc__
2980
        struct pcidev_cookie *pcp;
2981
        int node;
2982
#endif
2983
        struct happy_meal *hp;
2984
        struct net_device *dev;
2985
        unsigned long hpreg_base;
2986
        int i, qfe_slot = -1;
2987
        char prom_name[64];
2988
        int err;
2989
 
2990
        /* Now make sure pci_dev cookie is there. */
2991
#ifdef __sparc__
2992
        pcp = pdev->sysdata;
2993
        if (pcp == NULL || pcp->prom_node == -1) {
2994
                printk(KERN_ERR "happymeal(PCI): Some PCI device info missing\n");
2995
                return -ENODEV;
2996
        }
2997
        node = pcp->prom_node;
2998
 
2999
        prom_getstring(node, "name", prom_name, sizeof(prom_name));
3000
#else
3001
        if (is_quattro_p(pdev))
3002
                strcpy(prom_name, "SUNW,qfe");
3003
        else
3004
                strcpy(prom_name, "SUNW,hme");
3005
#endif
3006
 
3007
        err = -ENODEV;
3008
        if (!strcmp(prom_name, "SUNW,qfe") || !strcmp(prom_name, "qfe")) {
3009
                qp = quattro_pci_find(pdev);
3010
                if (qp == NULL)
3011
                        goto err_out;
3012
                for (qfe_slot = 0; qfe_slot < 4; qfe_slot++)
3013
                        if (qp->happy_meals[qfe_slot] == NULL)
3014
                                break;
3015
                if (qfe_slot == 4)
3016
                        goto err_out;
3017
        }
3018
 
3019
        dev = alloc_etherdev(sizeof(struct happy_meal));
3020
        err = -ENOMEM;
3021
        if (!dev)
3022
                goto err_out;
3023
        SET_MODULE_OWNER(dev);
3024
 
3025
        if (hme_version_printed++ == 0)
3026
                printk(KERN_INFO "%s", version);
3027
 
3028
        dev->base_addr = (long) pdev;
3029
 
3030
        hp = (struct happy_meal *)dev->priv;
3031
        memset(hp, 0, sizeof(*hp));
3032
 
3033
        hp->happy_dev = pdev;
3034
 
3035
        spin_lock_init(&hp->happy_lock);
3036
 
3037
        if (qp != NULL) {
3038
                hp->qfe_parent = qp;
3039
                hp->qfe_ent = qfe_slot;
3040
                qp->happy_meals[qfe_slot] = dev;
3041
        }
3042
 
3043
        hpreg_base = pci_resource_start(pdev, 0);
3044
        err = -ENODEV;
3045
        if ((pci_resource_flags(pdev, 0) & IORESOURCE_IO) != 0) {
3046
                printk(KERN_ERR "happymeal(PCI): Cannot find proper PCI device base address.\n");
3047
                goto err_out_clear_quattro;
3048
        }
3049
        if (pci_request_regions(pdev, dev->name)) {
3050
                printk(KERN_ERR "happymeal(PCI): Cannot obtain PCI resources, "
3051
                       "aborting.\n");
3052
                goto err_out_clear_quattro;
3053
        }
3054
 
3055
        if ((hpreg_base = (unsigned long) ioremap(hpreg_base, 0x8000)) == 0) {
3056
                printk(KERN_ERR "happymeal(PCI): Unable to remap card memory.\n");
3057
                goto err_out_free_res;
3058
        }
3059
 
3060
        for (i = 0; i < 6; i++) {
3061
                if (macaddr[i] != 0)
3062
                        break;
3063
        }
3064
        if (i < 6) { /* a mac address was given */
3065
                for (i = 0; i < 6; i++)
3066
                        dev->dev_addr[i] = macaddr[i];
3067
                macaddr[5]++;
3068
        } else {
3069
#ifdef __sparc__
3070
                if (qfe_slot != -1 &&
3071
                    prom_getproplen(node, "local-mac-address") == 6) {
3072
                        prom_getproperty(node, "local-mac-address",
3073
                                         dev->dev_addr, 6);
3074
                } else {
3075
                        memcpy(dev->dev_addr, idprom->id_ethaddr, 6);
3076
                }
3077
#else
3078
                get_hme_mac_nonsparc(pdev, &dev->dev_addr[0]);
3079
#endif
3080
        }
3081
 
3082
        /* Layout registers. */
3083
        hp->gregs      = (hpreg_base + 0x0000UL);
3084
        hp->etxregs    = (hpreg_base + 0x2000UL);
3085
        hp->erxregs    = (hpreg_base + 0x4000UL);
3086
        hp->bigmacregs = (hpreg_base + 0x6000UL);
3087
        hp->tcvregs    = (hpreg_base + 0x7000UL);
3088
 
3089
#ifdef __sparc__
3090
        hp->hm_revision = prom_getintdefault(node, "hm-rev", 0xff);
3091
        if (hp->hm_revision == 0xff) {
3092
                unsigned char prev;
3093
 
3094
                pci_read_config_byte(pdev, PCI_REVISION_ID, &prev);
3095
                hp->hm_revision = 0xc0 | (prev & 0x0f);
3096
        }
3097
#else
3098
        /* works with this on non-sparc hosts */
3099
        hp->hm_revision = 0x20;
3100
#endif
3101
 
3102
        /* Now enable the feature flags we can. */
3103
        if (hp->hm_revision == 0x20 || hp->hm_revision == 0x21)
3104
                hp->happy_flags = HFLAG_20_21;
3105
        else if (hp->hm_revision != 0xa0 && hp->hm_revision != 0xc0)
3106
                hp->happy_flags = HFLAG_NOT_A0;
3107
 
3108
        if (qp != NULL)
3109
                hp->happy_flags |= HFLAG_QUATTRO;
3110
 
3111
        /* And of course, indicate this is PCI. */
3112
        hp->happy_flags |= HFLAG_PCI;
3113
 
3114
#ifdef __sparc__
3115
        /* Assume PCI happy meals can handle all burst sizes. */
3116
        hp->happy_bursts = DMA_BURSTBITS;
3117
#endif
3118
 
3119
        hp->happy_block = (struct hmeal_init_block *)
3120
                pci_alloc_consistent(pdev, PAGE_SIZE, &hp->hblock_dvma);
3121
 
3122
        err = -ENODEV;
3123
        if (!hp->happy_block) {
3124
                printk(KERN_ERR "happymeal(PCI): Cannot get hme init block.\n");
3125
                goto err_out_iounmap;
3126
        }
3127
 
3128
        hp->linkcheck = 0;
3129
        hp->timer_state = asleep;
3130
        hp->timer_ticks = 0;
3131
 
3132
        init_timer(&hp->happy_timer);
3133
 
3134
        hp->dev = dev;
3135
        dev->open = &happy_meal_open;
3136
        dev->stop = &happy_meal_close;
3137
        dev->hard_start_xmit = &happy_meal_start_xmit;
3138
        dev->get_stats = &happy_meal_get_stats;
3139
        dev->set_multicast_list = &happy_meal_set_multicast;
3140
        dev->tx_timeout = &happy_meal_tx_timeout;
3141
        dev->watchdog_timeo = 5*HZ;
3142
        dev->do_ioctl = &happy_meal_ioctl;
3143
        dev->irq = pdev->irq;
3144
        dev->dma = 0;
3145
 
3146
        /* Happy Meal can do it all... */
3147
        dev->features |= NETIF_F_SG | NETIF_F_HW_CSUM;
3148
 
3149
#if defined(CONFIG_SBUS) && defined(CONFIG_PCI)
3150
        /* Hook up PCI register/dma accessors. */
3151
        hp->read_desc32 = pci_hme_read_desc32;
3152
        hp->write_txd = pci_hme_write_txd;
3153
        hp->write_rxd = pci_hme_write_rxd;
3154
        hp->dma_map = (u32 (*)(void *, void *, long, int))pci_map_single;
3155
        hp->dma_unmap = (void (*)(void *, u32, long, int))pci_unmap_single;
3156
        hp->dma_sync = (void (*)(void *, u32, long, int))pci_dma_sync_single;
3157
        hp->read32 = pci_hme_read32;
3158
        hp->write32 = pci_hme_write32;
3159
#endif
3160
 
3161
        /* Grrr, Happy Meal comes up by default not advertising
3162
         * full duplex 100baseT capabilities, fix this.
3163
         */
3164
        spin_lock_irq(&hp->happy_lock);
3165
        happy_meal_set_initial_advertisement(hp);
3166
        spin_unlock_irq(&hp->happy_lock);
3167
 
3168
        if (register_netdev(hp->dev)) {
3169
                printk(KERN_ERR "happymeal(PCI): Cannot register net device, "
3170
                       "aborting.\n");
3171
                goto err_out_iounmap;
3172
        }
3173
 
3174
        if (!qfe_slot) {
3175
                struct pci_dev *qpdev = qp->quattro_dev;
3176
 
3177
                prom_name[0] = 0;
3178
                if (!strncmp(dev->name, "eth", 3)) {
3179
                        int i = simple_strtoul(dev->name + 3, NULL, 10);
3180
                        sprintf(prom_name, "-%d", i + 3);
3181
                }
3182
                printk(KERN_INFO "%s%s: Quattro HME (PCI/CheerIO) 10/100baseT Ethernet ", dev->name, prom_name);
3183
                if (qpdev->vendor == PCI_VENDOR_ID_DEC &&
3184
                    qpdev->device == PCI_DEVICE_ID_DEC_21153)
3185
                        printk("DEC 21153 PCI Bridge\n");
3186
                else
3187
                        printk("unknown bridge %04x.%04x\n",
3188
                                qpdev->vendor, qpdev->device);
3189
        }
3190
 
3191
        if (qfe_slot != -1)
3192
                printk(KERN_INFO "%s: Quattro HME slot %d (PCI/CheerIO) 10/100baseT Ethernet ",
3193
                       dev->name, qfe_slot);
3194
        else
3195
                printk(KERN_INFO "%s: HAPPY MEAL (PCI/CheerIO) 10/100BaseT Ethernet ",
3196
                       dev->name);
3197
 
3198
        for (i = 0; i < 6; i++)
3199
                printk("%2.2x%c", dev->dev_addr[i], i == 5 ? ' ' : ':');
3200
 
3201
        printk("\n");
3202
 
3203
        /* We are home free at this point, link us in to the happy
3204
         * device list.
3205
         */
3206
        hp->next_module = root_happy_dev;
3207
        root_happy_dev = hp;
3208
 
3209
        return 0;
3210
 
3211
err_out_iounmap:
3212
        iounmap((void *)hp->gregs);
3213
 
3214
err_out_free_res:
3215
        pci_release_regions(pdev);
3216
 
3217
err_out_clear_quattro:
3218
        if (qp != NULL)
3219
                qp->happy_meals[qfe_slot] = NULL;
3220
 
3221
        kfree(dev);
3222
 
3223
err_out:
3224
        return err;
3225
}
3226
#endif
3227
 
3228
#ifdef CONFIG_SBUS
3229
static int __init happy_meal_sbus_probe(void)
3230
{
3231
        struct sbus_bus *sbus;
3232
        struct sbus_dev *sdev;
3233
        int cards = 0;
3234
        char model[128];
3235
 
3236
        for_each_sbus(sbus) {
3237
                for_each_sbusdev(sdev, sbus) {
3238
                        char *name = sdev->prom_name;
3239
 
3240
                        if (!strcmp(name, "SUNW,hme")) {
3241
                                cards++;
3242
                                prom_getstring(sdev->prom_node, "model",
3243
                                               model, sizeof(model));
3244
                                if (!strcmp(model, "SUNW,sbus-qfe"))
3245
                                        happy_meal_sbus_init(sdev, 1);
3246
                                else
3247
                                        happy_meal_sbus_init(sdev, 0);
3248
                        } else if (!strcmp(name, "qfe") ||
3249
                                   !strcmp(name, "SUNW,qfe")) {
3250
                                cards++;
3251
                                happy_meal_sbus_init(sdev, 1);
3252
                        }
3253
                }
3254
        }
3255
        if (cards != 0)
3256
                quattro_sbus_register_irqs();
3257
        return cards;
3258
}
3259
#endif
3260
 
3261
#ifdef CONFIG_PCI
3262
static int __init happy_meal_pci_probe(void)
3263
{
3264
        struct pci_dev *pdev = NULL;
3265
        int cards = 0;
3266
 
3267
        while ((pdev = pci_find_device(PCI_VENDOR_ID_SUN,
3268
                                       PCI_DEVICE_ID_SUN_HAPPYMEAL, pdev)) != NULL) {
3269
                if (pci_enable_device(pdev))
3270
                        continue;
3271
                pci_set_master(pdev);
3272
                cards++;
3273
                happy_meal_pci_init(pdev);
3274
        }
3275
        return cards;
3276
}
3277
#endif
3278
 
3279
static int __init happy_meal_probe(void)
3280
{
3281
        static int called = 0;
3282
        int cards;
3283
 
3284
        root_happy_dev = NULL;
3285
 
3286
        if (called)
3287
                return -ENODEV;
3288
        called++;
3289
 
3290
        cards = 0;
3291
#ifdef CONFIG_SBUS
3292
        cards += happy_meal_sbus_probe();
3293
#endif
3294
#ifdef CONFIG_PCI
3295
        cards += happy_meal_pci_probe();
3296
#endif
3297
        if (!cards)
3298
                return -ENODEV;
3299
        return 0;
3300
}
3301
 
3302
 
3303
static void __exit happy_meal_cleanup_module(void)
3304
{
3305
#ifdef CONFIG_SBUS
3306
        struct quattro *last_seen_qfe = NULL;
3307
#endif
3308
 
3309
        while (root_happy_dev) {
3310
                struct happy_meal *hp = root_happy_dev;
3311
                struct happy_meal *next = root_happy_dev->next_module;
3312
                struct net_device *dev = hp->dev;
3313
 
3314
                /* Unregister netdev before unmapping registers as this
3315
                 * call can end up trying to access those registers.
3316
                 */
3317
                unregister_netdev(dev);
3318
 
3319
#ifdef CONFIG_SBUS
3320
                if (!(hp->happy_flags & HFLAG_PCI)) {
3321
                        if (hp->happy_flags & HFLAG_QUATTRO) {
3322
                                if (hp->qfe_parent != last_seen_qfe) {
3323
                                        free_irq(dev->irq, hp->qfe_parent);
3324
                                        last_seen_qfe = hp->qfe_parent;
3325
                                }
3326
                        }
3327
 
3328
                        sbus_iounmap(hp->gregs, GREG_REG_SIZE);
3329
                        sbus_iounmap(hp->etxregs, ETX_REG_SIZE);
3330
                        sbus_iounmap(hp->erxregs, ERX_REG_SIZE);
3331
                        sbus_iounmap(hp->bigmacregs, BMAC_REG_SIZE);
3332
                        sbus_iounmap(hp->tcvregs, TCVR_REG_SIZE);
3333
                        sbus_free_consistent(hp->happy_dev,
3334
                                             PAGE_SIZE,
3335
                                             hp->happy_block,
3336
                                             hp->hblock_dvma);
3337
                }
3338
#endif
3339
#ifdef CONFIG_PCI
3340
                if ((hp->happy_flags & HFLAG_PCI)) {
3341
                        pci_free_consistent(hp->happy_dev,
3342
                                            PAGE_SIZE,
3343
                                            hp->happy_block,
3344
                                            hp->hblock_dvma);
3345
                        iounmap((void *)hp->gregs);
3346
                        pci_release_regions(hp->happy_dev);
3347
                }
3348
#endif
3349
                kfree(dev);
3350
 
3351
                root_happy_dev = next;
3352
        }
3353
 
3354
        /* Now cleanup the quattro lists. */
3355
#ifdef CONFIG_SBUS
3356
        while (qfe_sbus_list) {
3357
                struct quattro *qfe = qfe_sbus_list;
3358
                struct quattro *next = qfe->next;
3359
 
3360
                kfree(qfe);
3361
 
3362
                qfe_sbus_list = next;
3363
        }
3364
#endif
3365
#ifdef CONFIG_PCI
3366
        while (qfe_pci_list) {
3367
                struct quattro *qfe = qfe_pci_list;
3368
                struct quattro *next = qfe->next;
3369
 
3370
                kfree(qfe);
3371
 
3372
                qfe_pci_list = next;
3373
        }
3374
#endif
3375
}
3376
 
3377
module_init(happy_meal_probe);
3378
module_exit(happy_meal_cleanup_module);

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