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[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [drivers/] [net/] [tc35815.c] - Blame information for rev 1765

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1 1275 phoenix
/* tc35815.c: A TOSHIBA TC35815CF PCI 10/100Mbps ethernet driver for linux.
2
 *
3
 * Copyright 2001 MontaVista Software Inc.
4
 * Author: MontaVista Software, Inc.
5
 *                ahennessy@mvista.com
6
 *
7
 * Based on skelton.c by Donald Becker.
8
 * Copyright (C) 2000-2001 Toshiba Corporation
9
 *
10
 * This program is free software; you can redistribute  it and/or modify it
11
 * under  the terms of  the GNU General  Public License as published by the
12
 * Free Software Foundation;  either version 2 of the  License, or (at your
13
 * option) any later version.
14
 *
15
 * THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
16
 * WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
17
 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
18
 * NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
19
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20
 * NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
21
 * USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
22
 * ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
23
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25
 *
26
 * You should have received a copy of the  GNU General Public License along
27
 * with this program; if not, write  to the Free Software Foundation, Inc.,
28
 * 675 Mass Ave, Cambridge, MA 02139, USA.
29
 */
30
 
31
static const char *version =
32
        "tc35815.c:v0.00 26/07/2000 by Toshiba Corporation\n";
33
 
34
#include <linux/module.h>
35
 
36
#include <linux/kernel.h>
37
#include <linux/sched.h>
38
#include <linux/types.h>
39
#include <linux/fcntl.h>
40
#include <linux/interrupt.h>
41
#include <linux/ptrace.h>
42
#include <linux/ioport.h>
43
#include <linux/in.h>
44
#include <linux/slab.h>
45
#include <linux/string.h>
46
#include <asm/system.h>
47
#include <asm/bitops.h>
48
#include <asm/io.h>
49
#include <asm/dma.h>
50
#include <linux/errno.h>
51
#include <linux/init.h>
52
 
53
#include <linux/netdevice.h>
54
#include <linux/etherdevice.h>
55
#include <linux/skbuff.h>
56
#include <linux/delay.h>
57
#include <linux/pci.h>
58
#include <linux/proc_fs.h>
59
#include <asm/byteorder.h>
60
 
61
 
62
/*
63
 * The name of the card. Is used for messages and in the requests for
64
 * io regions, irqs and dma channels
65
 */
66
static const char* cardname = "TC35815CF";
67
#define TC35815_PROC_ENTRY "net/tc35815"
68
 
69
#define TC35815_MODULE_NAME "TC35815CF"
70
#define TX_TIMEOUT (4*HZ)
71
 
72
/* First, a few definitions that the brave might change. */
73
 
74
/* use 0 for production, 1 for verification, >2 for debug */
75
#ifndef TC35815_DEBUG
76
#define TC35815_DEBUG 1
77
#endif
78
static unsigned int tc35815_debug = TC35815_DEBUG;
79
 
80
#define GATHER_TXINT    /* On-Demand Tx Interrupt */
81
 
82
#define vtonocache(p)   KSEG1ADDR(virt_to_phys(p))
83
 
84
/*
85
 * Registers
86
 */
87
struct tc35815_regs {
88
        volatile __u32 DMA_Ctl;         /* 0x00 */
89
        volatile __u32 TxFrmPtr;
90
        volatile __u32 TxThrsh;
91
        volatile __u32 TxPollCtr;
92
        volatile __u32 BLFrmPtr;
93
        volatile __u32 RxFragSize;
94
        volatile __u32 Int_En;
95
        volatile __u32 FDA_Bas;
96
        volatile __u32 FDA_Lim;         /* 0x20 */
97
        volatile __u32 Int_Src;
98
        volatile __u32 unused0[2];
99
        volatile __u32 PauseCnt;
100
        volatile __u32 RemPauCnt;
101
        volatile __u32 TxCtlFrmStat;
102
        volatile __u32 unused1;
103
        volatile __u32 MAC_Ctl;         /* 0x40 */
104
        volatile __u32 CAM_Ctl;
105
        volatile __u32 Tx_Ctl;
106
        volatile __u32 Tx_Stat;
107
        volatile __u32 Rx_Ctl;
108
        volatile __u32 Rx_Stat;
109
        volatile __u32 MD_Data;
110
        volatile __u32 MD_CA;
111
        volatile __u32 CAM_Adr;         /* 0x60 */
112
        volatile __u32 CAM_Data;
113
        volatile __u32 CAM_Ena;
114
        volatile __u32 PROM_Ctl;
115
        volatile __u32 PROM_Data;
116
        volatile __u32 Algn_Cnt;
117
        volatile __u32 CRC_Cnt;
118
        volatile __u32 Miss_Cnt;
119
};
120
 
121
/*
122
 * Bit assignments
123
 */
124
/* DMA_Ctl bit asign ------------------------------------------------------- */
125
#define DMA_IntMask            0x00040000 /* 1:Interupt mask                 */
126
#define DMA_SWIntReq           0x00020000 /* 1:Software Interrupt request    */
127
#define DMA_TxWakeUp           0x00010000 /* 1:Transmit Wake Up              */
128
#define DMA_RxBigE             0x00008000 /* 1:Receive Big Endian            */
129
#define DMA_TxBigE             0x00004000 /* 1:Transmit Big Endian           */
130
#define DMA_TestMode           0x00002000 /* 1:Test Mode                     */
131
#define DMA_PowrMgmnt          0x00001000 /* 1:Power Management              */
132
#define DMA_DmBurst_Mask       0x000001fc /* DMA Burst size                  */
133
 
134
/* RxFragSize bit asign ---------------------------------------------------- */
135
#define RxFrag_EnPack          0x00008000 /* 1:Enable Packing                */
136
#define RxFrag_MinFragMask     0x00000ffc /* Minimum Fragment                */
137
 
138
/* MAC_Ctl bit asign ------------------------------------------------------- */
139
#define MAC_Link10             0x00008000 /* 1:Link Status 10Mbits           */
140
#define MAC_EnMissRoll         0x00002000 /* 1:Enable Missed Roll            */
141
#define MAC_MissRoll           0x00000400 /* 1:Missed Roll                   */
142
#define MAC_Loop10             0x00000080 /* 1:Loop 10 Mbps                  */
143
#define MAC_Conn_Auto          0x00000000 /*00:Connection mode (Automatic)   */
144
#define MAC_Conn_10M           0x00000020 /*01:                (10Mbps endec)*/
145
#define MAC_Conn_Mll           0x00000040 /*10:                (Mll clock)   */
146
#define MAC_MacLoop            0x00000010 /* 1:MAC Loopback                  */
147
#define MAC_FullDup            0x00000008 /* 1:Full Duplex 0:Half Duplex     */
148
#define MAC_Reset              0x00000004 /* 1:Software Reset                */
149
#define MAC_HaltImm            0x00000002 /* 1:Halt Immediate                */
150
#define MAC_HaltReq            0x00000001 /* 1:Halt request                  */
151
 
152
/* PROM_Ctl bit asign ------------------------------------------------------ */
153
#define PROM_Busy              0x00008000 /* 1:Busy (Start Operation)        */
154
#define PROM_Read              0x00004000 /*10:Read operation                */
155
#define PROM_Write             0x00002000 /*01:Write operation               */
156
#define PROM_Erase             0x00006000 /*11:Erase operation               */
157
                                          /*00:Enable or Disable Writting,   */
158
                                          /*      as specified in PROM_Addr. */
159
#define PROM_Addr_Ena          0x00000030 /*11xxxx:PROM Write enable         */
160
                                          /*00xxxx:           disable        */
161
 
162
/* CAM_Ctl bit asign ------------------------------------------------------- */
163
#define CAM_CompEn             0x00000010 /* 1:CAM Compare Enable            */
164
#define CAM_NegCAM             0x00000008 /* 1:Reject packets CAM recognizes,*/
165
                                          /*                    accept other */
166
#define CAM_BroadAcc           0x00000004 /* 1:Broadcast assept              */
167
#define CAM_GroupAcc           0x00000002 /* 1:Multicast assept              */
168
#define CAM_StationAcc         0x00000001 /* 1:unicast accept                */
169
 
170
/* CAM_Ena bit asign ------------------------------------------------------- */
171
#define CAM_ENTRY_MAX                  21   /* CAM Data entry max count      */
172
#define CAM_Ena_Mask ((1<<CAM_ENTRY_MAX)-1) /* CAM Enable bits (Max 21bits)  */
173
#define CAM_Ena_Bit(index)         (1<<(index))
174
#define CAM_ENTRY_DESTINATION   0
175
#define CAM_ENTRY_SOURCE        1
176
#define CAM_ENTRY_MACCTL        20
177
 
178
/* Tx_Ctl bit asign -------------------------------------------------------- */
179
#define Tx_En                  0x00000001 /* 1:Transmit enable               */
180
#define Tx_TxHalt              0x00000002 /* 1:Transmit Halt Request         */
181
#define Tx_NoPad               0x00000004 /* 1:Suppress Padding              */
182
#define Tx_NoCRC               0x00000008 /* 1:Suppress Padding              */
183
#define Tx_FBack               0x00000010 /* 1:Fast Back-off                 */
184
#define Tx_EnUnder             0x00000100 /* 1:Enable Underrun               */
185
#define Tx_EnExDefer           0x00000200 /* 1:Enable Excessive Deferral     */
186
#define Tx_EnLCarr             0x00000400 /* 1:Enable Lost Carrier           */
187
#define Tx_EnExColl            0x00000800 /* 1:Enable Excessive Collision    */
188
#define Tx_EnLateColl          0x00001000 /* 1:Enable Late Collision         */
189
#define Tx_EnTxPar             0x00002000 /* 1:Enable Transmit Parity        */
190
#define Tx_EnComp              0x00004000 /* 1:Enable Completion             */
191
 
192
/* Tx_Stat bit asign ------------------------------------------------------- */
193
#define Tx_TxColl_MASK         0x0000000F /* Tx Collision Count              */
194
#define Tx_ExColl              0x00000010 /* Excessive Collision             */
195
#define Tx_TXDefer             0x00000020 /* Transmit Defered                */
196
#define Tx_Paused              0x00000040 /* Transmit Paused                 */
197
#define Tx_IntTx               0x00000080 /* Interrupt on Tx                 */
198
#define Tx_Under               0x00000100 /* Underrun                        */
199
#define Tx_Defer               0x00000200 /* Deferral                        */
200
#define Tx_NCarr               0x00000400 /* No Carrier                      */
201
#define Tx_10Stat              0x00000800 /* 10Mbps Status                   */
202
#define Tx_LateColl            0x00001000 /* Late Collision                  */
203
#define Tx_TxPar               0x00002000 /* Tx Parity Error                 */
204
#define Tx_Comp                0x00004000 /* Completion                      */
205
#define Tx_Halted              0x00008000 /* Tx Halted                       */
206
#define Tx_SQErr               0x00010000 /* Signal Quality Error(SQE)       */
207
 
208
/* Rx_Ctl bit asign -------------------------------------------------------- */
209
#define Rx_EnGood              0x00004000 /* 1:Enable Good                   */
210
#define Rx_EnRxPar             0x00002000 /* 1:Enable Receive Parity         */
211
#define Rx_EnLongErr           0x00000800 /* 1:Enable Long Error             */
212
#define Rx_EnOver              0x00000400 /* 1:Enable OverFlow               */
213
#define Rx_EnCRCErr            0x00000200 /* 1:Enable CRC Error              */
214
#define Rx_EnAlign             0x00000100 /* 1:Enable Alignment              */
215
#define Rx_IgnoreCRC           0x00000040 /* 1:Ignore CRC Value              */
216
#define Rx_StripCRC            0x00000010 /* 1:Strip CRC Value               */
217
#define Rx_ShortEn             0x00000008 /* 1:Short Enable                  */
218
#define Rx_LongEn              0x00000004 /* 1:Long Enable                   */
219
#define Rx_RxHalt              0x00000002 /* 1:Receive Halt Request          */
220
#define Rx_RxEn                0x00000001 /* 1:Receive Intrrupt Enable       */
221
 
222
/* Rx_Stat bit asign ------------------------------------------------------- */
223
#define Rx_Halted              0x00008000 /* Rx Halted                       */
224
#define Rx_Good                0x00004000 /* Rx Good                         */
225
#define Rx_RxPar               0x00002000 /* Rx Parity Error                 */
226
                            /* 0x00001000    not use                         */
227
#define Rx_LongErr             0x00000800 /* Rx Long Error                   */
228
#define Rx_Over                0x00000400 /* Rx Overflow                     */
229
#define Rx_CRCErr              0x00000200 /* Rx CRC Error                    */
230
#define Rx_Align               0x00000100 /* Rx Alignment Error              */
231
#define Rx_10Stat              0x00000080 /* Rx 10Mbps Status                */
232
#define Rx_IntRx               0x00000040 /* Rx Interrupt                    */
233
#define Rx_CtlRecd             0x00000020 /* Rx Control Receive              */
234
 
235
#define Rx_Stat_Mask           0x0000EFC0 /* Rx All Status Mask              */
236
 
237
/* Int_En bit asign -------------------------------------------------------- */
238
#define Int_NRAbtEn            0x00000800 /* 1:Non-recoverable Abort Enable  */
239
#define Int_TxCtlCmpEn         0x00000400 /* 1:Transmit Control Complete Enable */
240
#define Int_DmParErrEn         0x00000200 /* 1:DMA Parity Error Enable       */
241
#define Int_DParDEn            0x00000100 /* 1:Data Parity Error Enable      */
242
#define Int_EarNotEn           0x00000080 /* 1:Early Notify Enable           */
243
#define Int_DParErrEn          0x00000040 /* 1:Detected Parity Error Enable  */
244
#define Int_SSysErrEn          0x00000020 /* 1:Signalled System Error Enable */
245
#define Int_RMasAbtEn          0x00000010 /* 1:Received Master Abort Enable  */
246
#define Int_RTargAbtEn         0x00000008 /* 1:Received Target Abort Enable  */
247
#define Int_STargAbtEn         0x00000004 /* 1:Signalled Target Abort Enable */
248
#define Int_BLExEn             0x00000002 /* 1:Buffer List Exhausted Enable  */
249
#define Int_FDAExEn            0x00000001 /* 1:Free Descriptor Area          */
250
                                          /*               Exhausted Enable  */
251
 
252
/* Int_Src bit asign ------------------------------------------------------- */
253
#define Int_NRabt              0x00004000 /* 1:Non Recoverable error         */
254
#define Int_DmParErrStat       0x00002000 /* 1:DMA Parity Error & Clear      */
255
#define Int_BLEx               0x00001000 /* 1:Buffer List Empty & Clear     */
256
#define Int_FDAEx              0x00000800 /* 1:FDA Empty & Clear             */
257
#define Int_IntNRAbt           0x00000400 /* 1:Non Recoverable Abort         */
258
#define Int_IntCmp             0x00000200 /* 1:MAC control packet complete   */
259
#define Int_IntExBD            0x00000100 /* 1:Interrupt Extra BD & Clear    */
260
#define Int_DmParErr           0x00000080 /* 1:DMA Parity Error & Clear      */
261
#define Int_IntEarNot          0x00000040 /* 1:Receive Data write & Clear    */
262
#define Int_SWInt              0x00000020 /* 1:Software request & Clear      */
263
#define Int_IntBLEx            0x00000010 /* 1:Buffer List Empty & Clear     */
264
#define Int_IntFDAEx           0x00000008 /* 1:FDA Empty & Clear             */
265
#define Int_IntPCI             0x00000004 /* 1:PCI controller & Clear        */
266
#define Int_IntMacRx           0x00000002 /* 1:Rx controller & Clear         */
267
#define Int_IntMacTx           0x00000001 /* 1:Tx controller & Clear         */
268
 
269
/* MD_CA bit asign --------------------------------------------------------- */
270
#define MD_CA_PreSup           0x00001000 /* 1:Preamble Supress              */
271
#define MD_CA_Busy             0x00000800 /* 1:Busy (Start Operation)        */
272
#define MD_CA_Wr               0x00000400 /* 1:Write 0:Read                  */
273
 
274
 
275
/* MII register offsets */
276
#define MII_CONTROL             0x0000
277
#define MII_STATUS              0x0001
278
#define MII_PHY_ID0             0x0002
279
#define MII_PHY_ID1             0x0003
280
#define MII_ANAR                0x0004
281
#define MII_ANLPAR              0x0005
282
#define MII_ANER                0x0006
283
/* MII Control register bit definitions. */
284
#define MIICNTL_FDX             0x0100
285
#define MIICNTL_RST_AUTO        0x0200
286
#define MIICNTL_ISOLATE         0x0400
287
#define MIICNTL_PWRDWN          0x0800
288
#define MIICNTL_AUTO            0x1000
289
#define MIICNTL_SPEED           0x2000
290
#define MIICNTL_LPBK            0x4000
291
#define MIICNTL_RESET           0x8000
292
/* MII Status register bit significance. */
293
#define MIISTAT_EXT             0x0001
294
#define MIISTAT_JAB             0x0002
295
#define MIISTAT_LINK            0x0004
296
#define MIISTAT_CAN_AUTO        0x0008
297
#define MIISTAT_FAULT           0x0010
298
#define MIISTAT_AUTO_DONE       0x0020
299
#define MIISTAT_CAN_T           0x0800
300
#define MIISTAT_CAN_T_FDX       0x1000
301
#define MIISTAT_CAN_TX          0x2000
302
#define MIISTAT_CAN_TX_FDX      0x4000
303
#define MIISTAT_CAN_T4          0x8000
304
/* MII Auto-Negotiation Expansion/RemoteEnd Register Bits */
305
#define MII_AN_TX_FDX           0x0100
306
#define MII_AN_TX_HDX           0x0080
307
#define MII_AN_10_FDX           0x0040
308
#define MII_AN_10_HDX           0x0020
309
 
310
 
311
/*
312
 * Descriptors
313
 */
314
 
315
/* Frame descripter */
316
struct FDesc {
317
        volatile __u32 FDNext;
318
        volatile __u32 FDSystem;
319
        volatile __u32 FDStat;
320
        volatile __u32 FDCtl;
321
};
322
 
323
/* Buffer descripter */
324
struct BDesc {
325
        volatile __u32 BuffData;
326
        volatile __u32 BDCtl;
327
};
328
 
329
#define FD_ALIGN        16
330
 
331
/* Frame Descripter bit asign ---------------------------------------------- */
332
#define FD_FDLength_MASK       0x0000FFFF /* Length MASK                     */
333
#define FD_BDCnt_MASK          0x001F0000 /* BD count MASK in FD             */
334
#define FD_FrmOpt_MASK         0x7C000000 /* Frame option MASK               */
335
#define FD_FrmOpt_BigEndian    0x40000000 /* Tx/Rx */
336
#define FD_FrmOpt_IntTx        0x20000000 /* Tx only */
337
#define FD_FrmOpt_NoCRC        0x10000000 /* Tx only */
338
#define FD_FrmOpt_NoPadding    0x08000000 /* Tx only */
339
#define FD_FrmOpt_Packing      0x04000000 /* Rx only */
340
#define FD_CownsFD             0x80000000 /* FD Controller owner bit         */
341
#define FD_Next_EOL            0x00000001 /* FD EOL indicator                */
342
#define FD_BDCnt_SHIFT         16
343
 
344
/* Buffer Descripter bit asign --------------------------------------------- */
345
#define BD_BuffLength_MASK     0x0000FFFF /* Recieve Data Size               */
346
#define BD_RxBDID_MASK         0x00FF0000 /* BD ID Number MASK               */
347
#define BD_RxBDSeqN_MASK       0x7F000000 /* Rx BD Sequence Number           */
348
#define BD_CownsBD             0x80000000 /* BD Controller owner bit         */
349
#define BD_RxBDID_SHIFT        16
350
#define BD_RxBDSeqN_SHIFT      24
351
 
352
 
353
/* Some useful constants. */
354
#undef NO_CHECK_CARRIER /* Does not check No-Carrier with TP */
355
 
356
#ifdef NO_CHECK_CARRIER
357
#define TX_CTL_CMD      (Tx_EnComp | Tx_EnTxPar | Tx_EnLateColl | \
358
        Tx_EnExColl | Tx_EnLCarr | Tx_EnExDefer | Tx_EnUnder | \
359
        Tx_En)  /* maybe  0x7d01 */
360
#else
361
#define TX_CTL_CMD      (Tx_EnComp | Tx_EnTxPar | Tx_EnLateColl | \
362
        Tx_EnExColl | Tx_EnExDefer | Tx_EnUnder | \
363
        Tx_En)  /* maybe  0x7f01 */
364
#endif
365
#define RX_CTL_CMD      (Rx_EnGood | Rx_EnRxPar | Rx_EnLongErr | Rx_EnOver \
366
        | Rx_EnCRCErr | Rx_EnAlign | Rx_RxEn)   /* maybe 0x6f01 */
367
 
368
#define INT_EN_CMD  (Int_NRAbtEn | \
369
         Int_DParDEn | Int_DParErrEn | \
370
        Int_SSysErrEn  | Int_RMasAbtEn | Int_RTargAbtEn | \
371
        Int_STargAbtEn | \
372
        Int_BLExEn  | Int_FDAExEn) /* maybe 0xb7f*/
373
 
374
/* Tuning parameters */
375
#define DMA_BURST_SIZE  32
376
#define TX_THRESHOLD    1024
377
 
378
#define FD_PAGE_NUM 2
379
#define FD_PAGE_ORDER 1
380
/* 16 + RX_BUF_PAGES * 8 + RX_FD_NUM * 16 + TX_FD_NUM * 32 <= PAGE_SIZE*2 */
381
#define RX_BUF_PAGES    8       /* >= 2 */
382
#define RX_FD_NUM       250     /* >= 32 */
383
#define TX_FD_NUM       128
384
 
385
struct TxFD {
386
        struct FDesc fd;
387
        struct BDesc bd;
388
        struct BDesc unused;
389
};
390
 
391
struct RxFD {
392
        struct FDesc fd;
393
        struct BDesc bd[0];      /* variable length */
394
};
395
 
396
struct FrFD {
397
        struct FDesc fd;
398
        struct BDesc bd[RX_BUF_PAGES];
399
};
400
 
401
 
402
extern unsigned long tc_readl(volatile __u32 *addr);
403
extern void tc_writel(unsigned long data, volatile __u32 *addr);
404
 
405
dma_addr_t priv_dma_handle;
406
 
407
/* Information that need to be kept for each board. */
408
struct tc35815_local {
409
        struct net_device *next_module;
410
 
411
        /* statistics */
412
        struct net_device_stats stats;
413
        struct {
414
                int max_tx_qlen;
415
                int tx_ints;
416
                int rx_ints;
417
        } lstats;
418
 
419
        int tbusy;
420
        int option;
421
#define TC35815_OPT_AUTO        0x00
422
#define TC35815_OPT_10M 0x01
423
#define TC35815_OPT_100M        0x02
424
#define TC35815_OPT_FULLDUP     0x04
425
        int linkspeed;  /* 10 or 100 */
426
        int fullduplex;
427
 
428
        /*
429
         * Transmitting: Batch Mode.
430
         *      1 BD in 1 TxFD.
431
         * Receiving: Packing Mode.
432
         *      1 circular FD for Free Buffer List.
433
         *      RX_BUG_PAGES BD in Free Buffer FD.
434
         *      One Free Buffer BD has PAGE_SIZE data buffer.
435
         */
436
        struct pci_dev *pdev;
437
        dma_addr_t fd_buf_dma_handle;
438
        void * fd_buf;  /* for TxFD, TxFD, FrFD */
439
        struct TxFD *tfd_base;
440
        int tfd_start;
441
        int tfd_end;
442
        struct RxFD *rfd_base;
443
        struct RxFD *rfd_limit;
444
        struct RxFD *rfd_cur;
445
        struct FrFD *fbl_ptr;
446
        unsigned char fbl_curid;
447
        dma_addr_t data_buf_dma_handle[RX_BUF_PAGES];
448
        void * data_buf[RX_BUF_PAGES];          /* packing */
449
};
450
 
451
/* Index to functions, as function prototypes. */
452
 
453
static int __init tc35815_probe1(struct pci_dev *pdev, unsigned int base_addr, unsigned int irq);
454
 
455
static int      tc35815_open(struct net_device *dev);
456
static int      tc35815_send_packet(struct sk_buff *skb, struct net_device *dev);
457
static void     tc35815_tx_timeout(struct net_device *dev);
458
static void     tc35815_interrupt(int irq, void *dev_id, struct pt_regs *regs);
459
static void     tc35815_rx(struct net_device *dev);
460
static void     tc35815_txdone(struct net_device *dev);
461
static int      tc35815_close(struct net_device *dev);
462
static struct   net_device_stats *tc35815_get_stats(struct net_device *dev);
463
static void     tc35815_set_multicast_list(struct net_device *dev);
464
 
465
static void     tc35815_chip_reset(struct net_device *dev);
466
static void     tc35815_chip_init(struct net_device *dev);
467
static void     tc35815_phy_chip_init(struct net_device *dev);
468
static int      tc35815_proc_info(char *buffer, char **start, off_t offset, int length, int *eof, void *data);
469
 
470
/* A list of all installed tc35815 devices. */
471
static struct net_device *root_tc35815_dev = NULL;
472
 
473
/*
474
 * PCI device identifiers for "new style" Linux PCI Device Drivers
475
 */
476
static struct pci_device_id tc35815_pci_tbl[] __devinitdata = {
477
    { PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815CF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
478
    { 0, }
479
};
480
 
481
MODULE_DEVICE_TABLE (pci, tc35815_pci_tbl);
482
 
483
int
484
tc35815_probe(struct pci_dev *pdev,
485
                const struct pci_device_id *ent)
486
{
487
        static int called = 0;
488
        int err = 0;
489
        int ret;
490
 
491
        if (called)
492
                return -ENODEV;
493
        called++;
494
 
495
        if (!pci_present())
496
                return -ENODEV;
497
 
498
        if (pdev) {
499
                unsigned int pci_memaddr;
500
                unsigned int pci_irq_line;
501
 
502
                printk(KERN_INFO "tc35815_probe: found device %#08x.%#08x\n", ent->vendor, ent->device);
503
 
504
                pci_memaddr = pci_resource_start (pdev, 1);
505
 
506
                printk(KERN_INFO "    pci_memaddr=%#08lx  resource_flags=%#08lx\n", pci_memaddr, pci_resource_flags (pdev, 0));
507
 
508
                if (!pci_memaddr) {
509
                        printk(KERN_WARNING "no PCI MEM resources, aborting\n");
510
                        return -ENODEV;
511
                }
512
                pci_irq_line = pdev->irq;
513
                /* irq disabled. */
514
                if (pci_irq_line == 0) {
515
                        printk(KERN_WARNING "no PCI irq, aborting\n");
516
                        return -ENODEV;
517
                }
518
 
519
                ret =  tc35815_probe1(pdev, pci_memaddr, pci_irq_line);
520
 
521
                if (!ret) {
522
                        if ((err = pci_enable_device(pdev)) < 0) {
523
                            printk(KERN_ERR "tc35815_probe: failed to enable device -- err=%d\n", err);
524
                            return err;
525
                        }
526
                        pci_set_master(pdev);
527
                }
528
 
529
                return ret;
530
        }
531
        return -ENODEV;
532
}
533
 
534
static int __init tc35815_probe1(struct pci_dev *pdev, unsigned int base_addr, unsigned int irq)
535
{
536
        static unsigned version_printed = 0;
537
        int i;
538
        struct tc35815_local *lp;
539
        struct tc35815_regs *tr;
540
        struct net_device *dev;
541
 
542
        /* Allocate a new 'dev' if needed. */
543
        dev = init_etherdev(NULL, 0);
544
        if (dev == NULL)
545
                return -ENOMEM;
546
 
547
        if (tc35815_debug  &&  version_printed++ == 0)
548
                printk(KERN_DEBUG "%s", version);
549
 
550
        printk(KERN_INFO "%s: %s found at %#x, irq %d\n",
551
               dev->name, cardname, base_addr, irq);
552
 
553
        /* Fill in the 'dev' fields. */
554
        dev->irq = irq;
555
        dev->base_addr = (unsigned long)ioremap(base_addr,
556
                                                sizeof(struct tc35815_regs));
557
        tr = (struct tc35815_regs*)dev->base_addr;
558
 
559
        tc35815_chip_reset(dev);
560
 
561
        /* Retrieve and print the ethernet address. */
562
        while (tc_readl(&tr->PROM_Ctl) & PROM_Busy)
563
                ;
564
        for (i = 0; i < 6; i += 2) {
565
                unsigned short data;
566
                tc_writel(PROM_Busy | PROM_Read | (i / 2 + 2), &tr->PROM_Ctl);
567
                while (tc_readl(&tr->PROM_Ctl) & PROM_Busy)
568
                        ;
569
                data = tc_readl(&tr->PROM_Data);
570
                dev->dev_addr[i] = data & 0xff;
571
                dev->dev_addr[i+1] = data >> 8;
572
        }
573
        for (i = 0; i < 6; i++)
574
                printk(" %2.2x", dev->dev_addr[i]);
575
        printk("\n");
576
 
577
        /* Initialize the device structure. */
578
        if (dev->priv == NULL) {
579
                dev->priv = kmalloc(sizeof(struct tc35815_local), GFP_KERNEL);
580
                if (dev->priv == NULL)
581
                        return -ENODEV;
582
        }
583
        lp = dev->priv;
584
 
585
        lp->pdev = pdev;
586
 
587
        memset(lp, 0, sizeof(struct tc35815_local));
588
 
589
        lp->next_module = root_tc35815_dev;
590
        root_tc35815_dev = dev;
591
 
592
        if (dev->mem_start > 0) {
593
                lp->option = dev->mem_start;
594
                if ((lp->option & TC35815_OPT_10M) &&
595
                    (lp->option & TC35815_OPT_100M)) {
596
                        /* if both speed speficied, auto select. */
597
                        lp->option &= ~(TC35815_OPT_10M | TC35815_OPT_100M);
598
                }
599
        }
600
        //XXX fixme
601
        lp->option |= TC35815_OPT_10M;
602
 
603
        /* do auto negotiation */
604
        tc35815_phy_chip_init(dev);
605
        printk(KERN_INFO "%s: linkspeed %dMbps, %s Duplex\n",
606
               dev->name, lp->linkspeed, lp->fullduplex ? "Full" : "Half");
607
 
608
        dev->open               = tc35815_open;
609
        dev->stop               = tc35815_close;
610
        dev->tx_timeout         = tc35815_tx_timeout;
611
        dev->watchdog_timeo     = TX_TIMEOUT;
612
        dev->hard_start_xmit    = tc35815_send_packet;
613
        dev->get_stats          = tc35815_get_stats;
614
        dev->set_multicast_list = tc35815_set_multicast_list;
615
 
616
#if 0   /* XXX called in init_etherdev */
617
        /* Fill in the fields of the device structure with ethernet values. */
618
        ether_setup(dev);
619
#endif
620
 
621
        return 0;
622
}
623
 
624
 
625
static int
626
tc35815_init_queues(struct net_device *dev)
627
{
628
        struct tc35815_local *lp = (struct tc35815_local *)dev->priv;
629
        int i;
630
        unsigned long fd_addr;
631
 
632
        if (!lp->fd_buf) {
633
                if (sizeof(struct FDesc) +
634
                    sizeof(struct BDesc) * RX_BUF_PAGES +
635
                    sizeof(struct FDesc) * RX_FD_NUM +
636
                    sizeof(struct TxFD) * TX_FD_NUM > PAGE_SIZE * FD_PAGE_NUM) {
637
                        printk(KERN_WARNING "%s: Invalid Queue Size.\n", dev->name);
638
                        return -ENOMEM;
639
                }
640
 
641
                if ((lp->fd_buf = (void *)__get_free_pages(GFP_KERNEL, FD_PAGE_ORDER)) == 0)
642
                        return -ENOMEM;
643
                for (i = 0; i < RX_BUF_PAGES; i++) {
644
                        if ((lp->data_buf[i] = (void *)get_free_page(GFP_KERNEL)) == 0) {
645
                                while (--i >= 0) {
646
                                        free_page((unsigned long)lp->data_buf[i]);
647
                                        lp->data_buf[i] = 0;
648
                                }
649
                                free_page((unsigned long)lp->fd_buf);
650
                                lp->fd_buf = 0;
651
                                return -ENOMEM;
652
                        }
653
#ifdef __mips__
654
                        dma_cache_wback_inv((unsigned long)lp->data_buf[i], PAGE_SIZE * FD_PAGE_NUM);
655
#endif
656
                }
657
#ifdef __mips__
658
                dma_cache_wback_inv((unsigned long)lp->fd_buf, PAGE_SIZE * FD_PAGE_NUM);
659
#endif
660
        } else {
661
                clear_page(lp->fd_buf);
662
#ifdef __mips__
663
                dma_cache_wback_inv((unsigned long)lp->fd_buf, PAGE_SIZE * FD_PAGE_NUM);
664
#endif
665
        }
666
#ifdef __mips__
667
        fd_addr = (unsigned long)vtonocache(lp->fd_buf);
668
#else
669
        fd_addr = (unsigned long)lp->fd_buf;
670
#endif
671
 
672
        /* Free Descriptors (for Receive) */
673
        lp->rfd_base = (struct RxFD *)fd_addr;
674
        fd_addr += sizeof(struct RxFD) * RX_FD_NUM;
675
        for (i = 0; i < RX_FD_NUM; i++) {
676
                lp->rfd_base[i].fd.FDCtl = cpu_to_le32(FD_CownsFD);
677
        }
678
        lp->rfd_cur = lp->rfd_base;
679
        lp->rfd_limit = (struct RxFD *)(fd_addr -
680
                                        sizeof(struct FDesc) -
681
                                        sizeof(struct BDesc) * 30);
682
 
683
        /* Transmit Descriptors */
684
        lp->tfd_base = (struct TxFD *)fd_addr;
685
        fd_addr += sizeof(struct TxFD) * TX_FD_NUM;
686
        for (i = 0; i < TX_FD_NUM; i++) {
687
                lp->tfd_base[i].fd.FDNext = cpu_to_le32(virt_to_bus(&lp->tfd_base[i+1]));
688
                lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0);
689
                lp->tfd_base[i].fd.FDCtl = cpu_to_le32(0);
690
        }
691
        lp->tfd_base[TX_FD_NUM-1].fd.FDNext = cpu_to_le32(virt_to_bus(&lp->tfd_base[0]));
692
        lp->tfd_start = 0;
693
        lp->tfd_end = 0;
694
 
695
        /* Buffer List (for Receive) */
696
        lp->fbl_ptr = (struct FrFD *)fd_addr;
697
        lp->fbl_ptr->fd.FDNext = cpu_to_le32(virt_to_bus(lp->fbl_ptr));
698
        lp->fbl_ptr->fd.FDCtl = cpu_to_le32(RX_BUF_PAGES | FD_CownsFD);
699
        for (i = 0; i < RX_BUF_PAGES; i++) {
700
                lp->fbl_ptr->bd[i].BuffData = cpu_to_le32(virt_to_bus(lp->data_buf[i]));
701
                /* BDID is index of FrFD.bd[] */
702
                lp->fbl_ptr->bd[i].BDCtl =
703
                        cpu_to_le32(BD_CownsBD | (i << BD_RxBDID_SHIFT) | PAGE_SIZE);
704
        }
705
        lp->fbl_curid = 0;
706
 
707
        return 0;
708
}
709
 
710
static void
711
tc35815_clear_queues(struct net_device *dev)
712
{
713
        struct tc35815_local *lp = (struct tc35815_local *)dev->priv;
714
        int i;
715
 
716
        for (i = 0; i < TX_FD_NUM; i++) {
717
                struct sk_buff *skb = (struct sk_buff *)
718
                        le32_to_cpu(lp->tfd_base[i].fd.FDSystem);
719
                if (skb)
720
                        dev_kfree_skb_any(skb);
721
                lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0);
722
        }
723
 
724
        tc35815_init_queues(dev);
725
}
726
 
727
static void
728
tc35815_free_queues(struct net_device *dev)
729
{
730
        struct tc35815_local *lp = (struct tc35815_local *)dev->priv;
731
        int i;
732
 
733
        if (lp->tfd_base) {
734
                for (i = 0; i < TX_FD_NUM; i++) {
735
                        struct sk_buff *skb = (struct sk_buff *)
736
                                le32_to_cpu(lp->tfd_base[i].fd.FDSystem);
737
                        if (skb)
738
                                dev_kfree_skb_any(skb);
739
                        lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0);
740
                }
741
        }
742
 
743
        lp->rfd_base = NULL;
744
        lp->rfd_base = NULL;
745
        lp->rfd_limit = NULL;
746
        lp->rfd_cur = NULL;
747
        lp->fbl_ptr = NULL;
748
 
749
        for (i = 0; i < RX_BUF_PAGES; i++) {
750
                if (lp->data_buf[i])
751
                        free_page((unsigned long)lp->data_buf[i]);
752
                lp->data_buf[i] = 0;
753
        }
754
        if (lp->fd_buf)
755
                __free_pages(lp->fd_buf, FD_PAGE_ORDER);
756
        lp->fd_buf = NULL;
757
}
758
 
759
static void
760
dump_txfd(struct TxFD *fd)
761
{
762
        printk("TxFD(%p): %08x %08x %08x %08x\n", fd,
763
               le32_to_cpu(fd->fd.FDNext),
764
               le32_to_cpu(fd->fd.FDSystem),
765
               le32_to_cpu(fd->fd.FDStat),
766
               le32_to_cpu(fd->fd.FDCtl));
767
        printk("BD: ");
768
        printk(" %08x %08x",
769
               le32_to_cpu(fd->bd.BuffData),
770
               le32_to_cpu(fd->bd.BDCtl));
771
        printk("\n");
772
}
773
 
774
static int
775
dump_rxfd(struct RxFD *fd)
776
{
777
        int i, bd_count = (le32_to_cpu(fd->fd.FDCtl) & FD_BDCnt_MASK) >> FD_BDCnt_SHIFT;
778
        if (bd_count > 8)
779
                bd_count = 8;
780
        printk("RxFD(%p): %08x %08x %08x %08x\n", fd,
781
               le32_to_cpu(fd->fd.FDNext),
782
               le32_to_cpu(fd->fd.FDSystem),
783
               le32_to_cpu(fd->fd.FDStat),
784
               le32_to_cpu(fd->fd.FDCtl));
785
        if (le32_to_cpu(fd->fd.FDCtl) & FD_CownsFD)
786
            return 0;
787
        printk("BD: ");
788
        for (i = 0; i < bd_count; i++)
789
                printk(" %08x %08x",
790
                       le32_to_cpu(fd->bd[i].BuffData),
791
                       le32_to_cpu(fd->bd[i].BDCtl));
792
        printk("\n");
793
        return bd_count;
794
}
795
 
796
static void
797
dump_frfd(struct FrFD *fd)
798
{
799
        int i;
800
        printk("FrFD(%p): %08x %08x %08x %08x\n", fd,
801
               le32_to_cpu(fd->fd.FDNext),
802
               le32_to_cpu(fd->fd.FDSystem),
803
               le32_to_cpu(fd->fd.FDStat),
804
               le32_to_cpu(fd->fd.FDCtl));
805
        printk("BD: ");
806
        for (i = 0; i < RX_BUF_PAGES; i++)
807
                printk(" %08x %08x",
808
                       le32_to_cpu(fd->bd[i].BuffData),
809
                       le32_to_cpu(fd->bd[i].BDCtl));
810
        printk("\n");
811
}
812
 
813
static void
814
panic_queues(struct net_device *dev)
815
{
816
        struct tc35815_local *lp = (struct tc35815_local *)dev->priv;
817
        int i;
818
 
819
        printk("TxFD base %p, start %d, end %d\n",
820
               lp->tfd_base, lp->tfd_start, lp->tfd_end);
821
        printk("RxFD base %p limit %p cur %p\n",
822
               lp->rfd_base, lp->rfd_limit, lp->rfd_cur);
823
        printk("FrFD %p\n", lp->fbl_ptr);
824
        for (i = 0; i < TX_FD_NUM; i++)
825
                dump_txfd(&lp->tfd_base[i]);
826
        for (i = 0; i < RX_FD_NUM; i++) {
827
                int bd_count = dump_rxfd(&lp->rfd_base[i]);
828
                i += (bd_count + 1) / 2;        /* skip BDs */
829
        }
830
        dump_frfd(lp->fbl_ptr);
831
        panic("%s: Illegal queue state.", dev->name);
832
}
833
 
834
static void print_buf(char *add, int length)
835
{
836
        int i;
837
        int len = length;
838
 
839
        printk("print_buf(%08x)(%x)\n", (unsigned int) add,length);
840
 
841
        if (len > 100)
842
                len = 100;
843
        for (i = 0; i < len; i++) {
844
                printk(" %2.2X", (unsigned char) add[i]);
845
                if (!(i % 16))
846
                        printk("\n");
847
        }
848
        printk("\n");
849
}
850
 
851
static void print_eth(char *add)
852
{
853
        int i;
854
 
855
        printk("print_eth(%08x)\n", (unsigned int) add);
856
        for (i = 0; i < 6; i++)
857
                printk(" %2.2X", (unsigned char) add[i + 6]);
858
        printk(" =>");
859
        for (i = 0; i < 6; i++)
860
                printk(" %2.2X", (unsigned char) add[i]);
861
        printk(" : %2.2X%2.2X\n", (unsigned char) add[12], (unsigned char) add[13]);
862
}
863
 
864
/*
865
 * Open/initialize the board. This is called (in the current kernel)
866
 * sometime after booting when the 'ifconfig' program is run.
867
 *
868
 * This routine should set everything up anew at each open, even
869
 * registers that "should" only need to be set once at boot, so that
870
 * there is non-reboot way to recover if something goes wrong.
871
 */
872
static int
873
tc35815_open(struct net_device *dev)
874
{
875
        struct tc35815_local *lp = (struct tc35815_local *)dev->priv;
876
        /*
877
         * This is used if the interrupt line can turned off (shared).
878
         * See 3c503.c for an example of selecting the IRQ at config-time.
879
         */
880
 
881
        if (dev->irq == 0  ||
882
            request_irq(dev->irq, &tc35815_interrupt, SA_SHIRQ, cardname, dev)) {
883
                return -EAGAIN;
884
        }
885
 
886
        tc35815_chip_reset(dev);
887
 
888
        if (tc35815_init_queues(dev) != 0) {
889
                free_irq(dev->irq, dev);
890
                return -EAGAIN;
891
        }
892
 
893
        /* Reset the hardware here. Don't forget to set the station address. */
894
        tc35815_chip_init(dev);
895
 
896
        lp->tbusy = 0;
897
        netif_start_queue(dev);
898
 
899
        MOD_INC_USE_COUNT;
900
 
901
        return 0;
902
}
903
 
904
static void tc35815_tx_timeout(struct net_device *dev)
905
{
906
        struct tc35815_local *lp = (struct tc35815_local *)dev->priv;
907
        struct tc35815_regs *tr = (struct tc35815_regs *)dev->base_addr;
908
        int flags;
909
 
910
        save_and_cli(flags);
911
        printk(KERN_WARNING "%s: transmit timed out, status %#x\n",
912
               dev->name, tc_readl(&tr->Tx_Stat));
913
        /* Try to restart the adaptor. */
914
        tc35815_chip_reset(dev);
915
        tc35815_clear_queues(dev);
916
        tc35815_chip_init(dev);
917
        lp->tbusy=0;
918
        restore_flags(flags);
919
        dev->trans_start = jiffies;
920
        netif_wake_queue(dev);
921
}
922
 
923
static int tc35815_send_packet(struct sk_buff *skb, struct net_device *dev)
924
{
925
        struct tc35815_local *lp = (struct tc35815_local *)dev->priv;
926
        struct tc35815_regs *tr = (struct tc35815_regs *)dev->base_addr;
927
 
928
        if (netif_queue_stopped(dev)) {
929
                /*
930
                 * If we get here, some higher level has decided we are broken.
931
                 * There should really be a "kick me" function call instead.
932
                 */
933
                int tickssofar = jiffies - dev->trans_start;
934
                if (tickssofar < 5)
935
                        return 1;
936
                printk(KERN_WARNING "%s: transmit timed out, status %#x\n",
937
                       dev->name, tc_readl(&tr->Tx_Stat));
938
                /* Try to restart the adaptor. */
939
                tc35815_chip_reset(dev);
940
                tc35815_clear_queues(dev);
941
                tc35815_chip_init(dev);
942
                lp->tbusy=0;
943
                dev->trans_start = jiffies;
944
                netif_wake_queue(dev);
945
        }
946
 
947
        /*
948
         * Block a timer-based transmit from overlapping. This could better be
949
         * done with atomic_swap(1, lp->tbusy), but set_bit() works as well.
950
         */
951
        if (test_and_set_bit(0, (void*)&lp->tbusy) != 0) {
952
                printk(KERN_WARNING "%s: Transmitter access conflict.\n", dev->name);
953
                dev_kfree_skb_any(skb);
954
        } else {
955
                short length = ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN;
956
                unsigned char *buf = skb->data;
957
                struct TxFD *txfd = &lp->tfd_base[lp->tfd_start];
958
                int flags;
959
                lp->stats.tx_bytes += skb->len;
960
 
961
 
962
#ifdef __mips__
963
                dma_cache_wback_inv((unsigned long)buf, length);
964
#endif
965
 
966
                save_and_cli(flags);
967
 
968
                /* failsafe... */
969
                if (lp->tfd_start != lp->tfd_end)
970
                        tc35815_txdone(dev);
971
 
972
 
973
                txfd->bd.BuffData = cpu_to_le32(virt_to_bus(buf));
974
 
975
                txfd->bd.BDCtl = cpu_to_le32(length);
976
                txfd->fd.FDSystem = cpu_to_le32((__u32)skb);
977
                txfd->fd.FDCtl = cpu_to_le32(FD_CownsFD | (1 << FD_BDCnt_SHIFT));
978
 
979
                if (lp->tfd_start == lp->tfd_end) {
980
                        /* Start DMA Transmitter. */
981
                        txfd->fd.FDNext |= cpu_to_le32(FD_Next_EOL);
982
#ifdef GATHER_TXINT
983
                        txfd->fd.FDCtl |= cpu_to_le32(FD_FrmOpt_IntTx);
984
#endif
985
                        if (tc35815_debug > 2) {
986
                                printk("%s: starting TxFD.\n", dev->name);
987
                                dump_txfd(txfd);
988
                                if (tc35815_debug > 3)
989
                                        print_eth(buf);
990
                        }
991
                        tc_writel(virt_to_bus(txfd), &tr->TxFrmPtr);
992
                } else {
993
                        txfd->fd.FDNext &= cpu_to_le32(~FD_Next_EOL);
994
                        if (tc35815_debug > 2) {
995
                                printk("%s: queueing TxFD.\n", dev->name);
996
                                dump_txfd(txfd);
997
                                if (tc35815_debug > 3)
998
                                        print_eth(buf);
999
                        }
1000
                }
1001
                lp->tfd_start = (lp->tfd_start + 1) % TX_FD_NUM;
1002
 
1003
                dev->trans_start = jiffies;
1004
 
1005
                if ((lp->tfd_start + 1) % TX_FD_NUM != lp->tfd_end) {
1006
                        /* we can send another packet */
1007
                        lp->tbusy = 0;
1008
                        netif_start_queue(dev);
1009
                } else {
1010
                        netif_stop_queue(dev);
1011
                        if (tc35815_debug > 1)
1012
                                printk(KERN_WARNING "%s: TxFD Exhausted.\n", dev->name);
1013
                }
1014
                restore_flags(flags);
1015
        }
1016
 
1017
        return 0;
1018
}
1019
 
1020
#define FATAL_ERROR_INT \
1021
        (Int_IntPCI | Int_DmParErr | Int_IntNRAbt)
1022
static void tc35815_fatal_error_interrupt(struct net_device *dev, int status)
1023
{
1024
        static int count;
1025
        printk(KERN_WARNING "%s: Fatal Error Intterrupt (%#x):",
1026
               dev->name, status);
1027
 
1028
        if (status & Int_IntPCI)
1029
                printk(" IntPCI");
1030
        if (status & Int_DmParErr)
1031
                printk(" DmParErr");
1032
        if (status & Int_IntNRAbt)
1033
                printk(" IntNRAbt");
1034
        printk("\n");
1035
        if (count++ > 100)
1036
                panic("%s: Too many fatal errors.", dev->name);
1037
        printk(KERN_WARNING "%s: Resetting %s...\n", dev->name, cardname);
1038
        /* Try to restart the adaptor. */
1039
        tc35815_chip_reset(dev);
1040
        tc35815_clear_queues(dev);
1041
        tc35815_chip_init(dev);
1042
}
1043
 
1044
/*
1045
 * The typical workload of the driver:
1046
 *   Handle the network interface interrupts.
1047
 */
1048
static void tc35815_interrupt(int irq, void *dev_id, struct pt_regs * regs)
1049
{
1050
        struct net_device *dev = dev_id;
1051
        struct tc35815_regs *tr;
1052
        struct tc35815_local *lp;
1053
        int status, boguscount = 0;
1054
 
1055
        if (dev == NULL) {
1056
                printk(KERN_WARNING "%s: irq %d for unknown device.\n", cardname, irq);
1057
                return;
1058
        }
1059
 
1060
        tr = (struct tc35815_regs*)dev->base_addr;
1061
        lp = (struct tc35815_local *)dev->priv;
1062
 
1063
        do {
1064
                status = tc_readl(&tr->Int_Src);
1065
                if (status == 0)
1066
                        break;
1067
                tc_writel(status, &tr->Int_Src);        /* write to clear */
1068
 
1069
                /* Fatal errors... */
1070
                if (status & FATAL_ERROR_INT) {
1071
                        tc35815_fatal_error_interrupt(dev, status);
1072
                        break;
1073
                }
1074
                /* recoverable errors */
1075
                if (status & Int_IntFDAEx) {
1076
                        /* disable FDAEx int. (until we make rooms...) */
1077
                        tc_writel(tc_readl(&tr->Int_En) & ~Int_FDAExEn, &tr->Int_En);
1078
                        printk(KERN_WARNING
1079
                               "%s: Free Descriptor Area Exhausted (%#x).\n",
1080
                               dev->name, status);
1081
                        lp->stats.rx_dropped++;
1082
                }
1083
                if (status & Int_IntBLEx) {
1084
                        /* disable BLEx int. (until we make rooms...) */
1085
                        tc_writel(tc_readl(&tr->Int_En) & ~Int_BLExEn, &tr->Int_En);
1086
                        printk(KERN_WARNING
1087
                               "%s: Buffer List Exhausted (%#x).\n",
1088
                               dev->name, status);
1089
                        lp->stats.rx_dropped++;
1090
                }
1091
                if (status & Int_IntExBD) {
1092
                        printk(KERN_WARNING
1093
                               "%s: Excessive Buffer Descriptiors (%#x).\n",
1094
                               dev->name, status);
1095
                        lp->stats.rx_length_errors++;
1096
                }
1097
                /* normal notification */
1098
                if (status & Int_IntMacRx) {
1099
                        /* Got a packet(s). */
1100
                        lp->lstats.rx_ints++;
1101
                        tc35815_rx(dev);
1102
                }
1103
                if (status & Int_IntMacTx) {
1104
                        lp->lstats.tx_ints++;
1105
                        tc35815_txdone(dev);
1106
                }
1107
        } while (++boguscount < 20) ;
1108
 
1109
        return;
1110
}
1111
 
1112
/* We have a good packet(s), get it/them out of the buffers. */
1113
static void
1114
tc35815_rx(struct net_device *dev)
1115
{
1116
        struct tc35815_local *lp = (struct tc35815_local *)dev->priv;
1117
        struct tc35815_regs *tr = (struct tc35815_regs*)dev->base_addr;
1118
        unsigned int fdctl;
1119
        int i;
1120
        int buf_free_count = 0;
1121
        int fd_free_count = 0;
1122
 
1123
        while (!((fdctl = le32_to_cpu(lp->rfd_cur->fd.FDCtl)) & FD_CownsFD)) {
1124
                int status = le32_to_cpu(lp->rfd_cur->fd.FDStat);
1125
                int pkt_len = fdctl & FD_FDLength_MASK;
1126
                struct RxFD *next_rfd;
1127
                int bd_count = (fdctl & FD_BDCnt_MASK) >> FD_BDCnt_SHIFT;
1128
 
1129
                if (tc35815_debug > 2)
1130
                        dump_rxfd(lp->rfd_cur);
1131
                if (status & Rx_Good) {
1132
                        /* Malloc up new buffer. */
1133
                        struct sk_buff *skb;
1134
                        unsigned char *data;
1135
                        int cur_bd, offset;
1136
 
1137
                        lp->stats.rx_bytes += pkt_len;
1138
 
1139
                        skb = dev_alloc_skb(pkt_len + 2); /* +2: for reserve */
1140
                        if (skb == NULL) {
1141
                                printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n",
1142
                                       dev->name);
1143
                                lp->stats.rx_dropped++;
1144
                                break;
1145
                        }
1146
                        skb_reserve(skb, 2);   /* 16 bit alignment */
1147
                        skb->dev = dev;
1148
 
1149
                        data = skb_put(skb, pkt_len);
1150
 
1151
                        /* copy from receive buffer */
1152
                        cur_bd = 0;
1153
                        offset = 0;
1154
                        while (offset < pkt_len && cur_bd < bd_count) {
1155
                                int len = le32_to_cpu(lp->rfd_cur->bd[cur_bd].BDCtl) &
1156
                                        BD_BuffLength_MASK;
1157
                                void *rxbuf =
1158
                                        bus_to_virt(le32_to_cpu(lp->rfd_cur->bd[cur_bd].BuffData));
1159
#ifdef __mips__
1160
                                dma_cache_inv((unsigned long)rxbuf, len);
1161
#endif
1162
                                memcpy(data + offset, rxbuf, len);
1163
                                offset += len;
1164
                                cur_bd++;
1165
                        }
1166
        //              print_buf(data,pkt_len);
1167
                        if (tc35815_debug > 3)
1168
                                print_eth(data);
1169
                        skb->protocol = eth_type_trans(skb, dev);
1170
                        netif_rx(skb);
1171
                        lp->stats.rx_packets++;
1172
                } else {
1173
                        lp->stats.rx_errors++;
1174
                        /* WORKAROUND: LongErr and CRCErr means Overflow. */
1175
                        if ((status & Rx_LongErr) && (status & Rx_CRCErr)) {
1176
                                status &= ~(Rx_LongErr|Rx_CRCErr);
1177
                                status |= Rx_Over;
1178
                        }
1179
                        if (status & Rx_LongErr) lp->stats.rx_length_errors++;
1180
                        if (status & Rx_Over) lp->stats.rx_fifo_errors++;
1181
                        if (status & Rx_CRCErr) lp->stats.rx_crc_errors++;
1182
                        if (status & Rx_Align) lp->stats.rx_frame_errors++;
1183
                }
1184
 
1185
                if (bd_count > 0) {
1186
                        /* put Free Buffer back to controller */
1187
                        int bdctl = le32_to_cpu(lp->rfd_cur->bd[bd_count - 1].BDCtl);
1188
                        unsigned char id =
1189
                                (bdctl & BD_RxBDID_MASK) >> BD_RxBDID_SHIFT;
1190
                        if (id >= RX_BUF_PAGES) {
1191
                                printk("%s: invalid BDID.\n", dev->name);
1192
                                panic_queues(dev);
1193
                        }
1194
                        /* free old buffers */
1195
                        while (lp->fbl_curid != id) {
1196
                                bdctl = le32_to_cpu(lp->fbl_ptr->bd[lp->fbl_curid].BDCtl);
1197
                                if (bdctl & BD_CownsBD) {
1198
                                        printk("%s: Freeing invalid BD.\n",
1199
                                               dev->name);
1200
                                        panic_queues(dev);
1201
                                }
1202
                                /* pass BD to controler */
1203
                                /* Note: BDLength was modified by chip. */
1204
                                lp->fbl_ptr->bd[lp->fbl_curid].BDCtl =
1205
                                        cpu_to_le32(BD_CownsBD |
1206
                                                    (lp->fbl_curid << BD_RxBDID_SHIFT) |
1207
                                                    PAGE_SIZE);
1208
                                lp->fbl_curid =
1209
                                        (lp->fbl_curid + 1) % RX_BUF_PAGES;
1210
                                if (tc35815_debug > 2) {
1211
                                        printk("%s: Entering new FBD %d\n",
1212
                                               dev->name, lp->fbl_curid);
1213
                                        dump_frfd(lp->fbl_ptr);
1214
                                }
1215
                                buf_free_count++;
1216
                        }
1217
                }
1218
 
1219
                /* put RxFD back to controller */
1220
                next_rfd = bus_to_virt(le32_to_cpu(lp->rfd_cur->fd.FDNext));
1221
#ifdef __mips__
1222
                next_rfd = (struct RxFD *)vtonocache(next_rfd);
1223
#endif
1224
                if (next_rfd < lp->rfd_base || next_rfd > lp->rfd_limit) {
1225
                        printk("%s: RxFD FDNext invalid.\n", dev->name);
1226
                        panic_queues(dev);
1227
                }
1228
                for (i = 0; i < (bd_count + 1) / 2 + 1; i++) {
1229
                        /* pass FD to controler */
1230
                        lp->rfd_cur->fd.FDNext = cpu_to_le32(0xdeaddead);       /* for debug */
1231
                        lp->rfd_cur->fd.FDCtl = cpu_to_le32(FD_CownsFD);
1232
                        lp->rfd_cur++;
1233
                        fd_free_count++;
1234
                }
1235
 
1236
                lp->rfd_cur = next_rfd;
1237
        }
1238
 
1239
        /* re-enable BL/FDA Exhaust interupts. */
1240
        if (fd_free_count) {
1241
                tc_writel(tc_readl(&tr->Int_En) | Int_FDAExEn, &tr->Int_En);
1242
                if (buf_free_count)
1243
                        tc_writel(tc_readl(&tr->Int_En) | Int_BLExEn, &tr->Int_En);
1244
        }
1245
}
1246
 
1247
#ifdef NO_CHECK_CARRIER
1248
#define TX_STA_ERR      (Tx_ExColl|Tx_Under|Tx_Defer|Tx_LateColl|Tx_TxPar|Tx_SQErr)
1249
#else
1250
#define TX_STA_ERR      (Tx_ExColl|Tx_Under|Tx_Defer|Tx_NCarr|Tx_LateColl|Tx_TxPar|Tx_SQErr)
1251
#endif
1252
 
1253
static void
1254
tc35815_check_tx_stat(struct net_device *dev, int status)
1255
{
1256
        struct tc35815_local *lp = (struct tc35815_local *)dev->priv;
1257
        const char *msg = NULL;
1258
 
1259
        /* count collisions */
1260
        if (status & Tx_ExColl)
1261
                lp->stats.collisions += 16;
1262
        if (status & Tx_TxColl_MASK)
1263
                lp->stats.collisions += status & Tx_TxColl_MASK;
1264
 
1265
        /* WORKAROUND: ignore LostCrS in full duplex operation */
1266
        if (lp->fullduplex)
1267
                status &= ~Tx_NCarr;
1268
 
1269
        if (!(status & TX_STA_ERR)) {
1270
                /* no error. */
1271
                lp->stats.tx_packets++;
1272
                return;
1273
        }
1274
 
1275
        lp->stats.tx_errors++;
1276
        if (status & Tx_ExColl) {
1277
                lp->stats.tx_aborted_errors++;
1278
                msg = "Excessive Collision.";
1279
        }
1280
        if (status & Tx_Under) {
1281
                lp->stats.tx_fifo_errors++;
1282
                msg = "Tx FIFO Underrun.";
1283
        }
1284
        if (status & Tx_Defer) {
1285
                lp->stats.tx_fifo_errors++;
1286
                msg = "Excessive Deferral.";
1287
        }
1288
#ifndef NO_CHECK_CARRIER
1289
        if (status & Tx_NCarr) {
1290
                lp->stats.tx_carrier_errors++;
1291
                msg = "Lost Carrier Sense.";
1292
        }
1293
#endif
1294
        if (status & Tx_LateColl) {
1295
                lp->stats.tx_aborted_errors++;
1296
                msg = "Late Collision.";
1297
        }
1298
        if (status & Tx_TxPar) {
1299
                lp->stats.tx_fifo_errors++;
1300
                msg = "Transmit Parity Error.";
1301
        }
1302
        if (status & Tx_SQErr) {
1303
                lp->stats.tx_heartbeat_errors++;
1304
                msg = "Signal Quality Error.";
1305
        }
1306
        if (msg)
1307
                printk(KERN_WARNING "%s: %s (%#x)\n", dev->name, msg, status);
1308
}
1309
 
1310
static void
1311
tc35815_txdone(struct net_device *dev)
1312
{
1313
        struct tc35815_local *lp = (struct tc35815_local *)dev->priv;
1314
        struct tc35815_regs *tr = (struct tc35815_regs*)dev->base_addr;
1315
        struct TxFD *txfd;
1316
        unsigned int fdctl;
1317
        int num_done = 0;
1318
 
1319
        txfd = &lp->tfd_base[lp->tfd_end];
1320
        while (lp->tfd_start != lp->tfd_end &&
1321
               !((fdctl = le32_to_cpu(txfd->fd.FDCtl)) & FD_CownsFD)) {
1322
                int status = le32_to_cpu(txfd->fd.FDStat);
1323
                struct sk_buff *skb;
1324
                unsigned long fdnext = le32_to_cpu(txfd->fd.FDNext);
1325
 
1326
                if (tc35815_debug > 2) {
1327
                        printk("%s: complete TxFD.\n", dev->name);
1328
                        dump_txfd(txfd);
1329
                }
1330
                tc35815_check_tx_stat(dev, status);
1331
 
1332
                skb = (struct sk_buff *)le32_to_cpu(txfd->fd.FDSystem);
1333
                if (skb) {
1334
                        dev_kfree_skb_any(skb);
1335
                }
1336
                txfd->fd.FDSystem = cpu_to_le32(0);
1337
 
1338
                num_done++;
1339
                lp->tfd_end = (lp->tfd_end + 1) % TX_FD_NUM;
1340
                txfd = &lp->tfd_base[lp->tfd_end];
1341
                if ((fdnext & ~FD_Next_EOL) != virt_to_bus(txfd)) {
1342
                        printk("%s: TxFD FDNext invalid.\n", dev->name);
1343
                        panic_queues(dev);
1344
                }
1345
                if (fdnext & FD_Next_EOL) {
1346
                        /* DMA Transmitter has been stopping... */
1347
                        if (lp->tfd_end != lp->tfd_start) {
1348
                                int head = (lp->tfd_start + TX_FD_NUM - 1) % TX_FD_NUM;
1349
                                struct TxFD* txhead = &lp->tfd_base[head];
1350
                                int qlen = (lp->tfd_start + TX_FD_NUM
1351
                                            - lp->tfd_end) % TX_FD_NUM;
1352
 
1353
                                if (!(le32_to_cpu(txfd->fd.FDCtl) & FD_CownsFD)) {
1354
                                        printk("%s: TxFD FDCtl invalid.\n", dev->name);
1355
                                        panic_queues(dev);
1356
                                }
1357
                                /* log max queue length */
1358
                                if (lp->lstats.max_tx_qlen < qlen)
1359
                                        lp->lstats.max_tx_qlen = qlen;
1360
 
1361
 
1362
                                /* start DMA Transmitter again */
1363
                                txhead->fd.FDNext |= cpu_to_le32(FD_Next_EOL);
1364
#ifdef GATHER_TXINT
1365
                                txhead->fd.FDCtl |= cpu_to_le32(FD_FrmOpt_IntTx);
1366
#endif
1367
                                if (tc35815_debug > 2) {
1368
                                        printk("%s: start TxFD on queue.\n",
1369
                                               dev->name);
1370
                                        dump_txfd(txfd);
1371
                                }
1372
                                tc_writel(virt_to_bus(txfd), &tr->TxFrmPtr);
1373
                        }
1374
                        break;
1375
                }
1376
        }
1377
 
1378
        if (num_done > 0 && lp->tbusy) {
1379
                lp->tbusy = 0;
1380
                netif_start_queue(dev);
1381
        }
1382
}
1383
 
1384
/* The inverse routine to tc35815_open(). */
1385
static int
1386
tc35815_close(struct net_device *dev)
1387
{
1388
        struct tc35815_local *lp = (struct tc35815_local *)dev->priv;
1389
 
1390
        lp->tbusy = 1;
1391
        netif_stop_queue(dev);
1392
 
1393
        /* Flush the Tx and disable Rx here. */
1394
 
1395
        tc35815_chip_reset(dev);
1396
        free_irq(dev->irq, dev);
1397
 
1398
        tc35815_free_queues(dev);
1399
 
1400
        MOD_DEC_USE_COUNT;
1401
 
1402
        return 0;
1403
}
1404
 
1405
/*
1406
 * Get the current statistics.
1407
 * This may be called with the card open or closed.
1408
 */
1409
static struct net_device_stats *tc35815_get_stats(struct net_device *dev)
1410
{
1411
        struct tc35815_local *lp = (struct tc35815_local *)dev->priv;
1412
        struct tc35815_regs *tr = (struct tc35815_regs*)dev->base_addr;
1413
        unsigned long flags;
1414
 
1415
        if (netif_running(dev)) {
1416
                save_and_cli(flags);
1417
                /* Update the statistics from the device registers. */
1418
                lp->stats.rx_missed_errors = tc_readl(&tr->Miss_Cnt);
1419
                restore_flags(flags);
1420
        }
1421
 
1422
        return &lp->stats;
1423
}
1424
 
1425
static void tc35815_set_cam_entry(struct tc35815_regs *tr, int index, unsigned char *addr)
1426
{
1427
        int cam_index = index * 6;
1428
        unsigned long cam_data;
1429
        unsigned long saved_addr;
1430
        saved_addr = tc_readl(&tr->CAM_Adr);
1431
 
1432
        if (tc35815_debug > 1) {
1433
                int i;
1434
                printk(KERN_DEBUG "%s: CAM %d:", cardname, index);
1435
                for (i = 0; i < 6; i++)
1436
                        printk(" %02x", addr[i]);
1437
                printk("\n");
1438
        }
1439
        if (index & 1) {
1440
                /* read modify write */
1441
                tc_writel(cam_index - 2, &tr->CAM_Adr);
1442
                cam_data = tc_readl(&tr->CAM_Data) & 0xffff0000;
1443
                cam_data |= addr[0] << 8 | addr[1];
1444
                tc_writel(cam_data, &tr->CAM_Data);
1445
                /* write whole word */
1446
                tc_writel(cam_index + 2, &tr->CAM_Adr);
1447
                cam_data = (addr[2] << 24) | (addr[3] << 16) | (addr[4] << 8) | addr[5];
1448
                tc_writel(cam_data, &tr->CAM_Data);
1449
        } else {
1450
                /* write whole word */
1451
                tc_writel(cam_index, &tr->CAM_Adr);
1452
                cam_data = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) | addr[3];
1453
                tc_writel(cam_data, &tr->CAM_Data);
1454
                /* read modify write */
1455
                tc_writel(cam_index + 4, &tr->CAM_Adr);
1456
                cam_data = tc_readl(&tr->CAM_Data) & 0x0000ffff;
1457
                cam_data |= addr[4] << 24 | (addr[5] << 16);
1458
                tc_writel(cam_data, &tr->CAM_Data);
1459
        }
1460
 
1461
        if (tc35815_debug > 2) {
1462
                int i;
1463
                for (i = cam_index / 4; i < cam_index / 4 + 2; i++) {
1464
                        tc_writel(i * 4, &tr->CAM_Adr);
1465
                        printk("CAM 0x%x: %08x",
1466
                               i * 4, tc_readl(&tr->CAM_Data));
1467
                }
1468
        }
1469
        tc_writel(saved_addr, &tr->CAM_Adr);
1470
}
1471
 
1472
 
1473
/*
1474
 * Set or clear the multicast filter for this adaptor.
1475
 * num_addrs == -1      Promiscuous mode, receive all packets
1476
 * num_addrs == 0       Normal mode, clear multicast list
1477
 * num_addrs > 0        Multicast mode, receive normal and MC packets,
1478
 *                      and do best-effort filtering.
1479
 */
1480
static void
1481
tc35815_set_multicast_list(struct net_device *dev)
1482
{
1483
        struct tc35815_regs *tr = (struct tc35815_regs*)dev->base_addr;
1484
 
1485
        if (dev->flags&IFF_PROMISC)
1486
        {
1487
                /* Enable promiscuous mode */
1488
                tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc | CAM_StationAcc, &tr->CAM_Ctl);
1489
        }
1490
        else if((dev->flags&IFF_ALLMULTI) || dev->mc_count > CAM_ENTRY_MAX - 3)
1491
        {
1492
                /* CAM 0, 1, 20 are reserved. */
1493
                /* Disable promiscuous mode, use normal mode. */
1494
                tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc, &tr->CAM_Ctl);
1495
        }
1496
        else if(dev->mc_count)
1497
        {
1498
                struct dev_mc_list* cur_addr = dev->mc_list;
1499
                int i;
1500
                int ena_bits = CAM_Ena_Bit(CAM_ENTRY_SOURCE);
1501
 
1502
                tc_writel(0, &tr->CAM_Ctl);
1503
                /* Walk the address list, and load the filter */
1504
                for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
1505
                        if (!cur_addr)
1506
                                break;
1507
                        /* entry 0,1 is reserved. */
1508
                        tc35815_set_cam_entry(tr, i + 2, cur_addr->dmi_addr);
1509
                        ena_bits |= CAM_Ena_Bit(i + 2);
1510
                }
1511
                tc_writel(ena_bits, &tr->CAM_Ena);
1512
                tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
1513
        }
1514
        else {
1515
                tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena);
1516
                tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
1517
        }
1518
}
1519
 
1520
static unsigned long tc_phy_read(struct tc35815_regs *tr, int phy, int phy_reg)
1521
{
1522
        unsigned long data;
1523
        int flags;
1524
        save_and_cli(flags);
1525
        tc_writel(MD_CA_Busy | (phy << 5) | phy_reg, &tr->MD_CA);
1526
        while (tc_readl(&tr->MD_CA) & MD_CA_Busy)
1527
                ;
1528
        data = tc_readl(&tr->MD_Data);
1529
        restore_flags(flags);
1530
        return data;
1531
}
1532
 
1533
static void tc_phy_write(unsigned long d, struct tc35815_regs *tr, int phy, int phy_reg)
1534
{
1535
        int flags;
1536
        save_and_cli(flags);
1537
        tc_writel(d, &tr->MD_Data);
1538
        tc_writel(MD_CA_Busy | MD_CA_Wr | (phy << 5) | phy_reg, &tr->MD_CA);
1539
        while (tc_readl(&tr->MD_CA) & MD_CA_Busy)
1540
                ;
1541
        restore_flags(flags);
1542
}
1543
 
1544
static void tc35815_phy_chip_init(struct net_device *dev)
1545
{
1546
        struct tc35815_local *lp = (struct tc35815_local *)dev->priv;
1547
        struct tc35815_regs *tr = (struct tc35815_regs*)dev->base_addr;
1548
        static int first = 1;
1549
        unsigned short ctl;
1550
 
1551
        if (first) {
1552
                unsigned short id0, id1;
1553
                int count;
1554
                first = 0;
1555
 
1556
                /* first data written to the PHY will be an ID number */
1557
                tc_phy_write(0, tr, 0, MII_CONTROL);      /* ID:0 */
1558
#if 0
1559
                tc_phy_write(MIICNTL_RESET, tr, 0, MII_CONTROL);
1560
                printk(KERN_INFO "%s: Resetting PHY...", dev->name);
1561
                while (tc_phy_read(tr, 0, MII_CONTROL) & MIICNTL_RESET)
1562
                        ;
1563
                printk("\n");
1564
                tc_phy_write(MIICNTL_AUTO|MIICNTL_SPEED|MIICNTL_FDX, tr, 0,
1565
                             MII_CONTROL);
1566
#endif
1567
                id0 = tc_phy_read(tr, 0, MII_PHY_ID0);
1568
                id1 = tc_phy_read(tr, 0, MII_PHY_ID1);
1569
                printk(KERN_DEBUG "%s: PHY ID %04x %04x\n", dev->name,
1570
                       id0, id1);
1571
                if (lp->option & TC35815_OPT_10M) {
1572
                        lp->linkspeed = 10;
1573
                        lp->fullduplex = (lp->option & TC35815_OPT_FULLDUP) != 0;
1574
                } else if (lp->option & TC35815_OPT_100M) {
1575
                        lp->linkspeed = 100;
1576
                        lp->fullduplex = (lp->option & TC35815_OPT_FULLDUP) != 0;
1577
                } else {
1578
                        /* auto negotiation */
1579
                        unsigned long neg_result;
1580
                        tc_phy_write(MIICNTL_AUTO | MIICNTL_RST_AUTO, tr, 0, MII_CONTROL);
1581
                        printk(KERN_INFO "%s: Auto Negotiation...", dev->name);
1582
                        count = 0;
1583
                        while (!(tc_phy_read(tr, 0, MII_STATUS) & MIISTAT_AUTO_DONE)) {
1584
                                if (count++ > 5000) {
1585
                                        printk(" failed. Assume 10Mbps\n");
1586
                                        lp->linkspeed = 10;
1587
                                        lp->fullduplex = 0;
1588
                                        goto done;
1589
                                }
1590
                                if (count % 512 == 0)
1591
                                        printk(".");
1592
                                mdelay(1);
1593
                        }
1594
                        printk(" done.\n");
1595
                        neg_result = tc_phy_read(tr, 0, MII_ANLPAR);
1596
                        if (neg_result & (MII_AN_TX_FDX | MII_AN_TX_HDX))
1597
                                lp->linkspeed = 100;
1598
                        else
1599
                                lp->linkspeed = 10;
1600
                        if (neg_result & (MII_AN_TX_FDX | MII_AN_10_FDX))
1601
                                lp->fullduplex = 1;
1602
                        else
1603
                                lp->fullduplex = 0;
1604
                done:
1605
                        ;
1606
                }
1607
        }
1608
 
1609
        ctl = 0;
1610
        if (lp->linkspeed == 100)
1611
                ctl |= MIICNTL_SPEED;
1612
        if (lp->fullduplex)
1613
                ctl |= MIICNTL_FDX;
1614
        tc_phy_write(ctl, tr, 0, MII_CONTROL);
1615
 
1616
        if (lp->fullduplex) {
1617
                tc_writel(tc_readl(&tr->MAC_Ctl) | MAC_FullDup, &tr->MAC_Ctl);
1618
        }
1619
}
1620
 
1621
static void tc35815_chip_reset(struct net_device *dev)
1622
{
1623
        struct tc35815_regs *tr = (struct tc35815_regs*)dev->base_addr;
1624
 
1625
        /* reset the controller */
1626
        tc_writel(MAC_Reset, &tr->MAC_Ctl);
1627
        while (tc_readl(&tr->MAC_Ctl) & MAC_Reset)
1628
                ;
1629
 
1630
        tc_writel(0, &tr->MAC_Ctl);
1631
 
1632
        /* initialize registers to default value */
1633
        tc_writel(0, &tr->DMA_Ctl);
1634
        tc_writel(0, &tr->TxThrsh);
1635
        tc_writel(0, &tr->TxPollCtr);
1636
        tc_writel(0, &tr->RxFragSize);
1637
        tc_writel(0, &tr->Int_En);
1638
        tc_writel(0, &tr->FDA_Bas);
1639
        tc_writel(0, &tr->FDA_Lim);
1640
        tc_writel(0xffffffff, &tr->Int_Src);    /* Write 1 to clear */
1641
        tc_writel(0, &tr->CAM_Ctl);
1642
        tc_writel(0, &tr->Tx_Ctl);
1643
        tc_writel(0, &tr->Rx_Ctl);
1644
        tc_writel(0, &tr->CAM_Ena);
1645
        (void)tc_readl(&tr->Miss_Cnt);  /* Read to clear */
1646
 
1647
}
1648
 
1649
static void tc35815_chip_init(struct net_device *dev)
1650
{
1651
        struct tc35815_local *lp = (struct tc35815_local *)dev->priv;
1652
        struct tc35815_regs *tr = (struct tc35815_regs*)dev->base_addr;
1653
        int flags;
1654
        unsigned long txctl = TX_CTL_CMD;
1655
 
1656
        tc35815_phy_chip_init(dev);
1657
 
1658
        /* load station address to CAM */
1659
        tc35815_set_cam_entry(tr, CAM_ENTRY_SOURCE, dev->dev_addr);
1660
 
1661
        /* Enable CAM (broadcast and unicast) */
1662
        tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena);
1663
        tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
1664
 
1665
        save_and_cli(flags);
1666
 
1667
        tc_writel(DMA_BURST_SIZE, &tr->DMA_Ctl);
1668
 
1669
        tc_writel(RxFrag_EnPack | ETH_ZLEN, &tr->RxFragSize);   /* Packing */
1670
        tc_writel(0, &tr->TxPollCtr);    /* Batch mode */
1671
        tc_writel(TX_THRESHOLD, &tr->TxThrsh);
1672
        tc_writel(INT_EN_CMD, &tr->Int_En);
1673
 
1674
        /* set queues */
1675
        tc_writel(virt_to_bus(lp->rfd_base), &tr->FDA_Bas);
1676
        tc_writel((unsigned long)lp->rfd_limit - (unsigned long)lp->rfd_base,
1677
                  &tr->FDA_Lim);
1678
        /*
1679
         * Activation method:
1680
         * First, enable eht MAC Transmitter and the DMA Receive circuits.
1681
         * Then enable the DMA Transmitter and the MAC Receive circuits.
1682
         */
1683
        tc_writel(virt_to_bus(lp->fbl_ptr), &tr->BLFrmPtr);     /* start DMA receiver */
1684
        tc_writel(RX_CTL_CMD, &tr->Rx_Ctl);     /* start MAC receiver */
1685
        /* start MAC transmitter */
1686
        /* WORKAROUND: ignore LostCrS in full duplex operation */
1687
        if (lp->fullduplex)
1688
                txctl = TX_CTL_CMD & ~Tx_EnLCarr;
1689
#ifdef GATHER_TXINT
1690
        txctl &= ~Tx_EnComp;    /* disable global tx completion int. */
1691
#endif
1692
        tc_writel(txctl, &tr->Tx_Ctl);
1693
#if 0   /* No need to polling */
1694
        tc_writel(virt_to_bus(lp->tfd_base), &tr->TxFrmPtr);    /* start DMA transmitter */
1695
#endif
1696
        restore_flags(flags);
1697
}
1698
 
1699
static int tc35815_proc_info(char *buffer, char **start, off_t offset, int length, int *eof, void *data)
1700
{
1701
        int len = 0;
1702
        off_t pos = 0;
1703
        off_t begin = 0;
1704
        struct net_device *dev;
1705
 
1706
        len += sprintf(buffer, "TC35815 statistics:\n");
1707
        for (dev = root_tc35815_dev; dev; dev = ((struct tc35815_local *)dev->priv)->next_module) {
1708
                struct tc35815_local *lp = (struct tc35815_local *)dev->priv;
1709
                len += sprintf(buffer + len,
1710
                               "%s: tx_ints %d, rx_ints %d, max_tx_qlen %d\n",
1711
                               dev->name,
1712
                               lp->lstats.tx_ints,
1713
                               lp->lstats.rx_ints,
1714
                               lp->lstats.max_tx_qlen);
1715
                pos = begin + len;
1716
 
1717
                if (pos < offset) {
1718
                        len = 0;
1719
                        begin = pos;
1720
                }
1721
 
1722
                if (pos > offset+length) break;
1723
        }
1724
 
1725
        *start = buffer + (offset - begin);
1726
        len -= (offset - begin);
1727
 
1728
        if (len > length) len = length;
1729
 
1730
        return len;
1731
}
1732
 
1733
/* XXX */
1734
void
1735
tc35815_killall(void)
1736
{
1737
        struct net_device *dev;
1738
 
1739
        for (dev = root_tc35815_dev; dev; dev = ((struct tc35815_local *)dev->priv)->next_module) {
1740
                if (dev->flags&IFF_UP){
1741
                        dev->stop(dev);
1742
                }
1743
        }
1744
}
1745
 
1746
static struct pci_driver tc35815_driver = {
1747
        name:  TC35815_MODULE_NAME,
1748
        probe: tc35815_probe,
1749
        remove: NULL,
1750
        id_table: tc35815_pci_tbl,
1751
};
1752
 
1753
static int __init tc35815_init_module(void)
1754
{
1755
        int err;
1756
 
1757
        if ((err = pci_module_init(&tc35815_driver)) < 0 )
1758
                       return err;
1759
        else
1760
                return 0;
1761
}
1762
 
1763
static void __exit tc35815_cleanup_module(void)
1764
{
1765
        struct net_device *next_dev;
1766
 
1767
        /* No need to check MOD_IN_USE, as sys_delete_module() checks. */
1768
        while (root_tc35815_dev) {
1769
                struct net_device *dev = root_tc35815_dev;
1770
                next_dev = ((struct tc35815_local *)dev->priv)->next_module;
1771
                kfree(dev->priv);
1772
                iounmap((void *)(dev->base_addr));
1773
                unregister_netdev(dev);
1774
                kfree(dev);
1775
                root_tc35815_dev = next_dev;
1776
        }
1777
}
1778
module_init(tc35815_init_module);
1779
module_exit(tc35815_cleanup_module);

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