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1275 |
phoenix |
/* tulip_core.c: A DEC 21x4x-family ethernet driver for Linux. */
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/*
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Maintained by Jeff Garzik <jgarzik@pobox.com>
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Copyright 2000-2002 The Linux Kernel Team
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Written/copyright 1994-2001 by Donald Becker.
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This software may be used and distributed according to the terms
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of the GNU General Public License, incorporated herein by reference.
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Please refer to Documentation/DocBook/tulip.{pdf,ps,html}
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for more information on this driver, or visit the project
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Web page at http://sourceforge.net/projects/tulip/
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*/
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#define DRV_NAME "tulip"
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#define DRV_VERSION "0.9.15-pre12"
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#define DRV_RELDATE "Aug 9, 2002"
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#include <linux/config.h>
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#include <linux/module.h>
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#include "tulip.h"
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/etherdevice.h>
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#include <linux/delay.h>
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#include <linux/mii.h>
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#include <linux/ethtool.h>
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#include <linux/crc32.h>
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#include <asm/unaligned.h>
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#include <asm/uaccess.h>
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#ifdef __sparc__
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#include <asm/pbm.h>
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#endif
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static char version[] __devinitdata =
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"Linux Tulip driver version " DRV_VERSION " (" DRV_RELDATE ")\n";
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/* A few user-configurable values. */
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/* Maximum events (Rx packets, etc.) to handle at each interrupt. */
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static unsigned int max_interrupt_work = 25;
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#define MAX_UNITS 8
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/* Used to pass the full-duplex flag, etc. */
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static int full_duplex[MAX_UNITS];
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static int options[MAX_UNITS];
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static int mtu[MAX_UNITS]; /* Jumbo MTU for interfaces. */
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/* The possible media types that can be set in options[] are: */
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const char * const medianame[32] = {
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"10baseT", "10base2", "AUI", "100baseTx",
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"10baseT-FDX", "100baseTx-FDX", "100baseT4", "100baseFx",
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"100baseFx-FDX", "MII 10baseT", "MII 10baseT-FDX", "MII",
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"10baseT(forced)", "MII 100baseTx", "MII 100baseTx-FDX", "MII 100baseT4",
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"MII 100baseFx-HDX", "MII 100baseFx-FDX", "Home-PNA 1Mbps", "Invalid-19",
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"","","","", "","","","", "","","","Transceiver reset",
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};
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/* Set the copy breakpoint for the copy-only-tiny-buffer Rx structure. */
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#if defined(__alpha__) || defined(__arm__) || defined(__hppa__) \
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|| defined(__sparc_) || defined(__ia64__) \
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|| defined(__sh__) || defined(__mips__) || defined(__SH5__)
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static int rx_copybreak = 1518;
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#else
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static int rx_copybreak = 100;
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#endif
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/*
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Set the bus performance register.
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Typical: Set 16 longword cache alignment, no burst limit.
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Cache alignment bits 15:14 Burst length 13:8
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0000 No alignment 0x00000000 unlimited 0800 8 longwords
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4000 8 longwords 0100 1 longword 1000 16 longwords
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8000 16 longwords 0200 2 longwords 2000 32 longwords
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C000 32 longwords 0400 4 longwords
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Warning: many older 486 systems are broken and require setting 0x00A04800
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8 longword cache alignment, 8 longword burst.
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ToDo: Non-Intel setting could be better.
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*/
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#if defined(__alpha__) || defined(__ia64__) || defined(__x86_64__)
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static int csr0 = 0x01A00000 | 0xE000;
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#elif defined(__i386__) || defined(__powerpc__)
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static int csr0 = 0x01A00000 | 0x8000;
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#elif defined(__sparc__) || defined(__hppa__)
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/* The UltraSparc PCI controllers will disconnect at every 64-byte
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* crossing anyways so it makes no sense to tell Tulip to burst
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* any more than that.
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*/
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static int csr0 = 0x01A00000 | 0x9000;
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#elif defined(__arm__) || defined(__sh__)
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static int csr0 = 0x01A00000 | 0x4800;
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#elif defined(__mips__)
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static int csr0 = 0x00200000 | 0x4000;
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#else
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#warning Processor architecture undefined!
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static int csr0 = 0x00A00000 | 0x4800;
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#endif
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/* Operational parameters that usually are not changed. */
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/* Time in jiffies before concluding the transmitter is hung. */
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#define TX_TIMEOUT (4*HZ)
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MODULE_AUTHOR("The Linux Kernel Team");
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MODULE_DESCRIPTION("Digital 21*4* Tulip ethernet driver");
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MODULE_LICENSE("GPL");
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MODULE_PARM(tulip_debug, "i");
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MODULE_PARM(max_interrupt_work, "i");
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MODULE_PARM(rx_copybreak, "i");
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MODULE_PARM(csr0, "i");
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MODULE_PARM(options, "1-" __MODULE_STRING(MAX_UNITS) "i");
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MODULE_PARM(full_duplex, "1-" __MODULE_STRING(MAX_UNITS) "i");
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#define PFX DRV_NAME ": "
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#ifdef TULIP_DEBUG
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int tulip_debug = TULIP_DEBUG;
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#else
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int tulip_debug = 1;
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#endif
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/*
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* This table use during operation for capabilities and media timer.
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*
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* It is indexed via the values in 'enum chips'
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*/
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struct tulip_chip_table tulip_tbl[] = {
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/* DC21040 */
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{ "Digital DC21040 Tulip", 128, 0x0001ebef, 0, tulip_timer },
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/* DC21041 */
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{ "Digital DC21041 Tulip", 128, 0x0001ebef,
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HAS_MEDIA_TABLE | HAS_NWAY, tulip_timer },
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/* DC21140 */
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{ "Digital DS21140 Tulip", 128, 0x0001ebef,
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HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | HAS_PCI_MWI, tulip_timer },
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/* DC21142, DC21143 */
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{ "Digital DS21143 Tulip", 128, 0x0801fbff,
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HAS_MII | HAS_MEDIA_TABLE | ALWAYS_CHECK_MII | HAS_ACPI | HAS_NWAY
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| HAS_INTR_MITIGATION | HAS_PCI_MWI, t21142_timer },
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/* LC82C168 */
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{ "Lite-On 82c168 PNIC", 256, 0x0001fbef,
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HAS_MII | HAS_PNICNWAY, pnic_timer },
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/* MX98713 */
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{ "Macronix 98713 PMAC", 128, 0x0001ebef,
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HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM, mxic_timer },
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/* MX98715 */
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{ "Macronix 98715 PMAC", 256, 0x0001ebef,
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HAS_MEDIA_TABLE, mxic_timer },
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/* MX98725 */
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{ "Macronix 98725 PMAC", 256, 0x0001ebef,
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HAS_MEDIA_TABLE, mxic_timer },
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/* AX88140 */
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{ "ASIX AX88140", 128, 0x0001fbff,
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HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | MC_HASH_ONLY
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| IS_ASIX, tulip_timer },
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/* PNIC2 */
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{ "Lite-On PNIC-II", 256, 0x0801fbff,
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HAS_MII | HAS_NWAY | HAS_8023X | HAS_PCI_MWI, pnic2_timer },
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/* COMET */
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{ "ADMtek Comet", 256, 0x0001abef,
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MC_HASH_ONLY | COMET_MAC_ADDR, comet_timer },
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/* COMPEX9881 */
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{ "Compex 9881 PMAC", 128, 0x0001ebef,
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HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM, mxic_timer },
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/* I21145 */
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{ "Intel DS21145 Tulip", 128, 0x0801fbff,
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HAS_MII | HAS_MEDIA_TABLE | ALWAYS_CHECK_MII | HAS_ACPI
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| HAS_NWAY | HAS_PCI_MWI, t21142_timer },
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/* DM910X */
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{ "Davicom DM9102/DM9102A", 128, 0x0001ebef,
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HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | HAS_ACPI,
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tulip_timer },
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/* CONEXANT */
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{ "Conexant LANfinity", 256, 0x0001ebef,
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HAS_MII, tulip_timer },
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};
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static struct pci_device_id tulip_pci_tbl[] __devinitdata = {
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{ 0x1011, 0x0002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DC21040 },
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{ 0x1011, 0x0014, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DC21041 },
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{ 0x1011, 0x0009, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DC21140 },
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{ 0x1011, 0x0019, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DC21143 },
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{ 0x11AD, 0x0002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, LC82C168 },
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{ 0x10d9, 0x0512, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98713 },
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{ 0x10d9, 0x0531, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98715 },
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/* { 0x10d9, 0x0531, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98725 },*/
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{ 0x125B, 0x1400, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AX88140 },
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{ 0x11AD, 0xc115, PCI_ANY_ID, PCI_ANY_ID, 0, 0, PNIC2 },
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{ 0x1317, 0x0981, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
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{ 0x1317, 0x0985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
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{ 0x1317, 0x1985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
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{ 0x1317, 0x9511, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
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{ 0x13D1, 0xAB02, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
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{ 0x13D1, 0xAB03, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
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{ 0x13D1, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
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{ 0x104A, 0x0981, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
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{ 0x104A, 0x2774, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
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{ 0x1259, 0xa120, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
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{ 0x11F6, 0x9881, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMPEX9881 },
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{ 0x8086, 0x0039, PCI_ANY_ID, PCI_ANY_ID, 0, 0, I21145 },
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{ 0x1282, 0x9100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DM910X },
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{ 0x1282, 0x9102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DM910X },
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{ 0x1113, 0x1216, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
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{ 0x1113, 0x1217, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98715 },
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{ 0x1113, 0x9511, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
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{ 0x1186, 0x1561, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
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{ 0x1626, 0x8410, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
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{ 0x1737, 0xAB09, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
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{ 0x1737, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
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{ 0x17B3, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
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{ 0x14f1, 0x1803, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CONEXANT },
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{ 0x10b9, 0x5261, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DM910X }, /* ALi 1563 integrated ethernet */
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{ 0x10b7, 0x9300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, /* 3Com 3CSOHO100B-TX */
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{ } /* terminate list */
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};
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MODULE_DEVICE_TABLE(pci, tulip_pci_tbl);
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/* A full-duplex map for media types. */
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const char tulip_media_cap[32] =
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{0,0,0,16, 3,19,16,24, 27,4,7,5, 0,20,23,20, 28,31,0,0, };
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u8 t21040_csr13[] = {2,0x0C,8,4, 4,0,0,0, 0,0,0,0, 4,0,0,0};
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/* 21041 transceiver register settings: 10-T, 10-2, AUI, 10-T, 10T-FD*/
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u16 t21041_csr13[] = {
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csr13_mask_10bt, /* 10-T */
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csr13_mask_auibnc, /* 10-2 */
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csr13_mask_auibnc, /* AUI */
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csr13_mask_10bt, /* 10-T */
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csr13_mask_10bt, /* 10T-FD */
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};
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u16 t21041_csr14[] = { 0xFFFF, 0xF7FD, 0xF7FD, 0x7F3F, 0x7F3D, };
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u16 t21041_csr15[] = { 0x0008, 0x0006, 0x000E, 0x0008, 0x0008, };
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| 257 |
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| 259 |
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static void tulip_tx_timeout(struct net_device *dev);
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static void tulip_init_ring(struct net_device *dev);
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static int tulip_start_xmit(struct sk_buff *skb, struct net_device *dev);
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static int tulip_open(struct net_device *dev);
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| 263 |
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static int tulip_close(struct net_device *dev);
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static void tulip_up(struct net_device *dev);
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static void tulip_down(struct net_device *dev);
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static struct net_device_stats *tulip_get_stats(struct net_device *dev);
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| 267 |
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static int private_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
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| 268 |
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static void set_rx_mode(struct net_device *dev);
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| 270 |
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| 271 |
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| 272 |
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static void tulip_set_power_state (struct tulip_private *tp,
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int sleep, int snooze)
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| 274 |
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{
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| 275 |
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if (tp->flags & HAS_ACPI) {
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| 276 |
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u32 tmp, newtmp;
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| 277 |
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pci_read_config_dword (tp->pdev, CFDD, &tmp);
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| 278 |
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newtmp = tmp & ~(CFDD_Sleep | CFDD_Snooze);
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| 279 |
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if (sleep)
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newtmp |= CFDD_Sleep;
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| 281 |
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else if (snooze)
|
| 282 |
|
|
newtmp |= CFDD_Snooze;
|
| 283 |
|
|
if (tmp != newtmp)
|
| 284 |
|
|
pci_write_config_dword (tp->pdev, CFDD, newtmp);
|
| 285 |
|
|
}
|
| 286 |
|
|
|
| 287 |
|
|
}
|
| 288 |
|
|
|
| 289 |
|
|
|
| 290 |
|
|
static void tulip_up(struct net_device *dev)
|
| 291 |
|
|
{
|
| 292 |
|
|
struct tulip_private *tp = (struct tulip_private *)dev->priv;
|
| 293 |
|
|
long ioaddr = dev->base_addr;
|
| 294 |
|
|
int next_tick = 3*HZ;
|
| 295 |
|
|
int i;
|
| 296 |
|
|
|
| 297 |
|
|
/* Wake the chip from sleep/snooze mode. */
|
| 298 |
|
|
tulip_set_power_state (tp, 0, 0);
|
| 299 |
|
|
|
| 300 |
|
|
/* On some chip revs we must set the MII/SYM port before the reset!? */
|
| 301 |
|
|
if (tp->mii_cnt || (tp->mtable && tp->mtable->has_mii))
|
| 302 |
|
|
outl(0x00040000, ioaddr + CSR6);
|
| 303 |
|
|
|
| 304 |
|
|
/* Reset the chip, holding bit 0 set at least 50 PCI cycles. */
|
| 305 |
|
|
outl(0x00000001, ioaddr + CSR0);
|
| 306 |
|
|
udelay(100);
|
| 307 |
|
|
|
| 308 |
|
|
/* Deassert reset.
|
| 309 |
|
|
Wait the specified 50 PCI cycles after a reset by initializing
|
| 310 |
|
|
Tx and Rx queues and the address filter list. */
|
| 311 |
|
|
outl(tp->csr0, ioaddr + CSR0);
|
| 312 |
|
|
udelay(100);
|
| 313 |
|
|
|
| 314 |
|
|
if (tulip_debug > 1)
|
| 315 |
|
|
printk(KERN_DEBUG "%s: tulip_up(), irq==%d.\n", dev->name, dev->irq);
|
| 316 |
|
|
|
| 317 |
|
|
outl(tp->rx_ring_dma, ioaddr + CSR3);
|
| 318 |
|
|
outl(tp->tx_ring_dma, ioaddr + CSR4);
|
| 319 |
|
|
tp->cur_rx = tp->cur_tx = 0;
|
| 320 |
|
|
tp->dirty_rx = tp->dirty_tx = 0;
|
| 321 |
|
|
|
| 322 |
|
|
if (tp->flags & MC_HASH_ONLY) {
|
| 323 |
|
|
u32 addr_low = cpu_to_le32(get_unaligned((u32 *)dev->dev_addr));
|
| 324 |
|
|
u32 addr_high = cpu_to_le32(get_unaligned((u16 *)(dev->dev_addr+4)));
|
| 325 |
|
|
if (tp->chip_id == AX88140) {
|
| 326 |
|
|
outl(0, ioaddr + CSR13);
|
| 327 |
|
|
outl(addr_low, ioaddr + CSR14);
|
| 328 |
|
|
outl(1, ioaddr + CSR13);
|
| 329 |
|
|
outl(addr_high, ioaddr + CSR14);
|
| 330 |
|
|
} else if (tp->flags & COMET_MAC_ADDR) {
|
| 331 |
|
|
outl(addr_low, ioaddr + 0xA4);
|
| 332 |
|
|
outl(addr_high, ioaddr + 0xA8);
|
| 333 |
|
|
outl(0, ioaddr + 0xAC);
|
| 334 |
|
|
outl(0, ioaddr + 0xB0);
|
| 335 |
|
|
}
|
| 336 |
|
|
} else {
|
| 337 |
|
|
/* This is set_rx_mode(), but without starting the transmitter. */
|
| 338 |
|
|
u16 *eaddrs = (u16 *)dev->dev_addr;
|
| 339 |
|
|
u16 *setup_frm = &tp->setup_frame[15*6];
|
| 340 |
|
|
dma_addr_t mapping;
|
| 341 |
|
|
|
| 342 |
|
|
/* 21140 bug: you must add the broadcast address. */
|
| 343 |
|
|
memset(tp->setup_frame, 0xff, sizeof(tp->setup_frame));
|
| 344 |
|
|
/* Fill the final entry of the table with our physical address. */
|
| 345 |
|
|
*setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
|
| 346 |
|
|
*setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
|
| 347 |
|
|
*setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
|
| 348 |
|
|
|
| 349 |
|
|
mapping = pci_map_single(tp->pdev, tp->setup_frame,
|
| 350 |
|
|
sizeof(tp->setup_frame),
|
| 351 |
|
|
PCI_DMA_TODEVICE);
|
| 352 |
|
|
tp->tx_buffers[tp->cur_tx].skb = NULL;
|
| 353 |
|
|
tp->tx_buffers[tp->cur_tx].mapping = mapping;
|
| 354 |
|
|
|
| 355 |
|
|
/* Put the setup frame on the Tx list. */
|
| 356 |
|
|
tp->tx_ring[tp->cur_tx].length = cpu_to_le32(0x08000000 | 192);
|
| 357 |
|
|
tp->tx_ring[tp->cur_tx].buffer1 = cpu_to_le32(mapping);
|
| 358 |
|
|
tp->tx_ring[tp->cur_tx].status = cpu_to_le32(DescOwned);
|
| 359 |
|
|
|
| 360 |
|
|
tp->cur_tx++;
|
| 361 |
|
|
}
|
| 362 |
|
|
|
| 363 |
|
|
tp->saved_if_port = dev->if_port;
|
| 364 |
|
|
if (dev->if_port == 0)
|
| 365 |
|
|
dev->if_port = tp->default_port;
|
| 366 |
|
|
|
| 367 |
|
|
/* Allow selecting a default media. */
|
| 368 |
|
|
i = 0;
|
| 369 |
|
|
if (tp->mtable == NULL)
|
| 370 |
|
|
goto media_picked;
|
| 371 |
|
|
if (dev->if_port) {
|
| 372 |
|
|
int looking_for = tulip_media_cap[dev->if_port] & MediaIsMII ? 11 :
|
| 373 |
|
|
(dev->if_port == 12 ? 0 : dev->if_port);
|
| 374 |
|
|
for (i = 0; i < tp->mtable->leafcount; i++)
|
| 375 |
|
|
if (tp->mtable->mleaf[i].media == looking_for) {
|
| 376 |
|
|
printk(KERN_INFO "%s: Using user-specified media %s.\n",
|
| 377 |
|
|
dev->name, medianame[dev->if_port]);
|
| 378 |
|
|
goto media_picked;
|
| 379 |
|
|
}
|
| 380 |
|
|
}
|
| 381 |
|
|
if ((tp->mtable->defaultmedia & 0x0800) == 0) {
|
| 382 |
|
|
int looking_for = tp->mtable->defaultmedia & MEDIA_MASK;
|
| 383 |
|
|
for (i = 0; i < tp->mtable->leafcount; i++)
|
| 384 |
|
|
if (tp->mtable->mleaf[i].media == looking_for) {
|
| 385 |
|
|
printk(KERN_INFO "%s: Using EEPROM-set media %s.\n",
|
| 386 |
|
|
dev->name, medianame[looking_for]);
|
| 387 |
|
|
goto media_picked;
|
| 388 |
|
|
}
|
| 389 |
|
|
}
|
| 390 |
|
|
/* Start sensing first non-full-duplex media. */
|
| 391 |
|
|
for (i = tp->mtable->leafcount - 1;
|
| 392 |
|
|
(tulip_media_cap[tp->mtable->mleaf[i].media] & MediaAlwaysFD) && i > 0; i--)
|
| 393 |
|
|
;
|
| 394 |
|
|
media_picked:
|
| 395 |
|
|
|
| 396 |
|
|
tp->csr6 = 0;
|
| 397 |
|
|
tp->cur_index = i;
|
| 398 |
|
|
tp->nwayset = 0;
|
| 399 |
|
|
|
| 400 |
|
|
if (dev->if_port) {
|
| 401 |
|
|
if (tp->chip_id == DC21143 &&
|
| 402 |
|
|
(tulip_media_cap[dev->if_port] & MediaIsMII)) {
|
| 403 |
|
|
/* We must reset the media CSRs when we force-select MII mode. */
|
| 404 |
|
|
outl(0x0000, ioaddr + CSR13);
|
| 405 |
|
|
outl(0x0000, ioaddr + CSR14);
|
| 406 |
|
|
outl(0x0008, ioaddr + CSR15);
|
| 407 |
|
|
}
|
| 408 |
|
|
tulip_select_media(dev, 1);
|
| 409 |
|
|
} else if (tp->chip_id == DC21041) {
|
| 410 |
|
|
dev->if_port = 0;
|
| 411 |
|
|
tp->nway = tp->mediasense = 1;
|
| 412 |
|
|
tp->nwayset = tp->lpar = 0;
|
| 413 |
|
|
outl(0x00000000, ioaddr + CSR13);
|
| 414 |
|
|
outl(0xFFFFFFFF, ioaddr + CSR14);
|
| 415 |
|
|
outl(0x00000008, ioaddr + CSR15); /* Listen on AUI also. */
|
| 416 |
|
|
tp->csr6 = 0x80020000;
|
| 417 |
|
|
if (tp->sym_advertise & 0x0040)
|
| 418 |
|
|
tp->csr6 |= FullDuplex;
|
| 419 |
|
|
outl(tp->csr6, ioaddr + CSR6);
|
| 420 |
|
|
outl(0x0000EF01, ioaddr + CSR13);
|
| 421 |
|
|
|
| 422 |
|
|
} else if (tp->chip_id == DC21142) {
|
| 423 |
|
|
if (tp->mii_cnt) {
|
| 424 |
|
|
tulip_select_media(dev, 1);
|
| 425 |
|
|
if (tulip_debug > 1)
|
| 426 |
|
|
printk(KERN_INFO "%s: Using MII transceiver %d, status "
|
| 427 |
|
|
"%4.4x.\n",
|
| 428 |
|
|
dev->name, tp->phys[0], tulip_mdio_read(dev, tp->phys[0], 1));
|
| 429 |
|
|
outl(csr6_mask_defstate, ioaddr + CSR6);
|
| 430 |
|
|
tp->csr6 = csr6_mask_hdcap;
|
| 431 |
|
|
dev->if_port = 11;
|
| 432 |
|
|
outl(0x0000, ioaddr + CSR13);
|
| 433 |
|
|
outl(0x0000, ioaddr + CSR14);
|
| 434 |
|
|
} else
|
| 435 |
|
|
t21142_start_nway(dev);
|
| 436 |
|
|
} else if (tp->chip_id == PNIC2) {
|
| 437 |
|
|
/* for initial startup advertise 10/100 Full and Half */
|
| 438 |
|
|
tp->sym_advertise = 0x01E0;
|
| 439 |
|
|
/* enable autonegotiate end interrupt */
|
| 440 |
|
|
outl(inl(ioaddr+CSR5)| 0x00008010, ioaddr + CSR5);
|
| 441 |
|
|
outl(inl(ioaddr+CSR7)| 0x00008010, ioaddr + CSR7);
|
| 442 |
|
|
pnic2_start_nway(dev);
|
| 443 |
|
|
} else if (tp->chip_id == LC82C168 && ! tp->medialock) {
|
| 444 |
|
|
if (tp->mii_cnt) {
|
| 445 |
|
|
dev->if_port = 11;
|
| 446 |
|
|
tp->csr6 = 0x814C0000 | (tp->full_duplex ? 0x0200 : 0);
|
| 447 |
|
|
outl(0x0001, ioaddr + CSR15);
|
| 448 |
|
|
} else if (inl(ioaddr + CSR5) & TPLnkPass)
|
| 449 |
|
|
pnic_do_nway(dev);
|
| 450 |
|
|
else {
|
| 451 |
|
|
/* Start with 10mbps to do autonegotiation. */
|
| 452 |
|
|
outl(0x32, ioaddr + CSR12);
|
| 453 |
|
|
tp->csr6 = 0x00420000;
|
| 454 |
|
|
outl(0x0001B078, ioaddr + 0xB8);
|
| 455 |
|
|
outl(0x0201B078, ioaddr + 0xB8);
|
| 456 |
|
|
next_tick = 1*HZ;
|
| 457 |
|
|
}
|
| 458 |
|
|
} else if ((tp->chip_id == MX98713 || tp->chip_id == COMPEX9881)
|
| 459 |
|
|
&& ! tp->medialock) {
|
| 460 |
|
|
dev->if_port = 0;
|
| 461 |
|
|
tp->csr6 = 0x01880000 | (tp->full_duplex ? 0x0200 : 0);
|
| 462 |
|
|
outl(0x0f370000 | inw(ioaddr + 0x80), ioaddr + 0x80);
|
| 463 |
|
|
} else if (tp->chip_id == MX98715 || tp->chip_id == MX98725) {
|
| 464 |
|
|
/* Provided by BOLO, Macronix - 12/10/1998. */
|
| 465 |
|
|
dev->if_port = 0;
|
| 466 |
|
|
tp->csr6 = 0x01a80200;
|
| 467 |
|
|
outl(0x0f370000 | inw(ioaddr + 0x80), ioaddr + 0x80);
|
| 468 |
|
|
outl(0x11000 | inw(ioaddr + 0xa0), ioaddr + 0xa0);
|
| 469 |
|
|
} else if (tp->chip_id == COMET || tp->chip_id == CONEXANT) {
|
| 470 |
|
|
/* Enable automatic Tx underrun recovery. */
|
| 471 |
|
|
outl(inl(ioaddr + 0x88) | 1, ioaddr + 0x88);
|
| 472 |
|
|
dev->if_port = tp->mii_cnt ? 11 : 0;
|
| 473 |
|
|
tp->csr6 = 0x00040000;
|
| 474 |
|
|
} else if (tp->chip_id == AX88140) {
|
| 475 |
|
|
tp->csr6 = tp->mii_cnt ? 0x00040100 : 0x00000100;
|
| 476 |
|
|
} else
|
| 477 |
|
|
tulip_select_media(dev, 1);
|
| 478 |
|
|
|
| 479 |
|
|
/* Start the chip's Tx to process setup frame. */
|
| 480 |
|
|
tulip_stop_rxtx(tp);
|
| 481 |
|
|
barrier();
|
| 482 |
|
|
udelay(5);
|
| 483 |
|
|
outl(tp->csr6 | TxOn, ioaddr + CSR6);
|
| 484 |
|
|
|
| 485 |
|
|
/* Enable interrupts by setting the interrupt mask. */
|
| 486 |
|
|
outl(tulip_tbl[tp->chip_id].valid_intrs, ioaddr + CSR5);
|
| 487 |
|
|
outl(tulip_tbl[tp->chip_id].valid_intrs, ioaddr + CSR7);
|
| 488 |
|
|
tulip_start_rxtx(tp);
|
| 489 |
|
|
outl(0, ioaddr + CSR2); /* Rx poll demand */
|
| 490 |
|
|
|
| 491 |
|
|
if (tulip_debug > 2) {
|
| 492 |
|
|
printk(KERN_DEBUG "%s: Done tulip_up(), CSR0 %8.8x, CSR5 %8.8x CSR6 %8.8x.\n",
|
| 493 |
|
|
dev->name, inl(ioaddr + CSR0), inl(ioaddr + CSR5),
|
| 494 |
|
|
inl(ioaddr + CSR6));
|
| 495 |
|
|
}
|
| 496 |
|
|
|
| 497 |
|
|
/* Set the timer to switch to check for link beat and perhaps switch
|
| 498 |
|
|
to an alternate media type. */
|
| 499 |
|
|
tp->timer.expires = RUN_AT(next_tick);
|
| 500 |
|
|
add_timer(&tp->timer);
|
| 501 |
|
|
}
|
| 502 |
|
|
|
| 503 |
|
|
#ifdef CONFIG_NET_HW_FLOWCONTROL
|
| 504 |
|
|
/* Enable receiver */
|
| 505 |
|
|
void tulip_xon(struct net_device *dev)
|
| 506 |
|
|
{
|
| 507 |
|
|
struct tulip_private *tp = (struct tulip_private *)dev->priv;
|
| 508 |
|
|
|
| 509 |
|
|
clear_bit(tp->fc_bit, &netdev_fc_xoff);
|
| 510 |
|
|
if (netif_running(dev)){
|
| 511 |
|
|
|
| 512 |
|
|
tulip_refill_rx(dev);
|
| 513 |
|
|
outl(tulip_tbl[tp->chip_id].valid_intrs, dev->base_addr+CSR7);
|
| 514 |
|
|
}
|
| 515 |
|
|
}
|
| 516 |
|
|
#endif
|
| 517 |
|
|
|
| 518 |
|
|
static int
|
| 519 |
|
|
tulip_open(struct net_device *dev)
|
| 520 |
|
|
{
|
| 521 |
|
|
#ifdef CONFIG_NET_HW_FLOWCONTROL
|
| 522 |
|
|
struct tulip_private *tp = (struct tulip_private *)dev->priv;
|
| 523 |
|
|
#endif
|
| 524 |
|
|
int retval;
|
| 525 |
|
|
MOD_INC_USE_COUNT;
|
| 526 |
|
|
|
| 527 |
|
|
if ((retval = request_irq(dev->irq, &tulip_interrupt, SA_SHIRQ, dev->name, dev))) {
|
| 528 |
|
|
MOD_DEC_USE_COUNT;
|
| 529 |
|
|
return retval;
|
| 530 |
|
|
}
|
| 531 |
|
|
|
| 532 |
|
|
tulip_init_ring (dev);
|
| 533 |
|
|
|
| 534 |
|
|
tulip_up (dev);
|
| 535 |
|
|
|
| 536 |
|
|
#ifdef CONFIG_NET_HW_FLOWCONTROL
|
| 537 |
|
|
tp->fc_bit = netdev_register_fc(dev, tulip_xon);
|
| 538 |
|
|
#endif
|
| 539 |
|
|
|
| 540 |
|
|
netif_start_queue (dev);
|
| 541 |
|
|
|
| 542 |
|
|
return 0;
|
| 543 |
|
|
}
|
| 544 |
|
|
|
| 545 |
|
|
|
| 546 |
|
|
static void tulip_tx_timeout(struct net_device *dev)
|
| 547 |
|
|
{
|
| 548 |
|
|
struct tulip_private *tp = (struct tulip_private *)dev->priv;
|
| 549 |
|
|
long ioaddr = dev->base_addr;
|
| 550 |
|
|
unsigned long flags;
|
| 551 |
|
|
|
| 552 |
|
|
spin_lock_irqsave (&tp->lock, flags);
|
| 553 |
|
|
|
| 554 |
|
|
if (tulip_media_cap[dev->if_port] & MediaIsMII) {
|
| 555 |
|
|
/* Do nothing -- the media monitor should handle this. */
|
| 556 |
|
|
if (tulip_debug > 1)
|
| 557 |
|
|
printk(KERN_WARNING "%s: Transmit timeout using MII device.\n",
|
| 558 |
|
|
dev->name);
|
| 559 |
|
|
} else if (tp->chip_id == DC21040) {
|
| 560 |
|
|
if ( !tp->medialock && inl(ioaddr + CSR12) & 0x0002) {
|
| 561 |
|
|
dev->if_port = (dev->if_port == 2 ? 0 : 2);
|
| 562 |
|
|
printk(KERN_INFO "%s: 21040 transmit timed out, switching to "
|
| 563 |
|
|
"%s.\n",
|
| 564 |
|
|
dev->name, medianame[dev->if_port]);
|
| 565 |
|
|
tulip_select_media(dev, 0);
|
| 566 |
|
|
}
|
| 567 |
|
|
goto out;
|
| 568 |
|
|
} else if (tp->chip_id == DC21041) {
|
| 569 |
|
|
int csr12 = inl(ioaddr + CSR12);
|
| 570 |
|
|
|
| 571 |
|
|
printk(KERN_WARNING "%s: 21041 transmit timed out, status %8.8x, "
|
| 572 |
|
|
"CSR12 %8.8x, CSR13 %8.8x, CSR14 %8.8x, resetting...\n",
|
| 573 |
|
|
dev->name, inl(ioaddr + CSR5), csr12,
|
| 574 |
|
|
inl(ioaddr + CSR13), inl(ioaddr + CSR14));
|
| 575 |
|
|
tp->mediasense = 1;
|
| 576 |
|
|
if ( ! tp->medialock) {
|
| 577 |
|
|
if (dev->if_port == 1 || dev->if_port == 2)
|
| 578 |
|
|
if (csr12 & 0x0004) {
|
| 579 |
|
|
dev->if_port = 2 - dev->if_port;
|
| 580 |
|
|
} else
|
| 581 |
|
|
dev->if_port = 0;
|
| 582 |
|
|
else if (dev->if_port != 0 || (csr12 & 0x0004) != 0)
|
| 583 |
|
|
dev->if_port = 1;
|
| 584 |
|
|
tulip_select_media(dev, 0);
|
| 585 |
|
|
}
|
| 586 |
|
|
} else if (tp->chip_id == DC21140 || tp->chip_id == DC21142
|
| 587 |
|
|
|| tp->chip_id == MX98713 || tp->chip_id == COMPEX9881
|
| 588 |
|
|
|| tp->chip_id == DM910X) {
|
| 589 |
|
|
printk(KERN_WARNING "%s: 21140 transmit timed out, status %8.8x, "
|
| 590 |
|
|
"SIA %8.8x %8.8x %8.8x %8.8x, resetting...\n",
|
| 591 |
|
|
dev->name, inl(ioaddr + CSR5), inl(ioaddr + CSR12),
|
| 592 |
|
|
inl(ioaddr + CSR13), inl(ioaddr + CSR14), inl(ioaddr + CSR15));
|
| 593 |
|
|
if ( ! tp->medialock && tp->mtable) {
|
| 594 |
|
|
do
|
| 595 |
|
|
--tp->cur_index;
|
| 596 |
|
|
while (tp->cur_index >= 0
|
| 597 |
|
|
&& (tulip_media_cap[tp->mtable->mleaf[tp->cur_index].media]
|
| 598 |
|
|
& MediaIsFD));
|
| 599 |
|
|
if (--tp->cur_index < 0) {
|
| 600 |
|
|
/* We start again, but should instead look for default. */
|
| 601 |
|
|
tp->cur_index = tp->mtable->leafcount - 1;
|
| 602 |
|
|
}
|
| 603 |
|
|
tulip_select_media(dev, 0);
|
| 604 |
|
|
printk(KERN_WARNING "%s: transmit timed out, switching to %s "
|
| 605 |
|
|
"media.\n", dev->name, medianame[dev->if_port]);
|
| 606 |
|
|
}
|
| 607 |
|
|
} else if (tp->chip_id == PNIC2) {
|
| 608 |
|
|
printk(KERN_WARNING "%s: PNIC2 transmit timed out, status %8.8x, "
|
| 609 |
|
|
"CSR6/7 %8.8x / %8.8x CSR12 %8.8x, resetting...\n",
|
| 610 |
|
|
dev->name, (int)inl(ioaddr + CSR5), (int)inl(ioaddr + CSR6),
|
| 611 |
|
|
(int)inl(ioaddr + CSR7), (int)inl(ioaddr + CSR12));
|
| 612 |
|
|
} else {
|
| 613 |
|
|
printk(KERN_WARNING "%s: Transmit timed out, status %8.8x, CSR12 "
|
| 614 |
|
|
"%8.8x, resetting...\n",
|
| 615 |
|
|
dev->name, inl(ioaddr + CSR5), inl(ioaddr + CSR12));
|
| 616 |
|
|
dev->if_port = 0;
|
| 617 |
|
|
}
|
| 618 |
|
|
|
| 619 |
|
|
#if defined(way_too_many_messages)
|
| 620 |
|
|
if (tulip_debug > 3) {
|
| 621 |
|
|
int i;
|
| 622 |
|
|
for (i = 0; i < RX_RING_SIZE; i++) {
|
| 623 |
|
|
u8 *buf = (u8 *)(tp->rx_ring[i].buffer1);
|
| 624 |
|
|
int j;
|
| 625 |
|
|
printk(KERN_DEBUG "%2d: %8.8x %8.8x %8.8x %8.8x "
|
| 626 |
|
|
"%2.2x %2.2x %2.2x.\n",
|
| 627 |
|
|
i, (unsigned int)tp->rx_ring[i].status,
|
| 628 |
|
|
(unsigned int)tp->rx_ring[i].length,
|
| 629 |
|
|
(unsigned int)tp->rx_ring[i].buffer1,
|
| 630 |
|
|
(unsigned int)tp->rx_ring[i].buffer2,
|
| 631 |
|
|
buf[0], buf[1], buf[2]);
|
| 632 |
|
|
for (j = 0; buf[j] != 0xee && j < 1600; j++)
|
| 633 |
|
|
if (j < 100) printk(" %2.2x", buf[j]);
|
| 634 |
|
|
printk(" j=%d.\n", j);
|
| 635 |
|
|
}
|
| 636 |
|
|
printk(KERN_DEBUG " Rx ring %8.8x: ", (int)tp->rx_ring);
|
| 637 |
|
|
for (i = 0; i < RX_RING_SIZE; i++)
|
| 638 |
|
|
printk(" %8.8x", (unsigned int)tp->rx_ring[i].status);
|
| 639 |
|
|
printk("\n" KERN_DEBUG " Tx ring %8.8x: ", (int)tp->tx_ring);
|
| 640 |
|
|
for (i = 0; i < TX_RING_SIZE; i++)
|
| 641 |
|
|
printk(" %8.8x", (unsigned int)tp->tx_ring[i].status);
|
| 642 |
|
|
printk("\n");
|
| 643 |
|
|
}
|
| 644 |
|
|
#endif
|
| 645 |
|
|
|
| 646 |
|
|
/* Stop and restart the chip's Tx processes . */
|
| 647 |
|
|
#ifdef CONFIG_NET_HW_FLOWCONTROL
|
| 648 |
|
|
if (tp->fc_bit && test_bit(tp->fc_bit,&netdev_fc_xoff))
|
| 649 |
|
|
printk("BUG tx_timeout restarting rx when fc on\n");
|
| 650 |
|
|
#endif
|
| 651 |
|
|
tulip_restart_rxtx(tp);
|
| 652 |
|
|
/* Trigger an immediate transmit demand. */
|
| 653 |
|
|
outl(0, ioaddr + CSR1);
|
| 654 |
|
|
|
| 655 |
|
|
tp->stats.tx_errors++;
|
| 656 |
|
|
|
| 657 |
|
|
out:
|
| 658 |
|
|
spin_unlock_irqrestore (&tp->lock, flags);
|
| 659 |
|
|
dev->trans_start = jiffies;
|
| 660 |
|
|
netif_wake_queue (dev);
|
| 661 |
|
|
}
|
| 662 |
|
|
|
| 663 |
|
|
|
| 664 |
|
|
/* Initialize the Rx and Tx rings, along with various 'dev' bits. */
|
| 665 |
|
|
static void tulip_init_ring(struct net_device *dev)
|
| 666 |
|
|
{
|
| 667 |
|
|
struct tulip_private *tp = (struct tulip_private *)dev->priv;
|
| 668 |
|
|
int i;
|
| 669 |
|
|
|
| 670 |
|
|
tp->susp_rx = 0;
|
| 671 |
|
|
tp->ttimer = 0;
|
| 672 |
|
|
tp->nir = 0;
|
| 673 |
|
|
|
| 674 |
|
|
for (i = 0; i < RX_RING_SIZE; i++) {
|
| 675 |
|
|
tp->rx_ring[i].status = 0x00000000;
|
| 676 |
|
|
tp->rx_ring[i].length = cpu_to_le32(PKT_BUF_SZ);
|
| 677 |
|
|
tp->rx_ring[i].buffer2 = cpu_to_le32(tp->rx_ring_dma + sizeof(struct tulip_rx_desc) * (i + 1));
|
| 678 |
|
|
tp->rx_buffers[i].skb = NULL;
|
| 679 |
|
|
tp->rx_buffers[i].mapping = 0;
|
| 680 |
|
|
}
|
| 681 |
|
|
/* Mark the last entry as wrapping the ring. */
|
| 682 |
|
|
tp->rx_ring[i-1].length = cpu_to_le32(PKT_BUF_SZ | DESC_RING_WRAP);
|
| 683 |
|
|
tp->rx_ring[i-1].buffer2 = cpu_to_le32(tp->rx_ring_dma);
|
| 684 |
|
|
|
| 685 |
|
|
for (i = 0; i < RX_RING_SIZE; i++) {
|
| 686 |
|
|
dma_addr_t mapping;
|
| 687 |
|
|
|
| 688 |
|
|
/* Note the receive buffer must be longword aligned.
|
| 689 |
|
|
dev_alloc_skb() provides 16 byte alignment. But do *not*
|
| 690 |
|
|
use skb_reserve() to align the IP header! */
|
| 691 |
|
|
struct sk_buff *skb = dev_alloc_skb(PKT_BUF_SZ);
|
| 692 |
|
|
tp->rx_buffers[i].skb = skb;
|
| 693 |
|
|
if (skb == NULL)
|
| 694 |
|
|
break;
|
| 695 |
|
|
mapping = pci_map_single(tp->pdev, skb->tail,
|
| 696 |
|
|
PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
|
| 697 |
|
|
tp->rx_buffers[i].mapping = mapping;
|
| 698 |
|
|
skb->dev = dev; /* Mark as being used by this device. */
|
| 699 |
|
|
tp->rx_ring[i].status = cpu_to_le32(DescOwned); /* Owned by Tulip chip */
|
| 700 |
|
|
tp->rx_ring[i].buffer1 = cpu_to_le32(mapping);
|
| 701 |
|
|
}
|
| 702 |
|
|
tp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
|
| 703 |
|
|
|
| 704 |
|
|
/* The Tx buffer descriptor is filled in as needed, but we
|
| 705 |
|
|
do need to clear the ownership bit. */
|
| 706 |
|
|
for (i = 0; i < TX_RING_SIZE; i++) {
|
| 707 |
|
|
tp->tx_buffers[i].skb = NULL;
|
| 708 |
|
|
tp->tx_buffers[i].mapping = 0;
|
| 709 |
|
|
tp->tx_ring[i].status = 0x00000000;
|
| 710 |
|
|
tp->tx_ring[i].buffer2 = cpu_to_le32(tp->tx_ring_dma + sizeof(struct tulip_tx_desc) * (i + 1));
|
| 711 |
|
|
}
|
| 712 |
|
|
tp->tx_ring[i-1].buffer2 = cpu_to_le32(tp->tx_ring_dma);
|
| 713 |
|
|
}
|
| 714 |
|
|
|
| 715 |
|
|
static int
|
| 716 |
|
|
tulip_start_xmit(struct sk_buff *skb, struct net_device *dev)
|
| 717 |
|
|
{
|
| 718 |
|
|
struct tulip_private *tp = (struct tulip_private *)dev->priv;
|
| 719 |
|
|
int entry;
|
| 720 |
|
|
u32 flag;
|
| 721 |
|
|
dma_addr_t mapping;
|
| 722 |
|
|
unsigned long eflags;
|
| 723 |
|
|
|
| 724 |
|
|
spin_lock_irqsave(&tp->lock, eflags);
|
| 725 |
|
|
|
| 726 |
|
|
/* Calculate the next Tx descriptor entry. */
|
| 727 |
|
|
entry = tp->cur_tx % TX_RING_SIZE;
|
| 728 |
|
|
|
| 729 |
|
|
tp->tx_buffers[entry].skb = skb;
|
| 730 |
|
|
mapping = pci_map_single(tp->pdev, skb->data,
|
| 731 |
|
|
skb->len, PCI_DMA_TODEVICE);
|
| 732 |
|
|
tp->tx_buffers[entry].mapping = mapping;
|
| 733 |
|
|
tp->tx_ring[entry].buffer1 = cpu_to_le32(mapping);
|
| 734 |
|
|
|
| 735 |
|
|
if (tp->cur_tx - tp->dirty_tx < TX_RING_SIZE/2) {/* Typical path */
|
| 736 |
|
|
flag = 0x60000000; /* No interrupt */
|
| 737 |
|
|
} else if (tp->cur_tx - tp->dirty_tx == TX_RING_SIZE/2) {
|
| 738 |
|
|
flag = 0xe0000000; /* Tx-done intr. */
|
| 739 |
|
|
} else if (tp->cur_tx - tp->dirty_tx < TX_RING_SIZE - 2) {
|
| 740 |
|
|
flag = 0x60000000; /* No Tx-done intr. */
|
| 741 |
|
|
} else { /* Leave room for set_rx_mode() to fill entries. */
|
| 742 |
|
|
flag = 0xe0000000; /* Tx-done intr. */
|
| 743 |
|
|
netif_stop_queue(dev);
|
| 744 |
|
|
}
|
| 745 |
|
|
if (entry == TX_RING_SIZE-1)
|
| 746 |
|
|
flag = 0xe0000000 | DESC_RING_WRAP;
|
| 747 |
|
|
|
| 748 |
|
|
tp->tx_ring[entry].length = cpu_to_le32(skb->len | flag);
|
| 749 |
|
|
/* if we were using Transmit Automatic Polling, we would need a
|
| 750 |
|
|
* wmb() here. */
|
| 751 |
|
|
tp->tx_ring[entry].status = cpu_to_le32(DescOwned);
|
| 752 |
|
|
wmb();
|
| 753 |
|
|
|
| 754 |
|
|
tp->cur_tx++;
|
| 755 |
|
|
|
| 756 |
|
|
/* Trigger an immediate transmit demand. */
|
| 757 |
|
|
outl(0, dev->base_addr + CSR1);
|
| 758 |
|
|
|
| 759 |
|
|
spin_unlock_irqrestore(&tp->lock, eflags);
|
| 760 |
|
|
|
| 761 |
|
|
dev->trans_start = jiffies;
|
| 762 |
|
|
|
| 763 |
|
|
return 0;
|
| 764 |
|
|
}
|
| 765 |
|
|
|
| 766 |
|
|
static void tulip_clean_tx_ring(struct tulip_private *tp)
|
| 767 |
|
|
{
|
| 768 |
|
|
unsigned int dirty_tx;
|
| 769 |
|
|
|
| 770 |
|
|
for (dirty_tx = tp->dirty_tx ; tp->cur_tx - dirty_tx > 0;
|
| 771 |
|
|
dirty_tx++) {
|
| 772 |
|
|
int entry = dirty_tx % TX_RING_SIZE;
|
| 773 |
|
|
int status = le32_to_cpu(tp->tx_ring[entry].status);
|
| 774 |
|
|
|
| 775 |
|
|
if (status < 0) {
|
| 776 |
|
|
tp->stats.tx_errors++; /* It wasn't Txed */
|
| 777 |
|
|
tp->tx_ring[entry].status = 0;
|
| 778 |
|
|
}
|
| 779 |
|
|
|
| 780 |
|
|
/* Check for Tx filter setup frames. */
|
| 781 |
|
|
if (tp->tx_buffers[entry].skb == NULL) {
|
| 782 |
|
|
/* test because dummy frames not mapped */
|
| 783 |
|
|
if (tp->tx_buffers[entry].mapping)
|
| 784 |
|
|
pci_unmap_single(tp->pdev,
|
| 785 |
|
|
tp->tx_buffers[entry].mapping,
|
| 786 |
|
|
sizeof(tp->setup_frame),
|
| 787 |
|
|
PCI_DMA_TODEVICE);
|
| 788 |
|
|
continue;
|
| 789 |
|
|
}
|
| 790 |
|
|
|
| 791 |
|
|
pci_unmap_single(tp->pdev, tp->tx_buffers[entry].mapping,
|
| 792 |
|
|
tp->tx_buffers[entry].skb->len,
|
| 793 |
|
|
PCI_DMA_TODEVICE);
|
| 794 |
|
|
|
| 795 |
|
|
/* Free the original skb. */
|
| 796 |
|
|
dev_kfree_skb_irq(tp->tx_buffers[entry].skb);
|
| 797 |
|
|
tp->tx_buffers[entry].skb = NULL;
|
| 798 |
|
|
tp->tx_buffers[entry].mapping = 0;
|
| 799 |
|
|
}
|
| 800 |
|
|
}
|
| 801 |
|
|
|
| 802 |
|
|
static void tulip_down (struct net_device *dev)
|
| 803 |
|
|
{
|
| 804 |
|
|
long ioaddr = dev->base_addr;
|
| 805 |
|
|
struct tulip_private *tp = (struct tulip_private *) dev->priv;
|
| 806 |
|
|
unsigned long flags;
|
| 807 |
|
|
|
| 808 |
|
|
del_timer_sync (&tp->timer);
|
| 809 |
|
|
|
| 810 |
|
|
spin_lock_irqsave (&tp->lock, flags);
|
| 811 |
|
|
|
| 812 |
|
|
/* Disable interrupts by clearing the interrupt mask. */
|
| 813 |
|
|
outl (0x00000000, ioaddr + CSR7);
|
| 814 |
|
|
|
| 815 |
|
|
/* Stop the Tx and Rx processes. */
|
| 816 |
|
|
tulip_stop_rxtx(tp);
|
| 817 |
|
|
|
| 818 |
|
|
/* prepare receive buffers */
|
| 819 |
|
|
tulip_refill_rx(dev);
|
| 820 |
|
|
|
| 821 |
|
|
/* release any unconsumed transmit buffers */
|
| 822 |
|
|
tulip_clean_tx_ring(tp);
|
| 823 |
|
|
|
| 824 |
|
|
/* 21040 -- Leave the card in 10baseT state. */
|
| 825 |
|
|
if (tp->chip_id == DC21040)
|
| 826 |
|
|
outl (0x00000004, ioaddr + CSR13);
|
| 827 |
|
|
|
| 828 |
|
|
if (inl (ioaddr + CSR6) != 0xffffffff)
|
| 829 |
|
|
tp->stats.rx_missed_errors += inl (ioaddr + CSR8) & 0xffff;
|
| 830 |
|
|
|
| 831 |
|
|
spin_unlock_irqrestore (&tp->lock, flags);
|
| 832 |
|
|
|
| 833 |
|
|
init_timer(&tp->timer);
|
| 834 |
|
|
tp->timer.data = (unsigned long)dev;
|
| 835 |
|
|
tp->timer.function = tulip_tbl[tp->chip_id].media_timer;
|
| 836 |
|
|
|
| 837 |
|
|
dev->if_port = tp->saved_if_port;
|
| 838 |
|
|
|
| 839 |
|
|
/* Leave the driver in snooze, not sleep, mode. */
|
| 840 |
|
|
tulip_set_power_state (tp, 0, 1);
|
| 841 |
|
|
}
|
| 842 |
|
|
|
| 843 |
|
|
|
| 844 |
|
|
static int tulip_close (struct net_device *dev)
|
| 845 |
|
|
{
|
| 846 |
|
|
long ioaddr = dev->base_addr;
|
| 847 |
|
|
struct tulip_private *tp = (struct tulip_private *) dev->priv;
|
| 848 |
|
|
int i;
|
| 849 |
|
|
|
| 850 |
|
|
netif_stop_queue (dev);
|
| 851 |
|
|
|
| 852 |
|
|
#ifdef CONFIG_NET_HW_FLOWCONTROL
|
| 853 |
|
|
if (tp->fc_bit) {
|
| 854 |
|
|
int bit = tp->fc_bit;
|
| 855 |
|
|
tp->fc_bit = 0;
|
| 856 |
|
|
netdev_unregister_fc(bit);
|
| 857 |
|
|
}
|
| 858 |
|
|
#endif
|
| 859 |
|
|
tulip_down (dev);
|
| 860 |
|
|
|
| 861 |
|
|
if (tulip_debug > 1)
|
| 862 |
|
|
printk (KERN_DEBUG "%s: Shutting down ethercard, status was %2.2x.\n",
|
| 863 |
|
|
dev->name, inl (ioaddr + CSR5));
|
| 864 |
|
|
|
| 865 |
|
|
free_irq (dev->irq, dev);
|
| 866 |
|
|
|
| 867 |
|
|
/* Free all the skbuffs in the Rx queue. */
|
| 868 |
|
|
for (i = 0; i < RX_RING_SIZE; i++) {
|
| 869 |
|
|
struct sk_buff *skb = tp->rx_buffers[i].skb;
|
| 870 |
|
|
dma_addr_t mapping = tp->rx_buffers[i].mapping;
|
| 871 |
|
|
|
| 872 |
|
|
tp->rx_buffers[i].skb = NULL;
|
| 873 |
|
|
tp->rx_buffers[i].mapping = 0;
|
| 874 |
|
|
|
| 875 |
|
|
tp->rx_ring[i].status = 0; /* Not owned by Tulip chip. */
|
| 876 |
|
|
tp->rx_ring[i].length = 0;
|
| 877 |
|
|
tp->rx_ring[i].buffer1 = 0xBADF00D0; /* An invalid address. */
|
| 878 |
|
|
if (skb) {
|
| 879 |
|
|
pci_unmap_single(tp->pdev, mapping, PKT_BUF_SZ,
|
| 880 |
|
|
PCI_DMA_FROMDEVICE);
|
| 881 |
|
|
dev_kfree_skb (skb);
|
| 882 |
|
|
}
|
| 883 |
|
|
}
|
| 884 |
|
|
for (i = 0; i < TX_RING_SIZE; i++) {
|
| 885 |
|
|
struct sk_buff *skb = tp->tx_buffers[i].skb;
|
| 886 |
|
|
|
| 887 |
|
|
if (skb != NULL) {
|
| 888 |
|
|
pci_unmap_single(tp->pdev, tp->tx_buffers[i].mapping,
|
| 889 |
|
|
skb->len, PCI_DMA_TODEVICE);
|
| 890 |
|
|
dev_kfree_skb (skb);
|
| 891 |
|
|
}
|
| 892 |
|
|
tp->tx_buffers[i].skb = NULL;
|
| 893 |
|
|
tp->tx_buffers[i].mapping = 0;
|
| 894 |
|
|
}
|
| 895 |
|
|
|
| 896 |
|
|
MOD_DEC_USE_COUNT;
|
| 897 |
|
|
|
| 898 |
|
|
return 0;
|
| 899 |
|
|
}
|
| 900 |
|
|
|
| 901 |
|
|
static struct net_device_stats *tulip_get_stats(struct net_device *dev)
|
| 902 |
|
|
{
|
| 903 |
|
|
struct tulip_private *tp = (struct tulip_private *)dev->priv;
|
| 904 |
|
|
long ioaddr = dev->base_addr;
|
| 905 |
|
|
|
| 906 |
|
|
if (netif_running(dev)) {
|
| 907 |
|
|
unsigned long flags;
|
| 908 |
|
|
|
| 909 |
|
|
spin_lock_irqsave (&tp->lock, flags);
|
| 910 |
|
|
|
| 911 |
|
|
tp->stats.rx_missed_errors += inl(ioaddr + CSR8) & 0xffff;
|
| 912 |
|
|
|
| 913 |
|
|
spin_unlock_irqrestore(&tp->lock, flags);
|
| 914 |
|
|
}
|
| 915 |
|
|
|
| 916 |
|
|
return &tp->stats;
|
| 917 |
|
|
}
|
| 918 |
|
|
|
| 919 |
|
|
|
| 920 |
|
|
static int netdev_ethtool_ioctl(struct net_device *dev, void *useraddr)
|
| 921 |
|
|
{
|
| 922 |
|
|
struct tulip_private *np = dev->priv;
|
| 923 |
|
|
u32 ethcmd;
|
| 924 |
|
|
|
| 925 |
|
|
if (copy_from_user(ðcmd, useraddr, sizeof(ethcmd)))
|
| 926 |
|
|
return -EFAULT;
|
| 927 |
|
|
|
| 928 |
|
|
switch (ethcmd) {
|
| 929 |
|
|
case ETHTOOL_GDRVINFO: {
|
| 930 |
|
|
struct ethtool_drvinfo info = {ETHTOOL_GDRVINFO};
|
| 931 |
|
|
strcpy(info.driver, DRV_NAME);
|
| 932 |
|
|
strcpy(info.version, DRV_VERSION);
|
| 933 |
|
|
strcpy(info.bus_info, np->pdev->slot_name);
|
| 934 |
|
|
if (copy_to_user(useraddr, &info, sizeof(info)))
|
| 935 |
|
|
return -EFAULT;
|
| 936 |
|
|
return 0;
|
| 937 |
|
|
}
|
| 938 |
|
|
|
| 939 |
|
|
}
|
| 940 |
|
|
|
| 941 |
|
|
return -EOPNOTSUPP;
|
| 942 |
|
|
}
|
| 943 |
|
|
|
| 944 |
|
|
/* Provide ioctl() calls to examine the MII xcvr state. */
|
| 945 |
|
|
static int private_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
|
| 946 |
|
|
{
|
| 947 |
|
|
struct tulip_private *tp = dev->priv;
|
| 948 |
|
|
long ioaddr = dev->base_addr;
|
| 949 |
|
|
struct mii_ioctl_data *data = (struct mii_ioctl_data *) & rq->ifr_data;
|
| 950 |
|
|
const unsigned int phy_idx = 0;
|
| 951 |
|
|
int phy = tp->phys[phy_idx] & 0x1f;
|
| 952 |
|
|
unsigned int regnum = data->reg_num;
|
| 953 |
|
|
|
| 954 |
|
|
switch (cmd) {
|
| 955 |
|
|
case SIOCETHTOOL:
|
| 956 |
|
|
return netdev_ethtool_ioctl(dev, (void *) rq->ifr_data);
|
| 957 |
|
|
|
| 958 |
|
|
case SIOCGMIIPHY: /* Get address of MII PHY in use. */
|
| 959 |
|
|
case SIOCDEVPRIVATE: /* for binary compat, remove in 2.5 */
|
| 960 |
|
|
if (tp->mii_cnt)
|
| 961 |
|
|
data->phy_id = phy;
|
| 962 |
|
|
else if (tp->flags & HAS_NWAY)
|
| 963 |
|
|
data->phy_id = 32;
|
| 964 |
|
|
else if (tp->chip_id == COMET)
|
| 965 |
|
|
data->phy_id = 1;
|
| 966 |
|
|
else
|
| 967 |
|
|
return -ENODEV;
|
| 968 |
|
|
|
| 969 |
|
|
case SIOCGMIIREG: /* Read MII PHY register. */
|
| 970 |
|
|
case SIOCDEVPRIVATE+1: /* for binary compat, remove in 2.5 */
|
| 971 |
|
|
if (data->phy_id == 32 && (tp->flags & HAS_NWAY)) {
|
| 972 |
|
|
int csr12 = inl (ioaddr + CSR12);
|
| 973 |
|
|
int csr14 = inl (ioaddr + CSR14);
|
| 974 |
|
|
switch (regnum) {
|
| 975 |
|
|
case 0:
|
| 976 |
|
|
if (((csr14<<5) & 0x1000) ||
|
| 977 |
|
|
(dev->if_port == 5 && tp->nwayset))
|
| 978 |
|
|
data->val_out = 0x1000;
|
| 979 |
|
|
else
|
| 980 |
|
|
data->val_out = (tulip_media_cap[dev->if_port]&MediaIs100 ? 0x2000 : 0)
|
| 981 |
|
|
| (tulip_media_cap[dev->if_port]&MediaIsFD ? 0x0100 : 0);
|
| 982 |
|
|
break;
|
| 983 |
|
|
case 1:
|
| 984 |
|
|
data->val_out =
|
| 985 |
|
|
0x1848 +
|
| 986 |
|
|
((csr12&0x7000) == 0x5000 ? 0x20 : 0) +
|
| 987 |
|
|
((csr12&0x06) == 6 ? 0 : 4);
|
| 988 |
|
|
if (tp->chip_id != DC21041)
|
| 989 |
|
|
data->val_out |= 0x6048;
|
| 990 |
|
|
break;
|
| 991 |
|
|
case 4:
|
| 992 |
|
|
/* Advertised value, bogus 10baseTx-FD value from CSR6. */
|
| 993 |
|
|
data->val_out =
|
| 994 |
|
|
((inl(ioaddr + CSR6) >> 3) & 0x0040) +
|
| 995 |
|
|
((csr14 >> 1) & 0x20) + 1;
|
| 996 |
|
|
if (tp->chip_id != DC21041)
|
| 997 |
|
|
data->val_out |= ((csr14 >> 9) & 0x03C0);
|
| 998 |
|
|
break;
|
| 999 |
|
|
case 5: data->val_out = tp->lpar; break;
|
| 1000 |
|
|
default: data->val_out = 0; break;
|
| 1001 |
|
|
}
|
| 1002 |
|
|
} else {
|
| 1003 |
|
|
data->val_out = tulip_mdio_read (dev, data->phy_id & 0x1f, regnum);
|
| 1004 |
|
|
}
|
| 1005 |
|
|
return 0;
|
| 1006 |
|
|
|
| 1007 |
|
|
case SIOCSMIIREG: /* Write MII PHY register. */
|
| 1008 |
|
|
case SIOCDEVPRIVATE+2: /* for binary compat, remove in 2.5 */
|
| 1009 |
|
|
if (!capable (CAP_NET_ADMIN))
|
| 1010 |
|
|
return -EPERM;
|
| 1011 |
|
|
if (regnum & ~0x1f)
|
| 1012 |
|
|
return -EINVAL;
|
| 1013 |
|
|
if (data->phy_id == phy) {
|
| 1014 |
|
|
u16 value = data->val_in;
|
| 1015 |
|
|
switch (regnum) {
|
| 1016 |
|
|
case 0: /* Check for autonegotiation on or reset. */
|
| 1017 |
|
|
tp->full_duplex_lock = (value & 0x9000) ? 0 : 1;
|
| 1018 |
|
|
if (tp->full_duplex_lock)
|
| 1019 |
|
|
tp->full_duplex = (value & 0x0100) ? 1 : 0;
|
| 1020 |
|
|
break;
|
| 1021 |
|
|
case 4:
|
| 1022 |
|
|
tp->advertising[phy_idx] =
|
| 1023 |
|
|
tp->mii_advertise = data->val_in;
|
| 1024 |
|
|
break;
|
| 1025 |
|
|
}
|
| 1026 |
|
|
}
|
| 1027 |
|
|
if (data->phy_id == 32 && (tp->flags & HAS_NWAY)) {
|
| 1028 |
|
|
u16 value = data->val_in;
|
| 1029 |
|
|
if (regnum == 0) {
|
| 1030 |
|
|
if ((value & 0x1200) == 0x1200) {
|
| 1031 |
|
|
if (tp->chip_id == PNIC2) {
|
| 1032 |
|
|
pnic2_start_nway (dev);
|
| 1033 |
|
|
} else {
|
| 1034 |
|
|
t21142_start_nway (dev);
|
| 1035 |
|
|
}
|
| 1036 |
|
|
}
|
| 1037 |
|
|
} else if (regnum == 4)
|
| 1038 |
|
|
tp->sym_advertise = value;
|
| 1039 |
|
|
} else {
|
| 1040 |
|
|
tulip_mdio_write (dev, data->phy_id & 0x1f, regnum, data->val_in);
|
| 1041 |
|
|
}
|
| 1042 |
|
|
return 0;
|
| 1043 |
|
|
default:
|
| 1044 |
|
|
return -EOPNOTSUPP;
|
| 1045 |
|
|
}
|
| 1046 |
|
|
|
| 1047 |
|
|
return -EOPNOTSUPP;
|
| 1048 |
|
|
}
|
| 1049 |
|
|
|
| 1050 |
|
|
|
| 1051 |
|
|
/* Set or clear the multicast filter for this adaptor.
|
| 1052 |
|
|
Note that we only use exclusion around actually queueing the
|
| 1053 |
|
|
new frame, not around filling tp->setup_frame. This is non-deterministic
|
| 1054 |
|
|
when re-entered but still correct. */
|
| 1055 |
|
|
|
| 1056 |
|
|
#undef set_bit_le
|
| 1057 |
|
|
#define set_bit_le(i,p) do { ((char *)(p))[(i)/8] |= (1<<((i)%8)); } while(0)
|
| 1058 |
|
|
|
| 1059 |
|
|
static void build_setup_frame_hash(u16 *setup_frm, struct net_device *dev)
|
| 1060 |
|
|
{
|
| 1061 |
|
|
struct tulip_private *tp = (struct tulip_private *)dev->priv;
|
| 1062 |
|
|
u16 hash_table[32];
|
| 1063 |
|
|
struct dev_mc_list *mclist;
|
| 1064 |
|
|
int i;
|
| 1065 |
|
|
u16 *eaddrs;
|
| 1066 |
|
|
|
| 1067 |
|
|
memset(hash_table, 0, sizeof(hash_table));
|
| 1068 |
|
|
set_bit_le(255, hash_table); /* Broadcast entry */
|
| 1069 |
|
|
/* This should work on big-endian machines as well. */
|
| 1070 |
|
|
for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
|
| 1071 |
|
|
i++, mclist = mclist->next) {
|
| 1072 |
|
|
int index = ether_crc_le(ETH_ALEN, mclist->dmi_addr) & 0x1ff;
|
| 1073 |
|
|
|
| 1074 |
|
|
set_bit_le(index, hash_table);
|
| 1075 |
|
|
|
| 1076 |
|
|
}
|
| 1077 |
|
|
for (i = 0; i < 32; i++) {
|
| 1078 |
|
|
*setup_frm++ = hash_table[i];
|
| 1079 |
|
|
*setup_frm++ = hash_table[i];
|
| 1080 |
|
|
}
|
| 1081 |
|
|
setup_frm = &tp->setup_frame[13*6];
|
| 1082 |
|
|
|
| 1083 |
|
|
/* Fill the final entry with our physical address. */
|
| 1084 |
|
|
eaddrs = (u16 *)dev->dev_addr;
|
| 1085 |
|
|
*setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
|
| 1086 |
|
|
*setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
|
| 1087 |
|
|
*setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
|
| 1088 |
|
|
}
|
| 1089 |
|
|
|
| 1090 |
|
|
static void build_setup_frame_perfect(u16 *setup_frm, struct net_device *dev)
|
| 1091 |
|
|
{
|
| 1092 |
|
|
struct tulip_private *tp = (struct tulip_private *)dev->priv;
|
| 1093 |
|
|
struct dev_mc_list *mclist;
|
| 1094 |
|
|
int i;
|
| 1095 |
|
|
u16 *eaddrs;
|
| 1096 |
|
|
|
| 1097 |
|
|
/* We have <= 14 addresses so we can use the wonderful
|
| 1098 |
|
|
16 address perfect filtering of the Tulip. */
|
| 1099 |
|
|
for (i = 0, mclist = dev->mc_list; i < dev->mc_count;
|
| 1100 |
|
|
i++, mclist = mclist->next) {
|
| 1101 |
|
|
eaddrs = (u16 *)mclist->dmi_addr;
|
| 1102 |
|
|
*setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
|
| 1103 |
|
|
*setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
|
| 1104 |
|
|
*setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
|
| 1105 |
|
|
}
|
| 1106 |
|
|
/* Fill the unused entries with the broadcast address. */
|
| 1107 |
|
|
memset(setup_frm, 0xff, (15-i)*12);
|
| 1108 |
|
|
setup_frm = &tp->setup_frame[15*6];
|
| 1109 |
|
|
|
| 1110 |
|
|
/* Fill the final entry with our physical address. */
|
| 1111 |
|
|
eaddrs = (u16 *)dev->dev_addr;
|
| 1112 |
|
|
*setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
|
| 1113 |
|
|
*setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
|
| 1114 |
|
|
*setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
|
| 1115 |
|
|
}
|
| 1116 |
|
|
|
| 1117 |
|
|
|
| 1118 |
|
|
static void set_rx_mode(struct net_device *dev)
|
| 1119 |
|
|
{
|
| 1120 |
|
|
struct tulip_private *tp = (struct tulip_private *)dev->priv;
|
| 1121 |
|
|
long ioaddr = dev->base_addr;
|
| 1122 |
|
|
int csr6;
|
| 1123 |
|
|
|
| 1124 |
|
|
csr6 = inl(ioaddr + CSR6) & ~0x00D5;
|
| 1125 |
|
|
|
| 1126 |
|
|
tp->csr6 &= ~0x00D5;
|
| 1127 |
|
|
if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
|
| 1128 |
|
|
tp->csr6 |= AcceptAllMulticast | AcceptAllPhys;
|
| 1129 |
|
|
csr6 |= AcceptAllMulticast | AcceptAllPhys;
|
| 1130 |
|
|
/* Unconditionally log net taps. */
|
| 1131 |
|
|
printk(KERN_INFO "%s: Promiscuous mode enabled.\n", dev->name);
|
| 1132 |
|
|
} else if ((dev->mc_count > 1000) || (dev->flags & IFF_ALLMULTI)) {
|
| 1133 |
|
|
/* Too many to filter well -- accept all multicasts. */
|
| 1134 |
|
|
tp->csr6 |= AcceptAllMulticast;
|
| 1135 |
|
|
csr6 |= AcceptAllMulticast;
|
| 1136 |
|
|
} else if (tp->flags & MC_HASH_ONLY) {
|
| 1137 |
|
|
/* Some work-alikes have only a 64-entry hash filter table. */
|
| 1138 |
|
|
/* Should verify correctness on big-endian/__powerpc__ */
|
| 1139 |
|
|
struct dev_mc_list *mclist;
|
| 1140 |
|
|
int i;
|
| 1141 |
|
|
if (dev->mc_count > 64) { /* Arbitrary non-effective limit. */
|
| 1142 |
|
|
tp->csr6 |= AcceptAllMulticast;
|
| 1143 |
|
|
csr6 |= AcceptAllMulticast;
|
| 1144 |
|
|
} else {
|
| 1145 |
|
|
u32 mc_filter[2] = {0, 0}; /* Multicast hash filter */
|
| 1146 |
|
|
int filterbit;
|
| 1147 |
|
|
for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
|
| 1148 |
|
|
i++, mclist = mclist->next) {
|
| 1149 |
|
|
if (tp->flags & COMET_MAC_ADDR)
|
| 1150 |
|
|
filterbit = ether_crc_le(ETH_ALEN, mclist->dmi_addr);
|
| 1151 |
|
|
else
|
| 1152 |
|
|
filterbit = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
|
| 1153 |
|
|
filterbit &= 0x3f;
|
| 1154 |
|
|
mc_filter[filterbit >> 5] |= cpu_to_le32(1 << (filterbit & 31));
|
| 1155 |
|
|
if (tulip_debug > 2) {
|
| 1156 |
|
|
printk(KERN_INFO "%s: Added filter for %2.2x:%2.2x:%2.2x:"
|
| 1157 |
|
|
"%2.2x:%2.2x:%2.2x %8.8x bit %d.\n", dev->name,
|
| 1158 |
|
|
mclist->dmi_addr[0], mclist->dmi_addr[1],
|
| 1159 |
|
|
mclist->dmi_addr[2], mclist->dmi_addr[3],
|
| 1160 |
|
|
mclist->dmi_addr[4], mclist->dmi_addr[5],
|
| 1161 |
|
|
ether_crc(ETH_ALEN, mclist->dmi_addr), filterbit);
|
| 1162 |
|
|
}
|
| 1163 |
|
|
}
|
| 1164 |
|
|
if (mc_filter[0] == tp->mc_filter[0] &&
|
| 1165 |
|
|
mc_filter[1] == tp->mc_filter[1])
|
| 1166 |
|
|
; /* No change. */
|
| 1167 |
|
|
else if (tp->flags & IS_ASIX) {
|
| 1168 |
|
|
outl(2, ioaddr + CSR13);
|
| 1169 |
|
|
outl(mc_filter[0], ioaddr + CSR14);
|
| 1170 |
|
|
outl(3, ioaddr + CSR13);
|
| 1171 |
|
|
outl(mc_filter[1], ioaddr + CSR14);
|
| 1172 |
|
|
} else if (tp->flags & COMET_MAC_ADDR) {
|
| 1173 |
|
|
outl(mc_filter[0], ioaddr + 0xAC);
|
| 1174 |
|
|
outl(mc_filter[1], ioaddr + 0xB0);
|
| 1175 |
|
|
}
|
| 1176 |
|
|
tp->mc_filter[0] = mc_filter[0];
|
| 1177 |
|
|
tp->mc_filter[1] = mc_filter[1];
|
| 1178 |
|
|
}
|
| 1179 |
|
|
} else {
|
| 1180 |
|
|
unsigned long flags;
|
| 1181 |
|
|
u32 tx_flags = 0x08000000 | 192;
|
| 1182 |
|
|
|
| 1183 |
|
|
/* Note that only the low-address shortword of setup_frame is valid!
|
| 1184 |
|
|
The values are doubled for big-endian architectures. */
|
| 1185 |
|
|
if (dev->mc_count > 14) { /* Must use a multicast hash table. */
|
| 1186 |
|
|
build_setup_frame_hash(tp->setup_frame, dev);
|
| 1187 |
|
|
tx_flags = 0x08400000 | 192;
|
| 1188 |
|
|
} else {
|
| 1189 |
|
|
build_setup_frame_perfect(tp->setup_frame, dev);
|
| 1190 |
|
|
}
|
| 1191 |
|
|
|
| 1192 |
|
|
spin_lock_irqsave(&tp->lock, flags);
|
| 1193 |
|
|
|
| 1194 |
|
|
if (tp->cur_tx - tp->dirty_tx > TX_RING_SIZE - 2) {
|
| 1195 |
|
|
/* Same setup recently queued, we need not add it. */
|
| 1196 |
|
|
} else {
|
| 1197 |
|
|
unsigned int entry;
|
| 1198 |
|
|
int dummy = -1;
|
| 1199 |
|
|
|
| 1200 |
|
|
/* Now add this frame to the Tx list. */
|
| 1201 |
|
|
|
| 1202 |
|
|
entry = tp->cur_tx++ % TX_RING_SIZE;
|
| 1203 |
|
|
|
| 1204 |
|
|
if (entry != 0) {
|
| 1205 |
|
|
/* Avoid a chip errata by prefixing a dummy entry. */
|
| 1206 |
|
|
tp->tx_buffers[entry].skb = NULL;
|
| 1207 |
|
|
tp->tx_buffers[entry].mapping = 0;
|
| 1208 |
|
|
tp->tx_ring[entry].length =
|
| 1209 |
|
|
(entry == TX_RING_SIZE-1) ? cpu_to_le32(DESC_RING_WRAP) : 0;
|
| 1210 |
|
|
tp->tx_ring[entry].buffer1 = 0;
|
| 1211 |
|
|
/* Must set DescOwned later to avoid race with chip */
|
| 1212 |
|
|
dummy = entry;
|
| 1213 |
|
|
entry = tp->cur_tx++ % TX_RING_SIZE;
|
| 1214 |
|
|
}
|
| 1215 |
|
|
|
| 1216 |
|
|
tp->tx_buffers[entry].skb = NULL;
|
| 1217 |
|
|
tp->tx_buffers[entry].mapping =
|
| 1218 |
|
|
pci_map_single(tp->pdev, tp->setup_frame,
|
| 1219 |
|
|
sizeof(tp->setup_frame),
|
| 1220 |
|
|
PCI_DMA_TODEVICE);
|
| 1221 |
|
|
/* Put the setup frame on the Tx list. */
|
| 1222 |
|
|
if (entry == TX_RING_SIZE-1)
|
| 1223 |
|
|
tx_flags |= DESC_RING_WRAP; /* Wrap ring. */
|
| 1224 |
|
|
tp->tx_ring[entry].length = cpu_to_le32(tx_flags);
|
| 1225 |
|
|
tp->tx_ring[entry].buffer1 =
|
| 1226 |
|
|
cpu_to_le32(tp->tx_buffers[entry].mapping);
|
| 1227 |
|
|
tp->tx_ring[entry].status = cpu_to_le32(DescOwned);
|
| 1228 |
|
|
if (dummy >= 0)
|
| 1229 |
|
|
tp->tx_ring[dummy].status = cpu_to_le32(DescOwned);
|
| 1230 |
|
|
if (tp->cur_tx - tp->dirty_tx >= TX_RING_SIZE - 2)
|
| 1231 |
|
|
netif_stop_queue(dev);
|
| 1232 |
|
|
|
| 1233 |
|
|
/* Trigger an immediate transmit demand. */
|
| 1234 |
|
|
outl(0, ioaddr + CSR1);
|
| 1235 |
|
|
}
|
| 1236 |
|
|
|
| 1237 |
|
|
spin_unlock_irqrestore(&tp->lock, flags);
|
| 1238 |
|
|
}
|
| 1239 |
|
|
|
| 1240 |
|
|
outl(csr6, ioaddr + CSR6);
|
| 1241 |
|
|
}
|
| 1242 |
|
|
|
| 1243 |
|
|
#ifdef CONFIG_TULIP_MWI
|
| 1244 |
|
|
static void __devinit tulip_mwi_config (struct pci_dev *pdev,
|
| 1245 |
|
|
struct net_device *dev)
|
| 1246 |
|
|
{
|
| 1247 |
|
|
struct tulip_private *tp = dev->priv;
|
| 1248 |
|
|
u8 cache;
|
| 1249 |
|
|
u16 pci_command;
|
| 1250 |
|
|
u32 csr0;
|
| 1251 |
|
|
|
| 1252 |
|
|
if (tulip_debug > 3)
|
| 1253 |
|
|
printk(KERN_DEBUG "%s: tulip_mwi_config()\n", pdev->slot_name);
|
| 1254 |
|
|
|
| 1255 |
|
|
tp->csr0 = csr0 = 0;
|
| 1256 |
|
|
|
| 1257 |
|
|
/* if we have any cache line size at all, we can do MRM */
|
| 1258 |
|
|
csr0 |= MRM;
|
| 1259 |
|
|
|
| 1260 |
|
|
/* ...and barring hardware bugs, MWI */
|
| 1261 |
|
|
if (!(tp->chip_id == DC21143 && tp->revision == 65))
|
| 1262 |
|
|
csr0 |= MWI;
|
| 1263 |
|
|
|
| 1264 |
|
|
/* set or disable MWI in the standard PCI command bit.
|
| 1265 |
|
|
* Check for the case where mwi is desired but not available
|
| 1266 |
|
|
*/
|
| 1267 |
|
|
if (csr0 & MWI) pci_set_mwi(pdev);
|
| 1268 |
|
|
else pci_clear_mwi(pdev);
|
| 1269 |
|
|
|
| 1270 |
|
|
/* read result from hardware (in case bit refused to enable) */
|
| 1271 |
|
|
pci_read_config_word(pdev, PCI_COMMAND, &pci_command);
|
| 1272 |
|
|
if ((csr0 & MWI) && (!(pci_command & PCI_COMMAND_INVALIDATE)))
|
| 1273 |
|
|
csr0 &= ~MWI;
|
| 1274 |
|
|
|
| 1275 |
|
|
/* if cache line size hardwired to zero, no MWI */
|
| 1276 |
|
|
pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache);
|
| 1277 |
|
|
if ((csr0 & MWI) && (cache == 0)) {
|
| 1278 |
|
|
csr0 &= ~MWI;
|
| 1279 |
|
|
pci_clear_mwi(pdev);
|
| 1280 |
|
|
}
|
| 1281 |
|
|
|
| 1282 |
|
|
/* assign per-cacheline-size cache alignment and
|
| 1283 |
|
|
* burst length values
|
| 1284 |
|
|
*/
|
| 1285 |
|
|
switch (cache) {
|
| 1286 |
|
|
case 8:
|
| 1287 |
|
|
csr0 |= MRL | (1 << CALShift) | (16 << BurstLenShift);
|
| 1288 |
|
|
break;
|
| 1289 |
|
|
case 16:
|
| 1290 |
|
|
csr0 |= MRL | (2 << CALShift) | (16 << BurstLenShift);
|
| 1291 |
|
|
break;
|
| 1292 |
|
|
case 32:
|
| 1293 |
|
|
csr0 |= MRL | (3 << CALShift) | (32 << BurstLenShift);
|
| 1294 |
|
|
break;
|
| 1295 |
|
|
default:
|
| 1296 |
|
|
cache = 0;
|
| 1297 |
|
|
break;
|
| 1298 |
|
|
}
|
| 1299 |
|
|
|
| 1300 |
|
|
/* if we have a good cache line size, we by now have a good
|
| 1301 |
|
|
* csr0, so save it and exit
|
| 1302 |
|
|
*/
|
| 1303 |
|
|
if (cache)
|
| 1304 |
|
|
goto out;
|
| 1305 |
|
|
|
| 1306 |
|
|
/* we don't have a good csr0 or cache line size, disable MWI */
|
| 1307 |
|
|
if (csr0 & MWI) {
|
| 1308 |
|
|
pci_clear_mwi(pdev);
|
| 1309 |
|
|
csr0 &= ~MWI;
|
| 1310 |
|
|
}
|
| 1311 |
|
|
|
| 1312 |
|
|
/* sane defaults for burst length and cache alignment
|
| 1313 |
|
|
* originally from de4x5 driver
|
| 1314 |
|
|
*/
|
| 1315 |
|
|
csr0 |= (8 << BurstLenShift) | (1 << CALShift);
|
| 1316 |
|
|
|
| 1317 |
|
|
out:
|
| 1318 |
|
|
tp->csr0 = csr0;
|
| 1319 |
|
|
if (tulip_debug > 2)
|
| 1320 |
|
|
printk(KERN_DEBUG "%s: MWI config cacheline=%d, csr0=%08x\n",
|
| 1321 |
|
|
pdev->slot_name, cache, csr0);
|
| 1322 |
|
|
}
|
| 1323 |
|
|
#endif
|
| 1324 |
|
|
|
| 1325 |
|
|
static int __devinit tulip_init_one (struct pci_dev *pdev,
|
| 1326 |
|
|
const struct pci_device_id *ent)
|
| 1327 |
|
|
{
|
| 1328 |
|
|
struct tulip_private *tp;
|
| 1329 |
|
|
/* See note below on the multiport cards. */
|
| 1330 |
|
|
static unsigned char last_phys_addr[6] = {0x00, 'L', 'i', 'n', 'u', 'x'};
|
| 1331 |
|
|
static int last_irq;
|
| 1332 |
|
|
static int multiport_cnt; /* For four-port boards w/one EEPROM */
|
| 1333 |
|
|
u8 chip_rev;
|
| 1334 |
|
|
int i, irq;
|
| 1335 |
|
|
unsigned short sum;
|
| 1336 |
|
|
u8 ee_data[EEPROM_SIZE];
|
| 1337 |
|
|
struct net_device *dev;
|
| 1338 |
|
|
long ioaddr;
|
| 1339 |
|
|
static int board_idx = -1;
|
| 1340 |
|
|
int chip_idx = ent->driver_data;
|
| 1341 |
|
|
unsigned int t2104x_mode = 0;
|
| 1342 |
|
|
unsigned int eeprom_missing = 0;
|
| 1343 |
|
|
unsigned int force_csr0 = 0;
|
| 1344 |
|
|
|
| 1345 |
|
|
#ifndef MODULE
|
| 1346 |
|
|
static int did_version; /* Already printed version info. */
|
| 1347 |
|
|
if (tulip_debug > 0 && did_version++ == 0)
|
| 1348 |
|
|
printk (KERN_INFO "%s", version);
|
| 1349 |
|
|
#endif
|
| 1350 |
|
|
|
| 1351 |
|
|
board_idx++;
|
| 1352 |
|
|
|
| 1353 |
|
|
/*
|
| 1354 |
|
|
* Lan media wire a tulip chip to a wan interface. Needs a very
|
| 1355 |
|
|
* different driver (lmc driver)
|
| 1356 |
|
|
*/
|
| 1357 |
|
|
|
| 1358 |
|
|
if (pdev->subsystem_vendor == PCI_VENDOR_ID_LMC) {
|
| 1359 |
|
|
printk (KERN_ERR PFX "skipping LMC card.\n");
|
| 1360 |
|
|
return -ENODEV;
|
| 1361 |
|
|
}
|
| 1362 |
|
|
|
| 1363 |
|
|
/*
|
| 1364 |
|
|
* Early DM9100's need software CRC and the DMFE driver
|
| 1365 |
|
|
*/
|
| 1366 |
|
|
|
| 1367 |
|
|
if (pdev->vendor == 0x1282 && pdev->device == 0x9100)
|
| 1368 |
|
|
{
|
| 1369 |
|
|
u32 dev_rev;
|
| 1370 |
|
|
/* Read Chip revision */
|
| 1371 |
|
|
pci_read_config_dword(pdev, PCI_REVISION_ID, &dev_rev);
|
| 1372 |
|
|
if(dev_rev < 0x02000030)
|
| 1373 |
|
|
{
|
| 1374 |
|
|
printk(KERN_ERR PFX "skipping early DM9100 with Crc bug (use dmfe)\n");
|
| 1375 |
|
|
return -ENODEV;
|
| 1376 |
|
|
}
|
| 1377 |
|
|
}
|
| 1378 |
|
|
|
| 1379 |
|
|
/*
|
| 1380 |
|
|
* Looks for early PCI chipsets where people report hangs
|
| 1381 |
|
|
* without the workarounds being on.
|
| 1382 |
|
|
*/
|
| 1383 |
|
|
|
| 1384 |
|
|
/* Intel Saturn. Switch to 8 long words burst, 8 long word cache aligned
|
| 1385 |
|
|
Aries might need this too. The Saturn errata are not pretty reading but
|
| 1386 |
|
|
thankfully its an old 486 chipset.
|
| 1387 |
|
|
*/
|
| 1388 |
|
|
|
| 1389 |
|
|
if (pci_find_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82424, NULL)) {
|
| 1390 |
|
|
csr0 = MRL | MRM | (8 << BurstLenShift) | (1 << CALShift);
|
| 1391 |
|
|
force_csr0 = 1;
|
| 1392 |
|
|
}
|
| 1393 |
|
|
/* The dreaded SiS496 486 chipset. Same workaround as above. */
|
| 1394 |
|
|
if (pci_find_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_496, NULL)) {
|
| 1395 |
|
|
csr0 = MRL | MRM | (8 << BurstLenShift) | (1 << CALShift);
|
| 1396 |
|
|
force_csr0 = 1;
|
| 1397 |
|
|
}
|
| 1398 |
|
|
|
| 1399 |
|
|
/* bugfix: the ASIX must have a burst limit or horrible things happen. */
|
| 1400 |
|
|
if (chip_idx == AX88140) {
|
| 1401 |
|
|
if ((csr0 & 0x3f00) == 0)
|
| 1402 |
|
|
csr0 |= 0x2000;
|
| 1403 |
|
|
}
|
| 1404 |
|
|
|
| 1405 |
|
|
/* PNIC doesn't have MWI/MRL/MRM... */
|
| 1406 |
|
|
if (chip_idx == LC82C168)
|
| 1407 |
|
|
csr0 &= ~0xfff10000; /* zero reserved bits 31:20, 16 */
|
| 1408 |
|
|
|
| 1409 |
|
|
/* DM9102A has troubles with MRM & clear reserved bits 24:22, 20, 16, 7:1 */
|
| 1410 |
|
|
if ((pdev->vendor == 0x1282 && pdev->device == 0x9102)
|
| 1411 |
|
|
|| (pdev->vendor == 0x10b9 && pdev->device == 0x5261))
|
| 1412 |
|
|
csr0 &= ~0x01f100ff;
|
| 1413 |
|
|
|
| 1414 |
|
|
#if defined(__sparc__)
|
| 1415 |
|
|
/* DM9102A needs 32-dword alignment/burst length on sparc - chip bug? */
|
| 1416 |
|
|
if ((pdev->vendor == 0x1282 && pdev->device == 0x9102)
|
| 1417 |
|
|
|| (pdev->vendor == 0x10b9 && pdev->device == 0x5261))
|
| 1418 |
|
|
csr0 = (csr0 & ~0xff00) | 0xe000;
|
| 1419 |
|
|
#endif
|
| 1420 |
|
|
|
| 1421 |
|
|
/*
|
| 1422 |
|
|
* And back to business
|
| 1423 |
|
|
*/
|
| 1424 |
|
|
|
| 1425 |
|
|
i = pci_enable_device(pdev);
|
| 1426 |
|
|
if (i) {
|
| 1427 |
|
|
printk (KERN_ERR PFX
|
| 1428 |
|
|
"Cannot enable tulip board #%d, aborting\n",
|
| 1429 |
|
|
board_idx);
|
| 1430 |
|
|
return i;
|
| 1431 |
|
|
}
|
| 1432 |
|
|
|
| 1433 |
|
|
ioaddr = pci_resource_start (pdev, 0);
|
| 1434 |
|
|
irq = pdev->irq;
|
| 1435 |
|
|
|
| 1436 |
|
|
/* alloc_etherdev ensures aligned and zeroed private structures */
|
| 1437 |
|
|
dev = alloc_etherdev (sizeof (*tp));
|
| 1438 |
|
|
if (!dev) {
|
| 1439 |
|
|
printk (KERN_ERR PFX "ether device alloc failed, aborting\n");
|
| 1440 |
|
|
return -ENOMEM;
|
| 1441 |
|
|
}
|
| 1442 |
|
|
|
| 1443 |
|
|
if (pci_resource_len (pdev, 0) < tulip_tbl[chip_idx].io_size) {
|
| 1444 |
|
|
printk (KERN_ERR PFX "%s: I/O region (0x%lx@0x%lx) too small, "
|
| 1445 |
|
|
"aborting\n", pdev->slot_name,
|
| 1446 |
|
|
pci_resource_len (pdev, 0),
|
| 1447 |
|
|
pci_resource_start (pdev, 0));
|
| 1448 |
|
|
goto err_out_free_netdev;
|
| 1449 |
|
|
}
|
| 1450 |
|
|
|
| 1451 |
|
|
/* grab all resources from both PIO and MMIO regions, as we
|
| 1452 |
|
|
* don't want anyone else messing around with our hardware */
|
| 1453 |
|
|
if (pci_request_regions (pdev, "tulip"))
|
| 1454 |
|
|
goto err_out_free_netdev;
|
| 1455 |
|
|
|
| 1456 |
|
|
#ifndef USE_IO_OPS
|
| 1457 |
|
|
ioaddr = (unsigned long) ioremap (pci_resource_start (pdev, 1),
|
| 1458 |
|
|
tulip_tbl[chip_idx].io_size);
|
| 1459 |
|
|
if (!ioaddr)
|
| 1460 |
|
|
goto err_out_free_res;
|
| 1461 |
|
|
#endif
|
| 1462 |
|
|
|
| 1463 |
|
|
pci_read_config_byte (pdev, PCI_REVISION_ID, &chip_rev);
|
| 1464 |
|
|
|
| 1465 |
|
|
/*
|
| 1466 |
|
|
* initialize private data structure 'tp'
|
| 1467 |
|
|
* it is zeroed and aligned in alloc_etherdev
|
| 1468 |
|
|
*/
|
| 1469 |
|
|
tp = dev->priv;
|
| 1470 |
|
|
|
| 1471 |
|
|
tp->rx_ring = pci_alloc_consistent(pdev,
|
| 1472 |
|
|
sizeof(struct tulip_rx_desc) * RX_RING_SIZE +
|
| 1473 |
|
|
sizeof(struct tulip_tx_desc) * TX_RING_SIZE,
|
| 1474 |
|
|
&tp->rx_ring_dma);
|
| 1475 |
|
|
if (!tp->rx_ring)
|
| 1476 |
|
|
goto err_out_mtable;
|
| 1477 |
|
|
tp->tx_ring = (struct tulip_tx_desc *)(tp->rx_ring + RX_RING_SIZE);
|
| 1478 |
|
|
tp->tx_ring_dma = tp->rx_ring_dma + sizeof(struct tulip_rx_desc) * RX_RING_SIZE;
|
| 1479 |
|
|
|
| 1480 |
|
|
tp->chip_id = chip_idx;
|
| 1481 |
|
|
tp->flags = tulip_tbl[chip_idx].flags;
|
| 1482 |
|
|
tp->pdev = pdev;
|
| 1483 |
|
|
tp->base_addr = ioaddr;
|
| 1484 |
|
|
tp->revision = chip_rev;
|
| 1485 |
|
|
tp->csr0 = csr0;
|
| 1486 |
|
|
spin_lock_init(&tp->lock);
|
| 1487 |
|
|
spin_lock_init(&tp->mii_lock);
|
| 1488 |
|
|
init_timer(&tp->timer);
|
| 1489 |
|
|
tp->timer.data = (unsigned long)dev;
|
| 1490 |
|
|
tp->timer.function = tulip_tbl[tp->chip_id].media_timer;
|
| 1491 |
|
|
|
| 1492 |
|
|
dev->base_addr = ioaddr;
|
| 1493 |
|
|
|
| 1494 |
|
|
#ifdef CONFIG_TULIP_MWI
|
| 1495 |
|
|
if (!force_csr0 && (tp->flags & HAS_PCI_MWI))
|
| 1496 |
|
|
tulip_mwi_config (pdev, dev);
|
| 1497 |
|
|
#else
|
| 1498 |
|
|
/* MWI is broken for DC21143 rev 65... */
|
| 1499 |
|
|
if (chip_idx == DC21143 && chip_rev == 65)
|
| 1500 |
|
|
tp->csr0 &= ~MWI;
|
| 1501 |
|
|
#endif
|
| 1502 |
|
|
|
| 1503 |
|
|
/* Stop the chip's Tx and Rx processes. */
|
| 1504 |
|
|
tulip_stop_rxtx(tp);
|
| 1505 |
|
|
|
| 1506 |
|
|
pci_set_master(pdev);
|
| 1507 |
|
|
|
| 1508 |
|
|
/* Clear the missed-packet counter. */
|
| 1509 |
|
|
inl(ioaddr + CSR8);
|
| 1510 |
|
|
|
| 1511 |
|
|
if (chip_idx == DC21041) {
|
| 1512 |
|
|
if (inl(ioaddr + CSR9) & 0x8000) {
|
| 1513 |
|
|
chip_idx = DC21040;
|
| 1514 |
|
|
t2104x_mode = 1;
|
| 1515 |
|
|
} else {
|
| 1516 |
|
|
t2104x_mode = 2;
|
| 1517 |
|
|
}
|
| 1518 |
|
|
}
|
| 1519 |
|
|
|
| 1520 |
|
|
/* The station address ROM is read byte serially. The register must
|
| 1521 |
|
|
be polled, waiting for the value to be read bit serially from the
|
| 1522 |
|
|
EEPROM.
|
| 1523 |
|
|
*/
|
| 1524 |
|
|
sum = 0;
|
| 1525 |
|
|
if (chip_idx == DC21040) {
|
| 1526 |
|
|
outl(0, ioaddr + CSR9); /* Reset the pointer with a dummy write. */
|
| 1527 |
|
|
for (i = 0; i < 6; i++) {
|
| 1528 |
|
|
int value, boguscnt = 100000;
|
| 1529 |
|
|
do
|
| 1530 |
|
|
value = inl(ioaddr + CSR9);
|
| 1531 |
|
|
while (value < 0 && --boguscnt > 0);
|
| 1532 |
|
|
dev->dev_addr[i] = value;
|
| 1533 |
|
|
sum += value & 0xff;
|
| 1534 |
|
|
}
|
| 1535 |
|
|
} else if (chip_idx == LC82C168) {
|
| 1536 |
|
|
for (i = 0; i < 3; i++) {
|
| 1537 |
|
|
int value, boguscnt = 100000;
|
| 1538 |
|
|
outl(0x600 | i, ioaddr + 0x98);
|
| 1539 |
|
|
do
|
| 1540 |
|
|
value = inl(ioaddr + CSR9);
|
| 1541 |
|
|
while (value < 0 && --boguscnt > 0);
|
| 1542 |
|
|
put_unaligned(le16_to_cpu(value), ((u16*)dev->dev_addr) + i);
|
| 1543 |
|
|
sum += value & 0xffff;
|
| 1544 |
|
|
}
|
| 1545 |
|
|
} else if (chip_idx == COMET) {
|
| 1546 |
|
|
/* No need to read the EEPROM. */
|
| 1547 |
|
|
put_unaligned(inl(ioaddr + 0xA4), (u32 *)dev->dev_addr);
|
| 1548 |
|
|
put_unaligned(inl(ioaddr + 0xA8), (u16 *)(dev->dev_addr + 4));
|
| 1549 |
|
|
for (i = 0; i < 6; i ++)
|
| 1550 |
|
|
sum += dev->dev_addr[i];
|
| 1551 |
|
|
} else {
|
| 1552 |
|
|
/* A serial EEPROM interface, we read now and sort it out later. */
|
| 1553 |
|
|
int sa_offset = 0;
|
| 1554 |
|
|
int ee_addr_size = tulip_read_eeprom(ioaddr, 0xff, 8) & 0x40000 ? 8 : 6;
|
| 1555 |
|
|
|
| 1556 |
|
|
for (i = 0; i < sizeof(ee_data)/2; i++)
|
| 1557 |
|
|
((u16 *)ee_data)[i] =
|
| 1558 |
|
|
le16_to_cpu(tulip_read_eeprom(ioaddr, i, ee_addr_size));
|
| 1559 |
|
|
|
| 1560 |
|
|
/* DEC now has a specification (see Notes) but early board makers
|
| 1561 |
|
|
just put the address in the first EEPROM locations. */
|
| 1562 |
|
|
/* This does memcmp(eedata, eedata+16, 8) */
|
| 1563 |
|
|
for (i = 0; i < 8; i ++)
|
| 1564 |
|
|
if (ee_data[i] != ee_data[16+i])
|
| 1565 |
|
|
sa_offset = 20;
|
| 1566 |
|
|
if (chip_idx == CONEXANT) {
|
| 1567 |
|
|
/* Check that the tuple type and length is correct. */
|
| 1568 |
|
|
if (ee_data[0x198] == 0x04 && ee_data[0x199] == 6)
|
| 1569 |
|
|
sa_offset = 0x19A;
|
| 1570 |
|
|
}
|
| 1571 |
|
|
if (ee_data[0] == 0xff && ee_data[1] == 0xff &&
|
| 1572 |
|
|
ee_data[2] == 0) {
|
| 1573 |
|
|
sa_offset = 2; /* Grrr, damn Matrox boards. */
|
| 1574 |
|
|
multiport_cnt = 4;
|
| 1575 |
|
|
}
|
| 1576 |
|
|
#ifdef CONFIG_DDB5476
|
| 1577 |
|
|
if ((pdev->bus->number == 0) && (PCI_SLOT(pdev->devfn) == 6)) {
|
| 1578 |
|
|
/* DDB5476 MAC address in first EEPROM locations. */
|
| 1579 |
|
|
sa_offset = 0;
|
| 1580 |
|
|
/* No media table either */
|
| 1581 |
|
|
tp->flags &= ~HAS_MEDIA_TABLE;
|
| 1582 |
|
|
}
|
| 1583 |
|
|
#endif
|
| 1584 |
|
|
#ifdef CONFIG_DDB5477
|
| 1585 |
|
|
if ((pdev->bus->number == 0) && (PCI_SLOT(pdev->devfn) == 4)) {
|
| 1586 |
|
|
/* DDB5477 MAC address in first EEPROM locations. */
|
| 1587 |
|
|
sa_offset = 0;
|
| 1588 |
|
|
/* No media table either */
|
| 1589 |
|
|
tp->flags &= ~HAS_MEDIA_TABLE;
|
| 1590 |
|
|
}
|
| 1591 |
|
|
#endif
|
| 1592 |
|
|
#ifdef CONFIG_MIPS_COBALT
|
| 1593 |
|
|
if ((pdev->bus->number == 0) &&
|
| 1594 |
|
|
((PCI_SLOT(pdev->devfn) == 7) ||
|
| 1595 |
|
|
(PCI_SLOT(pdev->devfn) == 12))) {
|
| 1596 |
|
|
/* Cobalt MAC address in first EEPROM locations. */
|
| 1597 |
|
|
sa_offset = 0;
|
| 1598 |
|
|
/* No media table either */
|
| 1599 |
|
|
tp->flags &= ~HAS_MEDIA_TABLE;
|
| 1600 |
|
|
}
|
| 1601 |
|
|
#endif
|
| 1602 |
|
|
#ifdef __hppa__
|
| 1603 |
|
|
/* 3x5 HSC (J3514A) has a broken srom */
|
| 1604 |
|
|
if(ee_data[0] == 0x61 && ee_data[1] == 0x10) {
|
| 1605 |
|
|
/* pci_vendor_id and subsystem_id are swapped */
|
| 1606 |
|
|
ee_data[0] = ee_data[2];
|
| 1607 |
|
|
ee_data[1] = ee_data[3];
|
| 1608 |
|
|
ee_data[2] = 0x61;
|
| 1609 |
|
|
ee_data[3] = 0x10;
|
| 1610 |
|
|
|
| 1611 |
|
|
/* srom need to be byte-swaped and shifted up 1 word.
|
| 1612 |
|
|
* This shift needs to happen at the end of the MAC
|
| 1613 |
|
|
* first because of the 2 byte overlap.
|
| 1614 |
|
|
*/
|
| 1615 |
|
|
for(i = 4; i >= 0; i -= 2) {
|
| 1616 |
|
|
ee_data[17 + i + 3] = ee_data[17 + i];
|
| 1617 |
|
|
ee_data[16 + i + 5] = ee_data[16 + i];
|
| 1618 |
|
|
}
|
| 1619 |
|
|
}
|
| 1620 |
|
|
#endif
|
| 1621 |
|
|
for (i = 0; i < 6; i ++) {
|
| 1622 |
|
|
dev->dev_addr[i] = ee_data[i + sa_offset];
|
| 1623 |
|
|
sum += ee_data[i + sa_offset];
|
| 1624 |
|
|
}
|
| 1625 |
|
|
}
|
| 1626 |
|
|
/* Lite-On boards have the address byte-swapped. */
|
| 1627 |
|
|
if ((dev->dev_addr[0] == 0xA0 || dev->dev_addr[0] == 0xC0)
|
| 1628 |
|
|
&& dev->dev_addr[1] == 0x00)
|
| 1629 |
|
|
for (i = 0; i < 6; i+=2) {
|
| 1630 |
|
|
char tmp = dev->dev_addr[i];
|
| 1631 |
|
|
dev->dev_addr[i] = dev->dev_addr[i+1];
|
| 1632 |
|
|
dev->dev_addr[i+1] = tmp;
|
| 1633 |
|
|
}
|
| 1634 |
|
|
/* On the Zynx 315 Etherarray and other multiport boards only the
|
| 1635 |
|
|
first Tulip has an EEPROM.
|
| 1636 |
|
|
On Sparc systems the mac address is held in the OBP property
|
| 1637 |
|
|
"local-mac-address".
|
| 1638 |
|
|
The addresses of the subsequent ports are derived from the first.
|
| 1639 |
|
|
Many PCI BIOSes also incorrectly report the IRQ line, so we correct
|
| 1640 |
|
|
that here as well. */
|
| 1641 |
|
|
if (sum == 0 || sum == 6*0xff) {
|
| 1642 |
|
|
#if defined(__sparc__)
|
| 1643 |
|
|
struct pcidev_cookie *pcp = pdev->sysdata;
|
| 1644 |
|
|
#endif
|
| 1645 |
|
|
eeprom_missing = 1;
|
| 1646 |
|
|
for (i = 0; i < 5; i++)
|
| 1647 |
|
|
dev->dev_addr[i] = last_phys_addr[i];
|
| 1648 |
|
|
dev->dev_addr[i] = last_phys_addr[i] + 1;
|
| 1649 |
|
|
#if defined(__sparc__)
|
| 1650 |
|
|
if ((pcp != NULL) && prom_getproplen(pcp->prom_node,
|
| 1651 |
|
|
"local-mac-address") == 6) {
|
| 1652 |
|
|
prom_getproperty(pcp->prom_node, "local-mac-address",
|
| 1653 |
|
|
dev->dev_addr, 6);
|
| 1654 |
|
|
}
|
| 1655 |
|
|
#endif
|
| 1656 |
|
|
#if defined(__i386__) /* Patch up x86 BIOS bug. */
|
| 1657 |
|
|
if (last_irq)
|
| 1658 |
|
|
irq = last_irq;
|
| 1659 |
|
|
#endif
|
| 1660 |
|
|
}
|
| 1661 |
|
|
|
| 1662 |
|
|
for (i = 0; i < 6; i++)
|
| 1663 |
|
|
last_phys_addr[i] = dev->dev_addr[i];
|
| 1664 |
|
|
last_irq = irq;
|
| 1665 |
|
|
dev->irq = irq;
|
| 1666 |
|
|
|
| 1667 |
|
|
/* The lower four bits are the media type. */
|
| 1668 |
|
|
if (board_idx >= 0 && board_idx < MAX_UNITS) {
|
| 1669 |
|
|
if (options[board_idx] & MEDIA_MASK)
|
| 1670 |
|
|
tp->default_port = options[board_idx] & MEDIA_MASK;
|
| 1671 |
|
|
if ((options[board_idx] & FullDuplex) || full_duplex[board_idx] > 0)
|
| 1672 |
|
|
tp->full_duplex = 1;
|
| 1673 |
|
|
if (mtu[board_idx] > 0)
|
| 1674 |
|
|
dev->mtu = mtu[board_idx];
|
| 1675 |
|
|
}
|
| 1676 |
|
|
if (dev->mem_start & MEDIA_MASK)
|
| 1677 |
|
|
tp->default_port = dev->mem_start & MEDIA_MASK;
|
| 1678 |
|
|
if (tp->default_port) {
|
| 1679 |
|
|
printk(KERN_INFO "tulip%d: Transceiver selection forced to %s.\n",
|
| 1680 |
|
|
board_idx, medianame[tp->default_port & MEDIA_MASK]);
|
| 1681 |
|
|
tp->medialock = 1;
|
| 1682 |
|
|
if (tulip_media_cap[tp->default_port] & MediaAlwaysFD)
|
| 1683 |
|
|
tp->full_duplex = 1;
|
| 1684 |
|
|
}
|
| 1685 |
|
|
if (tp->full_duplex)
|
| 1686 |
|
|
tp->full_duplex_lock = 1;
|
| 1687 |
|
|
|
| 1688 |
|
|
if (tulip_media_cap[tp->default_port] & MediaIsMII) {
|
| 1689 |
|
|
u16 media2advert[] = { 0x20, 0x40, 0x03e0, 0x60, 0x80, 0x100, 0x200 };
|
| 1690 |
|
|
tp->mii_advertise = media2advert[tp->default_port - 9];
|
| 1691 |
|
|
tp->mii_advertise |= (tp->flags & HAS_8023X); /* Matching bits! */
|
| 1692 |
|
|
}
|
| 1693 |
|
|
|
| 1694 |
|
|
if (tp->flags & HAS_MEDIA_TABLE) {
|
| 1695 |
|
|
memcpy(tp->eeprom, ee_data, sizeof(tp->eeprom));
|
| 1696 |
|
|
|
| 1697 |
|
|
sprintf(dev->name, "tulip%d", board_idx); /* hack */
|
| 1698 |
|
|
tulip_parse_eeprom(dev);
|
| 1699 |
|
|
strcpy(dev->name, "eth%d"); /* un-hack */
|
| 1700 |
|
|
}
|
| 1701 |
|
|
|
| 1702 |
|
|
if ((tp->flags & ALWAYS_CHECK_MII) ||
|
| 1703 |
|
|
(tp->mtable && tp->mtable->has_mii) ||
|
| 1704 |
|
|
( ! tp->mtable && (tp->flags & HAS_MII))) {
|
| 1705 |
|
|
if (tp->mtable && tp->mtable->has_mii) {
|
| 1706 |
|
|
for (i = 0; i < tp->mtable->leafcount; i++)
|
| 1707 |
|
|
if (tp->mtable->mleaf[i].media == 11) {
|
| 1708 |
|
|
tp->cur_index = i;
|
| 1709 |
|
|
tp->saved_if_port = dev->if_port;
|
| 1710 |
|
|
tulip_select_media(dev, 2);
|
| 1711 |
|
|
dev->if_port = tp->saved_if_port;
|
| 1712 |
|
|
break;
|
| 1713 |
|
|
}
|
| 1714 |
|
|
}
|
| 1715 |
|
|
|
| 1716 |
|
|
/* Find the connected MII xcvrs.
|
| 1717 |
|
|
Doing this in open() would allow detecting external xcvrs
|
| 1718 |
|
|
later, but takes much time. */
|
| 1719 |
|
|
tulip_find_mii (dev, board_idx);
|
| 1720 |
|
|
}
|
| 1721 |
|
|
|
| 1722 |
|
|
/* The Tulip-specific entries in the device structure. */
|
| 1723 |
|
|
dev->open = tulip_open;
|
| 1724 |
|
|
dev->hard_start_xmit = tulip_start_xmit;
|
| 1725 |
|
|
dev->tx_timeout = tulip_tx_timeout;
|
| 1726 |
|
|
dev->watchdog_timeo = TX_TIMEOUT;
|
| 1727 |
|
|
dev->stop = tulip_close;
|
| 1728 |
|
|
dev->get_stats = tulip_get_stats;
|
| 1729 |
|
|
dev->do_ioctl = private_ioctl;
|
| 1730 |
|
|
dev->set_multicast_list = set_rx_mode;
|
| 1731 |
|
|
|
| 1732 |
|
|
if (register_netdev(dev))
|
| 1733 |
|
|
goto err_out_free_ring;
|
| 1734 |
|
|
|
| 1735 |
|
|
printk(KERN_INFO "%s: %s rev %d at %#3lx,",
|
| 1736 |
|
|
dev->name, tulip_tbl[chip_idx].chip_name, chip_rev, ioaddr);
|
| 1737 |
|
|
pci_set_drvdata(pdev, dev);
|
| 1738 |
|
|
|
| 1739 |
|
|
if (t2104x_mode == 1)
|
| 1740 |
|
|
printk(" 21040 compatible mode,");
|
| 1741 |
|
|
else if (t2104x_mode == 2)
|
| 1742 |
|
|
printk(" 21041 mode,");
|
| 1743 |
|
|
if (eeprom_missing)
|
| 1744 |
|
|
printk(" EEPROM not present,");
|
| 1745 |
|
|
for (i = 0; i < 6; i++)
|
| 1746 |
|
|
printk("%c%2.2X", i ? ':' : ' ', dev->dev_addr[i]);
|
| 1747 |
|
|
printk(", IRQ %d.\n", irq);
|
| 1748 |
|
|
|
| 1749 |
|
|
if (tp->chip_id == PNIC2)
|
| 1750 |
|
|
tp->link_change = pnic2_lnk_change;
|
| 1751 |
|
|
else if ((tp->flags & HAS_NWAY) || tp->chip_id == DC21041)
|
| 1752 |
|
|
tp->link_change = t21142_lnk_change;
|
| 1753 |
|
|
else if (tp->flags & HAS_PNICNWAY)
|
| 1754 |
|
|
tp->link_change = pnic_lnk_change;
|
| 1755 |
|
|
|
| 1756 |
|
|
/* Reset the xcvr interface and turn on heartbeat. */
|
| 1757 |
|
|
switch (chip_idx) {
|
| 1758 |
|
|
case DC21041:
|
| 1759 |
|
|
if (tp->sym_advertise == 0)
|
| 1760 |
|
|
tp->sym_advertise = 0x0061;
|
| 1761 |
|
|
outl(0x00000000, ioaddr + CSR13);
|
| 1762 |
|
|
outl(0xFFFFFFFF, ioaddr + CSR14);
|
| 1763 |
|
|
outl(0x00000008, ioaddr + CSR15); /* Listen on AUI also. */
|
| 1764 |
|
|
outl(inl(ioaddr + CSR6) | csr6_fd, ioaddr + CSR6);
|
| 1765 |
|
|
outl(0x0000EF01, ioaddr + CSR13);
|
| 1766 |
|
|
break;
|
| 1767 |
|
|
case DC21040:
|
| 1768 |
|
|
outl(0x00000000, ioaddr + CSR13);
|
| 1769 |
|
|
outl(0x00000004, ioaddr + CSR13);
|
| 1770 |
|
|
break;
|
| 1771 |
|
|
case DC21140:
|
| 1772 |
|
|
case DM910X:
|
| 1773 |
|
|
default:
|
| 1774 |
|
|
if (tp->mtable)
|
| 1775 |
|
|
outl(tp->mtable->csr12dir | 0x100, ioaddr + CSR12);
|
| 1776 |
|
|
break;
|
| 1777 |
|
|
case DC21142:
|
| 1778 |
|
|
if (tp->mii_cnt || tulip_media_cap[dev->if_port] & MediaIsMII) {
|
| 1779 |
|
|
outl(csr6_mask_defstate, ioaddr + CSR6);
|
| 1780 |
|
|
outl(0x0000, ioaddr + CSR13);
|
| 1781 |
|
|
outl(0x0000, ioaddr + CSR14);
|
| 1782 |
|
|
outl(csr6_mask_hdcap, ioaddr + CSR6);
|
| 1783 |
|
|
} else
|
| 1784 |
|
|
t21142_start_nway(dev);
|
| 1785 |
|
|
break;
|
| 1786 |
|
|
case PNIC2:
|
| 1787 |
|
|
/* just do a reset for sanity sake */
|
| 1788 |
|
|
outl(0x0000, ioaddr + CSR13);
|
| 1789 |
|
|
outl(0x0000, ioaddr + CSR14);
|
| 1790 |
|
|
break;
|
| 1791 |
|
|
case LC82C168:
|
| 1792 |
|
|
if ( ! tp->mii_cnt) {
|
| 1793 |
|
|
tp->nway = 1;
|
| 1794 |
|
|
tp->nwayset = 0;
|
| 1795 |
|
|
outl(csr6_ttm | csr6_ca, ioaddr + CSR6);
|
| 1796 |
|
|
outl(0x30, ioaddr + CSR12);
|
| 1797 |
|
|
outl(0x0001F078, ioaddr + CSR6);
|
| 1798 |
|
|
outl(0x0201F078, ioaddr + CSR6); /* Turn on autonegotiation. */
|
| 1799 |
|
|
}
|
| 1800 |
|
|
break;
|
| 1801 |
|
|
case MX98713:
|
| 1802 |
|
|
case COMPEX9881:
|
| 1803 |
|
|
outl(0x00000000, ioaddr + CSR6);
|
| 1804 |
|
|
outl(0x000711C0, ioaddr + CSR14); /* Turn on NWay. */
|
| 1805 |
|
|
outl(0x00000001, ioaddr + CSR13);
|
| 1806 |
|
|
break;
|
| 1807 |
|
|
case MX98715:
|
| 1808 |
|
|
case MX98725:
|
| 1809 |
|
|
outl(0x01a80000, ioaddr + CSR6);
|
| 1810 |
|
|
outl(0xFFFFFFFF, ioaddr + CSR14);
|
| 1811 |
|
|
outl(0x00001000, ioaddr + CSR12);
|
| 1812 |
|
|
break;
|
| 1813 |
|
|
case COMET:
|
| 1814 |
|
|
/* No initialization necessary. */
|
| 1815 |
|
|
break;
|
| 1816 |
|
|
}
|
| 1817 |
|
|
|
| 1818 |
|
|
/* put the chip in snooze mode until opened */
|
| 1819 |
|
|
tulip_set_power_state (tp, 0, 1);
|
| 1820 |
|
|
|
| 1821 |
|
|
return 0;
|
| 1822 |
|
|
|
| 1823 |
|
|
err_out_free_ring:
|
| 1824 |
|
|
pci_free_consistent (pdev,
|
| 1825 |
|
|
sizeof (struct tulip_rx_desc) * RX_RING_SIZE +
|
| 1826 |
|
|
sizeof (struct tulip_tx_desc) * TX_RING_SIZE,
|
| 1827 |
|
|
tp->rx_ring, tp->rx_ring_dma);
|
| 1828 |
|
|
|
| 1829 |
|
|
err_out_mtable:
|
| 1830 |
|
|
if (tp->mtable)
|
| 1831 |
|
|
kfree (tp->mtable);
|
| 1832 |
|
|
#ifndef USE_IO_OPS
|
| 1833 |
|
|
iounmap((void *)ioaddr);
|
| 1834 |
|
|
|
| 1835 |
|
|
err_out_free_res:
|
| 1836 |
|
|
#endif
|
| 1837 |
|
|
pci_release_regions (pdev);
|
| 1838 |
|
|
|
| 1839 |
|
|
err_out_free_netdev:
|
| 1840 |
|
|
kfree (dev);
|
| 1841 |
|
|
return -ENODEV;
|
| 1842 |
|
|
}
|
| 1843 |
|
|
|
| 1844 |
|
|
|
| 1845 |
|
|
#ifdef CONFIG_PM
|
| 1846 |
|
|
|
| 1847 |
|
|
static int tulip_suspend (struct pci_dev *pdev, u32 state)
|
| 1848 |
|
|
{
|
| 1849 |
|
|
struct net_device *dev = pci_get_drvdata(pdev);
|
| 1850 |
|
|
|
| 1851 |
|
|
if (dev && netif_running (dev) && netif_device_present (dev)) {
|
| 1852 |
|
|
netif_device_detach (dev);
|
| 1853 |
|
|
tulip_down (dev);
|
| 1854 |
|
|
/* pci_power_off(pdev, -1); */
|
| 1855 |
|
|
}
|
| 1856 |
|
|
return 0;
|
| 1857 |
|
|
}
|
| 1858 |
|
|
|
| 1859 |
|
|
|
| 1860 |
|
|
static int tulip_resume(struct pci_dev *pdev)
|
| 1861 |
|
|
{
|
| 1862 |
|
|
struct net_device *dev = pci_get_drvdata(pdev);
|
| 1863 |
|
|
|
| 1864 |
|
|
if (dev && netif_running (dev) && !netif_device_present (dev)) {
|
| 1865 |
|
|
#if 1
|
| 1866 |
|
|
pci_enable_device (pdev);
|
| 1867 |
|
|
#endif
|
| 1868 |
|
|
/* pci_power_on(pdev); */
|
| 1869 |
|
|
tulip_up (dev);
|
| 1870 |
|
|
netif_device_attach (dev);
|
| 1871 |
|
|
}
|
| 1872 |
|
|
return 0;
|
| 1873 |
|
|
}
|
| 1874 |
|
|
|
| 1875 |
|
|
#endif /* CONFIG_PM */
|
| 1876 |
|
|
|
| 1877 |
|
|
|
| 1878 |
|
|
static void __devexit tulip_remove_one (struct pci_dev *pdev)
|
| 1879 |
|
|
{
|
| 1880 |
|
|
struct net_device *dev = pci_get_drvdata (pdev);
|
| 1881 |
|
|
struct tulip_private *tp;
|
| 1882 |
|
|
|
| 1883 |
|
|
if (!dev)
|
| 1884 |
|
|
return;
|
| 1885 |
|
|
|
| 1886 |
|
|
tp = dev->priv;
|
| 1887 |
|
|
pci_free_consistent (pdev,
|
| 1888 |
|
|
sizeof (struct tulip_rx_desc) * RX_RING_SIZE +
|
| 1889 |
|
|
sizeof (struct tulip_tx_desc) * TX_RING_SIZE,
|
| 1890 |
|
|
tp->rx_ring, tp->rx_ring_dma);
|
| 1891 |
|
|
unregister_netdev (dev);
|
| 1892 |
|
|
if (tp->mtable)
|
| 1893 |
|
|
kfree (tp->mtable);
|
| 1894 |
|
|
#ifndef USE_IO_OPS
|
| 1895 |
|
|
iounmap((void *)dev->base_addr);
|
| 1896 |
|
|
#endif
|
| 1897 |
|
|
kfree (dev);
|
| 1898 |
|
|
pci_release_regions (pdev);
|
| 1899 |
|
|
pci_set_drvdata (pdev, NULL);
|
| 1900 |
|
|
|
| 1901 |
|
|
/* pci_power_off (pdev, -1); */
|
| 1902 |
|
|
}
|
| 1903 |
|
|
|
| 1904 |
|
|
|
| 1905 |
|
|
static struct pci_driver tulip_driver = {
|
| 1906 |
|
|
name: DRV_NAME,
|
| 1907 |
|
|
id_table: tulip_pci_tbl,
|
| 1908 |
|
|
probe: tulip_init_one,
|
| 1909 |
|
|
remove: __devexit_p(tulip_remove_one),
|
| 1910 |
|
|
#ifdef CONFIG_PM
|
| 1911 |
|
|
suspend: tulip_suspend,
|
| 1912 |
|
|
resume: tulip_resume,
|
| 1913 |
|
|
#endif /* CONFIG_PM */
|
| 1914 |
|
|
};
|
| 1915 |
|
|
|
| 1916 |
|
|
|
| 1917 |
|
|
static int __init tulip_init (void)
|
| 1918 |
|
|
{
|
| 1919 |
|
|
#ifdef MODULE
|
| 1920 |
|
|
printk (KERN_INFO "%s", version);
|
| 1921 |
|
|
#endif
|
| 1922 |
|
|
|
| 1923 |
|
|
/* copy module parms into globals */
|
| 1924 |
|
|
tulip_rx_copybreak = rx_copybreak;
|
| 1925 |
|
|
tulip_max_interrupt_work = max_interrupt_work;
|
| 1926 |
|
|
|
| 1927 |
|
|
/* probe for and init boards */
|
| 1928 |
|
|
return pci_module_init (&tulip_driver);
|
| 1929 |
|
|
}
|
| 1930 |
|
|
|
| 1931 |
|
|
|
| 1932 |
|
|
static void __exit tulip_cleanup (void)
|
| 1933 |
|
|
{
|
| 1934 |
|
|
pci_unregister_driver (&tulip_driver);
|
| 1935 |
|
|
}
|
| 1936 |
|
|
|
| 1937 |
|
|
|
| 1938 |
|
|
module_init(tulip_init);
|
| 1939 |
|
|
module_exit(tulip_cleanup);
|
