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[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [drivers/] [s390/] [net/] [qeth_mpc.h] - Blame information for rev 1765

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/*
 * linux/drivers/s390/net/qeth_mpc.h
 *
 * Linux on zSeries OSA Express and HiperSockets support
 *
 * Copyright 2000,2003 IBM Corporation
 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
 *
 */
 
#ifndef __QETH_MPC_H__
#define __QETH_MPC_H__
 
#define VERSION_QETH_MPC_H "$Revision: 1.1.1.1 $"
 
#define QETH_IPA_TIMEOUT (card->ipa_timeout)
#define QETH_MPC_TIMEOUT 2000
#define QETH_ADDR_TIMEOUT 1000
 
#define QETH_SETIP_RETRIES 2
 
#define IDX_ACTIVATE_SIZE 0x22
#define CM_ENABLE_SIZE 0x63
#define CM_SETUP_SIZE 0x64
#define ULP_ENABLE_SIZE 0x6b
#define ULP_SETUP_SIZE 0x6c
#define DM_ACT_SIZE 0x55
 
#define QETH_MPC_TOKEN_LENGTH 4
#define QETH_SEQ_NO_LENGTH 4
#define QETH_IPA_SEQ_NO_LENGTH 2
 
#define QETH_TRANSPORT_HEADER_SEQ_NO(buffer) (buffer+4)
#define QETH_PDU_HEADER_SEQ_NO(buffer) (buffer+0x1c)
#define QETH_PDU_HEADER_ACK_SEQ_NO(buffer) (buffer+0x20)
 
static unsigned char IDX_ACTIVATE_READ[]={
        0x00,0x00,0x80,0x00, 0x00,0x00,0x00,0x00,
 
        0x19,0x01,0x01,0x80, 0x00,0x00,0x00,0x00,
        0x00,0x00,0x00,0x00, 0x00,0x00,0xc8,0xc1,
        0xd3,0xd3,0xd6,0xd3, 0xc5,0x40,0x00,0x00,
        0x00,0x00
};
 
static unsigned char IDX_ACTIVATE_WRITE[]={
        0x00,0x00,0x80,0x00, 0x00,0x00,0x00,0x00,
 
        0x15,0x01,0x01,0x80, 0x00,0x00,0x00,0x00,
        0xff,0xff,0x00,0x00, 0x00,0x00,0xc8,0xc1,
        0xd3,0xd3,0xd6,0xd3, 0xc5,0x40,0x00,0x00,
        0x00,0x00
};
 
#define QETH_IDX_ACT_ISSUER_RM_TOKEN(buffer) (buffer+0x0c)
#define QETH_IDX_NO_PORTNAME_REQUIRED(buffer) ((buffer)[0x0b]&0x80)
#define QETH_IDX_ACT_FUNC_LEVEL(buffer) (buffer+0x10)
#define QETH_IDX_ACT_DATASET_NAME(buffer) (buffer+0x16)
#define QETH_IDX_ACT_QDIO_DEV_CUA(buffer) (buffer+0x1e)
#define QETH_IDX_ACT_QDIO_DEV_REALADDR(buffer) (buffer+0x20)
 
#define QETH_IS_IDX_ACT_POS_REPLY(buffer) (((buffer)[0x08]&3)==2)
 
#define QETH_IDX_REPLY_LEVEL(buffer) (buffer+0x12)
#define QETH_MCL_LENGTH 4
 
static unsigned char CM_ENABLE[]={
        0x00,0xe0,0x00,0x00, 0x00,0x00,0x00,0x01,
        0x00,0x00,0x00,0x14, 0x00,0x00,0x00,0x63,
        0x10,0x00,0x00,0x01,
 
                0x00,0x00,0x00,0x00,
        0x81,0x7e,0x00,0x01, 0x00,0x00,0x00,0x00,
        0x00,0x00,0x00,0x00, 0x00,0x24,0x00,0x23,
        0x00,0x00,0x23,0x05, 0x00,0x00,0x00,0x00,
        0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,
 
        0x01,0x00,0x00,0x23, 0x00,0x00,0x00,0x40,
 
        0x00,0x0c,0x41,0x02, 0x00,0x17,0x00,0x00,
 
        0x00,0x00,0x00,0x00,
                0x00,0x0b,0x04,0x01,
 
        0x7e,0x04,0x05,0x00, 0x01,0x01,0x0f,
 
                0x00,
 
        0x0c,0x04,0x02,0xff, 0xff,0xff,0xff,0xff,
 
        0xff,0xff,0xff
};
 
#define QETH_CM_ENABLE_ISSUER_RM_TOKEN(buffer) (buffer+0x2c)
#define QETH_CM_ENABLE_FILTER_TOKEN(buffer) (buffer+0x53)
#define QETH_CM_ENABLE_USER_DATA(buffer) (buffer+0x5b)
 
#define QETH_CM_ENABLE_RESP_FILTER_TOKEN(buffer) (PDU_ENCAPSULATION(buffer)+ \
                                                  0x13)
 
static unsigned char CM_SETUP[]={
        0x00,0xe0,0x00,0x00, 0x00,0x00,0x00,0x02,
        0x00,0x00,0x00,0x14, 0x00,0x00,0x00,0x64,
        0x10,0x00,0x00,0x01,
 
                0x00,0x00,0x00,0x00,
        0x81,0x7e,0x00,0x01, 0x00,0x00,0x00,0x00,
        0x00,0x00,0x00,0x00, 0x00,0x24,0x00,0x24,
        0x00,0x00,0x24,0x05, 0x00,0x00,0x00,0x00,
        0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,
 
        0x01,0x00,0x00,0x24, 0x00,0x00,0x00,0x40,
 
        0x00,0x0c,0x41,0x04, 0x00,0x18,0x00,0x00,
 
        0x00,0x00,0x00,0x00,
                0x00,0x09,0x04,0x04,
 
        0x05,0x00,0x01,0x01, 0x11,
 
                0x00,0x09,0x04,
 
        0x05,0x05,0x00,0x00, 0x00,0x00,
 
                0x00,0x06,
 
        0x04,0x06,0xc8,0x00
};
 
#define QETH_CM_SETUP_DEST_ADDR(buffer) (buffer+0x2c)
#define QETH_CM_SETUP_CONNECTION_TOKEN(buffer) (buffer+0x51)
#define QETH_CM_SETUP_FILTER_TOKEN(buffer) (buffer+0x5a)
 
#define QETH_CM_SETUP_RESP_DEST_ADDR(buffer) (PDU_ENCAPSULATION(buffer)+ \
                                              0x1a)
 
static unsigned char ULP_ENABLE[]={
        0x00,0xe0,0x00,0x00, 0x00,0x00,0x00,0x03,
        0x00,0x00,0x00,0x14, 0x00,0x00,0x00,0x6b,
        0x10,0x00,0x00,0x01,
 
                0x00,0x00,0x00,0x00,
        0x41,0x7e,0x00,0x01, 0x00,0x00,0x00,0x01,
        0x00,0x00,0x00,0x00, 0x00,0x24,0x00,0x2b,
        0x00,0x00,0x2b,0x05, 0x20,0x01,0x00,0x00,
        0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,
 
        0x01,0x00,0x00,0x2b, 0x00,0x00,0x00,0x40,
 
        0x00,0x0c,0x41,0x02, 0x00,0x1f,0x00,0x00,
 
        0x00,0x00,0x00,0x00,
                0x00,0x0b,0x04,0x01,
 
        0x03,0x04,0x05,0x00, 0x01,0x01,0x12,
 
                0x00,
 
        0x14,0x04,0x0a,0x00, 0x20,0x00,0x00,0xff,
        0xff,0x00,0x08,0xc8, 0xe8,0xc4,0xf1,0xc7,
 
        0xf1,0x00,0x00
};
 
#define QETH_ULP_ENABLE_LINKNUM(buffer) (buffer+0x61)
#define QETH_ULP_ENABLE_DEST_ADDR(buffer) (buffer+0x2c)
#define QETH_ULP_ENABLE_FILTER_TOKEN(buffer) (buffer+0x53)
#define QETH_ULP_ENABLE_PORTNAME_AND_LL(buffer) (buffer+0x62)
 
#define QETH_ULP_ENABLE_RESP_FILTER_TOKEN(buffer) (PDU_ENCAPSULATION(buffer)+ \
                                                   0x13)
#define QETH_ULP_ENABLE_RESP_MAX_MTU(buffer) (PDU_ENCAPSULATION(buffer)+ \
                                              0x1f)
#define QETH_ULP_ENABLE_RESP_DIFINFO_LEN(buffer) (PDU_ENCAPSULATION(buffer)+ \
                                                  0x17)
#define QETH_ULP_ENABLE_RESP_LINK_TYPE(buffer) (PDU_ENCAPSULATION(buffer)+ \
                                                0x2b)
 
static unsigned char ULP_SETUP[]={
        0x00,0xe0,0x00,0x00, 0x00,0x00,0x00,0x04,
        0x00,0x00,0x00,0x14, 0x00,0x00,0x00,0x6c,
        0x10,0x00,0x00,0x01,
 
                0x00,0x00,0x00,0x00,
        0x41,0x7e,0x00,0x01, 0x00,0x00,0x00,0x02,
        0x00,0x00,0x00,0x01, 0x00,0x24,0x00,0x2c,
        0x00,0x00,0x2c,0x05, 0x20,0x01,0x00,0x00,
        0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,
 
        0x01,0x00,0x00,0x2c, 0x00,0x00,0x00,0x40,
 
        0x00,0x0c,0x41,0x04, 0x00,0x20,0x00,0x00,
 
        0x00,0x00,0x00,0x00,
                0x00,0x09,0x04,0x04,
 
        0x05,0x00,0x01,0x01, 0x14,
                0x00,0x09,0x04,
 
        0x05,0x05,0x30,0x01, 0x00,0x00,
 
                0x00,0x06,
 
        0x04,0x06,0x40,0x00,
 
                0x00,0x08,0x04,0x0b,
 
        0x00,0x00,0x00,0x00
};
 
#define QETH_ULP_SETUP_DEST_ADDR(buffer) (buffer+0x2c)
#define QETH_ULP_SETUP_CONNECTION_TOKEN(buffer) (buffer+0x51)
#define QETH_ULP_SETUP_FILTER_TOKEN(buffer) (buffer+0x5a)
#define QETH_ULP_SETUP_CUA(buffer) (buffer+0x68)
#define QETH_ULP_SETUP_REAL_DEVADDR(buffer) (buffer+0x6a)
 
#define QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(buffer) (PDU_ENCAPSULATION \
                                                      (buffer)+0x1a)
 
 
static unsigned char DM_ACT[]={
        0x00,0xe0,0x00,0x00, 0x00,0x00,0x00,0x05,
        0x00,0x00,0x00,0x14, 0x00,0x00,0x00,0x55,
        0x10,0x00,0x00,0x01,
 
                0x00,0x00,0x00,0x00,
        0x41,0x7e,0x00,0x01, 0x00,0x00,0x00,0x03,
        0x00,0x00,0x00,0x02, 0x00,0x24,0x00,0x15,
        0x00,0x00,0x2c,0x05, 0x20,0x01,0x00,0x00,
        0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,
 
        0x01,0x00,0x00,0x15, 0x00,0x00,0x00,0x40,
 
        0x00,0x0c,0x43,0x60, 0x00,0x09,0x00,0x00,
 
        0x00,0x00,0x00,0x00,
 
                0x00,0x09,0x04,0x04,
 
        0x05,0x40,0x01,0x01, 0x00
};
 
#define QETH_DM_ACT_DEST_ADDR(buffer) (buffer+0x2c)
#define QETH_DM_ACT_CONNECTION_TOKEN(buffer) (buffer+0x51)
 
#define IPA_CMD_STARTLAN 0x01
#define IPA_CMD_STOPLAN 0x02
#define IPA_CMD_SETIP 0xb1
#define IPA_CMD_DELIP 0xb7
#define IPA_CMD_QIPASSIST 0xb2
#define IPA_CMD_SETASSPARMS 0xb3
#define IPA_CMD_SETIPM 0xb4
#define IPA_CMD_DELIPM 0xb5
#define IPA_CMD_SETRTG 0xb6
#define IPA_CMD_SETADAPTERPARMS 0xb8
#define IPA_CMD_ADD_ADDR_ENTRY 0xc1
#define IPA_CMD_DELETE_ADDR_ENTRY 0xc2
#define IPA_CMD_CREATE_ADDR 0xc3
#define IPA_CMD_DESTROY_ADDR 0xc4
#define IPA_CMD_REGISTER_LOCAL_ADDR 0xd1
#define IPA_CMD_UNREGISTER_LOCAL_ADDR 0xd2
 
#define INITIATOR_HOST 0
#define INITIATOR_HYDRA 1
 
#define PRIM_VERSION_IPA 1
 
#define PROT_VERSION_SNA 1
#define PROT_VERSION_IPv4 4
#define PROT_VERSION_IPv6 6
 
#define OSA_ADDR_LEN 6
#define IPA_SETADAPTERPARMS_IP_VERSION PROT_VERSION_IPv4
#define SR_INFO_LEN 16
 
#define IPA_ARP_PROCESSING 0x00000001L
#define IPA_INBOUND_CHECKSUM 0x00000002L
#define IPA_OUTBOUND_CHECKSUM 0x00000004L
#define IPA_IP_FRAGMENTATION 0x00000008L
#define IPA_FILTERING 0x00000010L
#define IPA_IPv6 0x00000020L
#define IPA_MULTICASTING 0x00000040L
#define IPA_IP_REASSEMBLY 0x00000080L
#define IPA_QUERY_ARP_COUNTERS 0x00000100L
#define IPA_QUERY_ARP_ADDR_INFO 0x00000200L
#define IPA_SETADAPTERPARMS 0x00000400L
#define IPA_VLAN_PRIO 0x00000800L
#define IPA_PASSTHRU 0x00001000L
#define IPA_FULL_VLAN 0x00004000L
#define IPA_SOURCE_MAC_AVAIL 0x00010000L
 
#define IPA_SETADP_QUERY_COMMANDS_SUPPORTED 0x01
#define IPA_SETADP_ALTER_MAC_ADDRESS 0x02
#define IPA_SETADP_ADD_DELETE_GROUP_ADDRESS 0x04
#define IPA_SETADP_ADD_DELETE_FUNCTIONAL_ADDR 0x08
#define IPA_SETADP_SET_ADDRESSING_MODE 0x10
#define IPA_SETADP_SET_CONFIG_PARMS 0x20
#define IPA_SETADP_SET_CONFIG_PARMS_EXTENDED 0x40
#define IPA_SETADP_SET_BROADCAST_MODE 0x80
#define IPA_SETADP_SEND_OSA_MESSAGE 0x0100
#define IPA_SETADP_SET_SNMP_CONTROL 0x0200
#define IPA_SETADP_READ_SNMP_PARMS 0x0400
#define IPA_SETADP_WRITE_SNMP_PARMS 0x0800
#define IPA_SETADP_QUERY_CARD_INFO 0x1000
 
#define CHANGE_ADDR_READ_MAC 0
#define CHANGE_ADDR_REPLACE_MAC 1
#define CHANGE_ADDR_ADD_MAC 2
#define CHANGE_ADDR_DEL_MAC 4
#define CHANGE_ADDR_RESET_MAC 8
#define CHANGE_ADDR_READ_ADDR 0
#define CHANGE_ADDR_ADD_ADDR 1
#define CHANGE_ADDR_DEL_ADDR 2
#define CHANGE_ADDR_FLUSH_ADDR_TABLE 4
 
#define qeth_is_supported(str) (card->ipa_supported&str)
#define qeth_is_supported6(str) (card->ipa6_supported&str)
#define qeth_is_adp_supported(str) (card->adp_supported&str)
 
#define IPA_CMD_ASS_START 0x0001
#define IPA_CMD_ASS_STOP 0x0002
 
#define IPA_CMD_ASS_CONFIGURE 0x0003
#define IPA_CMD_ASS_ENABLE 0x0004
 
#define IPA_CMD_ASS_ARP_SET_NO_ENTRIES 0x0003
#define IPA_CMD_ASS_ARP_QUERY_CACHE 0x0004
#define IPA_CMD_ASS_ARP_ADD_ENTRY 0x0005
#define IPA_CMD_ASS_ARP_REMOVE_ENTRY 0x0006
#define IPA_CMD_ASS_ARP_FLUSH_CACHE 0x0007
#define IPA_CMD_ASS_ARP_QUERY_INFO 0x0104
#define IPA_CMD_ASS_ARP_QUERY_STATS 0x0204
 
#define IPA_CHECKSUM_ENABLE_MASK 0x001f
 
#define IPA_CMD_ASS_FILTER_SET_TYPES 0x0003
 
#define IPA_CMD_ASS_IPv6_SET_FUNCTIONS 0x0003
 
#define IPA_REPLY_SUCCESS 0
#define IPA_REPLY_FAILED 1
#define IPA_REPLY_OPNOTSUPP 2
#define IPA_REPLY_OPNOTSUPP2 4
#define IPA_REPLY_NOINFO 8
 
#define IPA_SETIP_FLAGS 0
#define IPA_SETIP_VIPA_FLAGS 1
#define IPA_SETIP_TAKEOVER_FLAGS 2
 
#define VIPA_2_B_ADDED 0
#define VIPA_ESTABLISHED 1
#define VIPA_2_B_REMOVED 2
 
#define IPA_DELIP_FLAGS 0
 
#define IPA_SETADP_CMDSIZE 40
 
struct ipa_setadp_cmd {
        __u32 supp_hw_cmds;
        __u32 reserved1;
        __u16 cmdlength;
        __u16 reserved2;
        __u32 command_code;
        __u16 return_code;
        __u8 frames_used_total;
        __u8 frame_seq_no;
        __u32 reserved3;
        union {
                struct {
                        __u32 no_lantypes_supp;
                        __u8 lan_type;
                        __u8 reserved1[3];
                        __u32 supported_cmds;
                        __u8 reserved2[8];
                } query_cmds_supp;
                struct {
                        __u32 cmd;
                        __u32 addr_size;
                        __u32 no_macs;
                        __u8 addr[OSA_ADDR_LEN];
                } change_addr;
                __u32 mode;
        } data;
};
 
typedef struct ipa_cmd_t {
        __u8 command;
        __u8 initiator;
        __u16 seq_no;
        __u16 return_code;
        __u8 adapter_type;
        __u8 rel_adapter_no;
        __u8 prim_version_no;
        __u8 param_count;
        __u16 prot_version;
        __u32 ipa_supported;
        __u32 ipa_enabled;
        union {
                struct {
                        __u8 ip[4];
                        __u8 netmask[4];
                        __u32 flags;
                } setdelip4;
                struct {
                        __u8 ip[16];
                        __u8 netmask[16];
                        __u32 flags;
                } setdelip6;
                struct {
                        __u32 assist_no;
                        __u16 length;
                        __u16 command_code;
                        __u16 return_code;
                        __u8 number_of_replies;
                        __u8 seq_no;
                        union {
                                __u32 flags_32bit;
                                struct {
                                        __u8 mac[6];
                                        __u8 reserved[2];
                                        __u8 ip[16];
                                        __u8 reserved2[32];
                                } add_arp_entry;
                                __u8 ip[16];
                        } data;
                } setassparms;
                struct {
                        __u8 mac[6];
                        __u8 padding[2];
                        __u8 ip6[12];
                        __u8 ip4_6[4];
                } setdelipm;
                struct {
                        __u8 type;
                } setrtg;
                struct ipa_setadp_cmd setadapterparms;
                struct {
                        __u32 command;
#define ADDR_FRAME_TYPE_DIX 1
#define ADDR_FRAME_TYPE_802_3 2
#define ADDR_FRAME_TYPE_TR_WITHOUT_SR 0x10
#define ADDR_FRAME_TYPE_TR_WITH_SR 0x20
                        __u32 frame_type;
                        __u32 cmd_flags;
                        __u8 ip_addr[16];
                        __u32 tag_field;
                        __u8 mac_addr[6];
                        __u8 reserved[10];
                        __u32 sr_len;
                        __u8 sr_info[SR_INFO_LEN];
                } add_addr_entry;
                struct {
                        __u32 command;
                        __u32 cmd_flags;
                        __u8 ip_addr[16];
                        __u32 tag_field;
                } delete_addr_entry;
                struct {
                        __u8 unique_id[8];
                } create_destroy_addr;
        } data;
} ipa_cmd_t __attribute__ ((packed));
 
#define QETH_IOC_MAGIC 0x22
#define QETH_IOCPROC_OSAEINTERFACES _IOWR(QETH_IOC_MAGIC, 1, arg)
#define QETH_IOCPROC_INTERFACECHANGES _IOWR(QETH_IOC_MAGIC, 2, arg)
 
#define SNMP_QUERY_CARD_INFO 0x00000002L
#define SNMP_REGISETER_MIB   0x00000004L
#define SNMP_GET_OID         0x00000010L
#define SNMP_SET_OID         0x00000011L
#define SNMP_GET_NEXT_OID    0x00000012L
#define SNMP_QUERY_ALERTS    0x00000020L
#define SNMP_SET_TRAP        0x00000021L
 
 
#define ARP_DATA_SIZE 3968
#define ARP_FLUSH -3
#define ARP_RETURNCODE_NOARPDATA -2
#define ARP_RETURNCODE_ERROR -1
#define ARP_RETURNCODE_SUCCESS 0
#define ARP_RETURNCODE_LASTREPLY 1
 
#define SNMP_BASE_CMDLENGTH 44
#define SNMP_SETADP_CMDLENGTH 16
#define SNMP_REQUEST_DATA_OFFSET 16
 
typedef struct snmp_ipa_setadp_cmd_t {
        __u32 supp_hw_cmds;
        __u32 reserved1;
        __u16 cmdlength;
        __u16 reserved2;
        __u32 command_code;
        __u16 return_code;
        __u8 frames_used_total;
        __u8 frame_seq_no;
        __u32 reserved3;
        __u8 snmp_token[16];
        union {
                struct {
                        __u32 snmp_request;
                        __u32 snmp_interface;
                        __u32 snmp_returncode;
                        __u32 snmp_firmwarelevel;
                        __u32 snmp_seqno;
                        __u8 snmp_data[ARP_DATA_SIZE];
                } snmp_subcommand;
        } data;
} snmp_ipa_setadp_cmd_t __attribute__ ((packed));
 
typedef struct arp_cmd_t {
        __u8 command;
        __u8 initiator;
        __u16 seq_no;
        __u16 return_code;
        __u8 adapter_type;
        __u8 rel_adapter_no;
        __u8 prim_version_no;
        __u8 param_count;
        __u16 prot_version;
        __u32 ipa_supported;
        __u32 ipa_enabled;
        union {
                struct {
                        __u32 assist_no;
                        __u16 length;
                        __u16 command_code;
                        __u16 return_code;
                        __u8 number_of_replies;
                        __u8 seq_no;
                        union {
                                struct {
                                        __u16 tcpip_requestbitmask;
                                        __u16 osa_setbitmask;
                                        __u32 number_of_entries;
                                        __u8 arp_data[ARP_DATA_SIZE];
                                } queryarp_data;
                        } data;
                } setassparms;
                snmp_ipa_setadp_cmd_t setadapterparms;
        } data;
} arp_cmd_t __attribute__ ((packed));
 
 
 
#define IPA_PDU_HEADER_SIZE 0x40
#define QETH_IPA_PDU_LEN_TOTAL(buffer) (buffer+0x0e)
#define QETH_IPA_PDU_LEN_PDU1(buffer) (buffer+0x26)
#define QETH_IPA_PDU_LEN_PDU2(buffer) (buffer+0x2a)
#define QETH_IPA_PDU_LEN_PDU3(buffer) (buffer+0x3a)
 
static unsigned char IPA_PDU_HEADER[]={
        0x00,0xe0,0x00,0x00, 0x77,0x77,0x77,0x77,
        0x00,0x00,0x00,0x14, 0x00,0x00,
                (IPA_PDU_HEADER_SIZE+sizeof(ipa_cmd_t))/256,
                (IPA_PDU_HEADER_SIZE+sizeof(ipa_cmd_t))%256,
        0x10,0x00,0x00,0x01,
 
                0x00,0x00,0x00,0x00,
        0xc1,0x03,0x00,0x01, 0x00,0x00,0x00,0x00,
        0x00,0x00,0x00,0x00, 0x00,0x24,0x00,sizeof(ipa_cmd_t),
        0x00,0x00,sizeof(ipa_cmd_t),0x05, 0x77,0x77,0x77,0x77,
        0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,
        0x01,0x00,sizeof(ipa_cmd_t)/256,sizeof(ipa_cmd_t)%256,
                                0x00,0x00,0x00,0x40,
};
 
#define QETH_IPA_CMD_DEST_ADDR(buffer) (buffer+0x2c)
 
#define PDU_ENCAPSULATION(buffer) \
        (buffer+ \
         *(buffer+ (*(buffer+0x0b))+ *(buffer+*(buffer+0x0b)+0x11) +0x07))
 
#define IS_IPA(buffer) ((buffer) && ( *(buffer+ ((*(buffer+0x0b))+4) )==0xc1) )
 
#define IS_IPA_REPLY(buffer) ( (buffer) && ( (*(PDU_ENCAPSULATION(buffer)+1)) \
                                             ==INITIATOR_HOST ) )
 
#define IS_ADDR_IPA(buffer) ( (buffer) && ( \
        ( ((ipa_cmd_t*)PDU_ENCAPSULATION(buffer))->command== \
          IPA_CMD_ADD_ADDR_ENTRY ) || \
        ( ((ipa_cmd_t*)PDU_ENCAPSULATION(buffer))->command== \
          IPA_CMD_DELETE_ADDR_ENTRY ) ) )
 
#define CCW_NOP_CMD 0x03
#define CCW_NOP_COUNT 1
 
static unsigned char WRITE_CCW[]={
        0x01,CCW_FLAG_SLI,0,0,
        0,0,0,0
};
 
static unsigned char READ_CCW[]={
        0x02,CCW_FLAG_SLI,0,0,
        0,0,0,0
};
 
#endif /* __QETH_MPC_H__ */
 
 
 
 
 
 
 
 
 
 
 
 
 

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[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [drivers/] [s390/] [net/] [qeth_mpc.h] - Blame information for rev 1765

Line No.	Rev	Author	Line
1	1275	phoenix	`/*`
2			`* linux/drivers/s390/net/qeth_mpc.h`
3			`*`
4			`* Linux on zSeries OSA Express and HiperSockets support`
5			`*`
6			`* Copyright 2000,2003 IBM Corporation`
7			`* Author(s): Utz Bacher <utz.bacher@de.ibm.com>`
8			`*`
9			`*/`
10
11			`#ifndef __QETH_MPC_H__`
12			`#define __QETH_MPC_H__`
13
14			`#define VERSION_QETH_MPC_H "$Revision: 1.1.1.1 $"`
15
16			`#define QETH_IPA_TIMEOUT (card->ipa_timeout)`
17			`#define QETH_MPC_TIMEOUT 2000`
18			`#define QETH_ADDR_TIMEOUT 1000`
19
20			`#define QETH_SETIP_RETRIES 2`
21
22			`#define IDX_ACTIVATE_SIZE 0x22`
23			`#define CM_ENABLE_SIZE 0x63`
24			`#define CM_SETUP_SIZE 0x64`
25			`#define ULP_ENABLE_SIZE 0x6b`
26			`#define ULP_SETUP_SIZE 0x6c`
27			`#define DM_ACT_SIZE 0x55`
28
29			`#define QETH_MPC_TOKEN_LENGTH 4`
30			`#define QETH_SEQ_NO_LENGTH 4`
31			`#define QETH_IPA_SEQ_NO_LENGTH 2`
32
33			`#define QETH_TRANSPORT_HEADER_SEQ_NO(buffer) (buffer+4)`
34			`#define QETH_PDU_HEADER_SEQ_NO(buffer) (buffer+0x1c)`
35			`#define QETH_PDU_HEADER_ACK_SEQ_NO(buffer) (buffer+0x20)`
36
37			`static unsigned char IDX_ACTIVATE_READ[]={`
38			`0x00,0x00,0x80,0x00, 0x00,0x00,0x00,0x00,`
39
40			`0x19,0x01,0x01,0x80, 0x00,0x00,0x00,0x00,`
41			`0x00,0x00,0x00,0x00, 0x00,0x00,0xc8,0xc1,`
42			`0xd3,0xd3,0xd6,0xd3, 0xc5,0x40,0x00,0x00,`
43			`0x00,0x00`
44			`};`
45
46			`static unsigned char IDX_ACTIVATE_WRITE[]={`
47			`0x00,0x00,0x80,0x00, 0x00,0x00,0x00,0x00,`
48
49			`0x15,0x01,0x01,0x80, 0x00,0x00,0x00,0x00,`
50			`0xff,0xff,0x00,0x00, 0x00,0x00,0xc8,0xc1,`
51			`0xd3,0xd3,0xd6,0xd3, 0xc5,0x40,0x00,0x00,`
52			`0x00,0x00`
53			`};`
54
55			`#define QETH_IDX_ACT_ISSUER_RM_TOKEN(buffer) (buffer+0x0c)`
56			`#define QETH_IDX_NO_PORTNAME_REQUIRED(buffer) ((buffer)[0x0b]&0x80)`
57			`#define QETH_IDX_ACT_FUNC_LEVEL(buffer) (buffer+0x10)`
58			`#define QETH_IDX_ACT_DATASET_NAME(buffer) (buffer+0x16)`
59			`#define QETH_IDX_ACT_QDIO_DEV_CUA(buffer) (buffer+0x1e)`
60			`#define QETH_IDX_ACT_QDIO_DEV_REALADDR(buffer) (buffer+0x20)`
61
62			`#define QETH_IS_IDX_ACT_POS_REPLY(buffer) (((buffer)[0x08]&3)==2)`
63
64			`#define QETH_IDX_REPLY_LEVEL(buffer) (buffer+0x12)`
65			`#define QETH_MCL_LENGTH 4`
66
67			`static unsigned char CM_ENABLE[]={`
68			`0x00,0xe0,0x00,0x00, 0x00,0x00,0x00,0x01,`
69			`0x00,0x00,0x00,0x14, 0x00,0x00,0x00,0x63,`
70			`0x10,0x00,0x00,0x01,`
71
72			`0x00,0x00,0x00,0x00,`
73			`0x81,0x7e,0x00,0x01, 0x00,0x00,0x00,0x00,`
74			`0x00,0x00,0x00,0x00, 0x00,0x24,0x00,0x23,`
75			`0x00,0x00,0x23,0x05, 0x00,0x00,0x00,0x00,`
76			`0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,`
77
78			`0x01,0x00,0x00,0x23, 0x00,0x00,0x00,0x40,`
79
80			`0x00,0x0c,0x41,0x02, 0x00,0x17,0x00,0x00,`
81
82			`0x00,0x00,0x00,0x00,`
83			`0x00,0x0b,0x04,0x01,`
84
85			`0x7e,0x04,0x05,0x00, 0x01,0x01,0x0f,`
86
87			`0x00,`
88
89			`0x0c,0x04,0x02,0xff, 0xff,0xff,0xff,0xff,`
90
91			`0xff,0xff,0xff`
92			`};`
93
94			`#define QETH_CM_ENABLE_ISSUER_RM_TOKEN(buffer) (buffer+0x2c)`
95			`#define QETH_CM_ENABLE_FILTER_TOKEN(buffer) (buffer+0x53)`
96			`#define QETH_CM_ENABLE_USER_DATA(buffer) (buffer+0x5b)`
97
98			`#define QETH_CM_ENABLE_RESP_FILTER_TOKEN(buffer) (PDU_ENCAPSULATION(buffer)+ \`
99			`0x13)`
100
101			`static unsigned char CM_SETUP[]={`
102			`0x00,0xe0,0x00,0x00, 0x00,0x00,0x00,0x02,`
103			`0x00,0x00,0x00,0x14, 0x00,0x00,0x00,0x64,`
104			`0x10,0x00,0x00,0x01,`
105
106			`0x00,0x00,0x00,0x00,`
107			`0x81,0x7e,0x00,0x01, 0x00,0x00,0x00,0x00,`
108			`0x00,0x00,0x00,0x00, 0x00,0x24,0x00,0x24,`
109			`0x00,0x00,0x24,0x05, 0x00,0x00,0x00,0x00,`
110			`0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,`
111
112			`0x01,0x00,0x00,0x24, 0x00,0x00,0x00,0x40,`
113
114			`0x00,0x0c,0x41,0x04, 0x00,0x18,0x00,0x00,`
115
116			`0x00,0x00,0x00,0x00,`
117			`0x00,0x09,0x04,0x04,`
118
119			`0x05,0x00,0x01,0x01, 0x11,`
120
121			`0x00,0x09,0x04,`
122
123			`0x05,0x05,0x00,0x00, 0x00,0x00,`
124
125			`0x00,0x06,`
126
127			`0x04,0x06,0xc8,0x00`
128			`};`
129
130			`#define QETH_CM_SETUP_DEST_ADDR(buffer) (buffer+0x2c)`
131			`#define QETH_CM_SETUP_CONNECTION_TOKEN(buffer) (buffer+0x51)`
132			`#define QETH_CM_SETUP_FILTER_TOKEN(buffer) (buffer+0x5a)`
133
134			`#define QETH_CM_SETUP_RESP_DEST_ADDR(buffer) (PDU_ENCAPSULATION(buffer)+ \`
135			`0x1a)`
136
137			`static unsigned char ULP_ENABLE[]={`
138			`0x00,0xe0,0x00,0x00, 0x00,0x00,0x00,0x03,`
139			`0x00,0x00,0x00,0x14, 0x00,0x00,0x00,0x6b,`
140			`0x10,0x00,0x00,0x01,`
141
142			`0x00,0x00,0x00,0x00,`
143			`0x41,0x7e,0x00,0x01, 0x00,0x00,0x00,0x01,`
144			`0x00,0x00,0x00,0x00, 0x00,0x24,0x00,0x2b,`
145			`0x00,0x00,0x2b,0x05, 0x20,0x01,0x00,0x00,`
146			`0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,`
147
148			`0x01,0x00,0x00,0x2b, 0x00,0x00,0x00,0x40,`
149
150			`0x00,0x0c,0x41,0x02, 0x00,0x1f,0x00,0x00,`
151
152			`0x00,0x00,0x00,0x00,`
153			`0x00,0x0b,0x04,0x01,`
154
155			`0x03,0x04,0x05,0x00, 0x01,0x01,0x12,`
156
157			`0x00,`
158
159			`0x14,0x04,0x0a,0x00, 0x20,0x00,0x00,0xff,`
160			`0xff,0x00,0x08,0xc8, 0xe8,0xc4,0xf1,0xc7,`
161
162			`0xf1,0x00,0x00`
163			`};`
164
165			`#define QETH_ULP_ENABLE_LINKNUM(buffer) (buffer+0x61)`
166			`#define QETH_ULP_ENABLE_DEST_ADDR(buffer) (buffer+0x2c)`
167			`#define QETH_ULP_ENABLE_FILTER_TOKEN(buffer) (buffer+0x53)`
168			`#define QETH_ULP_ENABLE_PORTNAME_AND_LL(buffer) (buffer+0x62)`
169
170			`#define QETH_ULP_ENABLE_RESP_FILTER_TOKEN(buffer) (PDU_ENCAPSULATION(buffer)+ \`
171			`0x13)`
172			`#define QETH_ULP_ENABLE_RESP_MAX_MTU(buffer) (PDU_ENCAPSULATION(buffer)+ \`
173			`0x1f)`
174			`#define QETH_ULP_ENABLE_RESP_DIFINFO_LEN(buffer) (PDU_ENCAPSULATION(buffer)+ \`
175			`0x17)`
176			`#define QETH_ULP_ENABLE_RESP_LINK_TYPE(buffer) (PDU_ENCAPSULATION(buffer)+ \`
177			`0x2b)`
178
179			`static unsigned char ULP_SETUP[]={`
180			`0x00,0xe0,0x00,0x00, 0x00,0x00,0x00,0x04,`
181			`0x00,0x00,0x00,0x14, 0x00,0x00,0x00,0x6c,`
182			`0x10,0x00,0x00,0x01,`
183
184			`0x00,0x00,0x00,0x00,`
185			`0x41,0x7e,0x00,0x01, 0x00,0x00,0x00,0x02,`
186			`0x00,0x00,0x00,0x01, 0x00,0x24,0x00,0x2c,`
187			`0x00,0x00,0x2c,0x05, 0x20,0x01,0x00,0x00,`
188			`0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,`
189
190			`0x01,0x00,0x00,0x2c, 0x00,0x00,0x00,0x40,`
191
192			`0x00,0x0c,0x41,0x04, 0x00,0x20,0x00,0x00,`
193
194			`0x00,0x00,0x00,0x00,`
195			`0x00,0x09,0x04,0x04,`
196
197			`0x05,0x00,0x01,0x01, 0x14,`
198			`0x00,0x09,0x04,`
199
200			`0x05,0x05,0x30,0x01, 0x00,0x00,`
201
202			`0x00,0x06,`
203
204			`0x04,0x06,0x40,0x00,`
205
206			`0x00,0x08,0x04,0x0b,`
207
208			`0x00,0x00,0x00,0x00`
209			`};`
210
211			`#define QETH_ULP_SETUP_DEST_ADDR(buffer) (buffer+0x2c)`
212			`#define QETH_ULP_SETUP_CONNECTION_TOKEN(buffer) (buffer+0x51)`
213			`#define QETH_ULP_SETUP_FILTER_TOKEN(buffer) (buffer+0x5a)`
214			`#define QETH_ULP_SETUP_CUA(buffer) (buffer+0x68)`
215			`#define QETH_ULP_SETUP_REAL_DEVADDR(buffer) (buffer+0x6a)`
216
217			`#define QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(buffer) (PDU_ENCAPSULATION \`
218			`(buffer)+0x1a)`
219
220
221			`static unsigned char DM_ACT[]={`
222			`0x00,0xe0,0x00,0x00, 0x00,0x00,0x00,0x05,`
223			`0x00,0x00,0x00,0x14, 0x00,0x00,0x00,0x55,`
224			`0x10,0x00,0x00,0x01,`
225
226			`0x00,0x00,0x00,0x00,`
227			`0x41,0x7e,0x00,0x01, 0x00,0x00,0x00,0x03,`
228			`0x00,0x00,0x00,0x02, 0x00,0x24,0x00,0x15,`
229			`0x00,0x00,0x2c,0x05, 0x20,0x01,0x00,0x00,`
230			`0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,`
231
232			`0x01,0x00,0x00,0x15, 0x00,0x00,0x00,0x40,`
233
234			`0x00,0x0c,0x43,0x60, 0x00,0x09,0x00,0x00,`
235
236			`0x00,0x00,0x00,0x00,`
237
238			`0x00,0x09,0x04,0x04,`
239
240			`0x05,0x40,0x01,0x01, 0x00`
241			`};`
242
243			`#define QETH_DM_ACT_DEST_ADDR(buffer) (buffer+0x2c)`
244			`#define QETH_DM_ACT_CONNECTION_TOKEN(buffer) (buffer+0x51)`
245
246			`#define IPA_CMD_STARTLAN 0x01`
247			`#define IPA_CMD_STOPLAN 0x02`
248			`#define IPA_CMD_SETIP 0xb1`
249			`#define IPA_CMD_DELIP 0xb7`
250			`#define IPA_CMD_QIPASSIST 0xb2`
251			`#define IPA_CMD_SETASSPARMS 0xb3`
252			`#define IPA_CMD_SETIPM 0xb4`
253			`#define IPA_CMD_DELIPM 0xb5`
254			`#define IPA_CMD_SETRTG 0xb6`
255			`#define IPA_CMD_SETADAPTERPARMS 0xb8`
256			`#define IPA_CMD_ADD_ADDR_ENTRY 0xc1`
257			`#define IPA_CMD_DELETE_ADDR_ENTRY 0xc2`
258			`#define IPA_CMD_CREATE_ADDR 0xc3`
259			`#define IPA_CMD_DESTROY_ADDR 0xc4`
260			`#define IPA_CMD_REGISTER_LOCAL_ADDR 0xd1`
261			`#define IPA_CMD_UNREGISTER_LOCAL_ADDR 0xd2`
262
263			`#define INITIATOR_HOST 0`
264			`#define INITIATOR_HYDRA 1`
265
266			`#define PRIM_VERSION_IPA 1`
267
268			`#define PROT_VERSION_SNA 1`
269			`#define PROT_VERSION_IPv4 4`
270			`#define PROT_VERSION_IPv6 6`
271
272			`#define OSA_ADDR_LEN 6`
273			`#define IPA_SETADAPTERPARMS_IP_VERSION PROT_VERSION_IPv4`
274			`#define SR_INFO_LEN 16`
275
276			`#define IPA_ARP_PROCESSING 0x00000001L`
277			`#define IPA_INBOUND_CHECKSUM 0x00000002L`
278			`#define IPA_OUTBOUND_CHECKSUM 0x00000004L`
279			`#define IPA_IP_FRAGMENTATION 0x00000008L`
280			`#define IPA_FILTERING 0x00000010L`
281			`#define IPA_IPv6 0x00000020L`
282			`#define IPA_MULTICASTING 0x00000040L`
283			`#define IPA_IP_REASSEMBLY 0x00000080L`
284			`#define IPA_QUERY_ARP_COUNTERS 0x00000100L`
285			`#define IPA_QUERY_ARP_ADDR_INFO 0x00000200L`
286			`#define IPA_SETADAPTERPARMS 0x00000400L`
287			`#define IPA_VLAN_PRIO 0x00000800L`
288			`#define IPA_PASSTHRU 0x00001000L`
289			`#define IPA_FULL_VLAN 0x00004000L`
290			`#define IPA_SOURCE_MAC_AVAIL 0x00010000L`
291
292			`#define IPA_SETADP_QUERY_COMMANDS_SUPPORTED 0x01`
293			`#define IPA_SETADP_ALTER_MAC_ADDRESS 0x02`
294			`#define IPA_SETADP_ADD_DELETE_GROUP_ADDRESS 0x04`
295			`#define IPA_SETADP_ADD_DELETE_FUNCTIONAL_ADDR 0x08`
296			`#define IPA_SETADP_SET_ADDRESSING_MODE 0x10`
297			`#define IPA_SETADP_SET_CONFIG_PARMS 0x20`
298			`#define IPA_SETADP_SET_CONFIG_PARMS_EXTENDED 0x40`
299			`#define IPA_SETADP_SET_BROADCAST_MODE 0x80`
300			`#define IPA_SETADP_SEND_OSA_MESSAGE 0x0100`
301			`#define IPA_SETADP_SET_SNMP_CONTROL 0x0200`
302			`#define IPA_SETADP_READ_SNMP_PARMS 0x0400`
303			`#define IPA_SETADP_WRITE_SNMP_PARMS 0x0800`
304			`#define IPA_SETADP_QUERY_CARD_INFO 0x1000`
305
306			`#define CHANGE_ADDR_READ_MAC 0`
307			`#define CHANGE_ADDR_REPLACE_MAC 1`
308			`#define CHANGE_ADDR_ADD_MAC 2`
309			`#define CHANGE_ADDR_DEL_MAC 4`
310			`#define CHANGE_ADDR_RESET_MAC 8`
311			`#define CHANGE_ADDR_READ_ADDR 0`
312			`#define CHANGE_ADDR_ADD_ADDR 1`
313			`#define CHANGE_ADDR_DEL_ADDR 2`
314			`#define CHANGE_ADDR_FLUSH_ADDR_TABLE 4`
315
316			`#define qeth_is_supported(str) (card->ipa_supported&str)`
317			`#define qeth_is_supported6(str) (card->ipa6_supported&str)`
318			`#define qeth_is_adp_supported(str) (card->adp_supported&str)`
319
320			`#define IPA_CMD_ASS_START 0x0001`
321			`#define IPA_CMD_ASS_STOP 0x0002`
322
323			`#define IPA_CMD_ASS_CONFIGURE 0x0003`
324			`#define IPA_CMD_ASS_ENABLE 0x0004`
325
326			`#define IPA_CMD_ASS_ARP_SET_NO_ENTRIES 0x0003`
327			`#define IPA_CMD_ASS_ARP_QUERY_CACHE 0x0004`
328			`#define IPA_CMD_ASS_ARP_ADD_ENTRY 0x0005`
329			`#define IPA_CMD_ASS_ARP_REMOVE_ENTRY 0x0006`
330			`#define IPA_CMD_ASS_ARP_FLUSH_CACHE 0x0007`
331			`#define IPA_CMD_ASS_ARP_QUERY_INFO 0x0104`
332			`#define IPA_CMD_ASS_ARP_QUERY_STATS 0x0204`
333
334			`#define IPA_CHECKSUM_ENABLE_MASK 0x001f`
335
336			`#define IPA_CMD_ASS_FILTER_SET_TYPES 0x0003`
337
338			`#define IPA_CMD_ASS_IPv6_SET_FUNCTIONS 0x0003`
339
340			`#define IPA_REPLY_SUCCESS 0`
341			`#define IPA_REPLY_FAILED 1`
342			`#define IPA_REPLY_OPNOTSUPP 2`
343			`#define IPA_REPLY_OPNOTSUPP2 4`
344			`#define IPA_REPLY_NOINFO 8`
345
346			`#define IPA_SETIP_FLAGS 0`
347			`#define IPA_SETIP_VIPA_FLAGS 1`
348			`#define IPA_SETIP_TAKEOVER_FLAGS 2`
349
350			`#define VIPA_2_B_ADDED 0`
351			`#define VIPA_ESTABLISHED 1`
352			`#define VIPA_2_B_REMOVED 2`
353
354			`#define IPA_DELIP_FLAGS 0`
355
356			`#define IPA_SETADP_CMDSIZE 40`
357
358			`struct ipa_setadp_cmd {`
359			`__u32 supp_hw_cmds;`
360			`__u32 reserved1;`
361			`__u16 cmdlength;`
362			`__u16 reserved2;`
363			`__u32 command_code;`
364			`__u16 return_code;`
365			`__u8 frames_used_total;`
366			`__u8 frame_seq_no;`
367			`__u32 reserved3;`
368			`union {`
369			`struct {`
370			`__u32 no_lantypes_supp;`
371			`__u8 lan_type;`
372			`__u8 reserved1[3];`
373			`__u32 supported_cmds;`
374			`__u8 reserved2[8];`
375			`} query_cmds_supp;`
376			`struct {`
377			`__u32 cmd;`
378			`__u32 addr_size;`
379			`__u32 no_macs;`
380			`__u8 addr[OSA_ADDR_LEN];`
381			`} change_addr;`
382			`__u32 mode;`
383			`} data;`
384			`};`
385
386			`typedef struct ipa_cmd_t {`
387			`__u8 command;`
388			`__u8 initiator;`
389			`__u16 seq_no;`
390			`__u16 return_code;`
391			`__u8 adapter_type;`
392			`__u8 rel_adapter_no;`
393			`__u8 prim_version_no;`
394			`__u8 param_count;`
395			`__u16 prot_version;`
396			`__u32 ipa_supported;`
397			`__u32 ipa_enabled;`
398			`union {`
399			`struct {`
400			`__u8 ip[4];`
401			`__u8 netmask[4];`
402			`__u32 flags;`
403			`} setdelip4;`
404			`struct {`
405			`__u8 ip[16];`
406			`__u8 netmask[16];`
407			`__u32 flags;`
408			`} setdelip6;`
409			`struct {`
410			`__u32 assist_no;`
411			`__u16 length;`
412			`__u16 command_code;`
413			`__u16 return_code;`
414			`__u8 number_of_replies;`
415			`__u8 seq_no;`
416			`union {`
417			`__u32 flags_32bit;`
418			`struct {`
419			`__u8 mac[6];`
420			`__u8 reserved[2];`
421			`__u8 ip[16];`
422			`__u8 reserved2[32];`
423			`} add_arp_entry;`
424			`__u8 ip[16];`
425			`} data;`
426			`} setassparms;`
427			`struct {`
428			`__u8 mac[6];`
429			`__u8 padding[2];`
430			`__u8 ip6[12];`
431			`__u8 ip4_6[4];`
432			`} setdelipm;`
433			`struct {`
434			`__u8 type;`
435			`} setrtg;`
436			`struct ipa_setadp_cmd setadapterparms;`
437			`struct {`
438			`__u32 command;`
439			`#define ADDR_FRAME_TYPE_DIX 1`
440			`#define ADDR_FRAME_TYPE_802_3 2`
441			`#define ADDR_FRAME_TYPE_TR_WITHOUT_SR 0x10`
442			`#define ADDR_FRAME_TYPE_TR_WITH_SR 0x20`
443			`__u32 frame_type;`
444			`__u32 cmd_flags;`
445			`__u8 ip_addr[16];`
446			`__u32 tag_field;`
447			`__u8 mac_addr[6];`
448			`__u8 reserved[10];`
449			`__u32 sr_len;`
450			`__u8 sr_info[SR_INFO_LEN];`
451			`} add_addr_entry;`
452			`struct {`
453			`__u32 command;`
454			`__u32 cmd_flags;`
455			`__u8 ip_addr[16];`
456			`__u32 tag_field;`
457			`} delete_addr_entry;`
458			`struct {`
459			`__u8 unique_id[8];`
460			`} create_destroy_addr;`
461			`} data;`
462			`} ipa_cmd_t __attribute__ ((packed));`
463
464			`#define QETH_IOC_MAGIC 0x22`
465			`#define QETH_IOCPROC_OSAEINTERFACES _IOWR(QETH_IOC_MAGIC, 1, arg)`
466			`#define QETH_IOCPROC_INTERFACECHANGES _IOWR(QETH_IOC_MAGIC, 2, arg)`
467
468			`#define SNMP_QUERY_CARD_INFO 0x00000002L`
469			`#define SNMP_REGISETER_MIB 0x00000004L`
470			`#define SNMP_GET_OID 0x00000010L`
471			`#define SNMP_SET_OID 0x00000011L`
472			`#define SNMP_GET_NEXT_OID 0x00000012L`
473			`#define SNMP_QUERY_ALERTS 0x00000020L`
474			`#define SNMP_SET_TRAP 0x00000021L`
475
476
477			`#define ARP_DATA_SIZE 3968`
478			`#define ARP_FLUSH -3`
479			`#define ARP_RETURNCODE_NOARPDATA -2`
480			`#define ARP_RETURNCODE_ERROR -1`
481			`#define ARP_RETURNCODE_SUCCESS 0`
482			`#define ARP_RETURNCODE_LASTREPLY 1`
483
484			`#define SNMP_BASE_CMDLENGTH 44`
485			`#define SNMP_SETADP_CMDLENGTH 16`
486			`#define SNMP_REQUEST_DATA_OFFSET 16`
487
488			`typedef struct snmp_ipa_setadp_cmd_t {`
489			`__u32 supp_hw_cmds;`
490			`__u32 reserved1;`
491			`__u16 cmdlength;`
492			`__u16 reserved2;`
493			`__u32 command_code;`
494			`__u16 return_code;`
495			`__u8 frames_used_total;`
496			`__u8 frame_seq_no;`
497			`__u32 reserved3;`
498			`__u8 snmp_token[16];`
499			`union {`
500			`struct {`
501			`__u32 snmp_request;`
502			`__u32 snmp_interface;`
503			`__u32 snmp_returncode;`
504			`__u32 snmp_firmwarelevel;`
505			`__u32 snmp_seqno;`
506			`__u8 snmp_data[ARP_DATA_SIZE];`
507			`} snmp_subcommand;`
508			`} data;`
509			`} snmp_ipa_setadp_cmd_t __attribute__ ((packed));`
510
511			`typedef struct arp_cmd_t {`
512			`__u8 command;`
513			`__u8 initiator;`
514			`__u16 seq_no;`
515			`__u16 return_code;`
516			`__u8 adapter_type;`
517			`__u8 rel_adapter_no;`
518			`__u8 prim_version_no;`
519			`__u8 param_count;`
520			`__u16 prot_version;`
521			`__u32 ipa_supported;`
522			`__u32 ipa_enabled;`
523			`union {`
524			`struct {`
525			`__u32 assist_no;`
526			`__u16 length;`
527			`__u16 command_code;`
528			`__u16 return_code;`
529			`__u8 number_of_replies;`
530			`__u8 seq_no;`
531			`union {`
532			`struct {`
533			`__u16 tcpip_requestbitmask;`
534			`__u16 osa_setbitmask;`
535			`__u32 number_of_entries;`
536			`__u8 arp_data[ARP_DATA_SIZE];`
537			`} queryarp_data;`
538			`} data;`
539			`} setassparms;`
540			`snmp_ipa_setadp_cmd_t setadapterparms;`
541			`} data;`
542			`} arp_cmd_t __attribute__ ((packed));`
543
544
545
546			`#define IPA_PDU_HEADER_SIZE 0x40`
547			`#define QETH_IPA_PDU_LEN_TOTAL(buffer) (buffer+0x0e)`
548			`#define QETH_IPA_PDU_LEN_PDU1(buffer) (buffer+0x26)`
549			`#define QETH_IPA_PDU_LEN_PDU2(buffer) (buffer+0x2a)`
550			`#define QETH_IPA_PDU_LEN_PDU3(buffer) (buffer+0x3a)`
551
552			`static unsigned char IPA_PDU_HEADER[]={`
553			`0x00,0xe0,0x00,0x00, 0x77,0x77,0x77,0x77,`
554			`0x00,0x00,0x00,0x14, 0x00,0x00,`
555			`(IPA_PDU_HEADER_SIZE+sizeof(ipa_cmd_t))/256,`
556			`(IPA_PDU_HEADER_SIZE+sizeof(ipa_cmd_t))%256,`
557			`0x10,0x00,0x00,0x01,`
558
559			`0x00,0x00,0x00,0x00,`
560			`0xc1,0x03,0x00,0x01, 0x00,0x00,0x00,0x00,`
561			`0x00,0x00,0x00,0x00, 0x00,0x24,0x00,sizeof(ipa_cmd_t),`
562			`0x00,0x00,sizeof(ipa_cmd_t),0x05, 0x77,0x77,0x77,0x77,`
563			`0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,`
564			`0x01,0x00,sizeof(ipa_cmd_t)/256,sizeof(ipa_cmd_t)%256,`
565			`0x00,0x00,0x00,0x40,`
566			`};`
567
568			`#define QETH_IPA_CMD_DEST_ADDR(buffer) (buffer+0x2c)`
569
570			`#define PDU_ENCAPSULATION(buffer) \`
571			`(buffer+ \`
572			`(buffer+ ((buffer+0x0b))+ (buffer+(buffer+0x0b)+0x11) +0x07))`
573
574			`#define IS_IPA(buffer) ((buffer) && ( (buffer+ (((buffer+0x0b))+4) )==0xc1) )`
575
576			`#define IS_IPA_REPLY(buffer) ( (buffer) && ( (*(PDU_ENCAPSULATION(buffer)+1)) \`
577			`==INITIATOR_HOST ) )`
578
579			`#define IS_ADDR_IPA(buffer) ( (buffer) && ( \`
580			`( ((ipa_cmd_t*)PDU_ENCAPSULATION(buffer))->command== \`
581			`IPA_CMD_ADD_ADDR_ENTRY ) \|\| \`
582			`( ((ipa_cmd_t*)PDU_ENCAPSULATION(buffer))->command== \`
583			`IPA_CMD_DELETE_ADDR_ENTRY ) ) )`
584
585			`#define CCW_NOP_CMD 0x03`
586			`#define CCW_NOP_COUNT 1`
587
588			`static unsigned char WRITE_CCW[]={`
589			`0x01,CCW_FLAG_SLI,0,0,`
590			`0,0,0,0`
591			`};`
592
593			`static unsigned char READ_CCW[]={`
594			`0x02,CCW_FLAG_SLI,0,0,`
595			`0,0,0,0`
596			`};`
597
598			`#endif /* __QETH_MPC_H__ */`
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