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phoenix |
/*****************************************************************************/
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/* ips.h -- driver for the Adaptec / IBM ServeRAID controller */
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/* */
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/* Written By: Keith Mitchell, IBM Corporation */
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/* Jack Hammer, Adaptec, Inc. */
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/* David Jeffery, Adaptec, Inc. */
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/* */
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/* Copyright (C) 1999 IBM Corporation */
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/* Copyright (C) 2003 Adaptec, Inc. */
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/* */
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/* This program is free software; you can redistribute it and/or modify */
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/* it under the terms of the GNU General Public License as published by */
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/* the Free Software Foundation; either version 2 of the License, or */
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/* (at your option) any later version. */
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/* */
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/* This program is distributed in the hope that it will be useful, */
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/* but WITHOUT ANY WARRANTY; without even the implied warranty of */
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/* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
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/* GNU General Public License for more details. */
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/* */
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/* NO WARRANTY */
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/* THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR */
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/* CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT */
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/* LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, */
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/* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is */
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/* solely responsible for determining the appropriateness of using and */
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/* distributing the Program and assumes all risks associated with its */
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/* exercise of rights under this Agreement, including but not limited to */
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/* the risks and costs of program errors, damage to or loss of data, */
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/* programs or equipment, and unavailability or interruption of operations. */
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/* */
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/* DISCLAIMER OF LIABILITY */
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/* NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY */
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/* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL */
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/* DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND */
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/* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR */
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/* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE */
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/* USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED */
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/* HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES */
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/* */
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/* You should have received a copy of the GNU General Public License */
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/* along with this program; if not, write to the Free Software */
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/* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */
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/* */
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/* Bugs/Comments/Suggestions should be mailed to: */
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/* ipslinux@adaptec.com */
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/* */
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/*****************************************************************************/
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#ifndef _IPS_H_
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#define _IPS_H_
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#include <asm/uaccess.h>
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#include <asm/io.h>
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/* Prototypes */
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extern int ips_detect(Scsi_Host_Template *);
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extern int ips_release(struct Scsi_Host *);
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extern int ips_eh_abort(Scsi_Cmnd *);
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extern int ips_eh_reset(Scsi_Cmnd *);
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extern int ips_queue(Scsi_Cmnd *, void (*) (Scsi_Cmnd *));
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extern int ips_biosparam(Disk *, kdev_t, int *);
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extern const char * ips_info(struct Scsi_Host *);
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/*
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* Some handy macros
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*/
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#ifndef LinuxVersionCode
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#define LinuxVersionCode(x,y,z) (((x)<<16)+((y)<<8)+(z))
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#endif
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#if LINUX_VERSION_CODE >= LinuxVersionCode(2,4,20) || defined CONFIG_HIGHIO
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#define IPS_HIGHIO
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#define IPS_HIGHMEM_IO .highmem_io = 1,
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#else
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#define IPS_HIGHMEM_IO
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#endif
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#define IPS_HA(x) ((ips_ha_t *) x->hostdata)
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#define IPS_COMMAND_ID(ha, scb) (int) (scb - ha->scbs)
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#define IPS_IS_TROMBONE(ha) (((ha->device_id == IPS_DEVICEID_COPPERHEAD) && \
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(ha->revision_id >= IPS_REVID_TROMBONE32) && \
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(ha->revision_id <= IPS_REVID_TROMBONE64)) ? 1 : 0)
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#define IPS_IS_CLARINET(ha) (((ha->device_id == IPS_DEVICEID_COPPERHEAD) && \
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(ha->revision_id >= IPS_REVID_CLARINETP1) && \
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(ha->revision_id <= IPS_REVID_CLARINETP3)) ? 1 : 0)
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#define IPS_IS_MORPHEUS(ha) (ha->device_id == IPS_DEVICEID_MORPHEUS)
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#define IPS_IS_MARCO(ha) (ha->device_id == IPS_DEVICEID_MARCO)
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#define IPS_USE_I2O_DELIVER(ha) ((IPS_IS_MORPHEUS(ha) || \
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(IPS_IS_TROMBONE(ha) && \
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(ips_force_i2o))) ? 1 : 0)
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#define IPS_USE_MEMIO(ha) ((IPS_IS_MORPHEUS(ha) || \
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((IPS_IS_TROMBONE(ha) || IPS_IS_CLARINET(ha)) && \
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(ips_force_memio))) ? 1 : 0)
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#define IPS_HAS_ENH_SGLIST(ha) (IPS_IS_MORPHEUS(ha) || IPS_IS_MARCO(ha))
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#define IPS_USE_ENH_SGLIST(ha) ((ha)->flags & IPS_HA_ENH_SG)
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#define IPS_SGLIST_SIZE(ha) (IPS_USE_ENH_SGLIST(ha) ? \
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sizeof(IPS_ENH_SG_LIST) : sizeof(IPS_STD_SG_LIST))
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#if LINUX_VERSION_CODE < LinuxVersionCode(2,4,4)
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#define pci_set_dma_mask(dev,mask) ( mask > 0xffffffff ? 1:0 )
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#define scsi_set_pci_device(sh,dev) (0)
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#endif
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#ifndef MDELAY
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#define MDELAY mdelay
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#endif
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#ifndef min
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#define min(x,y) ((x) < (y) ? x : y)
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#endif
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#define pci_dma_hi32(a) ((a >> 16) >> 16)
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#define pci_dma_lo32(a) (a & 0xffffffff)
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#if (BITS_PER_LONG > 32) || (defined CONFIG_HIGHMEM64G && defined IPS_HIGHIO)
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#define IPS_ENABLE_DMA64 (1)
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#else
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#define IPS_ENABLE_DMA64 (0)
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#endif
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/*
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* Adapter address map equates
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*/
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#define IPS_REG_HISR 0x08 /* Host Interrupt Status Reg */
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#define IPS_REG_CCSAR 0x10 /* Cmd Channel System Addr Reg */
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#define IPS_REG_CCCR 0x14 /* Cmd Channel Control Reg */
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#define IPS_REG_SQHR 0x20 /* Status Q Head Reg */
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#define IPS_REG_SQTR 0x24 /* Status Q Tail Reg */
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#define IPS_REG_SQER 0x28 /* Status Q End Reg */
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#define IPS_REG_SQSR 0x2C /* Status Q Start Reg */
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#define IPS_REG_SCPR 0x05 /* Subsystem control port reg */
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#define IPS_REG_ISPR 0x06 /* interrupt status port reg */
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#define IPS_REG_CBSP 0x07 /* CBSP register */
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#define IPS_REG_FLAP 0x18 /* Flash address port */
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#define IPS_REG_FLDP 0x1C /* Flash data port */
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#define IPS_REG_NDAE 0x38 /* Anaconda 64 NDAE Register */
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#define IPS_REG_I2O_INMSGQ 0x40 /* I2O Inbound Message Queue */
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#define IPS_REG_I2O_OUTMSGQ 0x44 /* I2O Outbound Message Queue */
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#define IPS_REG_I2O_HIR 0x30 /* I2O Interrupt Status */
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#define IPS_REG_I960_IDR 0x20 /* i960 Inbound Doorbell */
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#define IPS_REG_I960_MSG0 0x18 /* i960 Outbound Reg 0 */
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#define IPS_REG_I960_MSG1 0x1C /* i960 Outbound Reg 1 */
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#define IPS_REG_I960_OIMR 0x34 /* i960 Oubound Int Mask Reg */
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/*
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* Adapter register bit equates
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*/
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#define IPS_BIT_GHI 0x04 /* HISR General Host Interrupt */
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#define IPS_BIT_SQO 0x02 /* HISR Status Q Overflow */
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#define IPS_BIT_SCE 0x01 /* HISR Status Channel Enqueue */
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#define IPS_BIT_SEM 0x08 /* CCCR Semaphore Bit */
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#define IPS_BIT_ILE 0x10 /* CCCR ILE Bit */
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#define IPS_BIT_START_CMD 0x101A /* CCCR Start Command Channel */
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#define IPS_BIT_START_STOP 0x0002 /* CCCR Start/Stop Bit */
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#define IPS_BIT_RST 0x80 /* SCPR Reset Bit */
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#define IPS_BIT_EBM 0x02 /* SCPR Enable Bus Master */
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#define IPS_BIT_EI 0x80 /* HISR Enable Interrupts */
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#define IPS_BIT_OP 0x01 /* OP bit in CBSP */
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#define IPS_BIT_I2O_OPQI 0x08 /* General Host Interrupt */
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#define IPS_BIT_I960_MSG0I 0x01 /* Message Register 0 Interrupt*/
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#define IPS_BIT_I960_MSG1I 0x02 /* Message Register 1 Interrupt*/
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/*
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* Adapter Command ID Equates
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*/
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#define IPS_CMD_GET_LD_INFO 0x19
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#define IPS_CMD_GET_SUBSYS 0x40
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#define IPS_CMD_READ_CONF 0x38
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#define IPS_CMD_RW_NVRAM_PAGE 0xBC
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#define IPS_CMD_READ 0x02
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#define IPS_CMD_WRITE 0x03
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#define IPS_CMD_FFDC 0xD7
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#define IPS_CMD_ENQUIRY 0x05
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#define IPS_CMD_FLUSH 0x0A
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#define IPS_CMD_READ_SG 0x82
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#define IPS_CMD_WRITE_SG 0x83
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#define IPS_CMD_DCDB 0x04
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#define IPS_CMD_DCDB_SG 0x84
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#define IPS_CMD_EXTENDED_DCDB 0x95
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#define IPS_CMD_EXTENDED_DCDB_SG 0x96
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#define IPS_CMD_CONFIG_SYNC 0x58
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#define IPS_CMD_ERROR_TABLE 0x17
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#define IPS_CMD_DOWNLOAD 0x20
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#define IPS_CMD_RW_BIOSFW 0x22
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#define IPS_CMD_GET_VERSION_INFO 0xC6
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#define IPS_CMD_RESET_CHANNEL 0x1A
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/*
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* Adapter Equates
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*/
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#define IPS_CSL 0xFF
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#define IPS_POCL 0x30
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#define IPS_NORM_STATE 0x00
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#define IPS_MAX_ADAPTER_TYPES 3
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#define IPS_MAX_ADAPTERS 16
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#define IPS_MAX_IOCTL 1
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#define IPS_MAX_IOCTL_QUEUE 8
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#define IPS_MAX_QUEUE 128
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#define IPS_BLKSIZE 512
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#define IPS_MAX_SG 17
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#define IPS_MAX_LD 8
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#define IPS_MAX_CHANNELS 4
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#define IPS_MAX_TARGETS 15
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#define IPS_MAX_CHUNKS 16
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#define IPS_MAX_CMDS 128
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#define IPS_MAX_XFER 0x10000
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#define IPS_NVRAM_P5_SIG 0xFFDDBB99
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#define IPS_MAX_POST_BYTES 0x02
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#define IPS_MAX_CONFIG_BYTES 0x02
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#define IPS_GOOD_POST_STATUS 0x80
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#define IPS_SEM_TIMEOUT 2000
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#define IPS_IOCTL_COMMAND 0x0D
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#define IPS_INTR_ON 0
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#define IPS_INTR_IORL 1
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#define IPS_FFDC 99
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#define IPS_ADAPTER_ID 0xF
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#define IPS_VENDORID_IBM 0x1014
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#define IPS_VENDORID_ADAPTEC 0x9005
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#define IPS_DEVICEID_COPPERHEAD 0x002E
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#define IPS_DEVICEID_MORPHEUS 0x01BD
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#define IPS_DEVICEID_MARCO 0x0250
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#define IPS_SUBDEVICEID_4M 0x01BE
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#define IPS_SUBDEVICEID_4L 0x01BF
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#define IPS_SUBDEVICEID_4MX 0x0208
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#define IPS_SUBDEVICEID_4LX 0x020E
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#define IPS_SUBDEVICEID_5I2 0x0259
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#define IPS_SUBDEVICEID_5I1 0x0258
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#define IPS_SUBDEVICEID_6M 0x0279
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#define IPS_SUBDEVICEID_6I 0x028C
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#define IPS_IOCTL_SIZE 8192
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#define IPS_STATUS_SIZE 4
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#define IPS_STATUS_Q_SIZE (IPS_MAX_CMDS+1) * IPS_STATUS_SIZE
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#define IPS_IMAGE_SIZE 500 * 1024
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#define IPS_MEMMAP_SIZE 128
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#define IPS_ONE_MSEC 1
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#define IPS_ONE_SEC 1000
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/*
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* Geometry Settings
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*/
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#define IPS_COMP_HEADS 128
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#define IPS_COMP_SECTORS 32
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#define IPS_NORM_HEADS 254
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#define IPS_NORM_SECTORS 63
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/*
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* Adapter Basic Status Codes
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*/
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#define IPS_BASIC_STATUS_MASK 0xFF
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#define IPS_GSC_STATUS_MASK 0x0F
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#define IPS_CMD_SUCCESS 0x00
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#define IPS_CMD_RECOVERED_ERROR 0x01
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#define IPS_INVAL_OPCO 0x03
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#define IPS_INVAL_CMD_BLK 0x04
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#define IPS_INVAL_PARM_BLK 0x05
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#define IPS_BUSY 0x08
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#define IPS_CMD_CMPLT_WERROR 0x0C
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#define IPS_LD_ERROR 0x0D
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#define IPS_CMD_TIMEOUT 0x0E
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#define IPS_PHYS_DRV_ERROR 0x0F
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/*
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* Adapter Extended Status Equates
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*/
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#define IPS_ERR_SEL_TO 0xF0
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#define IPS_ERR_OU_RUN 0xF2
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#define IPS_ERR_HOST_RESET 0xF7
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#define IPS_ERR_DEV_RESET 0xF8
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#define IPS_ERR_RECOVERY 0xFC
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#define IPS_ERR_CKCOND 0xFF
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/*
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* Operating System Defines
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*/
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#define IPS_OS_WINDOWS_NT 0x01
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#define IPS_OS_NETWARE 0x02
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#define IPS_OS_OPENSERVER 0x03
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#define IPS_OS_UNIXWARE 0x04
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#define IPS_OS_SOLARIS 0x05
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#define IPS_OS_OS2 0x06
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#define IPS_OS_LINUX 0x07
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#define IPS_OS_FREEBSD 0x08
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| 286 |
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/*
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* Adapter Revision ID's
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*/
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#define IPS_REVID_SERVERAID 0x02
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#define IPS_REVID_NAVAJO 0x03
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| 291 |
|
|
#define IPS_REVID_SERVERAID2 0x04
|
| 292 |
|
|
#define IPS_REVID_CLARINETP1 0x05
|
| 293 |
|
|
#define IPS_REVID_CLARINETP2 0x07
|
| 294 |
|
|
#define IPS_REVID_CLARINETP3 0x0D
|
| 295 |
|
|
#define IPS_REVID_TROMBONE32 0x0F
|
| 296 |
|
|
#define IPS_REVID_TROMBONE64 0x10
|
| 297 |
|
|
|
| 298 |
|
|
/*
|
| 299 |
|
|
* NVRAM Page 5 Adapter Defines
|
| 300 |
|
|
*/
|
| 301 |
|
|
#define IPS_ADTYPE_SERVERAID 0x01
|
| 302 |
|
|
#define IPS_ADTYPE_SERVERAID2 0x02
|
| 303 |
|
|
#define IPS_ADTYPE_NAVAJO 0x03
|
| 304 |
|
|
#define IPS_ADTYPE_KIOWA 0x04
|
| 305 |
|
|
#define IPS_ADTYPE_SERVERAID3 0x05
|
| 306 |
|
|
#define IPS_ADTYPE_SERVERAID3L 0x06
|
| 307 |
|
|
#define IPS_ADTYPE_SERVERAID4H 0x07
|
| 308 |
|
|
#define IPS_ADTYPE_SERVERAID4M 0x08
|
| 309 |
|
|
#define IPS_ADTYPE_SERVERAID4L 0x09
|
| 310 |
|
|
#define IPS_ADTYPE_SERVERAID4MX 0x0A
|
| 311 |
|
|
#define IPS_ADTYPE_SERVERAID4LX 0x0B
|
| 312 |
|
|
#define IPS_ADTYPE_SERVERAID5I2 0x0C
|
| 313 |
|
|
#define IPS_ADTYPE_SERVERAID5I1 0x0D
|
| 314 |
|
|
#define IPS_ADTYPE_SERVERAID6M 0x0E
|
| 315 |
|
|
#define IPS_ADTYPE_SERVERAID6I 0x0F
|
| 316 |
|
|
|
| 317 |
|
|
/*
|
| 318 |
|
|
* Adapter Command/Status Packet Definitions
|
| 319 |
|
|
*/
|
| 320 |
|
|
#define IPS_SUCCESS 0x01 /* Successfully completed */
|
| 321 |
|
|
#define IPS_SUCCESS_IMM 0x02 /* Success - Immediately */
|
| 322 |
|
|
#define IPS_FAILURE 0x04 /* Completed with Error */
|
| 323 |
|
|
|
| 324 |
|
|
/*
|
| 325 |
|
|
* Logical Drive Equates
|
| 326 |
|
|
*/
|
| 327 |
|
|
#define IPS_LD_OFFLINE 0x02
|
| 328 |
|
|
#define IPS_LD_OKAY 0x03
|
| 329 |
|
|
#define IPS_LD_FREE 0x00
|
| 330 |
|
|
#define IPS_LD_SYS 0x06
|
| 331 |
|
|
#define IPS_LD_CRS 0x24
|
| 332 |
|
|
|
| 333 |
|
|
/*
|
| 334 |
|
|
* DCDB Table Equates
|
| 335 |
|
|
*/
|
| 336 |
|
|
#define IPS_NO_DISCONNECT 0x00
|
| 337 |
|
|
#define IPS_DISCONNECT_ALLOWED 0x80
|
| 338 |
|
|
#define IPS_NO_AUTO_REQSEN 0x40
|
| 339 |
|
|
#define IPS_DATA_NONE 0x00
|
| 340 |
|
|
#define IPS_DATA_UNK 0x00
|
| 341 |
|
|
#define IPS_DATA_IN 0x01
|
| 342 |
|
|
#define IPS_DATA_OUT 0x02
|
| 343 |
|
|
#define IPS_TRANSFER64K 0x08
|
| 344 |
|
|
#define IPS_NOTIMEOUT 0x00
|
| 345 |
|
|
#define IPS_TIMEOUT10 0x10
|
| 346 |
|
|
#define IPS_TIMEOUT60 0x20
|
| 347 |
|
|
#define IPS_TIMEOUT20M 0x30
|
| 348 |
|
|
|
| 349 |
|
|
/*
|
| 350 |
|
|
* SCSI Inquiry Data Flags
|
| 351 |
|
|
*/
|
| 352 |
|
|
#define IPS_SCSI_INQ_TYPE_DASD 0x00
|
| 353 |
|
|
#define IPS_SCSI_INQ_TYPE_PROCESSOR 0x03
|
| 354 |
|
|
#define IPS_SCSI_INQ_LU_CONNECTED 0x00
|
| 355 |
|
|
#define IPS_SCSI_INQ_RD_REV2 0x02
|
| 356 |
|
|
#define IPS_SCSI_INQ_REV2 0x02
|
| 357 |
|
|
#define IPS_SCSI_INQ_REV3 0x03
|
| 358 |
|
|
#define IPS_SCSI_INQ_Address16 0x01
|
| 359 |
|
|
#define IPS_SCSI_INQ_Address32 0x02
|
| 360 |
|
|
#define IPS_SCSI_INQ_MedChanger 0x08
|
| 361 |
|
|
#define IPS_SCSI_INQ_MultiPort 0x10
|
| 362 |
|
|
#define IPS_SCSI_INQ_EncServ 0x40
|
| 363 |
|
|
#define IPS_SCSI_INQ_SoftReset 0x01
|
| 364 |
|
|
#define IPS_SCSI_INQ_CmdQue 0x02
|
| 365 |
|
|
#define IPS_SCSI_INQ_Linked 0x08
|
| 366 |
|
|
#define IPS_SCSI_INQ_Sync 0x10
|
| 367 |
|
|
#define IPS_SCSI_INQ_WBus16 0x20
|
| 368 |
|
|
#define IPS_SCSI_INQ_WBus32 0x40
|
| 369 |
|
|
#define IPS_SCSI_INQ_RelAdr 0x80
|
| 370 |
|
|
|
| 371 |
|
|
/*
|
| 372 |
|
|
* SCSI Request Sense Data Flags
|
| 373 |
|
|
*/
|
| 374 |
|
|
#define IPS_SCSI_REQSEN_VALID 0x80
|
| 375 |
|
|
#define IPS_SCSI_REQSEN_CURRENT_ERR 0x70
|
| 376 |
|
|
#define IPS_SCSI_REQSEN_NO_SENSE 0x00
|
| 377 |
|
|
|
| 378 |
|
|
/*
|
| 379 |
|
|
* SCSI Mode Page Equates
|
| 380 |
|
|
*/
|
| 381 |
|
|
#define IPS_SCSI_MP3_SoftSector 0x01
|
| 382 |
|
|
#define IPS_SCSI_MP3_HardSector 0x02
|
| 383 |
|
|
#define IPS_SCSI_MP3_Removeable 0x04
|
| 384 |
|
|
#define IPS_SCSI_MP3_AllocateSurface 0x08
|
| 385 |
|
|
|
| 386 |
|
|
/*
|
| 387 |
|
|
* HA Flags
|
| 388 |
|
|
*/
|
| 389 |
|
|
|
| 390 |
|
|
#define IPS_HA_ENH_SG 0x1
|
| 391 |
|
|
|
| 392 |
|
|
/*
|
| 393 |
|
|
* SCB Flags
|
| 394 |
|
|
*/
|
| 395 |
|
|
#define IPS_SCB_MAP_SG 0x00008
|
| 396 |
|
|
#define IPS_SCB_MAP_SINGLE 0X00010
|
| 397 |
|
|
|
| 398 |
|
|
/*
|
| 399 |
|
|
* Passthru stuff
|
| 400 |
|
|
*/
|
| 401 |
|
|
#define IPS_COPPUSRCMD (('C'<<8) | 65)
|
| 402 |
|
|
#define IPS_COPPIOCCMD (('C'<<8) | 66)
|
| 403 |
|
|
#define IPS_NUMCTRLS (('C'<<8) | 68)
|
| 404 |
|
|
#define IPS_CTRLINFO (('C'<<8) | 69)
|
| 405 |
|
|
|
| 406 |
|
|
/* flashing defines */
|
| 407 |
|
|
#define IPS_FW_IMAGE 0x00
|
| 408 |
|
|
#define IPS_BIOS_IMAGE 0x01
|
| 409 |
|
|
#define IPS_WRITE_FW 0x01
|
| 410 |
|
|
#define IPS_WRITE_BIOS 0x02
|
| 411 |
|
|
#define IPS_ERASE_BIOS 0x03
|
| 412 |
|
|
#define IPS_BIOS_HEADER 0xC0
|
| 413 |
|
|
|
| 414 |
|
|
/* time oriented stuff */
|
| 415 |
|
|
#define IPS_IS_LEAP_YEAR(y) (((y % 4 == 0) && ((y % 100 != 0) || (y % 400 == 0))) ? 1 : 0)
|
| 416 |
|
|
#define IPS_NUM_LEAP_YEARS_THROUGH(y) ((y) / 4 - (y) / 100 + (y) / 400)
|
| 417 |
|
|
|
| 418 |
|
|
#define IPS_SECS_MIN 60
|
| 419 |
|
|
#define IPS_SECS_HOUR 3600
|
| 420 |
|
|
#define IPS_SECS_8HOURS 28800
|
| 421 |
|
|
#define IPS_SECS_DAY 86400
|
| 422 |
|
|
#define IPS_DAYS_NORMAL_YEAR 365
|
| 423 |
|
|
#define IPS_DAYS_LEAP_YEAR 366
|
| 424 |
|
|
#define IPS_EPOCH_YEAR 1970
|
| 425 |
|
|
|
| 426 |
|
|
/*
|
| 427 |
|
|
* Scsi_Host Template
|
| 428 |
|
|
*/
|
| 429 |
|
|
#if LINUX_VERSION_CODE < LinuxVersionCode(2,5,0)
|
| 430 |
|
|
static void ips_select_queue_depth(struct Scsi_Host *, Scsi_Device *);
|
| 431 |
|
|
#define IPS { \
|
| 432 |
|
|
.detect = ips_detect, \
|
| 433 |
|
|
.release = ips_release, \
|
| 434 |
|
|
.info = ips_info, \
|
| 435 |
|
|
.queuecommand = ips_queue, \
|
| 436 |
|
|
.eh_abort_handler = ips_eh_abort, \
|
| 437 |
|
|
.eh_host_reset_handler = ips_eh_reset, \
|
| 438 |
|
|
.bios_param = ips_biosparam,\
|
| 439 |
|
|
.select_queue_depths = ips_select_queue_depth, \
|
| 440 |
|
|
.can_queue = 0, \
|
| 441 |
|
|
.this_id = -1, \
|
| 442 |
|
|
.sg_tablesize = IPS_MAX_SG, \
|
| 443 |
|
|
.cmd_per_lun = 16, \
|
| 444 |
|
|
.present = 0, \
|
| 445 |
|
|
.unchecked_isa_dma = 0, \
|
| 446 |
|
|
.use_clustering = ENABLE_CLUSTERING,\
|
| 447 |
|
|
.use_new_eh_code = 1, \
|
| 448 |
|
|
IPS_HIGHMEM_IO \
|
| 449 |
|
|
}
|
| 450 |
|
|
#else
|
| 451 |
|
|
#define IPS { \
|
| 452 |
|
|
.detect = ips_detect, \
|
| 453 |
|
|
.release = ips_release, \
|
| 454 |
|
|
.info = ips_info, \
|
| 455 |
|
|
.queuecommand = ips_queue, \
|
| 456 |
|
|
.eh_abort_handler = ips_eh_abort, \
|
| 457 |
|
|
.eh_host_reset_handler = ips_eh_reset, \
|
| 458 |
|
|
.slave_configure = ips_slave_configure, \
|
| 459 |
|
|
.bios_param = ips_biosparam, \
|
| 460 |
|
|
.can_queue = 0, \
|
| 461 |
|
|
.this_id = -1, \
|
| 462 |
|
|
.sg_tablesize = IPS_MAX_SG, \
|
| 463 |
|
|
.cmd_per_lun = 3, \
|
| 464 |
|
|
.present = 0, \
|
| 465 |
|
|
.unchecked_isa_dma = 0, \
|
| 466 |
|
|
.use_clustering = ENABLE_CLUSTERING, \
|
| 467 |
|
|
.highmem_io = 1 \
|
| 468 |
|
|
}
|
| 469 |
|
|
#endif
|
| 470 |
|
|
|
| 471 |
|
|
/*
|
| 472 |
|
|
* Raid Command Formats
|
| 473 |
|
|
*/
|
| 474 |
|
|
typedef struct {
|
| 475 |
|
|
uint8_t op_code;
|
| 476 |
|
|
uint8_t command_id;
|
| 477 |
|
|
uint8_t log_drv;
|
| 478 |
|
|
uint8_t sg_count;
|
| 479 |
|
|
uint32_t lba;
|
| 480 |
|
|
uint32_t sg_addr;
|
| 481 |
|
|
uint16_t sector_count;
|
| 482 |
|
|
uint8_t segment_4G;
|
| 483 |
|
|
uint8_t enhanced_sg;
|
| 484 |
|
|
uint32_t ccsar;
|
| 485 |
|
|
uint32_t cccr;
|
| 486 |
|
|
} IPS_IO_CMD, *PIPS_IO_CMD;
|
| 487 |
|
|
|
| 488 |
|
|
typedef struct {
|
| 489 |
|
|
uint8_t op_code;
|
| 490 |
|
|
uint8_t command_id;
|
| 491 |
|
|
uint16_t reserved;
|
| 492 |
|
|
uint32_t reserved2;
|
| 493 |
|
|
uint32_t buffer_addr;
|
| 494 |
|
|
uint32_t reserved3;
|
| 495 |
|
|
uint32_t ccsar;
|
| 496 |
|
|
uint32_t cccr;
|
| 497 |
|
|
} IPS_LD_CMD, *PIPS_LD_CMD;
|
| 498 |
|
|
|
| 499 |
|
|
typedef struct {
|
| 500 |
|
|
uint8_t op_code;
|
| 501 |
|
|
uint8_t command_id;
|
| 502 |
|
|
uint8_t reserved;
|
| 503 |
|
|
uint8_t reserved2;
|
| 504 |
|
|
uint32_t reserved3;
|
| 505 |
|
|
uint32_t buffer_addr;
|
| 506 |
|
|
uint32_t reserved4;
|
| 507 |
|
|
} IPS_IOCTL_CMD, *PIPS_IOCTL_CMD;
|
| 508 |
|
|
|
| 509 |
|
|
typedef struct {
|
| 510 |
|
|
uint8_t op_code;
|
| 511 |
|
|
uint8_t command_id;
|
| 512 |
|
|
uint8_t channel;
|
| 513 |
|
|
uint8_t reserved3;
|
| 514 |
|
|
uint8_t reserved4;
|
| 515 |
|
|
uint8_t reserved5;
|
| 516 |
|
|
uint8_t reserved6;
|
| 517 |
|
|
uint8_t reserved7;
|
| 518 |
|
|
uint8_t reserved8;
|
| 519 |
|
|
uint8_t reserved9;
|
| 520 |
|
|
uint8_t reserved10;
|
| 521 |
|
|
uint8_t reserved11;
|
| 522 |
|
|
uint8_t reserved12;
|
| 523 |
|
|
uint8_t reserved13;
|
| 524 |
|
|
uint8_t reserved14;
|
| 525 |
|
|
uint8_t adapter_flag;
|
| 526 |
|
|
} IPS_RESET_CMD, *PIPS_RESET_CMD;
|
| 527 |
|
|
|
| 528 |
|
|
typedef struct {
|
| 529 |
|
|
uint8_t op_code;
|
| 530 |
|
|
uint8_t command_id;
|
| 531 |
|
|
uint16_t reserved;
|
| 532 |
|
|
uint32_t reserved2;
|
| 533 |
|
|
uint32_t dcdb_address;
|
| 534 |
|
|
uint16_t reserved3;
|
| 535 |
|
|
uint8_t segment_4G;
|
| 536 |
|
|
uint8_t enhanced_sg;
|
| 537 |
|
|
uint32_t ccsar;
|
| 538 |
|
|
uint32_t cccr;
|
| 539 |
|
|
} IPS_DCDB_CMD, *PIPS_DCDB_CMD;
|
| 540 |
|
|
|
| 541 |
|
|
typedef struct {
|
| 542 |
|
|
uint8_t op_code;
|
| 543 |
|
|
uint8_t command_id;
|
| 544 |
|
|
uint8_t channel;
|
| 545 |
|
|
uint8_t source_target;
|
| 546 |
|
|
uint32_t reserved;
|
| 547 |
|
|
uint32_t reserved2;
|
| 548 |
|
|
uint32_t reserved3;
|
| 549 |
|
|
uint32_t ccsar;
|
| 550 |
|
|
uint32_t cccr;
|
| 551 |
|
|
} IPS_CS_CMD, *PIPS_CS_CMD;
|
| 552 |
|
|
|
| 553 |
|
|
typedef struct {
|
| 554 |
|
|
uint8_t op_code;
|
| 555 |
|
|
uint8_t command_id;
|
| 556 |
|
|
uint8_t log_drv;
|
| 557 |
|
|
uint8_t control;
|
| 558 |
|
|
uint32_t reserved;
|
| 559 |
|
|
uint32_t reserved2;
|
| 560 |
|
|
uint32_t reserved3;
|
| 561 |
|
|
uint32_t ccsar;
|
| 562 |
|
|
uint32_t cccr;
|
| 563 |
|
|
} IPS_US_CMD, *PIPS_US_CMD;
|
| 564 |
|
|
|
| 565 |
|
|
typedef struct {
|
| 566 |
|
|
uint8_t op_code;
|
| 567 |
|
|
uint8_t command_id;
|
| 568 |
|
|
uint8_t reserved;
|
| 569 |
|
|
uint8_t state;
|
| 570 |
|
|
uint32_t reserved2;
|
| 571 |
|
|
uint32_t reserved3;
|
| 572 |
|
|
uint32_t reserved4;
|
| 573 |
|
|
uint32_t ccsar;
|
| 574 |
|
|
uint32_t cccr;
|
| 575 |
|
|
} IPS_FC_CMD, *PIPS_FC_CMD;
|
| 576 |
|
|
|
| 577 |
|
|
typedef struct {
|
| 578 |
|
|
uint8_t op_code;
|
| 579 |
|
|
uint8_t command_id;
|
| 580 |
|
|
uint8_t reserved;
|
| 581 |
|
|
uint8_t desc;
|
| 582 |
|
|
uint32_t reserved2;
|
| 583 |
|
|
uint32_t buffer_addr;
|
| 584 |
|
|
uint32_t reserved3;
|
| 585 |
|
|
uint32_t ccsar;
|
| 586 |
|
|
uint32_t cccr;
|
| 587 |
|
|
} IPS_STATUS_CMD, *PIPS_STATUS_CMD;
|
| 588 |
|
|
|
| 589 |
|
|
typedef struct {
|
| 590 |
|
|
uint8_t op_code;
|
| 591 |
|
|
uint8_t command_id;
|
| 592 |
|
|
uint8_t page;
|
| 593 |
|
|
uint8_t write;
|
| 594 |
|
|
uint32_t reserved;
|
| 595 |
|
|
uint32_t buffer_addr;
|
| 596 |
|
|
uint32_t reserved2;
|
| 597 |
|
|
uint32_t ccsar;
|
| 598 |
|
|
uint32_t cccr;
|
| 599 |
|
|
} IPS_NVRAM_CMD, *PIPS_NVRAM_CMD;
|
| 600 |
|
|
|
| 601 |
|
|
typedef struct
|
| 602 |
|
|
{
|
| 603 |
|
|
uint8_t op_code;
|
| 604 |
|
|
uint8_t command_id;
|
| 605 |
|
|
uint16_t reserved;
|
| 606 |
|
|
uint32_t count;
|
| 607 |
|
|
uint32_t buffer_addr;
|
| 608 |
|
|
uint32_t reserved2;
|
| 609 |
|
|
} IPS_VERSION_INFO, *PIPS_VERSION_INFO;
|
| 610 |
|
|
|
| 611 |
|
|
typedef struct {
|
| 612 |
|
|
uint8_t op_code;
|
| 613 |
|
|
uint8_t command_id;
|
| 614 |
|
|
uint8_t reset_count;
|
| 615 |
|
|
uint8_t reset_type;
|
| 616 |
|
|
uint8_t second;
|
| 617 |
|
|
uint8_t minute;
|
| 618 |
|
|
uint8_t hour;
|
| 619 |
|
|
uint8_t day;
|
| 620 |
|
|
uint8_t reserved1[4];
|
| 621 |
|
|
uint8_t month;
|
| 622 |
|
|
uint8_t yearH;
|
| 623 |
|
|
uint8_t yearL;
|
| 624 |
|
|
uint8_t reserved2;
|
| 625 |
|
|
} IPS_FFDC_CMD, *PIPS_FFDC_CMD;
|
| 626 |
|
|
|
| 627 |
|
|
typedef struct {
|
| 628 |
|
|
uint8_t op_code;
|
| 629 |
|
|
uint8_t command_id;
|
| 630 |
|
|
uint8_t type;
|
| 631 |
|
|
uint8_t direction;
|
| 632 |
|
|
uint32_t count;
|
| 633 |
|
|
uint32_t buffer_addr;
|
| 634 |
|
|
uint8_t total_packets;
|
| 635 |
|
|
uint8_t packet_num;
|
| 636 |
|
|
uint16_t reserved;
|
| 637 |
|
|
} IPS_FLASHFW_CMD, *PIPS_FLASHFW_CMD;
|
| 638 |
|
|
|
| 639 |
|
|
typedef struct {
|
| 640 |
|
|
uint8_t op_code;
|
| 641 |
|
|
uint8_t command_id;
|
| 642 |
|
|
uint8_t type;
|
| 643 |
|
|
uint8_t direction;
|
| 644 |
|
|
uint32_t count;
|
| 645 |
|
|
uint32_t buffer_addr;
|
| 646 |
|
|
uint32_t offset;
|
| 647 |
|
|
} IPS_FLASHBIOS_CMD, *PIPS_FLASHBIOS_CMD;
|
| 648 |
|
|
|
| 649 |
|
|
typedef union {
|
| 650 |
|
|
IPS_IO_CMD basic_io;
|
| 651 |
|
|
IPS_LD_CMD logical_info;
|
| 652 |
|
|
IPS_IOCTL_CMD ioctl_info;
|
| 653 |
|
|
IPS_DCDB_CMD dcdb;
|
| 654 |
|
|
IPS_CS_CMD config_sync;
|
| 655 |
|
|
IPS_US_CMD unlock_stripe;
|
| 656 |
|
|
IPS_FC_CMD flush_cache;
|
| 657 |
|
|
IPS_STATUS_CMD status;
|
| 658 |
|
|
IPS_NVRAM_CMD nvram;
|
| 659 |
|
|
IPS_FFDC_CMD ffdc;
|
| 660 |
|
|
IPS_FLASHFW_CMD flashfw;
|
| 661 |
|
|
IPS_FLASHBIOS_CMD flashbios;
|
| 662 |
|
|
IPS_VERSION_INFO version_info;
|
| 663 |
|
|
IPS_RESET_CMD reset;
|
| 664 |
|
|
} IPS_HOST_COMMAND, *PIPS_HOST_COMMAND;
|
| 665 |
|
|
|
| 666 |
|
|
typedef struct {
|
| 667 |
|
|
uint8_t logical_id;
|
| 668 |
|
|
uint8_t reserved;
|
| 669 |
|
|
uint8_t raid_level;
|
| 670 |
|
|
uint8_t state;
|
| 671 |
|
|
uint32_t sector_count;
|
| 672 |
|
|
} IPS_DRIVE_INFO, *PIPS_DRIVE_INFO;
|
| 673 |
|
|
|
| 674 |
|
|
typedef struct {
|
| 675 |
|
|
uint8_t no_of_log_drive;
|
| 676 |
|
|
uint8_t reserved[3];
|
| 677 |
|
|
IPS_DRIVE_INFO drive_info[IPS_MAX_LD];
|
| 678 |
|
|
} IPS_LD_INFO, *PIPS_LD_INFO;
|
| 679 |
|
|
|
| 680 |
|
|
typedef struct {
|
| 681 |
|
|
uint8_t device_address;
|
| 682 |
|
|
uint8_t cmd_attribute;
|
| 683 |
|
|
uint16_t transfer_length;
|
| 684 |
|
|
uint32_t buffer_pointer;
|
| 685 |
|
|
uint8_t cdb_length;
|
| 686 |
|
|
uint8_t sense_length;
|
| 687 |
|
|
uint8_t sg_count;
|
| 688 |
|
|
uint8_t reserved;
|
| 689 |
|
|
uint8_t scsi_cdb[12];
|
| 690 |
|
|
uint8_t sense_info[64];
|
| 691 |
|
|
uint8_t scsi_status;
|
| 692 |
|
|
uint8_t reserved2[3];
|
| 693 |
|
|
} IPS_DCDB_TABLE, *PIPS_DCDB_TABLE;
|
| 694 |
|
|
|
| 695 |
|
|
typedef struct {
|
| 696 |
|
|
uint8_t device_address;
|
| 697 |
|
|
uint8_t cmd_attribute;
|
| 698 |
|
|
uint8_t cdb_length;
|
| 699 |
|
|
uint8_t reserved_for_LUN;
|
| 700 |
|
|
uint32_t transfer_length;
|
| 701 |
|
|
uint32_t buffer_pointer;
|
| 702 |
|
|
uint16_t sg_count;
|
| 703 |
|
|
uint8_t sense_length;
|
| 704 |
|
|
uint8_t scsi_status;
|
| 705 |
|
|
uint32_t reserved;
|
| 706 |
|
|
uint8_t scsi_cdb[16];
|
| 707 |
|
|
uint8_t sense_info[56];
|
| 708 |
|
|
} IPS_DCDB_TABLE_TAPE, *PIPS_DCDB_TABLE_TAPE;
|
| 709 |
|
|
|
| 710 |
|
|
typedef union {
|
| 711 |
|
|
struct {
|
| 712 |
|
|
volatile uint8_t reserved;
|
| 713 |
|
|
volatile uint8_t command_id;
|
| 714 |
|
|
volatile uint8_t basic_status;
|
| 715 |
|
|
volatile uint8_t extended_status;
|
| 716 |
|
|
} fields;
|
| 717 |
|
|
|
| 718 |
|
|
volatile uint32_t value;
|
| 719 |
|
|
} IPS_STATUS, *PIPS_STATUS;
|
| 720 |
|
|
|
| 721 |
|
|
typedef struct {
|
| 722 |
|
|
IPS_STATUS status[IPS_MAX_CMDS + 1];
|
| 723 |
|
|
volatile PIPS_STATUS p_status_start;
|
| 724 |
|
|
volatile PIPS_STATUS p_status_end;
|
| 725 |
|
|
volatile PIPS_STATUS p_status_tail;
|
| 726 |
|
|
volatile uint32_t hw_status_start;
|
| 727 |
|
|
volatile uint32_t hw_status_tail;
|
| 728 |
|
|
} IPS_ADAPTER, *PIPS_ADAPTER;
|
| 729 |
|
|
|
| 730 |
|
|
typedef struct {
|
| 731 |
|
|
uint8_t ucLogDriveCount;
|
| 732 |
|
|
uint8_t ucMiscFlag;
|
| 733 |
|
|
uint8_t ucSLTFlag;
|
| 734 |
|
|
uint8_t ucBSTFlag;
|
| 735 |
|
|
uint8_t ucPwrChgCnt;
|
| 736 |
|
|
uint8_t ucWrongAdrCnt;
|
| 737 |
|
|
uint8_t ucUnidentCnt;
|
| 738 |
|
|
uint8_t ucNVramDevChgCnt;
|
| 739 |
|
|
uint8_t CodeBlkVersion[8];
|
| 740 |
|
|
uint8_t BootBlkVersion[8];
|
| 741 |
|
|
uint32_t ulDriveSize[IPS_MAX_LD];
|
| 742 |
|
|
uint8_t ucConcurrentCmdCount;
|
| 743 |
|
|
uint8_t ucMaxPhysicalDevices;
|
| 744 |
|
|
uint16_t usFlashRepgmCount;
|
| 745 |
|
|
uint8_t ucDefunctDiskCount;
|
| 746 |
|
|
uint8_t ucRebuildFlag;
|
| 747 |
|
|
uint8_t ucOfflineLogDrvCount;
|
| 748 |
|
|
uint8_t ucCriticalDrvCount;
|
| 749 |
|
|
uint16_t usConfigUpdateCount;
|
| 750 |
|
|
uint8_t ucBlkFlag;
|
| 751 |
|
|
uint8_t reserved;
|
| 752 |
|
|
uint16_t usAddrDeadDisk[IPS_MAX_CHANNELS * (IPS_MAX_TARGETS + 1)];
|
| 753 |
|
|
} IPS_ENQ, *PIPS_ENQ;
|
| 754 |
|
|
|
| 755 |
|
|
typedef struct {
|
| 756 |
|
|
uint8_t ucInitiator;
|
| 757 |
|
|
uint8_t ucParameters;
|
| 758 |
|
|
uint8_t ucMiscFlag;
|
| 759 |
|
|
uint8_t ucState;
|
| 760 |
|
|
uint32_t ulBlockCount;
|
| 761 |
|
|
uint8_t ucDeviceId[28];
|
| 762 |
|
|
} IPS_DEVSTATE, *PIPS_DEVSTATE;
|
| 763 |
|
|
|
| 764 |
|
|
typedef struct {
|
| 765 |
|
|
uint8_t ucChn;
|
| 766 |
|
|
uint8_t ucTgt;
|
| 767 |
|
|
uint16_t ucReserved;
|
| 768 |
|
|
uint32_t ulStartSect;
|
| 769 |
|
|
uint32_t ulNoOfSects;
|
| 770 |
|
|
} IPS_CHUNK, *PIPS_CHUNK;
|
| 771 |
|
|
|
| 772 |
|
|
typedef struct {
|
| 773 |
|
|
uint16_t ucUserField;
|
| 774 |
|
|
uint8_t ucState;
|
| 775 |
|
|
uint8_t ucRaidCacheParam;
|
| 776 |
|
|
uint8_t ucNoOfChunkUnits;
|
| 777 |
|
|
uint8_t ucStripeSize;
|
| 778 |
|
|
uint8_t ucParams;
|
| 779 |
|
|
uint8_t ucReserved;
|
| 780 |
|
|
uint32_t ulLogDrvSize;
|
| 781 |
|
|
IPS_CHUNK chunk[IPS_MAX_CHUNKS];
|
| 782 |
|
|
} IPS_LD, *PIPS_LD;
|
| 783 |
|
|
|
| 784 |
|
|
typedef struct {
|
| 785 |
|
|
uint8_t board_disc[8];
|
| 786 |
|
|
uint8_t processor[8];
|
| 787 |
|
|
uint8_t ucNoChanType;
|
| 788 |
|
|
uint8_t ucNoHostIntType;
|
| 789 |
|
|
uint8_t ucCompression;
|
| 790 |
|
|
uint8_t ucNvramType;
|
| 791 |
|
|
uint32_t ulNvramSize;
|
| 792 |
|
|
} IPS_HARDWARE, *PIPS_HARDWARE;
|
| 793 |
|
|
|
| 794 |
|
|
typedef struct {
|
| 795 |
|
|
uint8_t ucLogDriveCount;
|
| 796 |
|
|
uint8_t ucDateD;
|
| 797 |
|
|
uint8_t ucDateM;
|
| 798 |
|
|
uint8_t ucDateY;
|
| 799 |
|
|
uint8_t init_id[4];
|
| 800 |
|
|
uint8_t host_id[12];
|
| 801 |
|
|
uint8_t time_sign[8];
|
| 802 |
|
|
uint32_t UserOpt;
|
| 803 |
|
|
uint16_t user_field;
|
| 804 |
|
|
uint8_t ucRebuildRate;
|
| 805 |
|
|
uint8_t ucReserve;
|
| 806 |
|
|
IPS_HARDWARE hardware_disc;
|
| 807 |
|
|
IPS_LD logical_drive[IPS_MAX_LD];
|
| 808 |
|
|
IPS_DEVSTATE dev[IPS_MAX_CHANNELS][IPS_MAX_TARGETS+1];
|
| 809 |
|
|
uint8_t reserved[512];
|
| 810 |
|
|
} IPS_CONF, *PIPS_CONF;
|
| 811 |
|
|
|
| 812 |
|
|
typedef struct {
|
| 813 |
|
|
uint32_t signature;
|
| 814 |
|
|
uint8_t reserved1;
|
| 815 |
|
|
uint8_t adapter_slot;
|
| 816 |
|
|
uint16_t adapter_type;
|
| 817 |
|
|
uint8_t ctrl_bios[8];
|
| 818 |
|
|
uint8_t versioning; /* 1 = Versioning Supported, else 0 */
|
| 819 |
|
|
uint8_t version_mismatch; /* 1 = Versioning MisMatch, else 0 */
|
| 820 |
|
|
uint8_t reserved2;
|
| 821 |
|
|
uint8_t operating_system;
|
| 822 |
|
|
uint8_t driver_high[4];
|
| 823 |
|
|
uint8_t driver_low[4];
|
| 824 |
|
|
uint8_t BiosCompatibilityID[8];
|
| 825 |
|
|
uint8_t ReservedForOS2[8];
|
| 826 |
|
|
uint8_t bios_high[4]; /* Adapter's Flashed BIOS Version */
|
| 827 |
|
|
uint8_t bios_low[4];
|
| 828 |
|
|
uint8_t adapter_order[16]; /* BIOS Telling us the Sort Order */
|
| 829 |
|
|
uint8_t Filler[60];
|
| 830 |
|
|
} IPS_NVRAM_P5, *PIPS_NVRAM_P5;
|
| 831 |
|
|
|
| 832 |
|
|
/*--------------------------------------------------------------------------*/
|
| 833 |
|
|
/* Data returned from a GetVersion Command */
|
| 834 |
|
|
/*--------------------------------------------------------------------------*/
|
| 835 |
|
|
|
| 836 |
|
|
/* SubSystem Parameter[4] */
|
| 837 |
|
|
#define IPS_GET_VERSION_SUPPORT 0x00018000 /* Mask for Versioning Support */
|
| 838 |
|
|
|
| 839 |
|
|
typedef struct
|
| 840 |
|
|
{
|
| 841 |
|
|
uint32_t revision;
|
| 842 |
|
|
uint8_t bootBlkVersion[32];
|
| 843 |
|
|
uint8_t bootBlkAttributes[4];
|
| 844 |
|
|
uint8_t codeBlkVersion[32];
|
| 845 |
|
|
uint8_t biosVersion[32];
|
| 846 |
|
|
uint8_t biosAttributes[4];
|
| 847 |
|
|
uint8_t compatibilityId[32];
|
| 848 |
|
|
uint8_t reserved[4];
|
| 849 |
|
|
} IPS_VERSION_DATA;
|
| 850 |
|
|
|
| 851 |
|
|
|
| 852 |
|
|
typedef struct _IPS_SUBSYS {
|
| 853 |
|
|
uint32_t param[128];
|
| 854 |
|
|
} IPS_SUBSYS, *PIPS_SUBSYS;
|
| 855 |
|
|
|
| 856 |
|
|
/**
|
| 857 |
|
|
** SCSI Structures
|
| 858 |
|
|
**/
|
| 859 |
|
|
|
| 860 |
|
|
/*
|
| 861 |
|
|
* Inquiry Data Format
|
| 862 |
|
|
*/
|
| 863 |
|
|
typedef struct {
|
| 864 |
|
|
uint8_t DeviceType;
|
| 865 |
|
|
uint8_t DeviceTypeQualifier;
|
| 866 |
|
|
uint8_t Version;
|
| 867 |
|
|
uint8_t ResponseDataFormat;
|
| 868 |
|
|
uint8_t AdditionalLength;
|
| 869 |
|
|
uint8_t Reserved;
|
| 870 |
|
|
uint8_t Flags[2];
|
| 871 |
|
|
uint8_t VendorId[8];
|
| 872 |
|
|
uint8_t ProductId[16];
|
| 873 |
|
|
uint8_t ProductRevisionLevel[4];
|
| 874 |
|
|
uint8_t Reserved2; /* Provides NULL terminator to name */
|
| 875 |
|
|
} IPS_SCSI_INQ_DATA, *PIPS_SCSI_INQ_DATA;
|
| 876 |
|
|
|
| 877 |
|
|
/*
|
| 878 |
|
|
* Read Capacity Data Format
|
| 879 |
|
|
*/
|
| 880 |
|
|
typedef struct {
|
| 881 |
|
|
uint32_t lba;
|
| 882 |
|
|
uint32_t len;
|
| 883 |
|
|
} IPS_SCSI_CAPACITY;
|
| 884 |
|
|
|
| 885 |
|
|
/*
|
| 886 |
|
|
* Request Sense Data Format
|
| 887 |
|
|
*/
|
| 888 |
|
|
typedef struct {
|
| 889 |
|
|
uint8_t ResponseCode;
|
| 890 |
|
|
uint8_t SegmentNumber;
|
| 891 |
|
|
uint8_t Flags;
|
| 892 |
|
|
uint8_t Information[4];
|
| 893 |
|
|
uint8_t AdditionalLength;
|
| 894 |
|
|
uint8_t CommandSpecific[4];
|
| 895 |
|
|
uint8_t AdditionalSenseCode;
|
| 896 |
|
|
uint8_t AdditionalSenseCodeQual;
|
| 897 |
|
|
uint8_t FRUCode;
|
| 898 |
|
|
uint8_t SenseKeySpecific[3];
|
| 899 |
|
|
} IPS_SCSI_REQSEN;
|
| 900 |
|
|
|
| 901 |
|
|
/*
|
| 902 |
|
|
* Sense Data Format - Page 3
|
| 903 |
|
|
*/
|
| 904 |
|
|
typedef struct {
|
| 905 |
|
|
uint8_t PageCode;
|
| 906 |
|
|
uint8_t PageLength;
|
| 907 |
|
|
uint16_t TracksPerZone;
|
| 908 |
|
|
uint16_t AltSectorsPerZone;
|
| 909 |
|
|
uint16_t AltTracksPerZone;
|
| 910 |
|
|
uint16_t AltTracksPerVolume;
|
| 911 |
|
|
uint16_t SectorsPerTrack;
|
| 912 |
|
|
uint16_t BytesPerSector;
|
| 913 |
|
|
uint16_t Interleave;
|
| 914 |
|
|
uint16_t TrackSkew;
|
| 915 |
|
|
uint16_t CylinderSkew;
|
| 916 |
|
|
uint8_t flags;
|
| 917 |
|
|
uint8_t reserved[3];
|
| 918 |
|
|
} IPS_SCSI_MODE_PAGE3;
|
| 919 |
|
|
|
| 920 |
|
|
/*
|
| 921 |
|
|
* Sense Data Format - Page 4
|
| 922 |
|
|
*/
|
| 923 |
|
|
typedef struct {
|
| 924 |
|
|
uint8_t PageCode;
|
| 925 |
|
|
uint8_t PageLength;
|
| 926 |
|
|
uint16_t CylindersHigh;
|
| 927 |
|
|
uint8_t CylindersLow;
|
| 928 |
|
|
uint8_t Heads;
|
| 929 |
|
|
uint16_t WritePrecompHigh;
|
| 930 |
|
|
uint8_t WritePrecompLow;
|
| 931 |
|
|
uint16_t ReducedWriteCurrentHigh;
|
| 932 |
|
|
uint8_t ReducedWriteCurrentLow;
|
| 933 |
|
|
uint16_t StepRate;
|
| 934 |
|
|
uint16_t LandingZoneHigh;
|
| 935 |
|
|
uint8_t LandingZoneLow;
|
| 936 |
|
|
uint8_t flags;
|
| 937 |
|
|
uint8_t RotationalOffset;
|
| 938 |
|
|
uint8_t Reserved;
|
| 939 |
|
|
uint16_t MediumRotationRate;
|
| 940 |
|
|
uint8_t Reserved2[2];
|
| 941 |
|
|
} IPS_SCSI_MODE_PAGE4;
|
| 942 |
|
|
|
| 943 |
|
|
/*
|
| 944 |
|
|
* Sense Data Format - Block Descriptor (DASD)
|
| 945 |
|
|
*/
|
| 946 |
|
|
typedef struct {
|
| 947 |
|
|
uint32_t NumberOfBlocks;
|
| 948 |
|
|
uint8_t DensityCode;
|
| 949 |
|
|
uint16_t BlockLengthHigh;
|
| 950 |
|
|
uint8_t BlockLengthLow;
|
| 951 |
|
|
} IPS_SCSI_MODE_PAGE_BLKDESC;
|
| 952 |
|
|
|
| 953 |
|
|
/*
|
| 954 |
|
|
* Sense Data Format - Mode Page Header
|
| 955 |
|
|
*/
|
| 956 |
|
|
typedef struct {
|
| 957 |
|
|
uint8_t DataLength;
|
| 958 |
|
|
uint8_t MediumType;
|
| 959 |
|
|
uint8_t Reserved;
|
| 960 |
|
|
uint8_t BlockDescLength;
|
| 961 |
|
|
} IPS_SCSI_MODE_PAGE_HEADER;
|
| 962 |
|
|
|
| 963 |
|
|
typedef struct {
|
| 964 |
|
|
IPS_SCSI_MODE_PAGE_HEADER hdr;
|
| 965 |
|
|
IPS_SCSI_MODE_PAGE_BLKDESC blkdesc;
|
| 966 |
|
|
|
| 967 |
|
|
union {
|
| 968 |
|
|
IPS_SCSI_MODE_PAGE3 pg3;
|
| 969 |
|
|
IPS_SCSI_MODE_PAGE4 pg4;
|
| 970 |
|
|
} pdata;
|
| 971 |
|
|
} IPS_SCSI_MODE_PAGE_DATA;
|
| 972 |
|
|
|
| 973 |
|
|
/*
|
| 974 |
|
|
* Scatter Gather list format
|
| 975 |
|
|
*/
|
| 976 |
|
|
typedef struct ips_sglist {
|
| 977 |
|
|
uint32_t address;
|
| 978 |
|
|
uint32_t length;
|
| 979 |
|
|
} IPS_STD_SG_LIST;
|
| 980 |
|
|
|
| 981 |
|
|
typedef struct ips_enh_sglist {
|
| 982 |
|
|
uint32_t address_lo;
|
| 983 |
|
|
uint32_t address_hi;
|
| 984 |
|
|
uint32_t length;
|
| 985 |
|
|
uint32_t reserved;
|
| 986 |
|
|
} IPS_ENH_SG_LIST;
|
| 987 |
|
|
|
| 988 |
|
|
typedef union {
|
| 989 |
|
|
void *list;
|
| 990 |
|
|
IPS_STD_SG_LIST *std_list;
|
| 991 |
|
|
IPS_ENH_SG_LIST *enh_list;
|
| 992 |
|
|
} IPS_SG_LIST;
|
| 993 |
|
|
|
| 994 |
|
|
typedef struct _IPS_INFOSTR {
|
| 995 |
|
|
char *buffer;
|
| 996 |
|
|
int length;
|
| 997 |
|
|
int offset;
|
| 998 |
|
|
int pos;
|
| 999 |
|
|
int localpos;
|
| 1000 |
|
|
} IPS_INFOSTR;
|
| 1001 |
|
|
|
| 1002 |
|
|
typedef struct {
|
| 1003 |
|
|
char *option_name;
|
| 1004 |
|
|
int *option_flag;
|
| 1005 |
|
|
int option_value;
|
| 1006 |
|
|
} IPS_OPTION;
|
| 1007 |
|
|
|
| 1008 |
|
|
/*
|
| 1009 |
|
|
* Status Info
|
| 1010 |
|
|
*/
|
| 1011 |
|
|
typedef struct ips_stat {
|
| 1012 |
|
|
uint32_t residue_len;
|
| 1013 |
|
|
void *scb_addr;
|
| 1014 |
|
|
uint8_t padding[12 - sizeof(void *)];
|
| 1015 |
|
|
} ips_stat_t;
|
| 1016 |
|
|
|
| 1017 |
|
|
/*
|
| 1018 |
|
|
* SCB Queue Format
|
| 1019 |
|
|
*/
|
| 1020 |
|
|
typedef struct ips_scb_queue {
|
| 1021 |
|
|
struct ips_scb *head;
|
| 1022 |
|
|
struct ips_scb *tail;
|
| 1023 |
|
|
int count;
|
| 1024 |
|
|
} ips_scb_queue_t;
|
| 1025 |
|
|
|
| 1026 |
|
|
/*
|
| 1027 |
|
|
* Wait queue_format
|
| 1028 |
|
|
*/
|
| 1029 |
|
|
typedef struct ips_wait_queue {
|
| 1030 |
|
|
Scsi_Cmnd *head;
|
| 1031 |
|
|
Scsi_Cmnd *tail;
|
| 1032 |
|
|
int count;
|
| 1033 |
|
|
} ips_wait_queue_t;
|
| 1034 |
|
|
|
| 1035 |
|
|
typedef struct ips_copp_wait_item {
|
| 1036 |
|
|
Scsi_Cmnd *scsi_cmd;
|
| 1037 |
|
|
struct ips_copp_wait_item *next;
|
| 1038 |
|
|
} ips_copp_wait_item_t;
|
| 1039 |
|
|
|
| 1040 |
|
|
typedef struct ips_copp_queue {
|
| 1041 |
|
|
struct ips_copp_wait_item *head;
|
| 1042 |
|
|
struct ips_copp_wait_item *tail;
|
| 1043 |
|
|
int count;
|
| 1044 |
|
|
} ips_copp_queue_t;
|
| 1045 |
|
|
|
| 1046 |
|
|
/* forward decl for host structure */
|
| 1047 |
|
|
struct ips_ha;
|
| 1048 |
|
|
|
| 1049 |
|
|
typedef struct {
|
| 1050 |
|
|
int (*reset)(struct ips_ha *);
|
| 1051 |
|
|
int (*issue)(struct ips_ha *, struct ips_scb *);
|
| 1052 |
|
|
int (*isinit)(struct ips_ha *);
|
| 1053 |
|
|
int (*isintr)(struct ips_ha *);
|
| 1054 |
|
|
int (*init)(struct ips_ha *);
|
| 1055 |
|
|
int (*erasebios)(struct ips_ha *);
|
| 1056 |
|
|
int (*programbios)(struct ips_ha *, char *, uint32_t, uint32_t);
|
| 1057 |
|
|
int (*verifybios)(struct ips_ha *, char *, uint32_t, uint32_t);
|
| 1058 |
|
|
void (*statinit)(struct ips_ha *);
|
| 1059 |
|
|
void (*intr)(struct ips_ha *);
|
| 1060 |
|
|
void (*enableint)(struct ips_ha *);
|
| 1061 |
|
|
uint32_t (*statupd)(struct ips_ha *);
|
| 1062 |
|
|
} ips_hw_func_t;
|
| 1063 |
|
|
|
| 1064 |
|
|
typedef struct ips_ha {
|
| 1065 |
|
|
uint8_t ha_id[IPS_MAX_CHANNELS+1];
|
| 1066 |
|
|
uint32_t dcdb_active[IPS_MAX_CHANNELS];
|
| 1067 |
|
|
uint32_t io_addr; /* Base I/O address */
|
| 1068 |
|
|
uint8_t irq; /* IRQ for adapter */
|
| 1069 |
|
|
uint8_t ntargets; /* Number of targets */
|
| 1070 |
|
|
uint8_t nbus; /* Number of buses */
|
| 1071 |
|
|
uint8_t nlun; /* Number of Luns */
|
| 1072 |
|
|
uint16_t ad_type; /* Adapter type */
|
| 1073 |
|
|
uint16_t host_num; /* Adapter number */
|
| 1074 |
|
|
uint32_t max_xfer; /* Maximum Xfer size */
|
| 1075 |
|
|
uint32_t max_cmds; /* Max concurrent commands */
|
| 1076 |
|
|
uint32_t num_ioctl; /* Number of Ioctls */
|
| 1077 |
|
|
ips_stat_t sp; /* Status packer pointer */
|
| 1078 |
|
|
struct ips_scb *scbs; /* Array of all CCBS */
|
| 1079 |
|
|
struct ips_scb *scb_freelist; /* SCB free list */
|
| 1080 |
|
|
ips_wait_queue_t scb_waitlist; /* Pending SCB list */
|
| 1081 |
|
|
ips_copp_queue_t copp_waitlist; /* Pending PT list */
|
| 1082 |
|
|
ips_scb_queue_t scb_activelist; /* Active SCB list */
|
| 1083 |
|
|
IPS_IO_CMD *dummy; /* dummy command */
|
| 1084 |
|
|
IPS_ADAPTER *adapt; /* Adapter status area */
|
| 1085 |
|
|
IPS_LD_INFO *logical_drive_info; /* Logical Drive Info */
|
| 1086 |
|
|
dma_addr_t logical_drive_info_dma_addr; /* Logical Drive Info DMA Address */
|
| 1087 |
|
|
IPS_ENQ *enq; /* Adapter Enquiry data */
|
| 1088 |
|
|
IPS_CONF *conf; /* Adapter config data */
|
| 1089 |
|
|
IPS_NVRAM_P5 *nvram; /* NVRAM page 5 data */
|
| 1090 |
|
|
IPS_SUBSYS *subsys; /* Subsystem parameters */
|
| 1091 |
|
|
char *ioctl_data; /* IOCTL data area */
|
| 1092 |
|
|
uint32_t ioctl_datasize; /* IOCTL data size */
|
| 1093 |
|
|
uint32_t cmd_in_progress; /* Current command in progress*/
|
| 1094 |
|
|
int flags; /* */
|
| 1095 |
|
|
uint8_t waitflag; /* are we waiting for cmd */
|
| 1096 |
|
|
uint8_t active;
|
| 1097 |
|
|
int ioctl_reset; /* IOCTL Requested Reset Flag */
|
| 1098 |
|
|
uint16_t reset_count; /* number of resets */
|
| 1099 |
|
|
time_t last_ffdc; /* last time we sent ffdc info*/
|
| 1100 |
|
|
uint8_t revision_id; /* Revision level */
|
| 1101 |
|
|
uint16_t device_id; /* PCI device ID */
|
| 1102 |
|
|
uint8_t slot_num; /* PCI Slot Number */
|
| 1103 |
|
|
uint16_t subdevice_id; /* Subsystem device ID */
|
| 1104 |
|
|
int ioctl_len; /* size of ioctl buffer */
|
| 1105 |
|
|
dma_addr_t ioctl_busaddr; /* dma address of ioctl buffer*/
|
| 1106 |
|
|
uint8_t bios_version[8]; /* BIOS Revision */
|
| 1107 |
|
|
uint32_t mem_addr; /* Memory mapped address */
|
| 1108 |
|
|
uint32_t io_len; /* Size of IO Address */
|
| 1109 |
|
|
uint32_t mem_len; /* Size of memory address */
|
| 1110 |
|
|
char *mem_ptr; /* Memory mapped Ptr */
|
| 1111 |
|
|
char *ioremap_ptr; /* ioremapped memory pointer */
|
| 1112 |
|
|
ips_hw_func_t func; /* hw function pointers */
|
| 1113 |
|
|
struct pci_dev *pcidev; /* PCI device handle */
|
| 1114 |
|
|
char *flash_data; /* Save Area for flash data */
|
| 1115 |
|
|
int flash_len; /* length of flash buffer */
|
| 1116 |
|
|
u32 flash_datasize; /* Save Area for flash data size */
|
| 1117 |
|
|
dma_addr_t flash_busaddr; /* dma address of flash buffer*/
|
| 1118 |
|
|
dma_addr_t enq_busaddr; /* dma address of enq struct */
|
| 1119 |
|
|
uint8_t requires_esl; /* Requires an EraseStripeLock */
|
| 1120 |
|
|
} ips_ha_t;
|
| 1121 |
|
|
|
| 1122 |
|
|
typedef void (*ips_scb_callback) (ips_ha_t *, struct ips_scb *);
|
| 1123 |
|
|
|
| 1124 |
|
|
/*
|
| 1125 |
|
|
* SCB Format
|
| 1126 |
|
|
*/
|
| 1127 |
|
|
typedef struct ips_scb {
|
| 1128 |
|
|
IPS_HOST_COMMAND cmd;
|
| 1129 |
|
|
IPS_DCDB_TABLE dcdb;
|
| 1130 |
|
|
uint8_t target_id;
|
| 1131 |
|
|
uint8_t bus;
|
| 1132 |
|
|
uint8_t lun;
|
| 1133 |
|
|
uint8_t cdb[12];
|
| 1134 |
|
|
uint32_t scb_busaddr;
|
| 1135 |
|
|
uint32_t old_data_busaddr; // Obsolete field left in to not break utilities
|
| 1136 |
|
|
uint32_t timeout;
|
| 1137 |
|
|
uint8_t basic_status;
|
| 1138 |
|
|
uint8_t extended_status;
|
| 1139 |
|
|
uint8_t breakup;
|
| 1140 |
|
|
uint8_t sg_break;
|
| 1141 |
|
|
uint32_t data_len;
|
| 1142 |
|
|
uint32_t sg_len;
|
| 1143 |
|
|
uint32_t flags;
|
| 1144 |
|
|
uint32_t op_code;
|
| 1145 |
|
|
IPS_SG_LIST sg_list;
|
| 1146 |
|
|
Scsi_Cmnd *scsi_cmd;
|
| 1147 |
|
|
struct ips_scb *q_next;
|
| 1148 |
|
|
ips_scb_callback callback;
|
| 1149 |
|
|
uint32_t sg_busaddr;
|
| 1150 |
|
|
int sg_count;
|
| 1151 |
|
|
dma_addr_t data_busaddr;
|
| 1152 |
|
|
} ips_scb_t;
|
| 1153 |
|
|
|
| 1154 |
|
|
typedef struct ips_scb_pt {
|
| 1155 |
|
|
IPS_HOST_COMMAND cmd;
|
| 1156 |
|
|
IPS_DCDB_TABLE dcdb;
|
| 1157 |
|
|
uint8_t target_id;
|
| 1158 |
|
|
uint8_t bus;
|
| 1159 |
|
|
uint8_t lun;
|
| 1160 |
|
|
uint8_t cdb[12];
|
| 1161 |
|
|
uint32_t scb_busaddr;
|
| 1162 |
|
|
uint32_t data_busaddr;
|
| 1163 |
|
|
uint32_t timeout;
|
| 1164 |
|
|
uint8_t basic_status;
|
| 1165 |
|
|
uint8_t extended_status;
|
| 1166 |
|
|
uint16_t breakup;
|
| 1167 |
|
|
uint32_t data_len;
|
| 1168 |
|
|
uint32_t sg_len;
|
| 1169 |
|
|
uint32_t flags;
|
| 1170 |
|
|
uint32_t op_code;
|
| 1171 |
|
|
IPS_SG_LIST *sg_list;
|
| 1172 |
|
|
Scsi_Cmnd *scsi_cmd;
|
| 1173 |
|
|
struct ips_scb *q_next;
|
| 1174 |
|
|
ips_scb_callback callback;
|
| 1175 |
|
|
} ips_scb_pt_t;
|
| 1176 |
|
|
|
| 1177 |
|
|
/*
|
| 1178 |
|
|
* Passthru Command Format
|
| 1179 |
|
|
*/
|
| 1180 |
|
|
typedef struct {
|
| 1181 |
|
|
uint8_t CoppID[4];
|
| 1182 |
|
|
uint32_t CoppCmd;
|
| 1183 |
|
|
uint32_t PtBuffer;
|
| 1184 |
|
|
uint8_t *CmdBuffer;
|
| 1185 |
|
|
uint32_t CmdBSize;
|
| 1186 |
|
|
ips_scb_pt_t CoppCP;
|
| 1187 |
|
|
uint32_t TimeOut;
|
| 1188 |
|
|
uint8_t BasicStatus;
|
| 1189 |
|
|
uint8_t ExtendedStatus;
|
| 1190 |
|
|
uint8_t AdapterType;
|
| 1191 |
|
|
uint8_t reserved;
|
| 1192 |
|
|
} ips_passthru_t;
|
| 1193 |
|
|
|
| 1194 |
|
|
#endif
|
| 1195 |
|
|
|
| 1196 |
|
|
/* The Version Information below gets created by SED during the build process. */
|
| 1197 |
|
|
/* Do not modify the next line; it's what SED is looking for to do the insert. */
|
| 1198 |
|
|
/* Version Info */
|
| 1199 |
|
|
/*************************************************************************
|
| 1200 |
|
|
*
|
| 1201 |
|
|
* VERSION.H -- version numbers and copyright notices in various formats
|
| 1202 |
|
|
*
|
| 1203 |
|
|
*************************************************************************/
|
| 1204 |
|
|
|
| 1205 |
|
|
#define IPS_VER_MAJOR 6
|
| 1206 |
|
|
#define IPS_VER_MAJOR_STRING "6"
|
| 1207 |
|
|
#define IPS_VER_MINOR 11
|
| 1208 |
|
|
#define IPS_VER_MINOR_STRING "11"
|
| 1209 |
|
|
#define IPS_VER_BUILD 07
|
| 1210 |
|
|
#define IPS_VER_BUILD_STRING "07"
|
| 1211 |
|
|
#define IPS_VER_STRING "6.11.07"
|
| 1212 |
|
|
#define IPS_RELEASE_ID 0x00010001
|
| 1213 |
|
|
#define IPS_BUILD_IDENT 2224
|
| 1214 |
|
|
#define IPS_LEGALCOPYRIGHT_STRING "(C) Copyright IBM Corp. 1994, 2003. All Rights Reserved."
|
| 1215 |
|
|
#define IPS_ADAPTECCOPYRIGHT_STRING "(c) Copyright Adaptec, Inc. 2002 to present. All Rights Reserved."
|
| 1216 |
|
|
#define IPS_NT_LEGALCOPYRIGHT_STRING "(C) Copyright IBM Corp. 1994, 2003."
|
| 1217 |
|
|
|
| 1218 |
|
|
/* Version numbers for various adapters */
|
| 1219 |
|
|
#define IPS_VER_SERVERAID1 "2.25.01"
|
| 1220 |
|
|
#define IPS_VER_SERVERAID2 "2.88.13"
|
| 1221 |
|
|
#define IPS_VER_NAVAJO "2.88.13"
|
| 1222 |
|
|
#define IPS_VER_SERVERAID3 "6.10.24"
|
| 1223 |
|
|
#define IPS_VER_SERVERAID4H "6.11.07"
|
| 1224 |
|
|
#define IPS_VER_SERVERAID4MLx "6.11.07"
|
| 1225 |
|
|
#define IPS_VER_SARASOTA "6.11.07"
|
| 1226 |
|
|
#define IPS_VER_MARCO "6.11.07"
|
| 1227 |
|
|
#define IPS_VER_SEBRING "6.11.07"
|
| 1228 |
|
|
|
| 1229 |
|
|
/* Compatability IDs for various adapters */
|
| 1230 |
|
|
#define IPS_COMPAT_UNKNOWN ""
|
| 1231 |
|
|
#define IPS_COMPAT_CURRENT "SB610"
|
| 1232 |
|
|
#define IPS_COMPAT_SERVERAID1 "2.25.01"
|
| 1233 |
|
|
#define IPS_COMPAT_SERVERAID2 "2.88.13"
|
| 1234 |
|
|
#define IPS_COMPAT_NAVAJO "2.88.13"
|
| 1235 |
|
|
#define IPS_COMPAT_KIOWA "2.88.13"
|
| 1236 |
|
|
#define IPS_COMPAT_SERVERAID3H "SB610"
|
| 1237 |
|
|
#define IPS_COMPAT_SERVERAID3L "SB610"
|
| 1238 |
|
|
#define IPS_COMPAT_SERVERAID4H "SB610"
|
| 1239 |
|
|
#define IPS_COMPAT_SERVERAID4M "SB610"
|
| 1240 |
|
|
#define IPS_COMPAT_SERVERAID4L "SB610"
|
| 1241 |
|
|
#define IPS_COMPAT_SERVERAID4Mx "SB610"
|
| 1242 |
|
|
#define IPS_COMPAT_SERVERAID4Lx "SB610"
|
| 1243 |
|
|
#define IPS_COMPAT_SARASOTA "SB610"
|
| 1244 |
|
|
#define IPS_COMPAT_MARCO "SB610"
|
| 1245 |
|
|
#define IPS_COMPAT_SEBRING "SB610"
|
| 1246 |
|
|
#define IPS_COMPAT_BIOS "SB610"
|
| 1247 |
|
|
|
| 1248 |
|
|
#define IPS_COMPAT_MAX_ADAPTER_TYPE 16
|
| 1249 |
|
|
#define IPS_COMPAT_ID_LENGTH 8
|
| 1250 |
|
|
|
| 1251 |
|
|
#define IPS_DEFINE_COMPAT_TABLE(tablename) \
|
| 1252 |
|
|
char tablename[IPS_COMPAT_MAX_ADAPTER_TYPE] [IPS_COMPAT_ID_LENGTH] = { \
|
| 1253 |
|
|
IPS_COMPAT_UNKNOWN, \
|
| 1254 |
|
|
IPS_COMPAT_SERVERAID1, \
|
| 1255 |
|
|
IPS_COMPAT_SERVERAID2, \
|
| 1256 |
|
|
IPS_COMPAT_NAVAJO, \
|
| 1257 |
|
|
IPS_COMPAT_KIOWA, \
|
| 1258 |
|
|
IPS_COMPAT_SERVERAID3H, \
|
| 1259 |
|
|
IPS_COMPAT_SERVERAID3L, \
|
| 1260 |
|
|
IPS_COMPAT_SERVERAID4H, \
|
| 1261 |
|
|
IPS_COMPAT_SERVERAID4M, \
|
| 1262 |
|
|
IPS_COMPAT_SERVERAID4L, \
|
| 1263 |
|
|
IPS_COMPAT_SERVERAID4Mx, \
|
| 1264 |
|
|
IPS_COMPAT_SERVERAID4Lx, \
|
| 1265 |
|
|
IPS_COMPAT_SARASOTA, /* one-channel variety of SARASOTA */ \
|
| 1266 |
|
|
IPS_COMPAT_SARASOTA, /* two-channel variety of SARASOTA */ \
|
| 1267 |
|
|
IPS_COMPAT_MARCO, \
|
| 1268 |
|
|
IPS_COMPAT_SEBRING \
|
| 1269 |
|
|
}
|
| 1270 |
|
|
|
| 1271 |
|
|
|
| 1272 |
|
|
/*
|
| 1273 |
|
|
* Overrides for Emacs so that we almost follow Linus's tabbing style.
|
| 1274 |
|
|
* Emacs will notice this stuff at the end of the file and automatically
|
| 1275 |
|
|
* adjust the settings for this buffer only. This must remain at the end
|
| 1276 |
|
|
* of the file.
|
| 1277 |
|
|
* ---------------------------------------------------------------------------
|
| 1278 |
|
|
* Local variables:
|
| 1279 |
|
|
* c-indent-level: 2
|
| 1280 |
|
|
* c-brace-imaginary-offset: 0
|
| 1281 |
|
|
* c-brace-offset: -2
|
| 1282 |
|
|
* c-argdecl-indent: 2
|
| 1283 |
|
|
* c-label-offset: -2
|
| 1284 |
|
|
* c-continued-statement-offset: 2
|
| 1285 |
|
|
* c-continued-brace-offset: 0
|
| 1286 |
|
|
* indent-tabs-mode: nil
|
| 1287 |
|
|
* tab-width: 8
|
| 1288 |
|
|
* End:
|
| 1289 |
|
|
*/
|
