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[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [drivers/] [scsi/] [psi_chip.h] - Blame information for rev 1774

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1 1275 phoenix
/*+M*************************************************************************
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 * Perceptive Solutions, Inc. PSI-240I device driver proc support for Linux.
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 *
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 * Copyright (c) 1997 Perceptive Solutions, Inc.
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License as published by
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 * the Free Software Foundation; either version 2, or (at your option)
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 * any later version.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 *
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 * You should have received a copy of the GNU General Public License
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 * along with this program; see the file COPYING.  If not, write to
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 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
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 *
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 *
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 *      File Name:      psi_chip.h
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 *
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 *      Description:    This file contains the interface defines and
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 *                                      error codes.
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 *
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 *-M*************************************************************************/
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#ifndef PSI_CHIP
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#define PSI_CHIP
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/************************************************/
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/*              Misc konstants                                                  */
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/************************************************/
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#define CHIP_MAXDRIVES                  8
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/************************************************/
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/*              Chip I/O addresses                                              */
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/************************************************/
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#define CHIP_ADRS_0                             0x0130
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#define CHIP_ADRS_1                             0x0150
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#define CHIP_ADRS_2                             0x0190
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#define CHIP_ADRS_3                             0x0210
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#define CHIP_ADRS_4                             0x0230
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#define CHIP_ADRS_5                             0x0250
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/************************************************/
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/*              EEPROM locations                */
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/************************************************/
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#define CHIP_EEPROM_BIOS                0x0000          // BIOS base address
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#define CHIP_EEPROM_DATA                0x2000          // SETUP data base address
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#define CHIP_EEPROM_FACTORY             0x2400          // FACTORY data base address
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#define CHIP_EEPROM_SETUP               0x3000          // SETUP PROGRAM base address
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#define CHIP_EEPROM_SIZE                32768U          // size of the entire EEPROM
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#define CHIP_EEPROM_BIOS_SIZE   8192            // size of the BIOS in bytes
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#define CHIP_EEPROM_DATA_SIZE   4096            // size of factory, setup, log data block in bytes
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#define CHIP_EEPROM_SETUP_SIZE  20480U          // size of the setup program in bytes
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/************************************************/
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/*              Chip Interrupts                                                 */
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/************************************************/
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#define CHIP_IRQ_10                             0x72
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#define CHIP_IRQ_11                             0x73
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#define CHIP_IRQ_12                             0x74
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/************************************************/
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/*              Chip Setup addresses            */
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/************************************************/
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#define CHIP_SETUP_BASE                 0x0000C000L
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/************************************************/
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/*              Chip Register address offsets   */
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/************************************************/
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#define REG_DATA                                0x00
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#define REG_ERROR                               0x01
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#define REG_SECTOR_COUNT                0x02
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#define REG_LBA_0                               0x03
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#define REG_LBA_8                               0x04
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#define REG_LBA_16                              0x05
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#define REG_LBA_24                              0x06
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#define REG_STAT_CMD                    0x07
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#define REG_SEL_FAIL                    0x08
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#define REG_IRQ_STATUS                  0x09
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#define REG_ADDRESS                             0x0A
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#define REG_FAIL                                0x0C
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#define REG_ALT_STAT                    0x0E
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#define REG_DRIVE_ADRS                  0x0F
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/************************************************/
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/*              Chip RAM locations              */
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/************************************************/
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#define CHIP_DEVICE                             0x8000
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#define CHIP_DEVICE_0                   0x8000
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#define CHIP_DEVICE_1                   0x8008
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#define CHIP_DEVICE_2                   0x8010
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#define CHIP_DEVICE_3                   0x8018
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#define CHIP_DEVICE_4                   0x8020
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#define CHIP_DEVICE_5                   0x8028
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#define CHIP_DEVICE_6                   0x8030
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#define CHIP_DEVICE_7                   0x8038
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typedef struct
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        {
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        UCHAR   channel;                // channel of this device (0-8).
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        UCHAR   spt;                    // Sectors Per Track.
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        ULONG   spc;                    // Sectors Per Cylinder.
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        }       CHIP_DEVICE_N;
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#define CHIP_CONFIG                             0x8100          // address of boards configuration.
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typedef struct
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        {
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        UCHAR           irq;                    // interrupt request channel number
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        UCHAR           numDrives;              // Number of accessable drives
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        UCHAR           fastFormat;             // Boolean for fast format enable
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        }       CHIP_CONFIG_N;
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#define CHIP_MAP                                0x8108          // eight byte device type map.
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#define CHIP_RAID                               0x8120          // array of RAID signature structures and LBA
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#define CHIP_RAID_1                             0x8120
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#define CHIP_RAID_2                             0x8130
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#define CHIP_RAID_3                             0x8140
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#define CHIP_RAID_4                             0x8150
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/************************************************/
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/*              Chip Register Masks             */
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/************************************************/
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#define CHIP_ID                                 0x7B
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#define SEL_RAM                                 0x8000
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#define MASK_FAIL                               0x80
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/************************************************/
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/*              Chip cable select bits          */
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/************************************************/
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#define SECTORSXFER                             8
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/************************************************/
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/*              Chip cable select bits          */
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/************************************************/
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#define SEL_NONE                                0x00
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#define SEL_1                                   0x01
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#define SEL_2                                   0x02
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#define SEL_3                                   0x04
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#define SEL_4                                   0x08
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/************************************************/
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/*              Programmable Interrupt Controller*/
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/************************************************/
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#define PIC1                                    0x20            // first 8259 base port address
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#define PIC2                                    0xA0            // second 8259 base port address
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#define INT_OCW1                                1                       // Operation Control Word 1: IRQ mask
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#define EOI                                             0x20            // non-specific end-of-interrupt
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/************************************************/
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/*              Device/Geometry controls                                */
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/************************************************/
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#define GEOMETRY_NONE                   0x0                     // No device
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#define GEOMETRY_AUTO                   0x1                     // Geometry set automatically
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#define GEOMETRY_USER                   0x2                     // User supplied geometry
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#define DEVICE_NONE                             0x0                     // No device present
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#define DEVICE_INACTIVE                 0x1                     // device present but not registered active
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#define DEVICE_ATAPI                    0x2                     // ATAPI device (CD_ROM, Tape, Etc...)
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#define DEVICE_DASD_NONLBA              0x3                     // Non LBA incompatible device
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#define DEVICE_DASD_LBA                 0x4                     // LBA compatible device
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/************************************************/
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/*              Setup Structure Definitions     */
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/************************************************/
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typedef struct                                                  // device setup parameters
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        {
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        UCHAR                   geometryControl;        // geometry control flags
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        UCHAR                   device;                         // device code
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        USHORT                  sectors;                        // number of sectors per track
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        USHORT                  heads;                          // number of heads
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        USHORT                  cylinders;                      // number of cylinders for this device
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        ULONG                   blocks;                         // number of blocks on device
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        USHORT                  spare1;
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        USHORT                  spare2;
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        } SETUP_DEVICE, *PSETUP_DEVICE;
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typedef struct          // master setup structure
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        {
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        USHORT                  startupDelay;
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        USHORT                  promptBIOS;
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        USHORT                  fastFormat;
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        USHORT                  spare2;
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        USHORT                  spare3;
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        USHORT                  spare4;
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        USHORT                  spare5;
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        USHORT                  spare6;
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        SETUP_DEVICE    setupDevice[8];
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        }       SETUP, *PSETUP;
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#endif
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