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1275 |
phoenix |
/*****************************************************************************/
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/*
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* cmpci.c -- C-Media PCI audio driver.
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*
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* Copyright (C) 1999 ChenLi Tien (cltien@cmedia.com.tw)
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* C-media support (support@cmedia.com.tw)
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*
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* Based on the PCI drivers by Thomas Sailer (sailer@ife.ee.ethz.ch)
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*
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* For update, visit:
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* http://members.home.net/puresoft/cmedia.html
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* http://www.cmedia.com.tw
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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* Special thanks to David C. Niemi, Jan Pfeifer
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*
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*
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* Module command line parameters:
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* none so far
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*
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*
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* Supported devices:
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* /dev/dsp standard /dev/dsp device, (mostly) OSS compatible
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* /dev/mixer standard /dev/mixer device, (mostly) OSS compatible
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* /dev/midi simple MIDI UART interface, no ioctl
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*
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* The card has both an FM and a Wavetable synth, but I have to figure
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* out first how to drive them...
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*
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* Revision history
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* 06.05.98 0.1 Initial release
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* 10.05.98 0.2 Fixed many bugs, esp. ADC rate calculation
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* First stab at a simple midi interface (no bells&whistles)
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* 13.05.98 0.3 Fix stupid cut&paste error: set_adc_rate was called instead of
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* set_dac_rate in the FMODE_WRITE case in cm_open
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* Fix hwptr out of bounds (now mpg123 works)
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* 14.05.98 0.4 Don't allow excessive interrupt rates
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* 08.06.98 0.5 First release using Alan Cox' soundcore instead of miscdevice
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* 03.08.98 0.6 Do not include modversions.h
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* Now mixer behaviour can basically be selected between
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* "OSS documented" and "OSS actual" behaviour
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* 31.08.98 0.7 Fix realplayer problems - dac.count issues
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* 10.12.98 0.8 Fix drain_dac trying to wait on not yet initialized DMA
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* 16.12.98 0.9 Fix a few f_file & FMODE_ bugs
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* 06.01.99 0.10 remove the silly SA_INTERRUPT flag.
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* hopefully killed the egcs section type conflict
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* 12.03.99 0.11 cinfo.blocks should be reset after GETxPTR ioctl.
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* reported by Johan Maes <joma@telindus.be>
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* 22.03.99 0.12 return EAGAIN instead of EBUSY when O_NONBLOCK
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* read/write cannot be executed
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* 18.08.99 1.5 Only deallocate DMA buffer when unloading.
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* 02.09.99 1.6 Enable SPDIF LOOP
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* Change the mixer read back
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* 21.09.99 2.33 Use RCS version as driver version.
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* Add support for modem, S/PDIF loop and 4 channels.
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* (8738 only)
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* Fix bug cause x11amp cannot play.
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*
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* Fixes:
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* Arnaldo Carvalho de Melo <acme@conectiva.com.br>
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* 18/05/2001 - .bss nitpicks, fix a bug in set_dac_channels where it
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* was calling prog_dmabuf with s->lock held, call missing
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* unlock_kernel in cm_midi_release
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* 08/10/2001 - use set_current_state in some more places
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*
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* Carlos Eduardo Gorges <carlos@techlinux.com.br>
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* Fri May 25 2001
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* - SMP support ( spin[un]lock* revision )
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* - speaker mixer support
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* Mon Aug 13 2001
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* - optimizations and cleanups
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* 03/01/2003 - open_mode fixes from Georg Acher <acher@in.tum.de>
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*
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*/
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/*****************************************************************************/
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#include <linux/version.h>
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#include <linux/config.h>
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#include <linux/module.h>
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#include <linux/string.h>
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#include <linux/ioport.h>
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#include <linux/sched.h>
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#include <linux/delay.h>
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#include <linux/sound.h>
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#include <linux/slab.h>
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#include <linux/soundcard.h>
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#include <linux/pci.h>
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#include <asm/io.h>
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#include <asm/dma.h>
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#include <linux/init.h>
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#include <linux/poll.h>
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#include <linux/spinlock.h>
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#include <linux/smp_lock.h>
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#include <linux/wrapper.h>
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#include <asm/uaccess.h>
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#include <asm/hardirq.h>
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#include <linux/gameport.h>
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#include <linux/bitops.h>
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#include "dm.h"
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/* --------------------------------------------------------------------- */
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#undef OSS_DOCUMENTED_MIXER_SEMANTICS
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#undef DMABYTEIO
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/* --------------------------------------------------------------------- */
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#define CM_MAGIC ((PCI_VENDOR_ID_CMEDIA<<16)|PCI_DEVICE_ID_CMEDIA_CM8338A)
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/* CM8338 registers definition ****************/
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#define CODEC_CMI_FUNCTRL0 (0x00)
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#define CODEC_CMI_FUNCTRL1 (0x04)
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#define CODEC_CMI_CHFORMAT (0x08)
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#define CODEC_CMI_INT_HLDCLR (0x0C)
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#define CODEC_CMI_INT_STATUS (0x10)
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#define CODEC_CMI_LEGACY_CTRL (0x14)
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#define CODEC_CMI_MISC_CTRL (0x18)
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#define CODEC_CMI_TDMA_POS (0x1C)
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#define CODEC_CMI_MIXER (0x20)
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#define CODEC_SB16_DATA (0x22)
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#define CODEC_SB16_ADDR (0x23)
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#define CODEC_CMI_MIXER1 (0x24)
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#define CODEC_CMI_MIXER2 (0x25)
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#define CODEC_CMI_AUX_VOL (0x26)
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#define CODEC_CMI_MISC (0x27)
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#define CODEC_CMI_AC97 (0x28)
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#define CODEC_CMI_CH0_FRAME1 (0x80)
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#define CODEC_CMI_CH0_FRAME2 (0x84)
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#define CODEC_CMI_CH1_FRAME1 (0x88)
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#define CODEC_CMI_CH1_FRAME2 (0x8C)
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#define CODEC_CMI_EXT_REG (0xF0)
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/* Mixer registers for SB16 ******************/
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#define DSP_MIX_DATARESETIDX ((unsigned char)(0x00))
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#define DSP_MIX_MASTERVOLIDX_L ((unsigned char)(0x30))
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#define DSP_MIX_MASTERVOLIDX_R ((unsigned char)(0x31))
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#define DSP_MIX_VOICEVOLIDX_L ((unsigned char)(0x32))
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#define DSP_MIX_VOICEVOLIDX_R ((unsigned char)(0x33))
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#define DSP_MIX_FMVOLIDX_L ((unsigned char)(0x34))
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#define DSP_MIX_FMVOLIDX_R ((unsigned char)(0x35))
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#define DSP_MIX_CDVOLIDX_L ((unsigned char)(0x36))
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#define DSP_MIX_CDVOLIDX_R ((unsigned char)(0x37))
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#define DSP_MIX_LINEVOLIDX_L ((unsigned char)(0x38))
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#define DSP_MIX_LINEVOLIDX_R ((unsigned char)(0x39))
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#define DSP_MIX_MICVOLIDX ((unsigned char)(0x3A))
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#define DSP_MIX_SPKRVOLIDX ((unsigned char)(0x3B))
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#define DSP_MIX_OUTMIXIDX ((unsigned char)(0x3C))
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#define DSP_MIX_ADCMIXIDX_L ((unsigned char)(0x3D))
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#define DSP_MIX_ADCMIXIDX_R ((unsigned char)(0x3E))
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#define DSP_MIX_INGAINIDX_L ((unsigned char)(0x3F))
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#define DSP_MIX_INGAINIDX_R ((unsigned char)(0x40))
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#define DSP_MIX_OUTGAINIDX_L ((unsigned char)(0x41))
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#define DSP_MIX_OUTGAINIDX_R ((unsigned char)(0x42))
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#define DSP_MIX_AGCIDX ((unsigned char)(0x43))
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#define DSP_MIX_TREBLEIDX_L ((unsigned char)(0x44))
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#define DSP_MIX_TREBLEIDX_R ((unsigned char)(0x45))
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#define DSP_MIX_BASSIDX_L ((unsigned char)(0x46))
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#define DSP_MIX_BASSIDX_R ((unsigned char)(0x47))
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#define DSP_MIX_EXTENSION ((unsigned char)(0xf0))
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// pseudo register for AUX
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#define DSP_MIX_AUXVOL_L ((unsigned char)(0x50))
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#define DSP_MIX_AUXVOL_R ((unsigned char)(0x51))
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// I/O length
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#define CM_EXTENT_CODEC 0x100
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#define CM_EXTENT_MIDI 0x2
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#define CM_EXTENT_SYNTH 0x4
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#define CM_EXTENT_GAME 0x8
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// Function Control Register 0 (00h)
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#define CHADC0 0x01
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#define CHADC1 0x02
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#define PAUSE0 0x04
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#define PAUSE1 0x08
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// Function Control Register 0+2 (02h)
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#define CHEN0 0x01
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#define CHEN1 0x02
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#define RST_CH0 0x04
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#define RST_CH1 0x08
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// Function Control Register 1 (04h)
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#define JYSTK_EN 0x02
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#define UART_EN 0x04
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#define SPDO2DAC 0x40
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#define SPDFLOOP 0x80
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// Function Control Register 1+1 (05h)
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#define SPDF_0 0x01
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#define SPDF_1 0x02
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#define ASFC 0xe0
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#define DSFC 0x1c
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#define SPDIF2DAC (SPDF_0 << 8 | SPDO2DAC)
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// Channel Format Register (08h)
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#define CM_CFMT_STEREO 0x01
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#define CM_CFMT_16BIT 0x02
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#define CM_CFMT_MASK 0x03
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#define POLVALID 0x20
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#define INVSPDIFI 0x80
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// Channel Format Register+2 (0ah)
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#define SPD24SEL 0x20
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// Channel Format Register+3 (0bh)
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#define CHB3D 0x20
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#define CHB3D5C 0x80
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// Interrupt Hold/Clear Register+2 (0eh)
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#define CH0_INT_EN 0x01
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#define CH1_INT_EN 0x02
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// Interrupt Register (10h)
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#define CHINT0 0x01
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#define CHINT1 0x02
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#define CH0BUSY 0x04
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#define CH1BUSY 0x08
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// Legacy Control/Status Register+1 (15h)
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#define EXBASEN 0x10
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#define BASE2LIN 0x20
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#define CENTR2LIN 0x40
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#define CB2LIN (BASE2LIN|CENTR2LIN)
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#define CHB3D6C 0x80
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// Legacy Control/Status Register+2 (16h)
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#define DAC2SPDO 0x20
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#define SPDCOPYRHT 0x40
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#define ENSPDOUT 0x80
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254 |
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// Legacy Control/Status Register+3 (17h)
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#define FMSEL 0x03
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#define VSBSEL 0x0c
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#define VMPU 0x60
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#define NXCHG 0x80
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260 |
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// Miscellaneous Control Register (18h)
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#define REAR2LIN 0x20
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#define MUTECH1 0x40
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#define ENCENTER 0x80
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265 |
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// Miscellaneous Control Register+1 (19h)
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#define SELSPDIFI2 0x01
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#define SPDF_AC97 0x80
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269 |
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// Miscellaneous Control Register+2 (1ah)
|
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#define AC3_EN 0x04
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271 |
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#define FM_EN 0x08
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272 |
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#define SPD32SEL 0x20
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273 |
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#define XCHGDAC 0x40
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274 |
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#define ENDBDAC 0x80
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275 |
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276 |
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// Miscellaneous Control Register+3 (1bh)
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277 |
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#define SPDIFI48K 0x01
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278 |
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#define SPDO5V 0x02
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279 |
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#define N4SPK3D 0x04
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#define RESET 0x40
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281 |
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#define PWD 0x80
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#define SPDIF48K (SPDIFI48K << 24 | SPDF_AC97 << 8)
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283 |
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284 |
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// Mixer1 (24h)
|
285 |
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#define CDPLAY 0x01
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286 |
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#define X3DEN 0x02
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#define REAR2FRONT 0x10
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#define SPK4 0x20
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289 |
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#define WSMUTE 0x40
|
290 |
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|
291 |
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// Miscellaneous Register (27h)
|
292 |
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#define SPDVALID 0x02
|
293 |
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#define CENTR2MIC 0x04
|
294 |
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|
295 |
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#define CM_CFMT_DACSHIFT 0
|
296 |
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#define CM_CFMT_ADCSHIFT 2
|
297 |
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#define CM_FREQ_DACSHIFT 2
|
298 |
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#define CM_FREQ_ADCSHIFT 5
|
299 |
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#define RSTDAC RST_CH0
|
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#define RSTADC RST_CH1
|
301 |
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#define ENDAC CHEN0
|
302 |
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#define ENADC CHEN1
|
303 |
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#define PAUSEDAC PAUSE0
|
304 |
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#define PAUSEADC PAUSE1
|
305 |
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#define CODEC_CMI_DAC_FRAME1 CODEC_CMI_CH0_FRAME1
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#define CODEC_CMI_DAC_FRAME2 CODEC_CMI_CH0_FRAME2
|
307 |
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#define CODEC_CMI_ADC_FRAME1 CODEC_CMI_CH1_FRAME1
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#define CODEC_CMI_ADC_FRAME2 CODEC_CMI_CH1_FRAME2
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309 |
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#define DACINT CHINT0
|
310 |
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#define ADCINT CHINT1
|
311 |
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#define DACBUSY CH0BUSY
|
312 |
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#define ADCBUSY CH1BUSY
|
313 |
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#define ENDACINT CH0_INT_EN
|
314 |
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#define ENADCINT CH1_INT_EN
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315 |
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|
316 |
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static const unsigned sample_size[] = { 1, 2, 2, 4 };
|
317 |
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static const unsigned sample_shift[] = { 0, 1, 1, 2 };
|
318 |
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|
319 |
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/* MIDI buffer sizes **************************/
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320 |
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|
321 |
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#define MIDIINBUF 256
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322 |
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#define MIDIOUTBUF 256
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323 |
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|
324 |
|
|
#define FMODE_MIDI_SHIFT 2
|
325 |
|
|
#define FMODE_MIDI_READ (FMODE_READ << FMODE_MIDI_SHIFT)
|
326 |
|
|
#define FMODE_MIDI_WRITE (FMODE_WRITE << FMODE_MIDI_SHIFT)
|
327 |
|
|
|
328 |
|
|
#define FMODE_DMFM 0x10
|
329 |
|
|
|
330 |
|
|
#define SND_DEV_DSP16 5
|
331 |
|
|
|
332 |
|
|
#define NR_DEVICE 3 /* maximum number of devices */
|
333 |
|
|
|
334 |
|
|
static unsigned int devindex = 0;
|
335 |
|
|
|
336 |
|
|
//*********************************************/
|
337 |
|
|
|
338 |
|
|
struct cm_state {
|
339 |
|
|
/* magic */
|
340 |
|
|
unsigned int magic;
|
341 |
|
|
|
342 |
|
|
/* list of cmedia devices */
|
343 |
|
|
struct list_head devs;
|
344 |
|
|
|
345 |
|
|
/* the corresponding pci_dev structure */
|
346 |
|
|
struct pci_dev *dev;
|
347 |
|
|
|
348 |
|
|
int dev_audio; /* soundcore stuff */
|
349 |
|
|
int dev_mixer;
|
350 |
|
|
int dev_midi;
|
351 |
|
|
int dev_dmfm;
|
352 |
|
|
|
353 |
|
|
unsigned int iosb, iobase, iosynth,
|
354 |
|
|
iomidi, iogame, irq; /* hardware resources */
|
355 |
|
|
unsigned short deviceid; /* pci_id */
|
356 |
|
|
|
357 |
|
|
struct { /* mixer stuff */
|
358 |
|
|
unsigned int modcnt;
|
359 |
|
|
unsigned short vol[13];
|
360 |
|
|
} mix;
|
361 |
|
|
|
362 |
|
|
unsigned int rateadc, ratedac; /* wave stuff */
|
363 |
|
|
unsigned char fmt, enable;
|
364 |
|
|
|
365 |
|
|
spinlock_t lock;
|
366 |
|
|
struct semaphore open_sem;
|
367 |
|
|
mode_t open_mode;
|
368 |
|
|
wait_queue_head_t open_wait;
|
369 |
|
|
|
370 |
|
|
struct dmabuf {
|
371 |
|
|
void *rawbuf;
|
372 |
|
|
unsigned rawphys;
|
373 |
|
|
unsigned buforder;
|
374 |
|
|
unsigned numfrag;
|
375 |
|
|
unsigned fragshift;
|
376 |
|
|
unsigned hwptr, swptr;
|
377 |
|
|
unsigned total_bytes;
|
378 |
|
|
int count;
|
379 |
|
|
unsigned error; /* over/underrun */
|
380 |
|
|
wait_queue_head_t wait;
|
381 |
|
|
|
382 |
|
|
unsigned fragsize; /* redundant, but makes calculations easier */
|
383 |
|
|
unsigned dmasize;
|
384 |
|
|
unsigned fragsamples;
|
385 |
|
|
unsigned dmasamples;
|
386 |
|
|
|
387 |
|
|
unsigned mapped:1; /* OSS stuff */
|
388 |
|
|
unsigned ready:1;
|
389 |
|
|
unsigned endcleared:1;
|
390 |
|
|
unsigned ossfragshift;
|
391 |
|
|
int ossmaxfrags;
|
392 |
|
|
unsigned subdivision;
|
393 |
|
|
} dma_dac, dma_adc;
|
394 |
|
|
|
395 |
|
|
struct { /* midi stuff */
|
396 |
|
|
unsigned ird, iwr, icnt;
|
397 |
|
|
unsigned ord, owr, ocnt;
|
398 |
|
|
wait_queue_head_t iwait;
|
399 |
|
|
wait_queue_head_t owait;
|
400 |
|
|
struct timer_list timer;
|
401 |
|
|
unsigned char ibuf[MIDIINBUF];
|
402 |
|
|
unsigned char obuf[MIDIOUTBUF];
|
403 |
|
|
} midi;
|
404 |
|
|
|
405 |
|
|
struct gameport gameport;
|
406 |
|
|
|
407 |
|
|
int chip_version;
|
408 |
|
|
int max_channels;
|
409 |
|
|
int curr_channels;
|
410 |
|
|
int speakers; /* number of speakers */
|
411 |
|
|
int capability; /* HW capability, various for chip versions */
|
412 |
|
|
|
413 |
|
|
int status; /* HW or SW state */
|
414 |
|
|
|
415 |
|
|
int spdif_counter; /* spdif frame counter */
|
416 |
|
|
};
|
417 |
|
|
|
418 |
|
|
/* flags used for capability */
|
419 |
|
|
#define CAN_AC3_HW 0x00000001 /* 037 or later */
|
420 |
|
|
#define CAN_AC3_SW 0x00000002 /* 033 or later */
|
421 |
|
|
#define CAN_AC3 (CAN_AC3_HW | CAN_AC3_SW)
|
422 |
|
|
#define CAN_DUAL_DAC 0x00000004 /* 033 or later */
|
423 |
|
|
#define CAN_MULTI_CH_HW 0x00000008 /* 039 or later */
|
424 |
|
|
#define CAN_MULTI_CH (CAN_MULTI_CH_HW | CAN_DUAL_DAC)
|
425 |
|
|
#define CAN_LINE_AS_REAR 0x00000010 /* 033 or later */
|
426 |
|
|
#define CAN_LINE_AS_BASS 0x00000020 /* 039 or later */
|
427 |
|
|
#define CAN_MIC_AS_BASS 0x00000040 /* 039 or later */
|
428 |
|
|
|
429 |
|
|
/* flags used for status */
|
430 |
|
|
#define DO_AC3_HW 0x00000001
|
431 |
|
|
#define DO_AC3_SW 0x00000002
|
432 |
|
|
#define DO_AC3 (DO_AC3_HW | DO_AC3_SW)
|
433 |
|
|
#define DO_DUAL_DAC 0x00000004
|
434 |
|
|
#define DO_MULTI_CH_HW 0x00000008
|
435 |
|
|
#define DO_MULTI_CH (DO_MULTI_CH_HW | DO_DUAL_DAC)
|
436 |
|
|
#define DO_LINE_AS_REAR 0x00000010 /* 033 or later */
|
437 |
|
|
#define DO_LINE_AS_BASS 0x00000020 /* 039 or later */
|
438 |
|
|
#define DO_MIC_AS_BASS 0x00000040 /* 039 or later */
|
439 |
|
|
#define DO_SPDIF_OUT 0x00000100
|
440 |
|
|
#define DO_SPDIF_IN 0x00000200
|
441 |
|
|
#define DO_SPDIF_LOOP 0x00000400
|
442 |
|
|
|
443 |
|
|
static LIST_HEAD(devs);
|
444 |
|
|
|
445 |
|
|
/* --------------------------------------------------------------------- */
|
446 |
|
|
|
447 |
|
|
static inline unsigned ld2(unsigned int x)
|
448 |
|
|
{
|
449 |
|
|
unsigned exp=16,l=5,r=0;
|
450 |
|
|
static const unsigned num[]={0x2,0x4,0x10,0x100,0x10000};
|
451 |
|
|
|
452 |
|
|
/* num: 2, 4, 16, 256, 65536 */
|
453 |
|
|
/* exp: 1, 2, 4, 8, 16 */
|
454 |
|
|
|
455 |
|
|
while(l--) {
|
456 |
|
|
if( x >= num[l] ) {
|
457 |
|
|
if(num[l]>2) x >>= exp;
|
458 |
|
|
r+=exp;
|
459 |
|
|
}
|
460 |
|
|
exp>>=1;
|
461 |
|
|
}
|
462 |
|
|
|
463 |
|
|
return r;
|
464 |
|
|
}
|
465 |
|
|
|
466 |
|
|
/* --------------------------------------------------------------------- */
|
467 |
|
|
|
468 |
|
|
static void maskb(unsigned int addr, unsigned int mask, unsigned int value)
|
469 |
|
|
{
|
470 |
|
|
outb((inb(addr) & mask) | value, addr);
|
471 |
|
|
}
|
472 |
|
|
|
473 |
|
|
static void maskw(unsigned int addr, unsigned int mask, unsigned int value)
|
474 |
|
|
{
|
475 |
|
|
outw((inw(addr) & mask) | value, addr);
|
476 |
|
|
}
|
477 |
|
|
|
478 |
|
|
static void maskl(unsigned int addr, unsigned int mask, unsigned int value)
|
479 |
|
|
{
|
480 |
|
|
outl((inl(addr) & mask) | value, addr);
|
481 |
|
|
}
|
482 |
|
|
|
483 |
|
|
static void set_dmadac1(struct cm_state *s, unsigned int addr, unsigned int count)
|
484 |
|
|
{
|
485 |
|
|
if (addr)
|
486 |
|
|
outl(addr, s->iobase + CODEC_CMI_ADC_FRAME1);
|
487 |
|
|
outw(count - 1, s->iobase + CODEC_CMI_ADC_FRAME2);
|
488 |
|
|
maskb(s->iobase + CODEC_CMI_FUNCTRL0, ~CHADC1, 0);
|
489 |
|
|
}
|
490 |
|
|
|
491 |
|
|
static void set_dmaadc(struct cm_state *s, unsigned int addr, unsigned int count)
|
492 |
|
|
{
|
493 |
|
|
outl(addr, s->iobase + CODEC_CMI_ADC_FRAME1);
|
494 |
|
|
outw(count - 1, s->iobase + CODEC_CMI_ADC_FRAME2);
|
495 |
|
|
maskb(s->iobase + CODEC_CMI_FUNCTRL0, ~0, CHADC1);
|
496 |
|
|
}
|
497 |
|
|
|
498 |
|
|
static void set_dmadac(struct cm_state *s, unsigned int addr, unsigned int count)
|
499 |
|
|
{
|
500 |
|
|
outl(addr, s->iobase + CODEC_CMI_DAC_FRAME1);
|
501 |
|
|
outw(count - 1, s->iobase + CODEC_CMI_DAC_FRAME2);
|
502 |
|
|
maskb(s->iobase + CODEC_CMI_FUNCTRL0, ~CHADC0, 0);
|
503 |
|
|
if (s->status & DO_DUAL_DAC)
|
504 |
|
|
set_dmadac1(s, 0, count);
|
505 |
|
|
}
|
506 |
|
|
|
507 |
|
|
static void set_countadc(struct cm_state *s, unsigned count)
|
508 |
|
|
{
|
509 |
|
|
outw(count - 1, s->iobase + CODEC_CMI_ADC_FRAME2 + 2);
|
510 |
|
|
}
|
511 |
|
|
|
512 |
|
|
static void set_countdac(struct cm_state *s, unsigned count)
|
513 |
|
|
{
|
514 |
|
|
outw(count - 1, s->iobase + CODEC_CMI_DAC_FRAME2 + 2);
|
515 |
|
|
if (s->status & DO_DUAL_DAC)
|
516 |
|
|
set_countadc(s, count);
|
517 |
|
|
}
|
518 |
|
|
|
519 |
|
|
static unsigned get_dmadac(struct cm_state *s)
|
520 |
|
|
{
|
521 |
|
|
unsigned int curr_addr;
|
522 |
|
|
|
523 |
|
|
curr_addr = inw(s->iobase + CODEC_CMI_DAC_FRAME2) + 1;
|
524 |
|
|
curr_addr <<= sample_shift[(s->fmt >> CM_CFMT_DACSHIFT) & CM_CFMT_MASK];
|
525 |
|
|
curr_addr = s->dma_dac.dmasize - curr_addr;
|
526 |
|
|
|
527 |
|
|
return curr_addr;
|
528 |
|
|
}
|
529 |
|
|
|
530 |
|
|
static unsigned get_dmaadc(struct cm_state *s)
|
531 |
|
|
{
|
532 |
|
|
unsigned int curr_addr;
|
533 |
|
|
|
534 |
|
|
curr_addr = inw(s->iobase + CODEC_CMI_ADC_FRAME2) + 1;
|
535 |
|
|
curr_addr <<= sample_shift[(s->fmt >> CM_CFMT_ADCSHIFT) & CM_CFMT_MASK];
|
536 |
|
|
curr_addr = s->dma_adc.dmasize - curr_addr;
|
537 |
|
|
|
538 |
|
|
return curr_addr;
|
539 |
|
|
}
|
540 |
|
|
|
541 |
|
|
static void wrmixer(struct cm_state *s, unsigned char idx, unsigned char data)
|
542 |
|
|
{
|
543 |
|
|
unsigned char regval, pseudo;
|
544 |
|
|
|
545 |
|
|
// pseudo register
|
546 |
|
|
if (idx == DSP_MIX_AUXVOL_L) {
|
547 |
|
|
data >>= 4;
|
548 |
|
|
data &= 0x0f;
|
549 |
|
|
regval = inb(s->iobase + CODEC_CMI_AUX_VOL) & ~0x0f;
|
550 |
|
|
outb(regval | data, s->iobase + CODEC_CMI_AUX_VOL);
|
551 |
|
|
return;
|
552 |
|
|
}
|
553 |
|
|
if (idx == DSP_MIX_AUXVOL_R) {
|
554 |
|
|
data &= 0xf0;
|
555 |
|
|
regval = inb(s->iobase + CODEC_CMI_AUX_VOL) & ~0xf0;
|
556 |
|
|
outb(regval | data, s->iobase + CODEC_CMI_AUX_VOL);
|
557 |
|
|
return;
|
558 |
|
|
}
|
559 |
|
|
outb(idx, s->iobase + CODEC_SB16_ADDR);
|
560 |
|
|
udelay(10);
|
561 |
|
|
// pseudo bits
|
562 |
|
|
if (idx == DSP_MIX_OUTMIXIDX) {
|
563 |
|
|
pseudo = data & ~0x1f;
|
564 |
|
|
pseudo >>= 1;
|
565 |
|
|
regval = inb(s->iobase + CODEC_CMI_MIXER2) & ~0x30;
|
566 |
|
|
outb(regval | pseudo, s->iobase + CODEC_CMI_MIXER2);
|
567 |
|
|
}
|
568 |
|
|
if (idx == DSP_MIX_ADCMIXIDX_L) {
|
569 |
|
|
pseudo = data & 0x80;
|
570 |
|
|
pseudo >>= 1;
|
571 |
|
|
regval = inb(s->iobase + CODEC_CMI_MIXER2) & ~0x40;
|
572 |
|
|
outb(regval | pseudo, s->iobase + CODEC_CMI_MIXER2);
|
573 |
|
|
}
|
574 |
|
|
if (idx == DSP_MIX_ADCMIXIDX_R) {
|
575 |
|
|
pseudo = data & 0x80;
|
576 |
|
|
regval = inb(s->iobase + CODEC_CMI_MIXER2) & ~0x80;
|
577 |
|
|
outb(regval | pseudo, s->iobase + CODEC_CMI_MIXER2);
|
578 |
|
|
}
|
579 |
|
|
outb(data, s->iobase + CODEC_SB16_DATA);
|
580 |
|
|
udelay(10);
|
581 |
|
|
}
|
582 |
|
|
|
583 |
|
|
static unsigned char rdmixer(struct cm_state *s, unsigned char idx)
|
584 |
|
|
{
|
585 |
|
|
unsigned char v, pseudo;
|
586 |
|
|
|
587 |
|
|
// pseudo register
|
588 |
|
|
if (idx == DSP_MIX_AUXVOL_L) {
|
589 |
|
|
v = inb(s->iobase + CODEC_CMI_AUX_VOL) & 0x0f;
|
590 |
|
|
v <<= 4;
|
591 |
|
|
return v;
|
592 |
|
|
}
|
593 |
|
|
if (idx == DSP_MIX_AUXVOL_L) {
|
594 |
|
|
v = inb(s->iobase + CODEC_CMI_AUX_VOL) & 0xf0;
|
595 |
|
|
return v;
|
596 |
|
|
}
|
597 |
|
|
outb(idx, s->iobase + CODEC_SB16_ADDR);
|
598 |
|
|
udelay(10);
|
599 |
|
|
v = inb(s->iobase + CODEC_SB16_DATA);
|
600 |
|
|
udelay(10);
|
601 |
|
|
// pseudo bits
|
602 |
|
|
if (idx == DSP_MIX_OUTMIXIDX) {
|
603 |
|
|
pseudo = inb(s->iobase + CODEC_CMI_MIXER2) & 0x30;
|
604 |
|
|
pseudo <<= 1;
|
605 |
|
|
v |= pseudo;
|
606 |
|
|
}
|
607 |
|
|
if (idx == DSP_MIX_ADCMIXIDX_L) {
|
608 |
|
|
pseudo = inb(s->iobase + CODEC_CMI_MIXER2) & 0x40;
|
609 |
|
|
pseudo <<= 1;
|
610 |
|
|
v |= pseudo;
|
611 |
|
|
}
|
612 |
|
|
if (idx == DSP_MIX_ADCMIXIDX_R) {
|
613 |
|
|
pseudo = inb(s->iobase + CODEC_CMI_MIXER2) & 0x80;
|
614 |
|
|
v |= pseudo;
|
615 |
|
|
}
|
616 |
|
|
return v;
|
617 |
|
|
}
|
618 |
|
|
|
619 |
|
|
static void set_fmt_unlocked(struct cm_state *s, unsigned char mask, unsigned char data)
|
620 |
|
|
{
|
621 |
|
|
if (mask)
|
622 |
|
|
{
|
623 |
|
|
s->fmt = inb(s->iobase + CODEC_CMI_CHFORMAT);
|
624 |
|
|
udelay(10);
|
625 |
|
|
}
|
626 |
|
|
s->fmt = (s->fmt & mask) | data;
|
627 |
|
|
outb(s->fmt, s->iobase + CODEC_CMI_CHFORMAT);
|
628 |
|
|
udelay(10);
|
629 |
|
|
}
|
630 |
|
|
|
631 |
|
|
static void set_fmt(struct cm_state *s, unsigned char mask, unsigned char data)
|
632 |
|
|
{
|
633 |
|
|
unsigned long flags;
|
634 |
|
|
|
635 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
636 |
|
|
set_fmt_unlocked(s,mask,data);
|
637 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
638 |
|
|
}
|
639 |
|
|
|
640 |
|
|
static void frobindir(struct cm_state *s, unsigned char idx, unsigned char mask, unsigned char data)
|
641 |
|
|
{
|
642 |
|
|
outb(idx, s->iobase + CODEC_SB16_ADDR);
|
643 |
|
|
udelay(10);
|
644 |
|
|
outb((inb(s->iobase + CODEC_SB16_DATA) & mask) | data, s->iobase + CODEC_SB16_DATA);
|
645 |
|
|
udelay(10);
|
646 |
|
|
}
|
647 |
|
|
|
648 |
|
|
static struct {
|
649 |
|
|
unsigned rate;
|
650 |
|
|
unsigned lower;
|
651 |
|
|
unsigned upper;
|
652 |
|
|
unsigned char freq;
|
653 |
|
|
} rate_lookup[] =
|
654 |
|
|
{
|
655 |
|
|
{ 5512, (0 + 5512) / 2, (5512 + 8000) / 2, 0 },
|
656 |
|
|
{ 8000, (5512 + 8000) / 2, (8000 + 11025) / 2, 4 },
|
657 |
|
|
{ 11025, (8000 + 11025) / 2, (11025 + 16000) / 2, 1 },
|
658 |
|
|
{ 16000, (11025 + 16000) / 2, (16000 + 22050) / 2, 5 },
|
659 |
|
|
{ 22050, (16000 + 22050) / 2, (22050 + 32000) / 2, 2 },
|
660 |
|
|
{ 32000, (22050 + 32000) / 2, (32000 + 44100) / 2, 6 },
|
661 |
|
|
{ 44100, (32000 + 44100) / 2, (44100 + 48000) / 2, 3 },
|
662 |
|
|
{ 48000, (44100 + 48000) / 2, 48000, 7 }
|
663 |
|
|
};
|
664 |
|
|
|
665 |
|
|
static void set_spdif_copyright(struct cm_state *s, int spdif_copyright)
|
666 |
|
|
{
|
667 |
|
|
/* enable SPDIF-in Copyright */
|
668 |
|
|
maskb(s->iobase + CODEC_CMI_LEGACY_CTRL + 2, ~SPDCOPYRHT, spdif_copyright ? SPDCOPYRHT : 0);
|
669 |
|
|
}
|
670 |
|
|
|
671 |
|
|
static void set_spdif_loop(struct cm_state *s, int spdif_loop)
|
672 |
|
|
{
|
673 |
|
|
/* enable SPDIF loop */
|
674 |
|
|
if (spdif_loop) {
|
675 |
|
|
s->status |= DO_SPDIF_LOOP;
|
676 |
|
|
/* turn on spdif-in to spdif-out */
|
677 |
|
|
maskb(s->iobase + CODEC_CMI_FUNCTRL1, ~0, SPDFLOOP);
|
678 |
|
|
} else {
|
679 |
|
|
s->status &= ~DO_SPDIF_LOOP;
|
680 |
|
|
/* turn off spdif-in to spdif-out */
|
681 |
|
|
maskb(s->iobase + CODEC_CMI_FUNCTRL1, ~SPDFLOOP, 0);
|
682 |
|
|
}
|
683 |
|
|
}
|
684 |
|
|
|
685 |
|
|
static void set_spdif_monitor(struct cm_state *s, int channel)
|
686 |
|
|
{
|
687 |
|
|
// SPDO2DAC
|
688 |
|
|
maskw(s->iobase + CODEC_CMI_FUNCTRL1, ~SPDO2DAC, channel == 2 ? SPDO2DAC : 0);
|
689 |
|
|
// CDPLAY
|
690 |
|
|
if (s->chip_version >= 39)
|
691 |
|
|
maskb(s->iobase + CODEC_CMI_MIXER1, ~CDPLAY, channel ? CDPLAY : 0);
|
692 |
|
|
}
|
693 |
|
|
|
694 |
|
|
static void set_spdifout_level(struct cm_state *s, int level5v)
|
695 |
|
|
{
|
696 |
|
|
/* SPDO5V */
|
697 |
|
|
maskb(s->iobase + CODEC_CMI_MISC_CTRL + 3, ~SPDO5V, level5v ? SPDO5V : 0);
|
698 |
|
|
}
|
699 |
|
|
|
700 |
|
|
static void set_spdifin_inverse(struct cm_state *s, int spdif_inverse)
|
701 |
|
|
{
|
702 |
|
|
if (spdif_inverse) {
|
703 |
|
|
/* turn on spdif-in inverse */
|
704 |
|
|
if (s->chip_version >= 39)
|
705 |
|
|
maskb(s->iobase + CODEC_CMI_CHFORMAT, ~0, INVSPDIFI);
|
706 |
|
|
else
|
707 |
|
|
maskb(s->iobase + CODEC_CMI_CHFORMAT + 2, ~0, 1);
|
708 |
|
|
} else {
|
709 |
|
|
/* turn off spdif-ininverse */
|
710 |
|
|
if (s->chip_version >= 39)
|
711 |
|
|
maskb(s->iobase + CODEC_CMI_CHFORMAT, ~INVSPDIFI, 0);
|
712 |
|
|
else
|
713 |
|
|
maskb(s->iobase + CODEC_CMI_CHFORMAT + 2, ~1, 0);
|
714 |
|
|
}
|
715 |
|
|
}
|
716 |
|
|
|
717 |
|
|
static void set_spdifin_channel2(struct cm_state *s, int channel2)
|
718 |
|
|
{
|
719 |
|
|
/* SELSPDIFI2 */
|
720 |
|
|
if (s->chip_version >= 39)
|
721 |
|
|
maskb(s->iobase + CODEC_CMI_MISC_CTRL + 1, ~SELSPDIFI2, channel2 ? SELSPDIFI2 : 0);
|
722 |
|
|
}
|
723 |
|
|
|
724 |
|
|
static void set_spdifin_valid(struct cm_state *s, int valid)
|
725 |
|
|
{
|
726 |
|
|
/* SPDVALID */
|
727 |
|
|
maskb(s->iobase + CODEC_CMI_MISC, ~SPDVALID, valid ? SPDVALID : 0);
|
728 |
|
|
}
|
729 |
|
|
|
730 |
|
|
static void set_spdifout_unlocked(struct cm_state *s, unsigned rate)
|
731 |
|
|
{
|
732 |
|
|
if (rate == 48000 || rate == 44100) {
|
733 |
|
|
// SPDF_0
|
734 |
|
|
maskw(s->iobase + CODEC_CMI_FUNCTRL1, ~0, SPDF_0);
|
735 |
|
|
// SPDIFI48K SPDF_ACc97
|
736 |
|
|
maskl(s->iobase + CODEC_CMI_MISC_CTRL, ~SPDIF48K, rate == 48000 ? SPDIF48K : 0);
|
737 |
|
|
// ENSPDOUT
|
738 |
|
|
maskb(s->iobase + CODEC_CMI_LEGACY_CTRL + 2, ~0, ENSPDOUT);
|
739 |
|
|
// monitor SPDIF out
|
740 |
|
|
set_spdif_monitor(s, 2);
|
741 |
|
|
s->status |= DO_SPDIF_OUT;
|
742 |
|
|
} else {
|
743 |
|
|
maskw(s->iobase + CODEC_CMI_FUNCTRL1, ~SPDF_0, 0);
|
744 |
|
|
maskb(s->iobase + CODEC_CMI_LEGACY_CTRL + 2, ~ENSPDOUT, 0);
|
745 |
|
|
// monitor none
|
746 |
|
|
set_spdif_monitor(s, 0);
|
747 |
|
|
s->status &= ~DO_SPDIF_OUT;
|
748 |
|
|
}
|
749 |
|
|
}
|
750 |
|
|
|
751 |
|
|
static void set_spdifout(struct cm_state *s, unsigned rate)
|
752 |
|
|
{
|
753 |
|
|
unsigned long flags;
|
754 |
|
|
|
755 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
756 |
|
|
set_spdifout_unlocked(s,rate);
|
757 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
758 |
|
|
}
|
759 |
|
|
|
760 |
|
|
static void set_spdifin_unlocked(struct cm_state *s, unsigned rate)
|
761 |
|
|
{
|
762 |
|
|
if (rate == 48000 || rate == 44100) {
|
763 |
|
|
// SPDF_1
|
764 |
|
|
maskw(s->iobase + CODEC_CMI_FUNCTRL1, ~0, SPDF_1);
|
765 |
|
|
// SPDIFI48K SPDF_AC97
|
766 |
|
|
maskl(s->iobase + CODEC_CMI_MISC_CTRL, ~SPDIF48K, rate == 48000 ? SPDIF48K : 0);
|
767 |
|
|
s->status |= DO_SPDIF_IN;
|
768 |
|
|
} else {
|
769 |
|
|
maskw(s->iobase + CODEC_CMI_FUNCTRL1, ~SPDF_1, 0);
|
770 |
|
|
s->status &= ~DO_SPDIF_IN;
|
771 |
|
|
}
|
772 |
|
|
}
|
773 |
|
|
|
774 |
|
|
static void set_spdifin(struct cm_state *s, unsigned rate)
|
775 |
|
|
{
|
776 |
|
|
unsigned long flags;
|
777 |
|
|
|
778 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
779 |
|
|
set_spdifin_unlocked(s,rate);
|
780 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
781 |
|
|
}
|
782 |
|
|
|
783 |
|
|
//* find parity for bit 4~30 */
|
784 |
|
|
static unsigned parity(unsigned data)
|
785 |
|
|
{
|
786 |
|
|
unsigned parity = 0;
|
787 |
|
|
int counter = 4;
|
788 |
|
|
|
789 |
|
|
data >>= 4; // start from bit 4
|
790 |
|
|
while (counter <= 30) {
|
791 |
|
|
if (data & 1)
|
792 |
|
|
parity++;
|
793 |
|
|
data >>= 1;
|
794 |
|
|
counter++;
|
795 |
|
|
}
|
796 |
|
|
return parity & 1;
|
797 |
|
|
}
|
798 |
|
|
|
799 |
|
|
static void set_ac3_unlocked(struct cm_state *s, unsigned rate)
|
800 |
|
|
{
|
801 |
|
|
/* enable AC3 */
|
802 |
|
|
if (rate == 48000 || rate == 44100) {
|
803 |
|
|
// mute DAC
|
804 |
|
|
maskb(s->iobase + CODEC_CMI_MIXER1, ~0, WSMUTE);
|
805 |
|
|
// AC3EN for 039, 0x04
|
806 |
|
|
if (s->chip_version >= 39)
|
807 |
|
|
maskb(s->iobase + CODEC_CMI_MISC_CTRL + 2, ~0, AC3_EN);
|
808 |
|
|
// AC3EN for 037, 0x10
|
809 |
|
|
else if (s->chip_version == 37)
|
810 |
|
|
maskb(s->iobase + CODEC_CMI_CHFORMAT + 2, ~0, 0x10);
|
811 |
|
|
if (s->capability & CAN_AC3_HW) {
|
812 |
|
|
// SPD24SEL for 039, 0x20, but cannot be set
|
813 |
|
|
if (s->chip_version >= 39)
|
814 |
|
|
maskb(s->iobase + CODEC_CMI_CHFORMAT + 2, ~0, SPD24SEL);
|
815 |
|
|
// SPD24SEL for 037, 0x02
|
816 |
|
|
else if (s->chip_version == 37)
|
817 |
|
|
maskb(s->iobase + CODEC_CMI_CHFORMAT + 2, ~0, 0x02);
|
818 |
|
|
s->status |= DO_AC3_HW;
|
819 |
|
|
if (s->chip_version >= 39)
|
820 |
|
|
maskb(s->iobase + CODEC_CMI_MIXER1, ~CDPLAY, 0);
|
821 |
|
|
} else {
|
822 |
|
|
// SPD32SEL for 037 & 039, 0x20
|
823 |
|
|
maskb(s->iobase + CODEC_CMI_MISC_CTRL + 2, ~0, SPD32SEL);
|
824 |
|
|
// set 176K sample rate to fix 033 HW bug
|
825 |
|
|
if (s->chip_version == 33) {
|
826 |
|
|
if (rate == 48000)
|
827 |
|
|
maskb(s->iobase + CODEC_CMI_CHFORMAT + 1, ~0, 0x08);
|
828 |
|
|
else
|
829 |
|
|
maskb(s->iobase + CODEC_CMI_CHFORMAT + 1, ~0x08, 0);
|
830 |
|
|
}
|
831 |
|
|
s->status |= DO_AC3_SW;
|
832 |
|
|
}
|
833 |
|
|
} else {
|
834 |
|
|
maskb(s->iobase + CODEC_CMI_MIXER1, ~WSMUTE, 0);
|
835 |
|
|
maskb(s->iobase + CODEC_CMI_CHFORMAT + 2, ~0x32, 0);
|
836 |
|
|
maskb(s->iobase + CODEC_CMI_MISC_CTRL + 2, ~(SPD32SEL|AC3_EN), 0);
|
837 |
|
|
if (s->chip_version == 33)
|
838 |
|
|
maskb(s->iobase + CODEC_CMI_CHFORMAT + 1, ~0x08, 0);
|
839 |
|
|
if (s->chip_version >= 39)
|
840 |
|
|
maskb(s->iobase + CODEC_CMI_MIXER1, ~0, CDPLAY);
|
841 |
|
|
s->status &= ~DO_AC3;
|
842 |
|
|
}
|
843 |
|
|
s->spdif_counter = 0;
|
844 |
|
|
}
|
845 |
|
|
|
846 |
|
|
static void set_ac3(struct cm_state *s, unsigned rate)
|
847 |
|
|
{
|
848 |
|
|
unsigned long flags;
|
849 |
|
|
|
850 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
851 |
|
|
set_spdifout_unlocked(s, rate);
|
852 |
|
|
set_ac3_unlocked(s,rate);
|
853 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
854 |
|
|
}
|
855 |
|
|
|
856 |
|
|
static int trans_ac3(struct cm_state *s, void *dest, const char *source, int size)
|
857 |
|
|
{
|
858 |
|
|
int i = size / 2;
|
859 |
|
|
unsigned long data;
|
860 |
|
|
unsigned long *dst = (unsigned long *) dest;
|
861 |
|
|
unsigned short *src = (unsigned short *)source;
|
862 |
|
|
int err;
|
863 |
|
|
|
864 |
|
|
do {
|
865 |
|
|
if ((err = __get_user(data, src)))
|
866 |
|
|
return err;
|
867 |
|
|
src++;
|
868 |
|
|
data <<= 12; // ok for 16-bit data
|
869 |
|
|
if (s->spdif_counter == 2 || s->spdif_counter == 3)
|
870 |
|
|
data |= 0x40000000; // indicate AC-3 raw data
|
871 |
|
|
if (parity(data))
|
872 |
|
|
data |= 0x80000000; // parity
|
873 |
|
|
if (s->spdif_counter == 0)
|
874 |
|
|
data |= 3; // preamble 'M'
|
875 |
|
|
else if (s->spdif_counter & 1)
|
876 |
|
|
data |= 5; // odd, 'W'
|
877 |
|
|
else
|
878 |
|
|
data |= 9; // even, 'M'
|
879 |
|
|
*dst++ = data;
|
880 |
|
|
s->spdif_counter++;
|
881 |
|
|
if (s->spdif_counter == 384)
|
882 |
|
|
s->spdif_counter = 0;
|
883 |
|
|
} while (--i);
|
884 |
|
|
|
885 |
|
|
return 0;
|
886 |
|
|
}
|
887 |
|
|
|
888 |
|
|
static void set_adc_rate_unlocked(struct cm_state *s, unsigned rate)
|
889 |
|
|
{
|
890 |
|
|
unsigned char freq = 4;
|
891 |
|
|
int i;
|
892 |
|
|
|
893 |
|
|
if (rate > 48000)
|
894 |
|
|
rate = 48000;
|
895 |
|
|
if (rate < 8000)
|
896 |
|
|
rate = 8000;
|
897 |
|
|
for (i = 0; i < sizeof(rate_lookup) / sizeof(rate_lookup[0]); i++) {
|
898 |
|
|
if (rate > rate_lookup[i].lower && rate <= rate_lookup[i].upper) {
|
899 |
|
|
rate = rate_lookup[i].rate;
|
900 |
|
|
freq = rate_lookup[i].freq;
|
901 |
|
|
break;
|
902 |
|
|
}
|
903 |
|
|
}
|
904 |
|
|
s->rateadc = rate;
|
905 |
|
|
freq <<= CM_FREQ_ADCSHIFT;
|
906 |
|
|
|
907 |
|
|
maskb(s->iobase + CODEC_CMI_FUNCTRL1 + 1, ~ASFC, freq);
|
908 |
|
|
}
|
909 |
|
|
|
910 |
|
|
static void set_adc_rate(struct cm_state *s, unsigned rate)
|
911 |
|
|
{
|
912 |
|
|
unsigned long flags;
|
913 |
|
|
unsigned char freq = 4;
|
914 |
|
|
int i;
|
915 |
|
|
|
916 |
|
|
if (rate > 48000)
|
917 |
|
|
rate = 48000;
|
918 |
|
|
if (rate < 8000)
|
919 |
|
|
rate = 8000;
|
920 |
|
|
for (i = 0; i < sizeof(rate_lookup) / sizeof(rate_lookup[0]); i++) {
|
921 |
|
|
if (rate > rate_lookup[i].lower && rate <= rate_lookup[i].upper) {
|
922 |
|
|
rate = rate_lookup[i].rate;
|
923 |
|
|
freq = rate_lookup[i].freq;
|
924 |
|
|
break;
|
925 |
|
|
}
|
926 |
|
|
}
|
927 |
|
|
s->rateadc = rate;
|
928 |
|
|
freq <<= CM_FREQ_ADCSHIFT;
|
929 |
|
|
|
930 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
931 |
|
|
maskb(s->iobase + CODEC_CMI_FUNCTRL1 + 1, ~ASFC, freq);
|
932 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
933 |
|
|
}
|
934 |
|
|
|
935 |
|
|
static void set_dac_rate(struct cm_state *s, unsigned rate)
|
936 |
|
|
{
|
937 |
|
|
unsigned long flags;
|
938 |
|
|
unsigned char freq = 4;
|
939 |
|
|
int i;
|
940 |
|
|
|
941 |
|
|
if (rate > 48000)
|
942 |
|
|
rate = 48000;
|
943 |
|
|
if (rate < 8000)
|
944 |
|
|
rate = 8000;
|
945 |
|
|
for (i = 0; i < sizeof(rate_lookup) / sizeof(rate_lookup[0]); i++) {
|
946 |
|
|
if (rate > rate_lookup[i].lower && rate <= rate_lookup[i].upper) {
|
947 |
|
|
rate = rate_lookup[i].rate;
|
948 |
|
|
freq = rate_lookup[i].freq;
|
949 |
|
|
break;
|
950 |
|
|
}
|
951 |
|
|
}
|
952 |
|
|
s->ratedac = rate;
|
953 |
|
|
freq <<= CM_FREQ_DACSHIFT;
|
954 |
|
|
|
955 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
956 |
|
|
maskb(s->iobase + CODEC_CMI_FUNCTRL1 + 1, ~DSFC, freq);
|
957 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
958 |
|
|
|
959 |
|
|
if (s->curr_channels <= 2)
|
960 |
|
|
set_spdifout(s, rate);
|
961 |
|
|
if (s->status & DO_DUAL_DAC)
|
962 |
|
|
set_adc_rate(s, rate);
|
963 |
|
|
}
|
964 |
|
|
|
965 |
|
|
/* --------------------------------------------------------------------- */
|
966 |
|
|
static inline void reset_adc(struct cm_state *s)
|
967 |
|
|
{
|
968 |
|
|
/* reset bus master */
|
969 |
|
|
outb(s->enable | RSTADC, s->iobase + CODEC_CMI_FUNCTRL0 + 2);
|
970 |
|
|
udelay(10);
|
971 |
|
|
outb(s->enable & ~RSTADC, s->iobase + CODEC_CMI_FUNCTRL0 + 2);
|
972 |
|
|
}
|
973 |
|
|
|
974 |
|
|
static inline void reset_dac(struct cm_state *s)
|
975 |
|
|
{
|
976 |
|
|
/* reset bus master */
|
977 |
|
|
outb(s->enable | RSTDAC, s->iobase + CODEC_CMI_FUNCTRL0 + 2);
|
978 |
|
|
udelay(10);
|
979 |
|
|
outb(s->enable & ~RSTDAC, s->iobase + CODEC_CMI_FUNCTRL0 + 2);
|
980 |
|
|
if (s->status & DO_DUAL_DAC)
|
981 |
|
|
reset_adc(s);
|
982 |
|
|
}
|
983 |
|
|
|
984 |
|
|
static inline void pause_adc(struct cm_state *s)
|
985 |
|
|
{
|
986 |
|
|
maskb(s->iobase + CODEC_CMI_FUNCTRL0, ~0, PAUSEADC);
|
987 |
|
|
}
|
988 |
|
|
|
989 |
|
|
static inline void pause_dac(struct cm_state *s)
|
990 |
|
|
{
|
991 |
|
|
maskb(s->iobase + CODEC_CMI_FUNCTRL0, ~0, PAUSEDAC);
|
992 |
|
|
if (s->status & DO_DUAL_DAC)
|
993 |
|
|
pause_adc(s);
|
994 |
|
|
}
|
995 |
|
|
|
996 |
|
|
static inline void disable_adc(struct cm_state *s)
|
997 |
|
|
{
|
998 |
|
|
/* disable channel */
|
999 |
|
|
s->enable &= ~ENADC;
|
1000 |
|
|
outb(s->enable, s->iobase + CODEC_CMI_FUNCTRL0 + 2);
|
1001 |
|
|
reset_adc(s);
|
1002 |
|
|
}
|
1003 |
|
|
|
1004 |
|
|
static inline void disable_dac(struct cm_state *s)
|
1005 |
|
|
{
|
1006 |
|
|
/* disable channel */
|
1007 |
|
|
s->enable &= ~ENDAC;
|
1008 |
|
|
outb(s->enable, s->iobase + CODEC_CMI_FUNCTRL0 + 2);
|
1009 |
|
|
reset_dac(s);
|
1010 |
|
|
if (s->status & DO_DUAL_DAC)
|
1011 |
|
|
disable_adc(s);
|
1012 |
|
|
}
|
1013 |
|
|
|
1014 |
|
|
static inline void enable_adc(struct cm_state *s)
|
1015 |
|
|
{
|
1016 |
|
|
if (!(s->enable & ENADC)) {
|
1017 |
|
|
/* enable channel */
|
1018 |
|
|
s->enable |= ENADC;
|
1019 |
|
|
outb(s->enable, s->iobase + CODEC_CMI_FUNCTRL0 + 2);
|
1020 |
|
|
}
|
1021 |
|
|
maskb(s->iobase + CODEC_CMI_FUNCTRL0, ~PAUSEADC, 0);
|
1022 |
|
|
}
|
1023 |
|
|
|
1024 |
|
|
static inline void enable_dac_unlocked(struct cm_state *s)
|
1025 |
|
|
{
|
1026 |
|
|
if (!(s->enable & ENDAC)) {
|
1027 |
|
|
/* enable channel */
|
1028 |
|
|
s->enable |= ENDAC;
|
1029 |
|
|
outb(s->enable, s->iobase + CODEC_CMI_FUNCTRL0 + 2);
|
1030 |
|
|
}
|
1031 |
|
|
maskb(s->iobase + CODEC_CMI_FUNCTRL0, ~PAUSEDAC, 0);
|
1032 |
|
|
|
1033 |
|
|
if (s->status & DO_DUAL_DAC)
|
1034 |
|
|
enable_adc(s);
|
1035 |
|
|
}
|
1036 |
|
|
|
1037 |
|
|
static inline void enable_dac(struct cm_state *s)
|
1038 |
|
|
{
|
1039 |
|
|
unsigned long flags;
|
1040 |
|
|
|
1041 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
1042 |
|
|
enable_dac_unlocked(s);
|
1043 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
1044 |
|
|
}
|
1045 |
|
|
|
1046 |
|
|
static inline void stop_adc_unlocked(struct cm_state *s)
|
1047 |
|
|
{
|
1048 |
|
|
if (s->enable & ENADC) {
|
1049 |
|
|
/* disable interrupt */
|
1050 |
|
|
maskb(s->iobase + CODEC_CMI_INT_HLDCLR + 2, ~ENADCINT, 0);
|
1051 |
|
|
disable_adc(s);
|
1052 |
|
|
}
|
1053 |
|
|
}
|
1054 |
|
|
|
1055 |
|
|
static inline void stop_adc(struct cm_state *s)
|
1056 |
|
|
{
|
1057 |
|
|
unsigned long flags;
|
1058 |
|
|
|
1059 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
1060 |
|
|
stop_adc_unlocked(s);
|
1061 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
1062 |
|
|
|
1063 |
|
|
}
|
1064 |
|
|
|
1065 |
|
|
static inline void stop_dac_unlocked(struct cm_state *s)
|
1066 |
|
|
{
|
1067 |
|
|
if (s->enable & ENDAC) {
|
1068 |
|
|
/* disable interrupt */
|
1069 |
|
|
maskb(s->iobase + CODEC_CMI_INT_HLDCLR + 2, ~ENDACINT, 0);
|
1070 |
|
|
disable_dac(s);
|
1071 |
|
|
}
|
1072 |
|
|
if (s->status & DO_DUAL_DAC)
|
1073 |
|
|
stop_adc_unlocked(s);
|
1074 |
|
|
}
|
1075 |
|
|
|
1076 |
|
|
static inline void stop_dac(struct cm_state *s)
|
1077 |
|
|
{
|
1078 |
|
|
unsigned long flags;
|
1079 |
|
|
|
1080 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
1081 |
|
|
stop_dac_unlocked(s);
|
1082 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
1083 |
|
|
}
|
1084 |
|
|
|
1085 |
|
|
static inline void start_adc_unlocked(struct cm_state *s)
|
1086 |
|
|
{
|
1087 |
|
|
if ((s->dma_adc.mapped || s->dma_adc.count < (signed)(s->dma_adc.dmasize - 2*s->dma_adc.fragsize))
|
1088 |
|
|
&& s->dma_adc.ready) {
|
1089 |
|
|
/* enable interrupt */
|
1090 |
|
|
maskb(s->iobase + CODEC_CMI_INT_HLDCLR + 2, ~0, ENADCINT);
|
1091 |
|
|
enable_adc(s);
|
1092 |
|
|
}
|
1093 |
|
|
}
|
1094 |
|
|
|
1095 |
|
|
static void start_adc(struct cm_state *s)
|
1096 |
|
|
{
|
1097 |
|
|
unsigned long flags;
|
1098 |
|
|
|
1099 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
1100 |
|
|
start_adc_unlocked(s);
|
1101 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
1102 |
|
|
}
|
1103 |
|
|
|
1104 |
|
|
static void start_dac1_unlocked(struct cm_state *s)
|
1105 |
|
|
{
|
1106 |
|
|
if ((s->dma_adc.mapped || s->dma_adc.count > 0) && s->dma_adc.ready) {
|
1107 |
|
|
/* enable interrupt */
|
1108 |
|
|
maskb(s->iobase + CODEC_CMI_INT_HLDCLR + 2, ~0, ENADCINT);
|
1109 |
|
|
enable_dac_unlocked(s);
|
1110 |
|
|
}
|
1111 |
|
|
}
|
1112 |
|
|
|
1113 |
|
|
static void start_dac_unlocked(struct cm_state *s)
|
1114 |
|
|
{
|
1115 |
|
|
if ((s->dma_dac.mapped || s->dma_dac.count > 0) && s->dma_dac.ready) {
|
1116 |
|
|
/* enable interrupt */
|
1117 |
|
|
maskb(s->iobase + CODEC_CMI_INT_HLDCLR + 2, ~0, ENDACINT);
|
1118 |
|
|
enable_dac_unlocked(s);
|
1119 |
|
|
}
|
1120 |
|
|
if (s->status & DO_DUAL_DAC)
|
1121 |
|
|
start_dac1_unlocked(s);
|
1122 |
|
|
}
|
1123 |
|
|
|
1124 |
|
|
static void start_dac(struct cm_state *s)
|
1125 |
|
|
{
|
1126 |
|
|
unsigned long flags;
|
1127 |
|
|
|
1128 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
1129 |
|
|
start_dac_unlocked(s);
|
1130 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
1131 |
|
|
}
|
1132 |
|
|
|
1133 |
|
|
static int prog_dmabuf(struct cm_state *s, unsigned rec);
|
1134 |
|
|
|
1135 |
|
|
static int set_dac_channels(struct cm_state *s, int channels)
|
1136 |
|
|
{
|
1137 |
|
|
unsigned long flags;
|
1138 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
1139 |
|
|
|
1140 |
|
|
if ((channels > 2) && (channels <= s->max_channels)
|
1141 |
|
|
&& (((s->fmt >> CM_CFMT_DACSHIFT) & CM_CFMT_MASK) == (CM_CFMT_STEREO | CM_CFMT_16BIT))) {
|
1142 |
|
|
set_spdifout_unlocked(s, 0);
|
1143 |
|
|
if (s->capability & CAN_MULTI_CH_HW) {
|
1144 |
|
|
// NXCHG
|
1145 |
|
|
maskb(s->iobase + CODEC_CMI_LEGACY_CTRL + 3, ~0, NXCHG);
|
1146 |
|
|
// CHB3D or CHB3D5C
|
1147 |
|
|
maskb(s->iobase + CODEC_CMI_CHFORMAT + 3, ~(CHB3D5C|CHB3D), channels > 4 ? CHB3D5C : CHB3D);
|
1148 |
|
|
// CHB3D6C
|
1149 |
|
|
maskb(s->iobase + CODEC_CMI_LEGACY_CTRL + 1, ~CHB3D6C, channels == 6 ? CHB3D6C : 0);
|
1150 |
|
|
// ENCENTER
|
1151 |
|
|
maskb(s->iobase + CODEC_CMI_MISC_CTRL, ~ENCENTER, channels == 6 ? ENCENTER : 0);
|
1152 |
|
|
s->status |= DO_MULTI_CH_HW;
|
1153 |
|
|
} else if (s->capability & CAN_DUAL_DAC) {
|
1154 |
|
|
unsigned char fmtm = ~0, fmts = 0;
|
1155 |
|
|
ssize_t ret;
|
1156 |
|
|
|
1157 |
|
|
// ENDBDAC, turn on double DAC mode
|
1158 |
|
|
// XCHGDAC, CH0 -> back, CH1->front
|
1159 |
|
|
maskb(s->iobase + CODEC_CMI_MISC_CTRL + 2, ~0, ENDBDAC|XCHGDAC);
|
1160 |
|
|
s->status |= DO_DUAL_DAC;
|
1161 |
|
|
// prepare secondary buffer
|
1162 |
|
|
|
1163 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
1164 |
|
|
ret = prog_dmabuf(s, 1);
|
1165 |
|
|
if (ret) return ret;
|
1166 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
1167 |
|
|
|
1168 |
|
|
// copy the hw state
|
1169 |
|
|
fmtm &= ~((CM_CFMT_STEREO | CM_CFMT_16BIT) << CM_CFMT_DACSHIFT);
|
1170 |
|
|
fmtm &= ~((CM_CFMT_STEREO | CM_CFMT_16BIT) << CM_CFMT_ADCSHIFT);
|
1171 |
|
|
// the HW only support 16-bit stereo
|
1172 |
|
|
fmts |= CM_CFMT_16BIT << CM_CFMT_DACSHIFT;
|
1173 |
|
|
fmts |= CM_CFMT_16BIT << CM_CFMT_ADCSHIFT;
|
1174 |
|
|
fmts |= CM_CFMT_STEREO << CM_CFMT_DACSHIFT;
|
1175 |
|
|
fmts |= CM_CFMT_STEREO << CM_CFMT_ADCSHIFT;
|
1176 |
|
|
|
1177 |
|
|
set_fmt_unlocked(s, fmtm, fmts);
|
1178 |
|
|
set_adc_rate_unlocked(s, s->ratedac);
|
1179 |
|
|
|
1180 |
|
|
}
|
1181 |
|
|
|
1182 |
|
|
// N4SPK3D, disable 4 speaker mode (analog duplicate)
|
1183 |
|
|
if (s->speakers > 2)
|
1184 |
|
|
maskb(s->iobase + CODEC_CMI_MISC_CTRL + 3, ~N4SPK3D, 0);
|
1185 |
|
|
s->curr_channels = channels;
|
1186 |
|
|
} else {
|
1187 |
|
|
if (s->status & DO_MULTI_CH_HW) {
|
1188 |
|
|
maskb(s->iobase + CODEC_CMI_LEGACY_CTRL + 3, ~NXCHG, 0);
|
1189 |
|
|
maskb(s->iobase + CODEC_CMI_CHFORMAT + 3, ~(CHB3D5C|CHB3D), 0);
|
1190 |
|
|
maskb(s->iobase + CODEC_CMI_LEGACY_CTRL + 1, ~CHB3D6C, 0);
|
1191 |
|
|
} else if (s->status & DO_DUAL_DAC) {
|
1192 |
|
|
maskb(s->iobase + CODEC_CMI_MISC_CTRL + 2, ~ENDBDAC, 0);
|
1193 |
|
|
}
|
1194 |
|
|
// N4SPK3D, enable 4 speaker mode (analog duplicate)
|
1195 |
|
|
if (s->speakers > 2)
|
1196 |
|
|
maskb(s->iobase + CODEC_CMI_MISC_CTRL + 3, ~0, N4SPK3D);
|
1197 |
|
|
s->status &= ~DO_MULTI_CH;
|
1198 |
|
|
s->curr_channels = s->fmt & (CM_CFMT_STEREO << CM_CFMT_DACSHIFT) ? 2 : 1;
|
1199 |
|
|
}
|
1200 |
|
|
|
1201 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
1202 |
|
|
return s->curr_channels;
|
1203 |
|
|
}
|
1204 |
|
|
|
1205 |
|
|
/* --------------------------------------------------------------------- */
|
1206 |
|
|
|
1207 |
|
|
#define DMABUF_DEFAULTORDER (16-PAGE_SHIFT)
|
1208 |
|
|
#define DMABUF_MINORDER 1
|
1209 |
|
|
|
1210 |
|
|
static void dealloc_dmabuf(struct dmabuf *db)
|
1211 |
|
|
{
|
1212 |
|
|
struct page *pstart, *pend;
|
1213 |
|
|
|
1214 |
|
|
if (db->rawbuf) {
|
1215 |
|
|
/* undo marking the pages as reserved */
|
1216 |
|
|
pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
|
1217 |
|
|
for (pstart = virt_to_page(db->rawbuf); pstart <= pend; pstart++)
|
1218 |
|
|
mem_map_unreserve(pstart);
|
1219 |
|
|
free_pages((unsigned long)db->rawbuf, db->buforder);
|
1220 |
|
|
}
|
1221 |
|
|
db->rawbuf = NULL;
|
1222 |
|
|
db->mapped = db->ready = 0;
|
1223 |
|
|
}
|
1224 |
|
|
|
1225 |
|
|
/* Ch1 is used for playback, Ch0 is used for recording */
|
1226 |
|
|
|
1227 |
|
|
static int prog_dmabuf(struct cm_state *s, unsigned rec)
|
1228 |
|
|
{
|
1229 |
|
|
struct dmabuf *db = rec ? &s->dma_adc : &s->dma_dac;
|
1230 |
|
|
unsigned rate = rec ? s->rateadc : s->ratedac;
|
1231 |
|
|
int order;
|
1232 |
|
|
unsigned bytepersec;
|
1233 |
|
|
unsigned bufs;
|
1234 |
|
|
struct page *pstart, *pend;
|
1235 |
|
|
unsigned char fmt;
|
1236 |
|
|
unsigned long flags;
|
1237 |
|
|
|
1238 |
|
|
fmt = s->fmt;
|
1239 |
|
|
if (rec) {
|
1240 |
|
|
stop_adc(s);
|
1241 |
|
|
fmt >>= CM_CFMT_ADCSHIFT;
|
1242 |
|
|
} else {
|
1243 |
|
|
stop_dac(s);
|
1244 |
|
|
fmt >>= CM_CFMT_DACSHIFT;
|
1245 |
|
|
}
|
1246 |
|
|
|
1247 |
|
|
fmt &= CM_CFMT_MASK;
|
1248 |
|
|
db->hwptr = db->swptr = db->total_bytes = db->count = db->error = db->endcleared = 0;
|
1249 |
|
|
if (!db->rawbuf) {
|
1250 |
|
|
db->ready = db->mapped = 0;
|
1251 |
|
|
for (order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER; order--)
|
1252 |
|
|
if ((db->rawbuf = (void *)__get_free_pages(GFP_KERNEL | GFP_DMA, order)))
|
1253 |
|
|
break;
|
1254 |
|
|
if (!db->rawbuf)
|
1255 |
|
|
return -ENOMEM;
|
1256 |
|
|
db->buforder = order;
|
1257 |
|
|
db->rawphys = virt_to_bus(db->rawbuf);
|
1258 |
|
|
if ((db->rawphys ^ (db->rawphys + (PAGE_SIZE << db->buforder) - 1)) & ~0xffff)
|
1259 |
|
|
printk(KERN_DEBUG "cmpci: DMA buffer crosses 64k boundary: busaddr 0x%lx size %ld\n",
|
1260 |
|
|
(long) db->rawphys, PAGE_SIZE << db->buforder);
|
1261 |
|
|
if ((db->rawphys + (PAGE_SIZE << db->buforder) - 1) & ~0xffffff)
|
1262 |
|
|
printk(KERN_DEBUG "cmpci: DMA buffer beyond 16MB: busaddr 0x%lx size %ld\n",
|
1263 |
|
|
(long) db->rawphys, PAGE_SIZE << db->buforder);
|
1264 |
|
|
/* now mark the pages as reserved; otherwise remap_page_range doesn't do what we want */
|
1265 |
|
|
pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
|
1266 |
|
|
for (pstart = virt_to_page(db->rawbuf); pstart <= pend; pstart++)
|
1267 |
|
|
mem_map_reserve(pstart);
|
1268 |
|
|
}
|
1269 |
|
|
bytepersec = rate << sample_shift[fmt];
|
1270 |
|
|
bufs = PAGE_SIZE << db->buforder;
|
1271 |
|
|
if (db->ossfragshift) {
|
1272 |
|
|
if ((1000 << db->ossfragshift) < bytepersec)
|
1273 |
|
|
db->fragshift = ld2(bytepersec/1000);
|
1274 |
|
|
else
|
1275 |
|
|
db->fragshift = db->ossfragshift;
|
1276 |
|
|
} else {
|
1277 |
|
|
db->fragshift = ld2(bytepersec/100/(db->subdivision ? db->subdivision : 1));
|
1278 |
|
|
if (db->fragshift < 3)
|
1279 |
|
|
db->fragshift = 3;
|
1280 |
|
|
}
|
1281 |
|
|
db->numfrag = bufs >> db->fragshift;
|
1282 |
|
|
while (db->numfrag < 4 && db->fragshift > 3) {
|
1283 |
|
|
db->fragshift--;
|
1284 |
|
|
db->numfrag = bufs >> db->fragshift;
|
1285 |
|
|
}
|
1286 |
|
|
db->fragsize = 1 << db->fragshift;
|
1287 |
|
|
if (db->ossmaxfrags >= 4 && db->ossmaxfrags < db->numfrag)
|
1288 |
|
|
db->numfrag = db->ossmaxfrags;
|
1289 |
|
|
/* to make fragsize >= 4096 */
|
1290 |
|
|
db->fragsamples = db->fragsize >> sample_shift[fmt];
|
1291 |
|
|
db->dmasize = db->numfrag << db->fragshift;
|
1292 |
|
|
db->dmasamples = db->dmasize >> sample_shift[fmt];
|
1293 |
|
|
memset(db->rawbuf, (fmt & CM_CFMT_16BIT) ? 0 : 0x80, db->dmasize);
|
1294 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
1295 |
|
|
if (rec) {
|
1296 |
|
|
if (s->status & DO_DUAL_DAC)
|
1297 |
|
|
set_dmadac1(s, db->rawphys, db->dmasize >> sample_shift[fmt]);
|
1298 |
|
|
else
|
1299 |
|
|
set_dmaadc(s, db->rawphys, db->dmasize >> sample_shift[fmt]);
|
1300 |
|
|
/* program sample counts */
|
1301 |
|
|
set_countdac(s, db->fragsamples);
|
1302 |
|
|
} else {
|
1303 |
|
|
set_dmadac(s, db->rawphys, db->dmasize >> sample_shift[fmt]);
|
1304 |
|
|
/* program sample counts */
|
1305 |
|
|
set_countdac(s, db->fragsamples);
|
1306 |
|
|
}
|
1307 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
1308 |
|
|
db->ready = 1;
|
1309 |
|
|
return 0;
|
1310 |
|
|
}
|
1311 |
|
|
|
1312 |
|
|
static inline void clear_advance(struct cm_state *s)
|
1313 |
|
|
{
|
1314 |
|
|
unsigned char c = (s->fmt & (CM_CFMT_16BIT << CM_CFMT_DACSHIFT)) ? 0 : 0x80;
|
1315 |
|
|
unsigned char *buf = s->dma_dac.rawbuf;
|
1316 |
|
|
unsigned char *buf1 = s->dma_adc.rawbuf;
|
1317 |
|
|
unsigned bsize = s->dma_dac.dmasize;
|
1318 |
|
|
unsigned bptr = s->dma_dac.swptr;
|
1319 |
|
|
unsigned len = s->dma_dac.fragsize;
|
1320 |
|
|
|
1321 |
|
|
if (bptr + len > bsize) {
|
1322 |
|
|
unsigned x = bsize - bptr;
|
1323 |
|
|
memset(buf + bptr, c, x);
|
1324 |
|
|
if (s->status & DO_DUAL_DAC)
|
1325 |
|
|
memset(buf1 + bptr, c, x);
|
1326 |
|
|
bptr = 0;
|
1327 |
|
|
len -= x;
|
1328 |
|
|
}
|
1329 |
|
|
memset(buf + bptr, c, len);
|
1330 |
|
|
if (s->status & DO_DUAL_DAC)
|
1331 |
|
|
memset(buf1 + bptr, c, len);
|
1332 |
|
|
}
|
1333 |
|
|
|
1334 |
|
|
/* call with spinlock held! */
|
1335 |
|
|
static void cm_update_ptr(struct cm_state *s)
|
1336 |
|
|
{
|
1337 |
|
|
unsigned hwptr;
|
1338 |
|
|
int diff;
|
1339 |
|
|
|
1340 |
|
|
/* update ADC pointer */
|
1341 |
|
|
if (s->dma_adc.ready) {
|
1342 |
|
|
if (s->status & DO_DUAL_DAC) {
|
1343 |
|
|
hwptr = get_dmaadc(s) % s->dma_adc.dmasize;
|
1344 |
|
|
diff = (s->dma_adc.dmasize + hwptr - s->dma_adc.hwptr) % s->dma_adc.dmasize;
|
1345 |
|
|
s->dma_adc.hwptr = hwptr;
|
1346 |
|
|
s->dma_adc.total_bytes += diff;
|
1347 |
|
|
if (s->dma_adc.mapped) {
|
1348 |
|
|
s->dma_adc.count += diff;
|
1349 |
|
|
if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
|
1350 |
|
|
wake_up(&s->dma_adc.wait);
|
1351 |
|
|
} else {
|
1352 |
|
|
s->dma_adc.count -= diff;
|
1353 |
|
|
if (s->dma_adc.count <= 0) {
|
1354 |
|
|
pause_adc(s);
|
1355 |
|
|
s->dma_adc.error++;
|
1356 |
|
|
} else if (s->dma_adc.count <= (signed)s->dma_adc.fragsize && !s->dma_adc.endcleared) {
|
1357 |
|
|
clear_advance(s);
|
1358 |
|
|
s->dma_adc.endcleared = 1;
|
1359 |
|
|
}
|
1360 |
|
|
if (s->dma_dac.count + (signed)s->dma_dac.fragsize <= (signed)s->dma_dac.dmasize)
|
1361 |
|
|
wake_up(&s->dma_adc.wait);
|
1362 |
|
|
}
|
1363 |
|
|
} else {
|
1364 |
|
|
hwptr = get_dmaadc(s) % s->dma_adc.dmasize;
|
1365 |
|
|
diff = (s->dma_adc.dmasize + hwptr - s->dma_adc.hwptr) % s->dma_adc.dmasize;
|
1366 |
|
|
s->dma_adc.hwptr = hwptr;
|
1367 |
|
|
s->dma_adc.total_bytes += diff;
|
1368 |
|
|
s->dma_adc.count += diff;
|
1369 |
|
|
if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
|
1370 |
|
|
wake_up(&s->dma_adc.wait);
|
1371 |
|
|
if (!s->dma_adc.mapped) {
|
1372 |
|
|
if (s->dma_adc.count > (signed)(s->dma_adc.dmasize - ((3 * s->dma_adc.fragsize) >> 1))) {
|
1373 |
|
|
pause_adc(s);
|
1374 |
|
|
s->dma_adc.error++;
|
1375 |
|
|
}
|
1376 |
|
|
}
|
1377 |
|
|
}
|
1378 |
|
|
}
|
1379 |
|
|
/* update DAC pointer */
|
1380 |
|
|
if (s->dma_dac.ready) {
|
1381 |
|
|
hwptr = get_dmadac(s) % s->dma_dac.dmasize;
|
1382 |
|
|
diff = (s->dma_dac.dmasize + hwptr - s->dma_dac.hwptr) % s->dma_dac.dmasize;
|
1383 |
|
|
s->dma_dac.hwptr = hwptr;
|
1384 |
|
|
s->dma_dac.total_bytes += diff;
|
1385 |
|
|
if (s->dma_dac.mapped) {
|
1386 |
|
|
s->dma_dac.count += diff;
|
1387 |
|
|
if (s->dma_dac.count >= (signed)s->dma_dac.fragsize)
|
1388 |
|
|
wake_up(&s->dma_dac.wait);
|
1389 |
|
|
} else {
|
1390 |
|
|
s->dma_dac.count -= diff;
|
1391 |
|
|
if (s->dma_dac.count <= 0) {
|
1392 |
|
|
pause_dac(s);
|
1393 |
|
|
s->dma_dac.error++;
|
1394 |
|
|
} else if (s->dma_dac.count <= (signed)s->dma_dac.fragsize && !s->dma_dac.endcleared) {
|
1395 |
|
|
clear_advance(s);
|
1396 |
|
|
s->dma_dac.endcleared = 1;
|
1397 |
|
|
}
|
1398 |
|
|
if (s->dma_dac.count + (signed)s->dma_dac.fragsize <= (signed)s->dma_dac.dmasize)
|
1399 |
|
|
wake_up(&s->dma_dac.wait);
|
1400 |
|
|
}
|
1401 |
|
|
}
|
1402 |
|
|
}
|
1403 |
|
|
|
1404 |
|
|
#ifdef CONFIG_SOUND_CMPCI_MIDI
|
1405 |
|
|
/* hold spinlock for the following! */
|
1406 |
|
|
static void cm_handle_midi(struct cm_state *s)
|
1407 |
|
|
{
|
1408 |
|
|
unsigned char ch;
|
1409 |
|
|
int wake;
|
1410 |
|
|
|
1411 |
|
|
wake = 0;
|
1412 |
|
|
while (!(inb(s->iomidi+1) & 0x80)) {
|
1413 |
|
|
ch = inb(s->iomidi);
|
1414 |
|
|
if (s->midi.icnt < MIDIINBUF) {
|
1415 |
|
|
s->midi.ibuf[s->midi.iwr] = ch;
|
1416 |
|
|
s->midi.iwr = (s->midi.iwr + 1) % MIDIINBUF;
|
1417 |
|
|
s->midi.icnt++;
|
1418 |
|
|
}
|
1419 |
|
|
wake = 1;
|
1420 |
|
|
}
|
1421 |
|
|
if (wake)
|
1422 |
|
|
wake_up(&s->midi.iwait);
|
1423 |
|
|
wake = 0;
|
1424 |
|
|
while (!(inb(s->iomidi+1) & 0x40) && s->midi.ocnt > 0) {
|
1425 |
|
|
outb(s->midi.obuf[s->midi.ord], s->iomidi);
|
1426 |
|
|
s->midi.ord = (s->midi.ord + 1) % MIDIOUTBUF;
|
1427 |
|
|
s->midi.ocnt--;
|
1428 |
|
|
if (s->midi.ocnt < MIDIOUTBUF-16)
|
1429 |
|
|
wake = 1;
|
1430 |
|
|
}
|
1431 |
|
|
if (wake)
|
1432 |
|
|
wake_up(&s->midi.owait);
|
1433 |
|
|
}
|
1434 |
|
|
#endif
|
1435 |
|
|
|
1436 |
|
|
static void cm_interrupt(int irq, void *dev_id, struct pt_regs *regs)
|
1437 |
|
|
{
|
1438 |
|
|
struct cm_state *s = (struct cm_state *)dev_id;
|
1439 |
|
|
unsigned int intsrc, intstat;
|
1440 |
|
|
unsigned char mask = 0;
|
1441 |
|
|
|
1442 |
|
|
/* fastpath out, to ease interrupt sharing */
|
1443 |
|
|
intsrc = inl(s->iobase + CODEC_CMI_INT_STATUS);
|
1444 |
|
|
if (!(intsrc & 0x80000000))
|
1445 |
|
|
return;
|
1446 |
|
|
spin_lock(&s->lock);
|
1447 |
|
|
intstat = inb(s->iobase + CODEC_CMI_INT_HLDCLR + 2);
|
1448 |
|
|
/* acknowledge interrupt */
|
1449 |
|
|
if (intsrc & ADCINT)
|
1450 |
|
|
mask |= ENADCINT;
|
1451 |
|
|
if (intsrc & DACINT)
|
1452 |
|
|
mask |= ENDACINT;
|
1453 |
|
|
outb(intstat & ~mask, s->iobase + CODEC_CMI_INT_HLDCLR + 2);
|
1454 |
|
|
outb(intstat | mask, s->iobase + CODEC_CMI_INT_HLDCLR + 2);
|
1455 |
|
|
cm_update_ptr(s);
|
1456 |
|
|
#ifdef CONFIG_SOUND_CMPCI_MIDI
|
1457 |
|
|
cm_handle_midi(s);
|
1458 |
|
|
#endif
|
1459 |
|
|
spin_unlock(&s->lock);
|
1460 |
|
|
}
|
1461 |
|
|
|
1462 |
|
|
#ifdef CONFIG_SOUND_CMPCI_MIDI
|
1463 |
|
|
static void cm_midi_timer(unsigned long data)
|
1464 |
|
|
{
|
1465 |
|
|
struct cm_state *s = (struct cm_state *)data;
|
1466 |
|
|
unsigned long flags;
|
1467 |
|
|
|
1468 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
1469 |
|
|
cm_handle_midi(s);
|
1470 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
1471 |
|
|
s->midi.timer.expires = jiffies+1;
|
1472 |
|
|
add_timer(&s->midi.timer);
|
1473 |
|
|
}
|
1474 |
|
|
#endif
|
1475 |
|
|
|
1476 |
|
|
/* --------------------------------------------------------------------- */
|
1477 |
|
|
|
1478 |
|
|
static const char invalid_magic[] = KERN_CRIT "cmpci: invalid magic value\n";
|
1479 |
|
|
|
1480 |
|
|
#ifdef CONFIG_SOUND_CMPCI /* support multiple chips */
|
1481 |
|
|
#define VALIDATE_STATE(s)
|
1482 |
|
|
#else
|
1483 |
|
|
#define VALIDATE_STATE(s) \
|
1484 |
|
|
({ \
|
1485 |
|
|
if (!(s) || (s)->magic != CM_MAGIC) { \
|
1486 |
|
|
printk(invalid_magic); \
|
1487 |
|
|
return -ENXIO; \
|
1488 |
|
|
} \
|
1489 |
|
|
})
|
1490 |
|
|
#endif
|
1491 |
|
|
|
1492 |
|
|
/* --------------------------------------------------------------------- */
|
1493 |
|
|
|
1494 |
|
|
#define MT_4 1
|
1495 |
|
|
#define MT_5MUTE 2
|
1496 |
|
|
#define MT_4MUTEMONO 3
|
1497 |
|
|
#define MT_6MUTE 4
|
1498 |
|
|
#define MT_5MUTEMONO 5
|
1499 |
|
|
|
1500 |
|
|
static const struct {
|
1501 |
|
|
unsigned left;
|
1502 |
|
|
unsigned right;
|
1503 |
|
|
unsigned type;
|
1504 |
|
|
unsigned rec;
|
1505 |
|
|
unsigned play;
|
1506 |
|
|
} mixtable[SOUND_MIXER_NRDEVICES] = {
|
1507 |
|
|
[SOUND_MIXER_CD] = { DSP_MIX_CDVOLIDX_L, DSP_MIX_CDVOLIDX_R, MT_5MUTE, 0x04, 0x02 },
|
1508 |
|
|
[SOUND_MIXER_LINE] = { DSP_MIX_LINEVOLIDX_L, DSP_MIX_LINEVOLIDX_R, MT_5MUTE, 0x10, 0x08 },
|
1509 |
|
|
[SOUND_MIXER_MIC] = { DSP_MIX_MICVOLIDX, DSP_MIX_MICVOLIDX, MT_5MUTEMONO, 0x01, 0x01 },
|
1510 |
|
|
[SOUND_MIXER_SYNTH] = { DSP_MIX_FMVOLIDX_L, DSP_MIX_FMVOLIDX_R, MT_5MUTE, 0x40, 0x00 },
|
1511 |
|
|
[SOUND_MIXER_VOLUME] = { DSP_MIX_MASTERVOLIDX_L, DSP_MIX_MASTERVOLIDX_R, MT_5MUTE, 0x00, 0x00 },
|
1512 |
|
|
[SOUND_MIXER_PCM] = { DSP_MIX_VOICEVOLIDX_L, DSP_MIX_VOICEVOLIDX_R, MT_5MUTE, 0x00, 0x00 },
|
1513 |
|
|
[SOUND_MIXER_LINE1] = { DSP_MIX_AUXVOL_L, DSP_MIX_AUXVOL_R, MT_5MUTE, 0x80, 0x20 },
|
1514 |
|
|
[SOUND_MIXER_SPEAKER]= { DSP_MIX_SPKRVOLIDX, DSP_MIX_SPKRVOLIDX, MT_5MUTEMONO, 0x01, 0x01 }
|
1515 |
|
|
};
|
1516 |
|
|
|
1517 |
|
|
static const unsigned char volidx[SOUND_MIXER_NRDEVICES] =
|
1518 |
|
|
{
|
1519 |
|
|
[SOUND_MIXER_CD] = 1,
|
1520 |
|
|
[SOUND_MIXER_LINE] = 2,
|
1521 |
|
|
[SOUND_MIXER_MIC] = 3,
|
1522 |
|
|
[SOUND_MIXER_SYNTH] = 4,
|
1523 |
|
|
[SOUND_MIXER_VOLUME] = 5,
|
1524 |
|
|
[SOUND_MIXER_PCM] = 6,
|
1525 |
|
|
[SOUND_MIXER_LINE1] = 7,
|
1526 |
|
|
[SOUND_MIXER_SPEAKER]= 8
|
1527 |
|
|
};
|
1528 |
|
|
|
1529 |
|
|
static unsigned mixer_outmask(struct cm_state *s)
|
1530 |
|
|
{
|
1531 |
|
|
unsigned long flags;
|
1532 |
|
|
int i, j, k;
|
1533 |
|
|
|
1534 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
1535 |
|
|
j = rdmixer(s, DSP_MIX_OUTMIXIDX);
|
1536 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
1537 |
|
|
for (k = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
|
1538 |
|
|
if (j & mixtable[i].play)
|
1539 |
|
|
k |= 1 << i;
|
1540 |
|
|
return k;
|
1541 |
|
|
}
|
1542 |
|
|
|
1543 |
|
|
static unsigned mixer_recmask(struct cm_state *s)
|
1544 |
|
|
{
|
1545 |
|
|
unsigned long flags;
|
1546 |
|
|
int i, j, k;
|
1547 |
|
|
|
1548 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
1549 |
|
|
j = rdmixer(s, DSP_MIX_ADCMIXIDX_L);
|
1550 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
1551 |
|
|
for (k = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
|
1552 |
|
|
if (j & mixtable[i].rec)
|
1553 |
|
|
k |= 1 << i;
|
1554 |
|
|
return k;
|
1555 |
|
|
}
|
1556 |
|
|
|
1557 |
|
|
static int mixer_ioctl(struct cm_state *s, unsigned int cmd, unsigned long arg)
|
1558 |
|
|
{
|
1559 |
|
|
unsigned long flags;
|
1560 |
|
|
int i, val, j;
|
1561 |
|
|
unsigned char l, r, rl, rr;
|
1562 |
|
|
|
1563 |
|
|
VALIDATE_STATE(s);
|
1564 |
|
|
if (cmd == SOUND_MIXER_INFO) {
|
1565 |
|
|
mixer_info info;
|
1566 |
|
|
strncpy(info.id, "cmpci", sizeof(info.id));
|
1567 |
|
|
strncpy(info.name, "C-Media PCI", sizeof(info.name));
|
1568 |
|
|
info.modify_counter = s->mix.modcnt;
|
1569 |
|
|
if (copy_to_user((void *)arg, &info, sizeof(info)))
|
1570 |
|
|
return -EFAULT;
|
1571 |
|
|
return 0;
|
1572 |
|
|
}
|
1573 |
|
|
if (cmd == SOUND_OLD_MIXER_INFO) {
|
1574 |
|
|
_old_mixer_info info;
|
1575 |
|
|
strncpy(info.id, "cmpci", sizeof(info.id));
|
1576 |
|
|
strncpy(info.name, "C-Media cmpci", sizeof(info.name));
|
1577 |
|
|
if (copy_to_user((void *)arg, &info, sizeof(info)))
|
1578 |
|
|
return -EFAULT;
|
1579 |
|
|
return 0;
|
1580 |
|
|
}
|
1581 |
|
|
if (cmd == OSS_GETVERSION)
|
1582 |
|
|
return put_user(SOUND_VERSION, (int *)arg);
|
1583 |
|
|
if (_IOC_TYPE(cmd) != 'M' || _IOC_SIZE(cmd) != sizeof(int))
|
1584 |
|
|
return -EINVAL;
|
1585 |
|
|
if (_IOC_DIR(cmd) == _IOC_READ) {
|
1586 |
|
|
switch (_IOC_NR(cmd)) {
|
1587 |
|
|
case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
|
1588 |
|
|
return put_user(mixer_recmask(s), (int *)arg);
|
1589 |
|
|
|
1590 |
|
|
case SOUND_MIXER_OUTSRC: /* Arg contains a bit for each recording source */
|
1591 |
|
|
return put_user(mixer_outmask(s), (int *)arg);
|
1592 |
|
|
|
1593 |
|
|
case SOUND_MIXER_DEVMASK: /* Arg contains a bit for each supported device */
|
1594 |
|
|
for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
|
1595 |
|
|
if (mixtable[i].type)
|
1596 |
|
|
val |= 1 << i;
|
1597 |
|
|
return put_user(val, (int *)arg);
|
1598 |
|
|
|
1599 |
|
|
case SOUND_MIXER_RECMASK: /* Arg contains a bit for each supported recording source */
|
1600 |
|
|
for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
|
1601 |
|
|
if (mixtable[i].rec)
|
1602 |
|
|
val |= 1 << i;
|
1603 |
|
|
return put_user(val, (int *)arg);
|
1604 |
|
|
|
1605 |
|
|
case SOUND_MIXER_OUTMASK: /* Arg contains a bit for each supported recording source */
|
1606 |
|
|
for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
|
1607 |
|
|
if (mixtable[i].play)
|
1608 |
|
|
val |= 1 << i;
|
1609 |
|
|
return put_user(val, (int *)arg);
|
1610 |
|
|
|
1611 |
|
|
case SOUND_MIXER_STEREODEVS: /* Mixer channels supporting stereo */
|
1612 |
|
|
for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
|
1613 |
|
|
if (mixtable[i].type && mixtable[i].type != MT_4MUTEMONO)
|
1614 |
|
|
val |= 1 << i;
|
1615 |
|
|
return put_user(val, (int *)arg);
|
1616 |
|
|
|
1617 |
|
|
case SOUND_MIXER_CAPS:
|
1618 |
|
|
return put_user(0, (int *)arg);
|
1619 |
|
|
|
1620 |
|
|
default:
|
1621 |
|
|
i = _IOC_NR(cmd);
|
1622 |
|
|
if (i >= SOUND_MIXER_NRDEVICES || !mixtable[i].type)
|
1623 |
|
|
return -EINVAL;
|
1624 |
|
|
if (!volidx[i])
|
1625 |
|
|
return -EINVAL;
|
1626 |
|
|
return put_user(s->mix.vol[volidx[i]-1], (int *)arg);
|
1627 |
|
|
}
|
1628 |
|
|
}
|
1629 |
|
|
if (_IOC_DIR(cmd) != (_IOC_READ|_IOC_WRITE))
|
1630 |
|
|
return -EINVAL;
|
1631 |
|
|
s->mix.modcnt++;
|
1632 |
|
|
switch (_IOC_NR(cmd)) {
|
1633 |
|
|
case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
|
1634 |
|
|
if (get_user(val, (int *)arg))
|
1635 |
|
|
return -EFAULT;
|
1636 |
|
|
i = generic_hweight32(val);
|
1637 |
|
|
for (j = i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
|
1638 |
|
|
if (!(val & (1 << i)))
|
1639 |
|
|
continue;
|
1640 |
|
|
if (!mixtable[i].rec) {
|
1641 |
|
|
val &= ~(1 << i);
|
1642 |
|
|
continue;
|
1643 |
|
|
}
|
1644 |
|
|
j |= mixtable[i].rec;
|
1645 |
|
|
}
|
1646 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
1647 |
|
|
wrmixer(s, DSP_MIX_ADCMIXIDX_L, j);
|
1648 |
|
|
wrmixer(s, DSP_MIX_ADCMIXIDX_R, (j & 1) | (j>>1) | (j & 0x80));
|
1649 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
1650 |
|
|
return 0;
|
1651 |
|
|
|
1652 |
|
|
case SOUND_MIXER_OUTSRC: /* Arg contains a bit for each recording source */
|
1653 |
|
|
if (get_user(val, (int *)arg))
|
1654 |
|
|
return -EFAULT;
|
1655 |
|
|
for (j = i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
|
1656 |
|
|
if (!(val & (1 << i)))
|
1657 |
|
|
continue;
|
1658 |
|
|
if (!mixtable[i].play) {
|
1659 |
|
|
val &= ~(1 << i);
|
1660 |
|
|
continue;
|
1661 |
|
|
}
|
1662 |
|
|
j |= mixtable[i].play;
|
1663 |
|
|
}
|
1664 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
1665 |
|
|
wrmixer(s, DSP_MIX_OUTMIXIDX, j);
|
1666 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
1667 |
|
|
return 0;
|
1668 |
|
|
|
1669 |
|
|
default:
|
1670 |
|
|
i = _IOC_NR(cmd);
|
1671 |
|
|
if (i >= SOUND_MIXER_NRDEVICES || !mixtable[i].type)
|
1672 |
|
|
return -EINVAL;
|
1673 |
|
|
if (get_user(val, (int *)arg))
|
1674 |
|
|
return -EFAULT;
|
1675 |
|
|
l = val & 0xff;
|
1676 |
|
|
r = (val >> 8) & 0xff;
|
1677 |
|
|
if (l > 100)
|
1678 |
|
|
l = 100;
|
1679 |
|
|
if (r > 100)
|
1680 |
|
|
r = 100;
|
1681 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
1682 |
|
|
switch (mixtable[i].type) {
|
1683 |
|
|
case MT_4:
|
1684 |
|
|
if (l >= 10)
|
1685 |
|
|
l -= 10;
|
1686 |
|
|
if (r >= 10)
|
1687 |
|
|
r -= 10;
|
1688 |
|
|
frobindir(s, mixtable[i].left, 0xf0, l / 6);
|
1689 |
|
|
frobindir(s, mixtable[i].right, 0xf0, l / 6);
|
1690 |
|
|
break;
|
1691 |
|
|
|
1692 |
|
|
case MT_4MUTEMONO:
|
1693 |
|
|
rl = (l < 4 ? 0 : (l - 5) / 3) & 31;
|
1694 |
|
|
rr = (rl >> 2) & 7;
|
1695 |
|
|
wrmixer(s, mixtable[i].left, rl<<3);
|
1696 |
|
|
if (i == SOUND_MIXER_MIC)
|
1697 |
|
|
maskb(s->iobase + CODEC_CMI_MIXER2, ~0x0e, rr<<1);
|
1698 |
|
|
break;
|
1699 |
|
|
|
1700 |
|
|
case MT_5MUTEMONO:
|
1701 |
|
|
r = l;
|
1702 |
|
|
rl = l < 4 ? 0 : (l - 5) / 3;
|
1703 |
|
|
wrmixer(s, mixtable[i].left, rl<<3);
|
1704 |
|
|
l = rdmixer(s, DSP_MIX_OUTMIXIDX) & ~mixtable[i].play;
|
1705 |
|
|
rr = rl ? mixtable[i].play : 0;
|
1706 |
|
|
wrmixer(s, DSP_MIX_OUTMIXIDX, l | rr);
|
1707 |
|
|
/* for recording */
|
1708 |
|
|
if (i == SOUND_MIXER_MIC) {
|
1709 |
|
|
if (s->chip_version >= 39) {
|
1710 |
|
|
rr = rl >> 1;
|
1711 |
|
|
maskb(s->iobase + CODEC_CMI_MIXER2, ~0x0e, rr&0x07);
|
1712 |
|
|
frobindir(s, DSP_MIX_EXTENSION, 0x01, rr>>3);
|
1713 |
|
|
} else {
|
1714 |
|
|
rr = rl >> 2;
|
1715 |
|
|
maskb(s->iobase + CODEC_CMI_MIXER2, ~0x0e, rr<<1);
|
1716 |
|
|
}
|
1717 |
|
|
}
|
1718 |
|
|
break;
|
1719 |
|
|
|
1720 |
|
|
case MT_5MUTE:
|
1721 |
|
|
rl = l < 4 ? 0 : (l - 5) / 3;
|
1722 |
|
|
rr = r < 4 ? 0 : (r - 5) / 3;
|
1723 |
|
|
wrmixer(s, mixtable[i].left, rl<<3);
|
1724 |
|
|
wrmixer(s, mixtable[i].right, rr<<3);
|
1725 |
|
|
l = rdmixer(s, DSP_MIX_OUTMIXIDX);
|
1726 |
|
|
l &= ~mixtable[i].play;
|
1727 |
|
|
r = (rl|rr) ? mixtable[i].play : 0;
|
1728 |
|
|
wrmixer(s, DSP_MIX_OUTMIXIDX, l | r);
|
1729 |
|
|
break;
|
1730 |
|
|
|
1731 |
|
|
case MT_6MUTE:
|
1732 |
|
|
if (l < 6)
|
1733 |
|
|
rl = 0x00;
|
1734 |
|
|
else
|
1735 |
|
|
rl = l * 2 / 3;
|
1736 |
|
|
if (r < 6)
|
1737 |
|
|
rr = 0x00;
|
1738 |
|
|
else
|
1739 |
|
|
rr = r * 2 / 3;
|
1740 |
|
|
wrmixer(s, mixtable[i].left, rl);
|
1741 |
|
|
wrmixer(s, mixtable[i].right, rr);
|
1742 |
|
|
break;
|
1743 |
|
|
}
|
1744 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
1745 |
|
|
|
1746 |
|
|
if (!volidx[i])
|
1747 |
|
|
return -EINVAL;
|
1748 |
|
|
s->mix.vol[volidx[i]-1] = val;
|
1749 |
|
|
return put_user(s->mix.vol[volidx[i]-1], (int *)arg);
|
1750 |
|
|
}
|
1751 |
|
|
}
|
1752 |
|
|
|
1753 |
|
|
/* --------------------------------------------------------------------- */
|
1754 |
|
|
|
1755 |
|
|
static int cm_open_mixdev(struct inode *inode, struct file *file)
|
1756 |
|
|
{
|
1757 |
|
|
int minor = MINOR(inode->i_rdev);
|
1758 |
|
|
struct list_head *list;
|
1759 |
|
|
struct cm_state *s;
|
1760 |
|
|
|
1761 |
|
|
for (list = devs.next; ; list = list->next) {
|
1762 |
|
|
if (list == &devs)
|
1763 |
|
|
return -ENODEV;
|
1764 |
|
|
s = list_entry(list, struct cm_state, devs);
|
1765 |
|
|
if (s->dev_mixer == minor)
|
1766 |
|
|
break;
|
1767 |
|
|
}
|
1768 |
|
|
VALIDATE_STATE(s);
|
1769 |
|
|
file->private_data = s;
|
1770 |
|
|
return 0;
|
1771 |
|
|
}
|
1772 |
|
|
|
1773 |
|
|
static int cm_release_mixdev(struct inode *inode, struct file *file)
|
1774 |
|
|
{
|
1775 |
|
|
struct cm_state *s = (struct cm_state *)file->private_data;
|
1776 |
|
|
|
1777 |
|
|
VALIDATE_STATE(s);
|
1778 |
|
|
return 0;
|
1779 |
|
|
}
|
1780 |
|
|
|
1781 |
|
|
static int cm_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
|
1782 |
|
|
{
|
1783 |
|
|
return mixer_ioctl((struct cm_state *)file->private_data, cmd, arg);
|
1784 |
|
|
}
|
1785 |
|
|
|
1786 |
|
|
static /*const*/ struct file_operations cm_mixer_fops = {
|
1787 |
|
|
owner: THIS_MODULE,
|
1788 |
|
|
llseek: no_llseek,
|
1789 |
|
|
ioctl: cm_ioctl_mixdev,
|
1790 |
|
|
open: cm_open_mixdev,
|
1791 |
|
|
release: cm_release_mixdev,
|
1792 |
|
|
};
|
1793 |
|
|
|
1794 |
|
|
|
1795 |
|
|
/* --------------------------------------------------------------------- */
|
1796 |
|
|
|
1797 |
|
|
static int drain_dac(struct cm_state *s, int nonblock)
|
1798 |
|
|
{
|
1799 |
|
|
DECLARE_WAITQUEUE(wait, current);
|
1800 |
|
|
unsigned long flags;
|
1801 |
|
|
int count, tmo;
|
1802 |
|
|
|
1803 |
|
|
if (s->dma_dac.mapped || !s->dma_dac.ready)
|
1804 |
|
|
return 0;
|
1805 |
|
|
add_wait_queue(&s->dma_dac.wait, &wait);
|
1806 |
|
|
for (;;) {
|
1807 |
|
|
__set_current_state(TASK_INTERRUPTIBLE);
|
1808 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
1809 |
|
|
count = s->dma_dac.count;
|
1810 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
1811 |
|
|
if (count <= 0)
|
1812 |
|
|
break;
|
1813 |
|
|
if (signal_pending(current))
|
1814 |
|
|
break;
|
1815 |
|
|
if (nonblock) {
|
1816 |
|
|
remove_wait_queue(&s->dma_dac.wait, &wait);
|
1817 |
|
|
set_current_state(TASK_RUNNING);
|
1818 |
|
|
return -EBUSY;
|
1819 |
|
|
}
|
1820 |
|
|
tmo = 3 * HZ * (count + s->dma_dac.fragsize) / 2 / s->ratedac;
|
1821 |
|
|
tmo >>= sample_shift[(s->fmt >> CM_CFMT_DACSHIFT) & CM_CFMT_MASK];
|
1822 |
|
|
if (!schedule_timeout(tmo + 1))
|
1823 |
|
|
printk(KERN_DEBUG "cmpci: dma timed out??\n");
|
1824 |
|
|
}
|
1825 |
|
|
remove_wait_queue(&s->dma_dac.wait, &wait);
|
1826 |
|
|
set_current_state(TASK_RUNNING);
|
1827 |
|
|
if (signal_pending(current))
|
1828 |
|
|
return -ERESTARTSYS;
|
1829 |
|
|
return 0;
|
1830 |
|
|
}
|
1831 |
|
|
|
1832 |
|
|
/* --------------------------------------------------------------------- */
|
1833 |
|
|
|
1834 |
|
|
static ssize_t cm_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
|
1835 |
|
|
{
|
1836 |
|
|
struct cm_state *s = (struct cm_state *)file->private_data;
|
1837 |
|
|
DECLARE_WAITQUEUE(wait, current);
|
1838 |
|
|
ssize_t ret;
|
1839 |
|
|
unsigned long flags;
|
1840 |
|
|
unsigned swptr;
|
1841 |
|
|
int cnt;
|
1842 |
|
|
|
1843 |
|
|
VALIDATE_STATE(s);
|
1844 |
|
|
if (ppos != &file->f_pos)
|
1845 |
|
|
return -ESPIPE;
|
1846 |
|
|
if (s->dma_adc.mapped)
|
1847 |
|
|
return -ENXIO;
|
1848 |
|
|
if (!s->dma_adc.ready && (ret = prog_dmabuf(s, 1)))
|
1849 |
|
|
return ret;
|
1850 |
|
|
if (!access_ok(VERIFY_WRITE, buffer, count))
|
1851 |
|
|
return -EFAULT;
|
1852 |
|
|
ret = 0;
|
1853 |
|
|
|
1854 |
|
|
add_wait_queue(&s->dma_adc.wait, &wait);
|
1855 |
|
|
while (count > 0) {
|
1856 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
1857 |
|
|
swptr = s->dma_adc.swptr;
|
1858 |
|
|
cnt = s->dma_adc.dmasize-swptr;
|
1859 |
|
|
if (s->dma_adc.count < cnt)
|
1860 |
|
|
cnt = s->dma_adc.count;
|
1861 |
|
|
if (cnt <= 0)
|
1862 |
|
|
__set_current_state(TASK_INTERRUPTIBLE);
|
1863 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
1864 |
|
|
if (cnt > count)
|
1865 |
|
|
cnt = count;
|
1866 |
|
|
if (cnt <= 0) {
|
1867 |
|
|
start_adc(s);
|
1868 |
|
|
if (file->f_flags & O_NONBLOCK) {
|
1869 |
|
|
if (!ret)
|
1870 |
|
|
ret = -EAGAIN;
|
1871 |
|
|
goto out;
|
1872 |
|
|
}
|
1873 |
|
|
if (!schedule_timeout(HZ)) {
|
1874 |
|
|
printk(KERN_DEBUG "cmpci: read: chip lockup? dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
|
1875 |
|
|
s->dma_adc.dmasize, s->dma_adc.fragsize, s->dma_adc.count,
|
1876 |
|
|
s->dma_adc.hwptr, s->dma_adc.swptr);
|
1877 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
1878 |
|
|
stop_adc_unlocked(s);
|
1879 |
|
|
set_dmaadc(s, s->dma_adc.rawphys, s->dma_adc.dmasamples);
|
1880 |
|
|
/* program sample counts */
|
1881 |
|
|
set_countadc(s, s->dma_adc.fragsamples);
|
1882 |
|
|
s->dma_adc.count = s->dma_adc.hwptr = s->dma_adc.swptr = 0;
|
1883 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
1884 |
|
|
}
|
1885 |
|
|
if (signal_pending(current)) {
|
1886 |
|
|
if (!ret)
|
1887 |
|
|
ret = -ERESTARTSYS;
|
1888 |
|
|
goto out;
|
1889 |
|
|
}
|
1890 |
|
|
continue;
|
1891 |
|
|
}
|
1892 |
|
|
if (copy_to_user(buffer, s->dma_adc.rawbuf + swptr, cnt)) {
|
1893 |
|
|
if (!ret)
|
1894 |
|
|
ret = -EFAULT;
|
1895 |
|
|
goto out;
|
1896 |
|
|
}
|
1897 |
|
|
swptr = (swptr + cnt) % s->dma_adc.dmasize;
|
1898 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
1899 |
|
|
s->dma_adc.swptr = swptr;
|
1900 |
|
|
s->dma_adc.count -= cnt;
|
1901 |
|
|
count -= cnt;
|
1902 |
|
|
buffer += cnt;
|
1903 |
|
|
ret += cnt;
|
1904 |
|
|
start_adc_unlocked(s);
|
1905 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
1906 |
|
|
}
|
1907 |
|
|
out:
|
1908 |
|
|
remove_wait_queue(&s->dma_adc.wait, &wait);
|
1909 |
|
|
set_current_state(TASK_RUNNING);
|
1910 |
|
|
return ret;
|
1911 |
|
|
}
|
1912 |
|
|
|
1913 |
|
|
static ssize_t cm_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
|
1914 |
|
|
{
|
1915 |
|
|
struct cm_state *s = (struct cm_state *)file->private_data;
|
1916 |
|
|
DECLARE_WAITQUEUE(wait, current);
|
1917 |
|
|
ssize_t ret;
|
1918 |
|
|
unsigned long flags;
|
1919 |
|
|
unsigned swptr;
|
1920 |
|
|
int cnt;
|
1921 |
|
|
|
1922 |
|
|
VALIDATE_STATE(s);
|
1923 |
|
|
if (ppos != &file->f_pos)
|
1924 |
|
|
return -ESPIPE;
|
1925 |
|
|
if (s->dma_dac.mapped)
|
1926 |
|
|
return -ENXIO;
|
1927 |
|
|
if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0)))
|
1928 |
|
|
return ret;
|
1929 |
|
|
if (!access_ok(VERIFY_READ, buffer, count))
|
1930 |
|
|
return -EFAULT;
|
1931 |
|
|
if (s->status & DO_DUAL_DAC) {
|
1932 |
|
|
if (s->dma_adc.mapped)
|
1933 |
|
|
return -ENXIO;
|
1934 |
|
|
if (!s->dma_adc.ready && (ret = prog_dmabuf(s, 1)))
|
1935 |
|
|
return ret;
|
1936 |
|
|
}
|
1937 |
|
|
if (!access_ok(VERIFY_READ, buffer, count))
|
1938 |
|
|
return -EFAULT;
|
1939 |
|
|
ret = 0;
|
1940 |
|
|
|
1941 |
|
|
add_wait_queue(&s->dma_dac.wait, &wait);
|
1942 |
|
|
while (count > 0) {
|
1943 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
1944 |
|
|
if (s->dma_dac.count < 0) {
|
1945 |
|
|
s->dma_dac.count = 0;
|
1946 |
|
|
s->dma_dac.swptr = s->dma_dac.hwptr;
|
1947 |
|
|
}
|
1948 |
|
|
if (s->status & DO_DUAL_DAC) {
|
1949 |
|
|
s->dma_adc.swptr = s->dma_dac.swptr;
|
1950 |
|
|
s->dma_adc.count = s->dma_dac.count;
|
1951 |
|
|
s->dma_adc.endcleared = s->dma_dac.endcleared;
|
1952 |
|
|
}
|
1953 |
|
|
swptr = s->dma_dac.swptr;
|
1954 |
|
|
cnt = s->dma_dac.dmasize-swptr;
|
1955 |
|
|
if (s->status & DO_AC3_SW) {
|
1956 |
|
|
if (s->dma_dac.count + 2 * cnt > s->dma_dac.dmasize)
|
1957 |
|
|
cnt = (s->dma_dac.dmasize - s->dma_dac.count) / 2;
|
1958 |
|
|
} else {
|
1959 |
|
|
if (s->dma_dac.count + cnt > s->dma_dac.dmasize)
|
1960 |
|
|
cnt = s->dma_dac.dmasize - s->dma_dac.count;
|
1961 |
|
|
}
|
1962 |
|
|
if (cnt <= 0)
|
1963 |
|
|
__set_current_state(TASK_INTERRUPTIBLE);
|
1964 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
1965 |
|
|
if (cnt > count)
|
1966 |
|
|
cnt = count;
|
1967 |
|
|
if ((s->status & DO_DUAL_DAC) && (cnt > count / 2))
|
1968 |
|
|
cnt = count / 2;
|
1969 |
|
|
if (cnt <= 0) {
|
1970 |
|
|
start_dac(s);
|
1971 |
|
|
if (file->f_flags & O_NONBLOCK) {
|
1972 |
|
|
if (!ret)
|
1973 |
|
|
ret = -EAGAIN;
|
1974 |
|
|
goto out;
|
1975 |
|
|
}
|
1976 |
|
|
if (!schedule_timeout(HZ)) {
|
1977 |
|
|
printk(KERN_DEBUG "cmpci: write: chip lockup? dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
|
1978 |
|
|
s->dma_dac.dmasize, s->dma_dac.fragsize, s->dma_dac.count,
|
1979 |
|
|
s->dma_dac.hwptr, s->dma_dac.swptr);
|
1980 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
1981 |
|
|
stop_dac_unlocked(s);
|
1982 |
|
|
set_dmadac(s, s->dma_dac.rawphys, s->dma_dac.dmasamples);
|
1983 |
|
|
/* program sample counts */
|
1984 |
|
|
set_countdac(s, s->dma_dac.fragsamples);
|
1985 |
|
|
s->dma_dac.count = s->dma_dac.hwptr = s->dma_dac.swptr = 0;
|
1986 |
|
|
if (s->status & DO_DUAL_DAC) {
|
1987 |
|
|
set_dmadac1(s, s->dma_adc.rawphys, s->dma_adc.dmasamples);
|
1988 |
|
|
s->dma_adc.count = s->dma_adc.hwptr = s->dma_adc.swptr = 0;
|
1989 |
|
|
}
|
1990 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
1991 |
|
|
}
|
1992 |
|
|
if (signal_pending(current)) {
|
1993 |
|
|
if (!ret)
|
1994 |
|
|
ret = -ERESTARTSYS;
|
1995 |
|
|
goto out;
|
1996 |
|
|
}
|
1997 |
|
|
continue;
|
1998 |
|
|
}
|
1999 |
|
|
if (s->status & DO_AC3_SW) {
|
2000 |
|
|
// clip exceeded data, caught by 033 and 037
|
2001 |
|
|
if (swptr + 2 * cnt > s->dma_dac.dmasize)
|
2002 |
|
|
cnt = (s->dma_dac.dmasize - swptr) / 2;
|
2003 |
|
|
if ((ret = trans_ac3(s, s->dma_dac.rawbuf + swptr, buffer, cnt)))
|
2004 |
|
|
goto out;
|
2005 |
|
|
swptr = (swptr + 2 * cnt) % s->dma_dac.dmasize;
|
2006 |
|
|
} else if (s->status & DO_DUAL_DAC) {
|
2007 |
|
|
int i;
|
2008 |
|
|
unsigned long *src, *dst0, *dst1;
|
2009 |
|
|
|
2010 |
|
|
src = (unsigned long *) buffer;
|
2011 |
|
|
dst0 = (unsigned long *) (s->dma_dac.rawbuf + swptr);
|
2012 |
|
|
dst1 = (unsigned long *) (s->dma_adc.rawbuf + swptr);
|
2013 |
|
|
// copy left/right sample at one time
|
2014 |
|
|
for (i = 0; i <= cnt / 4; i++) {
|
2015 |
|
|
if ((ret = __get_user(*dst0++, src++)))
|
2016 |
|
|
goto out;
|
2017 |
|
|
if ((ret = __get_user(*dst1++, src++)))
|
2018 |
|
|
goto out;
|
2019 |
|
|
}
|
2020 |
|
|
swptr = (swptr + cnt) % s->dma_dac.dmasize;
|
2021 |
|
|
} else {
|
2022 |
|
|
if (copy_from_user(s->dma_dac.rawbuf + swptr, buffer, cnt)) {
|
2023 |
|
|
if (!ret)
|
2024 |
|
|
ret = -EFAULT;
|
2025 |
|
|
goto out;
|
2026 |
|
|
}
|
2027 |
|
|
swptr = (swptr + cnt) % s->dma_dac.dmasize;
|
2028 |
|
|
}
|
2029 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
2030 |
|
|
s->dma_dac.swptr = swptr;
|
2031 |
|
|
s->dma_dac.count += cnt;
|
2032 |
|
|
if (s->status & DO_AC3_SW)
|
2033 |
|
|
s->dma_dac.count += cnt;
|
2034 |
|
|
s->dma_dac.endcleared = 0;
|
2035 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
2036 |
|
|
count -= cnt;
|
2037 |
|
|
buffer += cnt;
|
2038 |
|
|
ret += cnt;
|
2039 |
|
|
if (s->status & DO_DUAL_DAC) {
|
2040 |
|
|
count -= cnt;
|
2041 |
|
|
buffer += cnt;
|
2042 |
|
|
ret += cnt;
|
2043 |
|
|
}
|
2044 |
|
|
start_dac(s);
|
2045 |
|
|
}
|
2046 |
|
|
out:
|
2047 |
|
|
remove_wait_queue(&s->dma_dac.wait, &wait);
|
2048 |
|
|
set_current_state(TASK_RUNNING);
|
2049 |
|
|
return ret;
|
2050 |
|
|
}
|
2051 |
|
|
|
2052 |
|
|
static unsigned int cm_poll(struct file *file, struct poll_table_struct *wait)
|
2053 |
|
|
{
|
2054 |
|
|
struct cm_state *s = (struct cm_state *)file->private_data;
|
2055 |
|
|
unsigned long flags;
|
2056 |
|
|
unsigned int mask = 0;
|
2057 |
|
|
|
2058 |
|
|
VALIDATE_STATE(s);
|
2059 |
|
|
if (file->f_mode & FMODE_WRITE)
|
2060 |
|
|
poll_wait(file, &s->dma_dac.wait, wait);
|
2061 |
|
|
if (file->f_mode & FMODE_READ)
|
2062 |
|
|
poll_wait(file, &s->dma_adc.wait, wait);
|
2063 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
2064 |
|
|
cm_update_ptr(s);
|
2065 |
|
|
if (file->f_mode & FMODE_READ) {
|
2066 |
|
|
if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
|
2067 |
|
|
mask |= POLLIN | POLLRDNORM;
|
2068 |
|
|
}
|
2069 |
|
|
if (file->f_mode & FMODE_WRITE) {
|
2070 |
|
|
if (s->dma_dac.mapped) {
|
2071 |
|
|
if (s->dma_dac.count >= (signed)s->dma_dac.fragsize)
|
2072 |
|
|
mask |= POLLOUT | POLLWRNORM;
|
2073 |
|
|
} else {
|
2074 |
|
|
if ((signed)s->dma_dac.dmasize >= s->dma_dac.count + (signed)s->dma_dac.fragsize)
|
2075 |
|
|
mask |= POLLOUT | POLLWRNORM;
|
2076 |
|
|
}
|
2077 |
|
|
}
|
2078 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
2079 |
|
|
return mask;
|
2080 |
|
|
}
|
2081 |
|
|
|
2082 |
|
|
static int cm_mmap(struct file *file, struct vm_area_struct *vma)
|
2083 |
|
|
{
|
2084 |
|
|
struct cm_state *s = (struct cm_state *)file->private_data;
|
2085 |
|
|
struct dmabuf *db;
|
2086 |
|
|
int ret = -EINVAL;
|
2087 |
|
|
unsigned long size;
|
2088 |
|
|
|
2089 |
|
|
VALIDATE_STATE(s);
|
2090 |
|
|
lock_kernel();
|
2091 |
|
|
if (vma->vm_flags & VM_WRITE) {
|
2092 |
|
|
if ((ret = prog_dmabuf(s, 0)) != 0)
|
2093 |
|
|
goto out;
|
2094 |
|
|
db = &s->dma_dac;
|
2095 |
|
|
} else if (vma->vm_flags & VM_READ) {
|
2096 |
|
|
if ((ret = prog_dmabuf(s, 1)) != 0)
|
2097 |
|
|
goto out;
|
2098 |
|
|
db = &s->dma_adc;
|
2099 |
|
|
} else
|
2100 |
|
|
goto out;
|
2101 |
|
|
ret = -EINVAL;
|
2102 |
|
|
if (vma->vm_pgoff != 0)
|
2103 |
|
|
goto out;
|
2104 |
|
|
size = vma->vm_end - vma->vm_start;
|
2105 |
|
|
if (size > (PAGE_SIZE << db->buforder))
|
2106 |
|
|
goto out;
|
2107 |
|
|
ret = -EINVAL;
|
2108 |
|
|
if (remap_page_range(vma->vm_start, virt_to_phys(db->rawbuf), size, vma->vm_page_prot))
|
2109 |
|
|
goto out;
|
2110 |
|
|
db->mapped = 1;
|
2111 |
|
|
ret = 0;
|
2112 |
|
|
out:
|
2113 |
|
|
unlock_kernel();
|
2114 |
|
|
return ret;
|
2115 |
|
|
}
|
2116 |
|
|
|
2117 |
|
|
#define SNDCTL_SPDIF_COPYRIGHT _SIOW('S', 0, int) // set/reset S/PDIF copy protection
|
2118 |
|
|
#define SNDCTL_SPDIF_LOOP _SIOW('S', 1, int) // set/reset S/PDIF loop
|
2119 |
|
|
#define SNDCTL_SPDIF_MONITOR _SIOW('S', 2, int) // set S/PDIF monitor
|
2120 |
|
|
#define SNDCTL_SPDIF_LEVEL _SIOW('S', 3, int) // set/reset S/PDIF out level
|
2121 |
|
|
#define SNDCTL_SPDIF_INV _SIOW('S', 4, int) // set/reset S/PDIF in inverse
|
2122 |
|
|
#define SNDCTL_SPDIF_SEL2 _SIOW('S', 5, int) // set S/PDIF in #2
|
2123 |
|
|
#define SNDCTL_SPDIF_VALID _SIOW('S', 6, int) // set S/PDIF valid
|
2124 |
|
|
#define SNDCTL_SPDIFOUT _SIOW('S', 7, int) // set S/PDIF out
|
2125 |
|
|
#define SNDCTL_SPDIFIN _SIOW('S', 8, int) // set S/PDIF out
|
2126 |
|
|
|
2127 |
|
|
static int cm_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
|
2128 |
|
|
{
|
2129 |
|
|
struct cm_state *s = (struct cm_state *)file->private_data;
|
2130 |
|
|
unsigned long flags;
|
2131 |
|
|
audio_buf_info abinfo;
|
2132 |
|
|
count_info cinfo;
|
2133 |
|
|
int val, mapped, ret;
|
2134 |
|
|
unsigned char fmtm, fmtd;
|
2135 |
|
|
|
2136 |
|
|
VALIDATE_STATE(s);
|
2137 |
|
|
mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac.mapped) ||
|
2138 |
|
|
((file->f_mode & FMODE_READ) && s->dma_adc.mapped);
|
2139 |
|
|
switch (cmd) {
|
2140 |
|
|
case OSS_GETVERSION:
|
2141 |
|
|
return put_user(SOUND_VERSION, (int *)arg);
|
2142 |
|
|
|
2143 |
|
|
case SNDCTL_DSP_SYNC:
|
2144 |
|
|
if (file->f_mode & FMODE_WRITE)
|
2145 |
|
|
return drain_dac(s, 0/*file->f_flags & O_NONBLOCK*/);
|
2146 |
|
|
return 0;
|
2147 |
|
|
|
2148 |
|
|
case SNDCTL_DSP_SETDUPLEX:
|
2149 |
|
|
return 0;
|
2150 |
|
|
|
2151 |
|
|
case SNDCTL_DSP_GETCAPS:
|
2152 |
|
|
return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP | DSP_CAP_BIND, (int *)arg);
|
2153 |
|
|
|
2154 |
|
|
case SNDCTL_DSP_RESET:
|
2155 |
|
|
if (file->f_mode & FMODE_WRITE) {
|
2156 |
|
|
stop_dac(s);
|
2157 |
|
|
synchronize_irq();
|
2158 |
|
|
s->dma_dac.swptr = s->dma_dac.hwptr = s->dma_dac.count = s->dma_dac.total_bytes = 0;
|
2159 |
|
|
if (s->status & DO_DUAL_DAC)
|
2160 |
|
|
s->dma_adc.swptr = s->dma_adc.hwptr = s->dma_adc.count = s->dma_adc.total_bytes = 0;
|
2161 |
|
|
}
|
2162 |
|
|
if (file->f_mode & FMODE_READ) {
|
2163 |
|
|
stop_adc(s);
|
2164 |
|
|
synchronize_irq();
|
2165 |
|
|
s->dma_adc.swptr = s->dma_adc.hwptr = s->dma_adc.count = s->dma_adc.total_bytes = 0;
|
2166 |
|
|
}
|
2167 |
|
|
return 0;
|
2168 |
|
|
|
2169 |
|
|
case SNDCTL_DSP_SPEED:
|
2170 |
|
|
if (get_user(val, (int *)arg))
|
2171 |
|
|
return -EFAULT;
|
2172 |
|
|
if (val >= 0) {
|
2173 |
|
|
if (file->f_mode & FMODE_READ) {
|
2174 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
2175 |
|
|
stop_adc_unlocked(s);
|
2176 |
|
|
s->dma_adc.ready = 0;
|
2177 |
|
|
set_adc_rate_unlocked(s, val);
|
2178 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
2179 |
|
|
}
|
2180 |
|
|
if (file->f_mode & FMODE_WRITE) {
|
2181 |
|
|
stop_dac(s);
|
2182 |
|
|
s->dma_dac.ready = 0;
|
2183 |
|
|
if (s->status & DO_DUAL_DAC)
|
2184 |
|
|
s->dma_adc.ready = 0;
|
2185 |
|
|
set_dac_rate(s, val);
|
2186 |
|
|
}
|
2187 |
|
|
}
|
2188 |
|
|
return put_user((file->f_mode & FMODE_READ) ? s->rateadc : s->ratedac, (int *)arg);
|
2189 |
|
|
|
2190 |
|
|
case SNDCTL_DSP_STEREO:
|
2191 |
|
|
if (get_user(val, (int *)arg))
|
2192 |
|
|
return -EFAULT;
|
2193 |
|
|
fmtd = 0;
|
2194 |
|
|
fmtm = ~0;
|
2195 |
|
|
if (file->f_mode & FMODE_READ) {
|
2196 |
|
|
stop_adc(s);
|
2197 |
|
|
s->dma_adc.ready = 0;
|
2198 |
|
|
if (val)
|
2199 |
|
|
fmtd |= CM_CFMT_STEREO << CM_CFMT_ADCSHIFT;
|
2200 |
|
|
else
|
2201 |
|
|
fmtm &= ~(CM_CFMT_STEREO << CM_CFMT_ADCSHIFT);
|
2202 |
|
|
}
|
2203 |
|
|
if (file->f_mode & FMODE_WRITE) {
|
2204 |
|
|
stop_dac(s);
|
2205 |
|
|
s->dma_dac.ready = 0;
|
2206 |
|
|
if (val)
|
2207 |
|
|
fmtd |= CM_CFMT_STEREO << CM_CFMT_DACSHIFT;
|
2208 |
|
|
else
|
2209 |
|
|
fmtm &= ~(CM_CFMT_STEREO << CM_CFMT_DACSHIFT);
|
2210 |
|
|
if (s->status & DO_DUAL_DAC) {
|
2211 |
|
|
s->dma_adc.ready = 0;
|
2212 |
|
|
if (val)
|
2213 |
|
|
fmtd |= CM_CFMT_STEREO << CM_CFMT_ADCSHIFT;
|
2214 |
|
|
else
|
2215 |
|
|
fmtm &= ~(CM_CFMT_STEREO << CM_CFMT_ADCSHIFT);
|
2216 |
|
|
}
|
2217 |
|
|
}
|
2218 |
|
|
set_fmt(s, fmtm, fmtd);
|
2219 |
|
|
return 0;
|
2220 |
|
|
|
2221 |
|
|
case SNDCTL_DSP_CHANNELS:
|
2222 |
|
|
if (get_user(val, (int *)arg))
|
2223 |
|
|
return -EFAULT;
|
2224 |
|
|
if (val != 0) {
|
2225 |
|
|
fmtd = 0;
|
2226 |
|
|
fmtm = ~0;
|
2227 |
|
|
if (file->f_mode & FMODE_READ) {
|
2228 |
|
|
stop_adc(s);
|
2229 |
|
|
s->dma_adc.ready = 0;
|
2230 |
|
|
if (val >= 2)
|
2231 |
|
|
fmtd |= CM_CFMT_STEREO << CM_CFMT_ADCSHIFT;
|
2232 |
|
|
else
|
2233 |
|
|
fmtm &= ~(CM_CFMT_STEREO << CM_CFMT_ADCSHIFT);
|
2234 |
|
|
}
|
2235 |
|
|
if (file->f_mode & FMODE_WRITE) {
|
2236 |
|
|
stop_dac(s);
|
2237 |
|
|
s->dma_dac.ready = 0;
|
2238 |
|
|
if (val >= 2)
|
2239 |
|
|
fmtd |= CM_CFMT_STEREO << CM_CFMT_DACSHIFT;
|
2240 |
|
|
else
|
2241 |
|
|
fmtm &= ~(CM_CFMT_STEREO << CM_CFMT_DACSHIFT);
|
2242 |
|
|
if (s->status & DO_DUAL_DAC) {
|
2243 |
|
|
s->dma_adc.ready = 0;
|
2244 |
|
|
if (val >= 2)
|
2245 |
|
|
fmtd |= CM_CFMT_STEREO << CM_CFMT_ADCSHIFT;
|
2246 |
|
|
else
|
2247 |
|
|
fmtm &= ~(CM_CFMT_STEREO << CM_CFMT_ADCSHIFT);
|
2248 |
|
|
}
|
2249 |
|
|
}
|
2250 |
|
|
set_fmt(s, fmtm, fmtd);
|
2251 |
|
|
if ((s->capability & CAN_MULTI_CH)
|
2252 |
|
|
&& (file->f_mode & FMODE_WRITE)) {
|
2253 |
|
|
val = set_dac_channels(s, val);
|
2254 |
|
|
return put_user(val, (int *)arg);
|
2255 |
|
|
}
|
2256 |
|
|
}
|
2257 |
|
|
return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (CM_CFMT_STEREO << CM_CFMT_ADCSHIFT)
|
2258 |
|
|
: (CM_CFMT_STEREO << CM_CFMT_DACSHIFT))) ? 2 : 1, (int *)arg);
|
2259 |
|
|
|
2260 |
|
|
case SNDCTL_DSP_GETFMTS: /* Returns a mask */
|
2261 |
|
|
return put_user(AFMT_S16_LE|AFMT_U8|AFMT_AC3, (int *)arg);
|
2262 |
|
|
|
2263 |
|
|
case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
|
2264 |
|
|
if (get_user(val, (int *)arg))
|
2265 |
|
|
return -EFAULT;
|
2266 |
|
|
if (val != AFMT_QUERY) {
|
2267 |
|
|
fmtd = 0;
|
2268 |
|
|
fmtm = ~0;
|
2269 |
|
|
if (file->f_mode & FMODE_READ) {
|
2270 |
|
|
stop_adc(s);
|
2271 |
|
|
s->dma_adc.ready = 0;
|
2272 |
|
|
if (val == AFMT_S16_LE)
|
2273 |
|
|
fmtd |= CM_CFMT_16BIT << CM_CFMT_ADCSHIFT;
|
2274 |
|
|
else
|
2275 |
|
|
fmtm &= ~(CM_CFMT_16BIT << CM_CFMT_ADCSHIFT);
|
2276 |
|
|
}
|
2277 |
|
|
if (file->f_mode & FMODE_WRITE) {
|
2278 |
|
|
stop_dac(s);
|
2279 |
|
|
s->dma_dac.ready = 0;
|
2280 |
|
|
if (val == AFMT_S16_LE || val == AFMT_AC3)
|
2281 |
|
|
fmtd |= CM_CFMT_16BIT << CM_CFMT_DACSHIFT;
|
2282 |
|
|
else
|
2283 |
|
|
fmtm &= ~(CM_CFMT_16BIT << CM_CFMT_DACSHIFT);
|
2284 |
|
|
if (val == AFMT_AC3) {
|
2285 |
|
|
fmtd |= CM_CFMT_STEREO << CM_CFMT_DACSHIFT;
|
2286 |
|
|
set_ac3(s, s->ratedac);
|
2287 |
|
|
} else
|
2288 |
|
|
set_ac3(s, 0);
|
2289 |
|
|
if (s->status & DO_DUAL_DAC) {
|
2290 |
|
|
s->dma_adc.ready = 0;
|
2291 |
|
|
if (val == AFMT_S16_LE)
|
2292 |
|
|
fmtd |= CM_CFMT_STEREO << CM_CFMT_ADCSHIFT;
|
2293 |
|
|
else
|
2294 |
|
|
fmtm &= ~(CM_CFMT_STEREO << CM_CFMT_ADCSHIFT);
|
2295 |
|
|
}
|
2296 |
|
|
}
|
2297 |
|
|
set_fmt(s, fmtm, fmtd);
|
2298 |
|
|
}
|
2299 |
|
|
if (s->status & DO_AC3) return put_user(AFMT_AC3, (int *)arg);
|
2300 |
|
|
return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (CM_CFMT_16BIT << CM_CFMT_ADCSHIFT)
|
2301 |
|
|
: (CM_CFMT_16BIT << CM_CFMT_DACSHIFT))) ? AFMT_S16_LE : AFMT_U8, (int *)arg);
|
2302 |
|
|
|
2303 |
|
|
case SNDCTL_DSP_POST:
|
2304 |
|
|
return 0;
|
2305 |
|
|
|
2306 |
|
|
case SNDCTL_DSP_GETTRIGGER:
|
2307 |
|
|
val = 0;
|
2308 |
|
|
if (s->status & DO_DUAL_DAC) {
|
2309 |
|
|
if (file->f_mode & FMODE_WRITE &&
|
2310 |
|
|
(s->enable & ENDAC) &&
|
2311 |
|
|
(s->enable & ENADC))
|
2312 |
|
|
val |= PCM_ENABLE_OUTPUT;
|
2313 |
|
|
return put_user(val, (int *)arg);
|
2314 |
|
|
}
|
2315 |
|
|
if (file->f_mode & FMODE_READ && s->enable & ENADC)
|
2316 |
|
|
val |= PCM_ENABLE_INPUT;
|
2317 |
|
|
if (file->f_mode & FMODE_WRITE && s->enable & ENDAC)
|
2318 |
|
|
val |= PCM_ENABLE_OUTPUT;
|
2319 |
|
|
return put_user(val, (int *)arg);
|
2320 |
|
|
|
2321 |
|
|
case SNDCTL_DSP_SETTRIGGER:
|
2322 |
|
|
if (get_user(val, (int *)arg))
|
2323 |
|
|
return -EFAULT;
|
2324 |
|
|
if (file->f_mode & FMODE_READ) {
|
2325 |
|
|
if (val & PCM_ENABLE_INPUT) {
|
2326 |
|
|
if (!s->dma_adc.ready && (ret = prog_dmabuf(s, 1)))
|
2327 |
|
|
return ret;
|
2328 |
|
|
start_adc(s);
|
2329 |
|
|
} else
|
2330 |
|
|
stop_adc(s);
|
2331 |
|
|
}
|
2332 |
|
|
if (file->f_mode & FMODE_WRITE) {
|
2333 |
|
|
if (val & PCM_ENABLE_OUTPUT) {
|
2334 |
|
|
if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0)))
|
2335 |
|
|
return ret;
|
2336 |
|
|
if (s->status & DO_DUAL_DAC) {
|
2337 |
|
|
if (!s->dma_adc.ready && (ret = prog_dmabuf(s, 1)))
|
2338 |
|
|
return ret;
|
2339 |
|
|
}
|
2340 |
|
|
start_dac(s);
|
2341 |
|
|
} else
|
2342 |
|
|
stop_dac(s);
|
2343 |
|
|
}
|
2344 |
|
|
return 0;
|
2345 |
|
|
|
2346 |
|
|
case SNDCTL_DSP_GETOSPACE:
|
2347 |
|
|
if (!(file->f_mode & FMODE_WRITE))
|
2348 |
|
|
return -EINVAL;
|
2349 |
|
|
if (!(s->enable & ENDAC) && (val = prog_dmabuf(s, 0)) != 0)
|
2350 |
|
|
return val;
|
2351 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
2352 |
|
|
cm_update_ptr(s);
|
2353 |
|
|
abinfo.fragsize = s->dma_dac.fragsize;
|
2354 |
|
|
abinfo.bytes = s->dma_dac.dmasize - s->dma_dac.count;
|
2355 |
|
|
abinfo.fragstotal = s->dma_dac.numfrag;
|
2356 |
|
|
abinfo.fragments = abinfo.bytes >> s->dma_dac.fragshift;
|
2357 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
2358 |
|
|
return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
|
2359 |
|
|
|
2360 |
|
|
case SNDCTL_DSP_GETISPACE:
|
2361 |
|
|
if (!(file->f_mode & FMODE_READ))
|
2362 |
|
|
return -EINVAL;
|
2363 |
|
|
if (!(s->enable & ENADC) && (val = prog_dmabuf(s, 1)) != 0)
|
2364 |
|
|
return val;
|
2365 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
2366 |
|
|
cm_update_ptr(s);
|
2367 |
|
|
abinfo.fragsize = s->dma_adc.fragsize;
|
2368 |
|
|
abinfo.bytes = s->dma_adc.count;
|
2369 |
|
|
abinfo.fragstotal = s->dma_adc.numfrag;
|
2370 |
|
|
abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift;
|
2371 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
2372 |
|
|
return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
|
2373 |
|
|
|
2374 |
|
|
case SNDCTL_DSP_NONBLOCK:
|
2375 |
|
|
file->f_flags |= O_NONBLOCK;
|
2376 |
|
|
return 0;
|
2377 |
|
|
|
2378 |
|
|
case SNDCTL_DSP_GETODELAY:
|
2379 |
|
|
if (!(file->f_mode & FMODE_WRITE))
|
2380 |
|
|
return -EINVAL;
|
2381 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
2382 |
|
|
cm_update_ptr(s);
|
2383 |
|
|
val = s->dma_dac.count;
|
2384 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
2385 |
|
|
return put_user(val, (int *)arg);
|
2386 |
|
|
|
2387 |
|
|
case SNDCTL_DSP_GETIPTR:
|
2388 |
|
|
if (!(file->f_mode & FMODE_READ))
|
2389 |
|
|
return -EINVAL;
|
2390 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
2391 |
|
|
cm_update_ptr(s);
|
2392 |
|
|
cinfo.bytes = s->dma_adc.total_bytes;
|
2393 |
|
|
cinfo.blocks = s->dma_adc.count >> s->dma_adc.fragshift;
|
2394 |
|
|
cinfo.ptr = s->dma_adc.hwptr;
|
2395 |
|
|
if (s->dma_adc.mapped)
|
2396 |
|
|
s->dma_adc.count &= s->dma_adc.fragsize-1;
|
2397 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
2398 |
|
|
return copy_to_user((void *)arg, &cinfo, sizeof(cinfo)) ? -EFAULT : 0;
|
2399 |
|
|
|
2400 |
|
|
case SNDCTL_DSP_GETOPTR:
|
2401 |
|
|
if (!(file->f_mode & FMODE_WRITE))
|
2402 |
|
|
return -EINVAL;
|
2403 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
2404 |
|
|
cm_update_ptr(s);
|
2405 |
|
|
cinfo.bytes = s->dma_dac.total_bytes;
|
2406 |
|
|
cinfo.blocks = s->dma_dac.count >> s->dma_dac.fragshift;
|
2407 |
|
|
cinfo.ptr = s->dma_dac.hwptr;
|
2408 |
|
|
if (s->dma_dac.mapped)
|
2409 |
|
|
s->dma_dac.count &= s->dma_dac.fragsize-1;
|
2410 |
|
|
if (s->status & DO_DUAL_DAC) {
|
2411 |
|
|
if (s->dma_adc.mapped)
|
2412 |
|
|
s->dma_adc.count &= s->dma_adc.fragsize-1;
|
2413 |
|
|
}
|
2414 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
2415 |
|
|
return copy_to_user((void *)arg, &cinfo, sizeof(cinfo)) ? -EFAULT : 0;
|
2416 |
|
|
|
2417 |
|
|
case SNDCTL_DSP_GETBLKSIZE:
|
2418 |
|
|
if (file->f_mode & FMODE_WRITE) {
|
2419 |
|
|
if ((val = prog_dmabuf(s, 0)))
|
2420 |
|
|
return val;
|
2421 |
|
|
if (s->status & DO_DUAL_DAC) {
|
2422 |
|
|
if ((val = prog_dmabuf(s, 1)))
|
2423 |
|
|
return val;
|
2424 |
|
|
return put_user(2 * s->dma_dac.fragsize, (int *)arg);
|
2425 |
|
|
}
|
2426 |
|
|
return put_user(s->dma_dac.fragsize, (int *)arg);
|
2427 |
|
|
}
|
2428 |
|
|
if ((val = prog_dmabuf(s, 1)))
|
2429 |
|
|
return val;
|
2430 |
|
|
return put_user(s->dma_adc.fragsize, (int *)arg);
|
2431 |
|
|
|
2432 |
|
|
case SNDCTL_DSP_SETFRAGMENT:
|
2433 |
|
|
if (get_user(val, (int *)arg))
|
2434 |
|
|
return -EFAULT;
|
2435 |
|
|
if (file->f_mode & FMODE_READ) {
|
2436 |
|
|
s->dma_adc.ossfragshift = val & 0xffff;
|
2437 |
|
|
s->dma_adc.ossmaxfrags = (val >> 16) & 0xffff;
|
2438 |
|
|
if (s->dma_adc.ossfragshift < 4)
|
2439 |
|
|
s->dma_adc.ossfragshift = 4;
|
2440 |
|
|
if (s->dma_adc.ossfragshift > 15)
|
2441 |
|
|
s->dma_adc.ossfragshift = 15;
|
2442 |
|
|
if (s->dma_adc.ossmaxfrags < 4)
|
2443 |
|
|
s->dma_adc.ossmaxfrags = 4;
|
2444 |
|
|
}
|
2445 |
|
|
if (file->f_mode & FMODE_WRITE) {
|
2446 |
|
|
s->dma_dac.ossfragshift = val & 0xffff;
|
2447 |
|
|
s->dma_dac.ossmaxfrags = (val >> 16) & 0xffff;
|
2448 |
|
|
if (s->dma_dac.ossfragshift < 4)
|
2449 |
|
|
s->dma_dac.ossfragshift = 4;
|
2450 |
|
|
if (s->dma_dac.ossfragshift > 15)
|
2451 |
|
|
s->dma_dac.ossfragshift = 15;
|
2452 |
|
|
if (s->dma_dac.ossmaxfrags < 4)
|
2453 |
|
|
s->dma_dac.ossmaxfrags = 4;
|
2454 |
|
|
if (s->status & DO_DUAL_DAC) {
|
2455 |
|
|
s->dma_adc.ossfragshift = s->dma_dac.ossfragshift;
|
2456 |
|
|
s->dma_adc.ossmaxfrags = s->dma_dac.ossmaxfrags;
|
2457 |
|
|
}
|
2458 |
|
|
}
|
2459 |
|
|
return 0;
|
2460 |
|
|
|
2461 |
|
|
case SNDCTL_DSP_SUBDIVIDE:
|
2462 |
|
|
if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
|
2463 |
|
|
(file->f_mode & FMODE_WRITE && s->dma_dac.subdivision))
|
2464 |
|
|
return -EINVAL;
|
2465 |
|
|
if (get_user(val, (int *)arg))
|
2466 |
|
|
return -EFAULT;
|
2467 |
|
|
if (val != 1 && val != 2 && val != 4)
|
2468 |
|
|
return -EINVAL;
|
2469 |
|
|
if (file->f_mode & FMODE_READ)
|
2470 |
|
|
s->dma_adc.subdivision = val;
|
2471 |
|
|
if (file->f_mode & FMODE_WRITE) {
|
2472 |
|
|
s->dma_dac.subdivision = val;
|
2473 |
|
|
if (s->status & DO_DUAL_DAC)
|
2474 |
|
|
s->dma_adc.subdivision = val;
|
2475 |
|
|
}
|
2476 |
|
|
return 0;
|
2477 |
|
|
|
2478 |
|
|
case SOUND_PCM_READ_RATE:
|
2479 |
|
|
return put_user((file->f_mode & FMODE_READ) ? s->rateadc : s->ratedac, (int *)arg);
|
2480 |
|
|
|
2481 |
|
|
case SOUND_PCM_READ_CHANNELS:
|
2482 |
|
|
return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (CM_CFMT_STEREO << CM_CFMT_ADCSHIFT) : (CM_CFMT_STEREO << CM_CFMT_DACSHIFT))) ? 2 : 1, (int *)arg);
|
2483 |
|
|
|
2484 |
|
|
case SOUND_PCM_READ_BITS:
|
2485 |
|
|
return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (CM_CFMT_16BIT << CM_CFMT_ADCSHIFT) : (CM_CFMT_16BIT << CM_CFMT_DACSHIFT))) ? 16 : 8, (int *)arg);
|
2486 |
|
|
|
2487 |
|
|
case SOUND_PCM_READ_FILTER:
|
2488 |
|
|
return put_user((file->f_mode & FMODE_READ) ? s->rateadc : s->ratedac, (int *)arg);
|
2489 |
|
|
|
2490 |
|
|
case SNDCTL_DSP_GETCHANNELMASK:
|
2491 |
|
|
return put_user(DSP_BIND_FRONT|DSP_BIND_SURR|DSP_BIND_CENTER_LFE|DSP_BIND_SPDIF, (int *)arg);
|
2492 |
|
|
|
2493 |
|
|
case SNDCTL_DSP_BIND_CHANNEL:
|
2494 |
|
|
if (get_user(val, (int *)arg))
|
2495 |
|
|
return -EFAULT;
|
2496 |
|
|
if (val == DSP_BIND_QUERY) {
|
2497 |
|
|
val = DSP_BIND_FRONT;
|
2498 |
|
|
if (s->status & DO_SPDIF_OUT)
|
2499 |
|
|
val |= DSP_BIND_SPDIF;
|
2500 |
|
|
else {
|
2501 |
|
|
if (s->curr_channels == 4)
|
2502 |
|
|
val |= DSP_BIND_SURR;
|
2503 |
|
|
if (s->curr_channels > 4)
|
2504 |
|
|
val |= DSP_BIND_CENTER_LFE;
|
2505 |
|
|
}
|
2506 |
|
|
} else {
|
2507 |
|
|
if (file->f_mode & FMODE_READ) {
|
2508 |
|
|
stop_adc(s);
|
2509 |
|
|
s->dma_adc.ready = 0;
|
2510 |
|
|
if (val & DSP_BIND_SPDIF) {
|
2511 |
|
|
set_spdifin(s, s->rateadc);
|
2512 |
|
|
if (!(s->status & DO_SPDIF_OUT))
|
2513 |
|
|
val &= ~DSP_BIND_SPDIF;
|
2514 |
|
|
}
|
2515 |
|
|
}
|
2516 |
|
|
if (file->f_mode & FMODE_WRITE) {
|
2517 |
|
|
stop_dac(s);
|
2518 |
|
|
s->dma_dac.ready = 0;
|
2519 |
|
|
if (val & DSP_BIND_SPDIF) {
|
2520 |
|
|
set_spdifout(s, s->ratedac);
|
2521 |
|
|
set_dac_channels(s, s->fmt & (CM_CFMT_STEREO << CM_CFMT_DACSHIFT) ? 2 : 1);
|
2522 |
|
|
if (!(s->status & DO_SPDIF_OUT))
|
2523 |
|
|
val &= ~DSP_BIND_SPDIF;
|
2524 |
|
|
} else {
|
2525 |
|
|
int channels;
|
2526 |
|
|
int mask;
|
2527 |
|
|
|
2528 |
|
|
mask = val & (DSP_BIND_FRONT|DSP_BIND_SURR|DSP_BIND_CENTER_LFE);
|
2529 |
|
|
switch (mask) {
|
2530 |
|
|
case DSP_BIND_FRONT:
|
2531 |
|
|
channels = 2;
|
2532 |
|
|
break;
|
2533 |
|
|
case DSP_BIND_FRONT|DSP_BIND_SURR:
|
2534 |
|
|
channels = 4;
|
2535 |
|
|
break;
|
2536 |
|
|
case DSP_BIND_FRONT|DSP_BIND_SURR|DSP_BIND_CENTER_LFE:
|
2537 |
|
|
channels = 6;
|
2538 |
|
|
break;
|
2539 |
|
|
default:
|
2540 |
|
|
channels = s->fmt & (CM_CFMT_STEREO << CM_CFMT_DACSHIFT) ? 2 : 1;
|
2541 |
|
|
break;
|
2542 |
|
|
}
|
2543 |
|
|
set_dac_channels(s, channels);
|
2544 |
|
|
}
|
2545 |
|
|
}
|
2546 |
|
|
}
|
2547 |
|
|
return put_user(val, (int *)arg);
|
2548 |
|
|
|
2549 |
|
|
case SOUND_PCM_WRITE_FILTER:
|
2550 |
|
|
case SNDCTL_DSP_MAPINBUF:
|
2551 |
|
|
case SNDCTL_DSP_MAPOUTBUF:
|
2552 |
|
|
case SNDCTL_DSP_SETSYNCRO:
|
2553 |
|
|
return -EINVAL;
|
2554 |
|
|
case SNDCTL_SPDIF_COPYRIGHT:
|
2555 |
|
|
if (get_user(val, (int *)arg))
|
2556 |
|
|
return -EFAULT;
|
2557 |
|
|
set_spdif_copyright(s, val);
|
2558 |
|
|
return 0;
|
2559 |
|
|
case SNDCTL_SPDIF_LOOP:
|
2560 |
|
|
if (get_user(val, (int *)arg))
|
2561 |
|
|
return -EFAULT;
|
2562 |
|
|
set_spdif_loop(s, val);
|
2563 |
|
|
return 0;
|
2564 |
|
|
case SNDCTL_SPDIF_MONITOR:
|
2565 |
|
|
if (get_user(val, (int *)arg))
|
2566 |
|
|
return -EFAULT;
|
2567 |
|
|
set_spdif_monitor(s, val);
|
2568 |
|
|
return 0;
|
2569 |
|
|
case SNDCTL_SPDIF_LEVEL:
|
2570 |
|
|
if (get_user(val, (int *)arg))
|
2571 |
|
|
return -EFAULT;
|
2572 |
|
|
set_spdifout_level(s, val);
|
2573 |
|
|
return 0;
|
2574 |
|
|
case SNDCTL_SPDIF_INV:
|
2575 |
|
|
if (get_user(val, (int *)arg))
|
2576 |
|
|
return -EFAULT;
|
2577 |
|
|
set_spdifin_inverse(s, val);
|
2578 |
|
|
return 0;
|
2579 |
|
|
case SNDCTL_SPDIF_SEL2:
|
2580 |
|
|
if (get_user(val, (int *)arg))
|
2581 |
|
|
return -EFAULT;
|
2582 |
|
|
set_spdifin_channel2(s, val);
|
2583 |
|
|
return 0;
|
2584 |
|
|
case SNDCTL_SPDIF_VALID:
|
2585 |
|
|
if (get_user(val, (int *)arg))
|
2586 |
|
|
return -EFAULT;
|
2587 |
|
|
set_spdifin_valid(s, val);
|
2588 |
|
|
return 0;
|
2589 |
|
|
case SNDCTL_SPDIFOUT:
|
2590 |
|
|
if (get_user(val, (int *)arg))
|
2591 |
|
|
return -EFAULT;
|
2592 |
|
|
set_spdifout(s, val ? s->ratedac : 0);
|
2593 |
|
|
return 0;
|
2594 |
|
|
case SNDCTL_SPDIFIN:
|
2595 |
|
|
if (get_user(val, (int *)arg))
|
2596 |
|
|
return -EFAULT;
|
2597 |
|
|
set_spdifin(s, val ? s->rateadc : 0);
|
2598 |
|
|
return 0;
|
2599 |
|
|
}
|
2600 |
|
|
return mixer_ioctl(s, cmd, arg);
|
2601 |
|
|
}
|
2602 |
|
|
|
2603 |
|
|
static int cm_open(struct inode *inode, struct file *file)
|
2604 |
|
|
{
|
2605 |
|
|
int minor = MINOR(inode->i_rdev);
|
2606 |
|
|
DECLARE_WAITQUEUE(wait, current);
|
2607 |
|
|
unsigned char fmtm = ~0, fmts = 0;
|
2608 |
|
|
struct list_head *list;
|
2609 |
|
|
struct cm_state *s;
|
2610 |
|
|
|
2611 |
|
|
for (list = devs.next; ; list = list->next) {
|
2612 |
|
|
if (list == &devs)
|
2613 |
|
|
return -ENODEV;
|
2614 |
|
|
s = list_entry(list, struct cm_state, devs);
|
2615 |
|
|
if (!((s->dev_audio ^ minor) & ~0xf))
|
2616 |
|
|
break;
|
2617 |
|
|
}
|
2618 |
|
|
VALIDATE_STATE(s);
|
2619 |
|
|
file->private_data = s;
|
2620 |
|
|
/* wait for device to become free */
|
2621 |
|
|
down(&s->open_sem);
|
2622 |
|
|
while (s->open_mode & file->f_mode) {
|
2623 |
|
|
if (file->f_flags & O_NONBLOCK) {
|
2624 |
|
|
up(&s->open_sem);
|
2625 |
|
|
return -EBUSY;
|
2626 |
|
|
}
|
2627 |
|
|
add_wait_queue(&s->open_wait, &wait);
|
2628 |
|
|
__set_current_state(TASK_INTERRUPTIBLE);
|
2629 |
|
|
up(&s->open_sem);
|
2630 |
|
|
schedule();
|
2631 |
|
|
remove_wait_queue(&s->open_wait, &wait);
|
2632 |
|
|
set_current_state(TASK_RUNNING);
|
2633 |
|
|
if (signal_pending(current))
|
2634 |
|
|
return -ERESTARTSYS;
|
2635 |
|
|
down(&s->open_sem);
|
2636 |
|
|
}
|
2637 |
|
|
if (file->f_mode & FMODE_READ) {
|
2638 |
|
|
fmtm &= ~((CM_CFMT_STEREO | CM_CFMT_16BIT) << CM_CFMT_ADCSHIFT);
|
2639 |
|
|
if ((minor & 0xf) == SND_DEV_DSP16)
|
2640 |
|
|
fmts |= CM_CFMT_16BIT << CM_CFMT_ADCSHIFT;
|
2641 |
|
|
s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags = s->dma_adc.subdivision = 0;
|
2642 |
|
|
set_adc_rate(s, 8000);
|
2643 |
|
|
// spdif-in is turnned off by default
|
2644 |
|
|
set_spdifin(s, 0);
|
2645 |
|
|
}
|
2646 |
|
|
if (file->f_mode & FMODE_WRITE) {
|
2647 |
|
|
fmtm &= ~((CM_CFMT_STEREO | CM_CFMT_16BIT) << CM_CFMT_DACSHIFT);
|
2648 |
|
|
if ((minor & 0xf) == SND_DEV_DSP16)
|
2649 |
|
|
fmts |= CM_CFMT_16BIT << CM_CFMT_DACSHIFT;
|
2650 |
|
|
s->dma_dac.ossfragshift = s->dma_dac.ossmaxfrags = s->dma_dac.subdivision = 0;
|
2651 |
|
|
set_dac_rate(s, 8000);
|
2652 |
|
|
// clear previous multichannel, spdif, ac3 state
|
2653 |
|
|
set_spdifout(s, 0);
|
2654 |
|
|
if (s->deviceid == PCI_DEVICE_ID_CMEDIA_CM8738) {
|
2655 |
|
|
set_ac3(s, 0);
|
2656 |
|
|
set_dac_channels(s, 1);
|
2657 |
|
|
}
|
2658 |
|
|
}
|
2659 |
|
|
set_fmt(s, fmtm, fmts);
|
2660 |
|
|
s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
|
2661 |
|
|
up(&s->open_sem);
|
2662 |
|
|
return 0;
|
2663 |
|
|
}
|
2664 |
|
|
|
2665 |
|
|
static int cm_release(struct inode *inode, struct file *file)
|
2666 |
|
|
{
|
2667 |
|
|
struct cm_state *s = (struct cm_state *)file->private_data;
|
2668 |
|
|
|
2669 |
|
|
VALIDATE_STATE(s);
|
2670 |
|
|
lock_kernel();
|
2671 |
|
|
if (file->f_mode & FMODE_WRITE)
|
2672 |
|
|
drain_dac(s, file->f_flags & O_NONBLOCK);
|
2673 |
|
|
down(&s->open_sem);
|
2674 |
|
|
if (file->f_mode & FMODE_WRITE) {
|
2675 |
|
|
stop_dac(s);
|
2676 |
|
|
|
2677 |
|
|
dealloc_dmabuf(&s->dma_dac);
|
2678 |
|
|
if (s->status & DO_DUAL_DAC)
|
2679 |
|
|
dealloc_dmabuf(&s->dma_adc);
|
2680 |
|
|
|
2681 |
|
|
if (s->status & DO_MULTI_CH)
|
2682 |
|
|
set_dac_channels(s, 0);
|
2683 |
|
|
if (s->status & DO_AC3)
|
2684 |
|
|
set_ac3(s, 0);
|
2685 |
|
|
if (s->status & DO_SPDIF_OUT)
|
2686 |
|
|
set_spdifout(s, 0);
|
2687 |
|
|
}
|
2688 |
|
|
if (file->f_mode & FMODE_READ) {
|
2689 |
|
|
stop_adc(s);
|
2690 |
|
|
dealloc_dmabuf(&s->dma_adc);
|
2691 |
|
|
}
|
2692 |
|
|
s->open_mode &= ~(file->f_mode & (FMODE_READ|FMODE_WRITE));
|
2693 |
|
|
up(&s->open_sem);
|
2694 |
|
|
wake_up(&s->open_wait);
|
2695 |
|
|
unlock_kernel();
|
2696 |
|
|
return 0;
|
2697 |
|
|
}
|
2698 |
|
|
|
2699 |
|
|
static /*const*/ struct file_operations cm_audio_fops = {
|
2700 |
|
|
owner: THIS_MODULE,
|
2701 |
|
|
llseek: no_llseek,
|
2702 |
|
|
read: cm_read,
|
2703 |
|
|
write: cm_write,
|
2704 |
|
|
poll: cm_poll,
|
2705 |
|
|
ioctl: cm_ioctl,
|
2706 |
|
|
mmap: cm_mmap,
|
2707 |
|
|
open: cm_open,
|
2708 |
|
|
release: cm_release,
|
2709 |
|
|
};
|
2710 |
|
|
|
2711 |
|
|
#ifdef CONFIG_SOUND_CMPCI_MIDI
|
2712 |
|
|
/* --------------------------------------------------------------------- */
|
2713 |
|
|
|
2714 |
|
|
static ssize_t cm_midi_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
|
2715 |
|
|
{
|
2716 |
|
|
struct cm_state *s = (struct cm_state *)file->private_data;
|
2717 |
|
|
DECLARE_WAITQUEUE(wait, current);
|
2718 |
|
|
ssize_t ret;
|
2719 |
|
|
unsigned long flags;
|
2720 |
|
|
unsigned ptr;
|
2721 |
|
|
int cnt;
|
2722 |
|
|
|
2723 |
|
|
VALIDATE_STATE(s);
|
2724 |
|
|
if (ppos != &file->f_pos)
|
2725 |
|
|
return -ESPIPE;
|
2726 |
|
|
if (!access_ok(VERIFY_WRITE, buffer, count))
|
2727 |
|
|
return -EFAULT;
|
2728 |
|
|
ret = 0;
|
2729 |
|
|
add_wait_queue(&s->midi.iwait, &wait);
|
2730 |
|
|
while (count > 0) {
|
2731 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
2732 |
|
|
ptr = s->midi.ird;
|
2733 |
|
|
cnt = MIDIINBUF - ptr;
|
2734 |
|
|
if (s->midi.icnt < cnt)
|
2735 |
|
|
cnt = s->midi.icnt;
|
2736 |
|
|
if (cnt <= 0)
|
2737 |
|
|
__set_current_state(TASK_INTERRUPTIBLE);
|
2738 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
2739 |
|
|
if (cnt > count)
|
2740 |
|
|
cnt = count;
|
2741 |
|
|
if (cnt <= 0) {
|
2742 |
|
|
if (file->f_flags & O_NONBLOCK)
|
2743 |
|
|
{
|
2744 |
|
|
if (!ret)
|
2745 |
|
|
ret = -EAGAIN;
|
2746 |
|
|
break;
|
2747 |
|
|
}
|
2748 |
|
|
schedule();
|
2749 |
|
|
if (signal_pending(current))
|
2750 |
|
|
{
|
2751 |
|
|
if (!ret)
|
2752 |
|
|
ret = -ERESTARTSYS;
|
2753 |
|
|
break;
|
2754 |
|
|
}
|
2755 |
|
|
continue;
|
2756 |
|
|
}
|
2757 |
|
|
if (copy_to_user(buffer, s->midi.ibuf + ptr, cnt))
|
2758 |
|
|
{
|
2759 |
|
|
if (!ret)
|
2760 |
|
|
ret = -EFAULT;
|
2761 |
|
|
break;
|
2762 |
|
|
}
|
2763 |
|
|
ptr = (ptr + cnt) % MIDIINBUF;
|
2764 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
2765 |
|
|
s->midi.ird = ptr;
|
2766 |
|
|
s->midi.icnt -= cnt;
|
2767 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
2768 |
|
|
count -= cnt;
|
2769 |
|
|
buffer += cnt;
|
2770 |
|
|
ret += cnt;
|
2771 |
|
|
break;
|
2772 |
|
|
}
|
2773 |
|
|
__set_current_state(TASK_RUNNING);
|
2774 |
|
|
remove_wait_queue(&s->midi.iwait, &wait);
|
2775 |
|
|
return ret;
|
2776 |
|
|
}
|
2777 |
|
|
|
2778 |
|
|
static ssize_t cm_midi_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
|
2779 |
|
|
{
|
2780 |
|
|
struct cm_state *s = (struct cm_state *)file->private_data;
|
2781 |
|
|
DECLARE_WAITQUEUE(wait, current);
|
2782 |
|
|
ssize_t ret;
|
2783 |
|
|
unsigned long flags;
|
2784 |
|
|
unsigned ptr;
|
2785 |
|
|
int cnt;
|
2786 |
|
|
|
2787 |
|
|
VALIDATE_STATE(s);
|
2788 |
|
|
if (ppos != &file->f_pos)
|
2789 |
|
|
return -ESPIPE;
|
2790 |
|
|
if (!access_ok(VERIFY_READ, buffer, count))
|
2791 |
|
|
return -EFAULT;
|
2792 |
|
|
if (count == 0)
|
2793 |
|
|
return 0;
|
2794 |
|
|
ret = 0;
|
2795 |
|
|
add_wait_queue(&s->midi.owait, &wait);
|
2796 |
|
|
while (count > 0) {
|
2797 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
2798 |
|
|
ptr = s->midi.owr;
|
2799 |
|
|
cnt = MIDIOUTBUF - ptr;
|
2800 |
|
|
if (s->midi.ocnt + cnt > MIDIOUTBUF)
|
2801 |
|
|
cnt = MIDIOUTBUF - s->midi.ocnt;
|
2802 |
|
|
if (cnt <= 0) {
|
2803 |
|
|
__set_current_state(TASK_INTERRUPTIBLE);
|
2804 |
|
|
cm_handle_midi(s);
|
2805 |
|
|
}
|
2806 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
2807 |
|
|
if (cnt > count)
|
2808 |
|
|
cnt = count;
|
2809 |
|
|
if (cnt <= 0) {
|
2810 |
|
|
if (file->f_flags & O_NONBLOCK)
|
2811 |
|
|
{
|
2812 |
|
|
if (!ret)
|
2813 |
|
|
ret = -EAGAIN;
|
2814 |
|
|
break;
|
2815 |
|
|
}
|
2816 |
|
|
schedule();
|
2817 |
|
|
if (signal_pending(current)) {
|
2818 |
|
|
if (!ret)
|
2819 |
|
|
ret = -ERESTARTSYS;
|
2820 |
|
|
break;
|
2821 |
|
|
}
|
2822 |
|
|
continue;
|
2823 |
|
|
}
|
2824 |
|
|
if (copy_from_user(s->midi.obuf + ptr, buffer, cnt))
|
2825 |
|
|
{
|
2826 |
|
|
if (!ret)
|
2827 |
|
|
ret = -EFAULT;
|
2828 |
|
|
break;
|
2829 |
|
|
}
|
2830 |
|
|
ptr = (ptr + cnt) % MIDIOUTBUF;
|
2831 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
2832 |
|
|
s->midi.owr = ptr;
|
2833 |
|
|
s->midi.ocnt += cnt;
|
2834 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
2835 |
|
|
count -= cnt;
|
2836 |
|
|
buffer += cnt;
|
2837 |
|
|
ret += cnt;
|
2838 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
2839 |
|
|
cm_handle_midi(s);
|
2840 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
2841 |
|
|
}
|
2842 |
|
|
__set_current_state(TASK_RUNNING);
|
2843 |
|
|
remove_wait_queue(&s->midi.owait, &wait);
|
2844 |
|
|
return ret;
|
2845 |
|
|
}
|
2846 |
|
|
|
2847 |
|
|
static unsigned int cm_midi_poll(struct file *file, struct poll_table_struct *wait)
|
2848 |
|
|
{
|
2849 |
|
|
struct cm_state *s = (struct cm_state *)file->private_data;
|
2850 |
|
|
unsigned long flags;
|
2851 |
|
|
unsigned int mask = 0;
|
2852 |
|
|
|
2853 |
|
|
VALIDATE_STATE(s);
|
2854 |
|
|
if (file->f_mode & FMODE_WRITE)
|
2855 |
|
|
poll_wait(file, &s->midi.owait, wait);
|
2856 |
|
|
if (file->f_mode & FMODE_READ)
|
2857 |
|
|
poll_wait(file, &s->midi.iwait, wait);
|
2858 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
2859 |
|
|
if (file->f_mode & FMODE_READ) {
|
2860 |
|
|
if (s->midi.icnt > 0)
|
2861 |
|
|
mask |= POLLIN | POLLRDNORM;
|
2862 |
|
|
}
|
2863 |
|
|
if (file->f_mode & FMODE_WRITE) {
|
2864 |
|
|
if (s->midi.ocnt < MIDIOUTBUF)
|
2865 |
|
|
mask |= POLLOUT | POLLWRNORM;
|
2866 |
|
|
}
|
2867 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
2868 |
|
|
return mask;
|
2869 |
|
|
}
|
2870 |
|
|
|
2871 |
|
|
static int cm_midi_open(struct inode *inode, struct file *file)
|
2872 |
|
|
{
|
2873 |
|
|
int minor = MINOR(inode->i_rdev);
|
2874 |
|
|
DECLARE_WAITQUEUE(wait, current);
|
2875 |
|
|
unsigned long flags;
|
2876 |
|
|
struct list_head *list;
|
2877 |
|
|
struct cm_state *s;
|
2878 |
|
|
|
2879 |
|
|
for (list = devs.next; ; list = list->next) {
|
2880 |
|
|
if (list == &devs)
|
2881 |
|
|
return -ENODEV;
|
2882 |
|
|
s = list_entry(list, struct cm_state, devs);
|
2883 |
|
|
if (s->dev_midi == minor)
|
2884 |
|
|
break;
|
2885 |
|
|
}
|
2886 |
|
|
VALIDATE_STATE(s);
|
2887 |
|
|
file->private_data = s;
|
2888 |
|
|
/* wait for device to become free */
|
2889 |
|
|
down(&s->open_sem);
|
2890 |
|
|
while (s->open_mode & (file->f_mode << FMODE_MIDI_SHIFT)) {
|
2891 |
|
|
if (file->f_flags & O_NONBLOCK) {
|
2892 |
|
|
up(&s->open_sem);
|
2893 |
|
|
return -EBUSY;
|
2894 |
|
|
}
|
2895 |
|
|
add_wait_queue(&s->open_wait, &wait);
|
2896 |
|
|
__set_current_state(TASK_INTERRUPTIBLE);
|
2897 |
|
|
up(&s->open_sem);
|
2898 |
|
|
schedule();
|
2899 |
|
|
remove_wait_queue(&s->open_wait, &wait);
|
2900 |
|
|
set_current_state(TASK_RUNNING);
|
2901 |
|
|
if (signal_pending(current))
|
2902 |
|
|
return -ERESTARTSYS;
|
2903 |
|
|
down(&s->open_sem);
|
2904 |
|
|
}
|
2905 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
2906 |
|
|
if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
|
2907 |
|
|
s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
|
2908 |
|
|
s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
|
2909 |
|
|
/* enable MPU-401 */
|
2910 |
|
|
maskb(s->iobase + CODEC_CMI_FUNCTRL1, ~0, UART_EN);
|
2911 |
|
|
outb(0xff, s->iomidi+1); /* reset command */
|
2912 |
|
|
if (!(inb(s->iomidi+1) & 0x80))
|
2913 |
|
|
inb(s->iomidi);
|
2914 |
|
|
outb(0x3f, s->iomidi+1); /* uart command */
|
2915 |
|
|
if (!(inb(s->iomidi+1) & 0x80))
|
2916 |
|
|
inb(s->iomidi);
|
2917 |
|
|
s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
|
2918 |
|
|
init_timer(&s->midi.timer);
|
2919 |
|
|
s->midi.timer.expires = jiffies+1;
|
2920 |
|
|
s->midi.timer.data = (unsigned long)s;
|
2921 |
|
|
s->midi.timer.function = cm_midi_timer;
|
2922 |
|
|
add_timer(&s->midi.timer);
|
2923 |
|
|
}
|
2924 |
|
|
if (file->f_mode & FMODE_READ) {
|
2925 |
|
|
s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
|
2926 |
|
|
}
|
2927 |
|
|
if (file->f_mode & FMODE_WRITE) {
|
2928 |
|
|
s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
|
2929 |
|
|
}
|
2930 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
2931 |
|
|
s->open_mode |= (file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ | FMODE_MIDI_WRITE);
|
2932 |
|
|
up(&s->open_sem);
|
2933 |
|
|
MOD_INC_USE_COUNT;
|
2934 |
|
|
return 0;
|
2935 |
|
|
}
|
2936 |
|
|
|
2937 |
|
|
static int cm_midi_release(struct inode *inode, struct file *file)
|
2938 |
|
|
{
|
2939 |
|
|
struct cm_state *s = (struct cm_state *)file->private_data;
|
2940 |
|
|
DECLARE_WAITQUEUE(wait, current);
|
2941 |
|
|
unsigned long flags;
|
2942 |
|
|
unsigned count, tmo;
|
2943 |
|
|
|
2944 |
|
|
VALIDATE_STATE(s);
|
2945 |
|
|
lock_kernel();
|
2946 |
|
|
|
2947 |
|
|
if (file->f_mode & FMODE_WRITE) {
|
2948 |
|
|
__set_current_state(TASK_INTERRUPTIBLE);
|
2949 |
|
|
add_wait_queue(&s->midi.owait, &wait);
|
2950 |
|
|
for (;;) {
|
2951 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
2952 |
|
|
count = s->midi.ocnt;
|
2953 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
2954 |
|
|
if (count <= 0)
|
2955 |
|
|
break;
|
2956 |
|
|
if (signal_pending(current))
|
2957 |
|
|
break;
|
2958 |
|
|
if (file->f_flags & O_NONBLOCK) {
|
2959 |
|
|
remove_wait_queue(&s->midi.owait, &wait);
|
2960 |
|
|
set_current_state(TASK_RUNNING);
|
2961 |
|
|
unlock_kernel();
|
2962 |
|
|
return -EBUSY;
|
2963 |
|
|
}
|
2964 |
|
|
tmo = (count * HZ) / 3100;
|
2965 |
|
|
if (!schedule_timeout(tmo ? : 1) && tmo)
|
2966 |
|
|
printk(KERN_DEBUG "cmpci: midi timed out??\n");
|
2967 |
|
|
}
|
2968 |
|
|
remove_wait_queue(&s->midi.owait, &wait);
|
2969 |
|
|
set_current_state(TASK_RUNNING);
|
2970 |
|
|
}
|
2971 |
|
|
down(&s->open_sem);
|
2972 |
|
|
s->open_mode &= ~((file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ|FMODE_MIDI_WRITE));
|
2973 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
2974 |
|
|
if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
|
2975 |
|
|
del_timer(&s->midi.timer);
|
2976 |
|
|
outb(0xff, s->iomidi+1); /* reset command */
|
2977 |
|
|
if (!(inb(s->iomidi+1) & 0x80))
|
2978 |
|
|
inb(s->iomidi);
|
2979 |
|
|
/* disable MPU-401 */
|
2980 |
|
|
maskb(s->iobase + CODEC_CMI_FUNCTRL1, ~UART_EN, 0);
|
2981 |
|
|
}
|
2982 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
2983 |
|
|
up(&s->open_sem);
|
2984 |
|
|
wake_up(&s->open_wait);
|
2985 |
|
|
unlock_kernel();
|
2986 |
|
|
return 0;
|
2987 |
|
|
}
|
2988 |
|
|
|
2989 |
|
|
static /*const*/ struct file_operations cm_midi_fops = {
|
2990 |
|
|
owner: THIS_MODULE,
|
2991 |
|
|
llseek: no_llseek,
|
2992 |
|
|
read: cm_midi_read,
|
2993 |
|
|
write: cm_midi_write,
|
2994 |
|
|
poll: cm_midi_poll,
|
2995 |
|
|
open: cm_midi_open,
|
2996 |
|
|
release: cm_midi_release,
|
2997 |
|
|
};
|
2998 |
|
|
#endif
|
2999 |
|
|
|
3000 |
|
|
/* --------------------------------------------------------------------- */
|
3001 |
|
|
|
3002 |
|
|
#ifdef CONFIG_SOUND_CMPCI_FM
|
3003 |
|
|
static int cm_dmfm_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
|
3004 |
|
|
{
|
3005 |
|
|
static const unsigned char op_offset[18] = {
|
3006 |
|
|
0x00, 0x01, 0x02, 0x03, 0x04, 0x05,
|
3007 |
|
|
0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D,
|
3008 |
|
|
0x10, 0x11, 0x12, 0x13, 0x14, 0x15
|
3009 |
|
|
};
|
3010 |
|
|
struct cm_state *s = (struct cm_state *)file->private_data;
|
3011 |
|
|
struct dm_fm_voice v;
|
3012 |
|
|
struct dm_fm_note n;
|
3013 |
|
|
struct dm_fm_params p;
|
3014 |
|
|
unsigned int io;
|
3015 |
|
|
unsigned int regb;
|
3016 |
|
|
|
3017 |
|
|
switch (cmd) {
|
3018 |
|
|
case FM_IOCTL_RESET:
|
3019 |
|
|
for (regb = 0xb0; regb < 0xb9; regb++) {
|
3020 |
|
|
outb(regb, s->iosynth);
|
3021 |
|
|
outb(0, s->iosynth+1);
|
3022 |
|
|
outb(regb, s->iosynth+2);
|
3023 |
|
|
outb(0, s->iosynth+3);
|
3024 |
|
|
}
|
3025 |
|
|
return 0;
|
3026 |
|
|
|
3027 |
|
|
case FM_IOCTL_PLAY_NOTE:
|
3028 |
|
|
if (copy_from_user(&n, (void *)arg, sizeof(n)))
|
3029 |
|
|
return -EFAULT;
|
3030 |
|
|
if (n.voice >= 18)
|
3031 |
|
|
return -EINVAL;
|
3032 |
|
|
if (n.voice >= 9) {
|
3033 |
|
|
regb = n.voice - 9;
|
3034 |
|
|
io = s->iosynth+2;
|
3035 |
|
|
} else {
|
3036 |
|
|
regb = n.voice;
|
3037 |
|
|
io = s->iosynth;
|
3038 |
|
|
}
|
3039 |
|
|
outb(0xa0 + regb, io);
|
3040 |
|
|
outb(n.fnum & 0xff, io+1);
|
3041 |
|
|
outb(0xb0 + regb, io);
|
3042 |
|
|
outb(((n.fnum >> 8) & 3) | ((n.octave & 7) << 2) | ((n.key_on & 1) << 5), io+1);
|
3043 |
|
|
return 0;
|
3044 |
|
|
|
3045 |
|
|
case FM_IOCTL_SET_VOICE:
|
3046 |
|
|
if (copy_from_user(&v, (void *)arg, sizeof(v)))
|
3047 |
|
|
return -EFAULT;
|
3048 |
|
|
if (v.voice >= 18)
|
3049 |
|
|
return -EINVAL;
|
3050 |
|
|
regb = op_offset[v.voice];
|
3051 |
|
|
io = s->iosynth + ((v.op & 1) << 1);
|
3052 |
|
|
outb(0x20 + regb, io);
|
3053 |
|
|
outb(((v.am & 1) << 7) | ((v.vibrato & 1) << 6) | ((v.do_sustain & 1) << 5) |
|
3054 |
|
|
((v.kbd_scale & 1) << 4) | (v.harmonic & 0xf), io+1);
|
3055 |
|
|
outb(0x40 + regb, io);
|
3056 |
|
|
outb(((v.scale_level & 0x3) << 6) | (v.volume & 0x3f), io+1);
|
3057 |
|
|
outb(0x60 + regb, io);
|
3058 |
|
|
outb(((v.attack & 0xf) << 4) | (v.decay & 0xf), io+1);
|
3059 |
|
|
outb(0x80 + regb, io);
|
3060 |
|
|
outb(((v.sustain & 0xf) << 4) | (v.release & 0xf), io+1);
|
3061 |
|
|
outb(0xe0 + regb, io);
|
3062 |
|
|
outb(v.waveform & 0x7, io+1);
|
3063 |
|
|
if (n.voice >= 9) {
|
3064 |
|
|
regb = n.voice - 9;
|
3065 |
|
|
io = s->iosynth+2;
|
3066 |
|
|
} else {
|
3067 |
|
|
regb = n.voice;
|
3068 |
|
|
io = s->iosynth;
|
3069 |
|
|
}
|
3070 |
|
|
outb(0xc0 + regb, io);
|
3071 |
|
|
outb(((v.right & 1) << 5) | ((v.left & 1) << 4) | ((v.feedback & 7) << 1) |
|
3072 |
|
|
(v.connection & 1), io+1);
|
3073 |
|
|
return 0;
|
3074 |
|
|
|
3075 |
|
|
case FM_IOCTL_SET_PARAMS:
|
3076 |
|
|
if (copy_from_user(&p, (void *)arg, sizeof(p)))
|
3077 |
|
|
return -EFAULT;
|
3078 |
|
|
outb(0x08, s->iosynth);
|
3079 |
|
|
outb((p.kbd_split & 1) << 6, s->iosynth+1);
|
3080 |
|
|
outb(0xbd, s->iosynth);
|
3081 |
|
|
outb(((p.am_depth & 1) << 7) | ((p.vib_depth & 1) << 6) | ((p.rhythm & 1) << 5) | ((p.bass & 1) << 4) |
|
3082 |
|
|
((p.snare & 1) << 3) | ((p.tomtom & 1) << 2) | ((p.cymbal & 1) << 1) | (p.hihat & 1), s->iosynth+1);
|
3083 |
|
|
return 0;
|
3084 |
|
|
|
3085 |
|
|
case FM_IOCTL_SET_OPL:
|
3086 |
|
|
outb(4, s->iosynth+2);
|
3087 |
|
|
outb(arg, s->iosynth+3);
|
3088 |
|
|
return 0;
|
3089 |
|
|
|
3090 |
|
|
case FM_IOCTL_SET_MODE:
|
3091 |
|
|
outb(5, s->iosynth+2);
|
3092 |
|
|
outb(arg & 1, s->iosynth+3);
|
3093 |
|
|
return 0;
|
3094 |
|
|
}
|
3095 |
|
|
return -EINVAL;
|
3096 |
|
|
}
|
3097 |
|
|
|
3098 |
|
|
static int cm_dmfm_open(struct inode *inode, struct file *file)
|
3099 |
|
|
{
|
3100 |
|
|
int minor = MINOR(inode->i_rdev);
|
3101 |
|
|
DECLARE_WAITQUEUE(wait, current);
|
3102 |
|
|
struct list_head *list;
|
3103 |
|
|
struct cm_state *s;
|
3104 |
|
|
|
3105 |
|
|
for (list = devs.next; ; list = list->next) {
|
3106 |
|
|
if (list == &devs)
|
3107 |
|
|
return -ENODEV;
|
3108 |
|
|
s = list_entry(list, struct cm_state, devs);
|
3109 |
|
|
if (s->dev_dmfm == minor)
|
3110 |
|
|
break;
|
3111 |
|
|
}
|
3112 |
|
|
VALIDATE_STATE(s);
|
3113 |
|
|
file->private_data = s;
|
3114 |
|
|
/* wait for device to become free */
|
3115 |
|
|
down(&s->open_sem);
|
3116 |
|
|
while (s->open_mode & FMODE_DMFM) {
|
3117 |
|
|
if (file->f_flags & O_NONBLOCK) {
|
3118 |
|
|
up(&s->open_sem);
|
3119 |
|
|
return -EBUSY;
|
3120 |
|
|
}
|
3121 |
|
|
add_wait_queue(&s->open_wait, &wait);
|
3122 |
|
|
__set_current_state(TASK_INTERRUPTIBLE);
|
3123 |
|
|
up(&s->open_sem);
|
3124 |
|
|
schedule();
|
3125 |
|
|
remove_wait_queue(&s->open_wait, &wait);
|
3126 |
|
|
set_current_state(TASK_RUNNING);
|
3127 |
|
|
if (signal_pending(current))
|
3128 |
|
|
return -ERESTARTSYS;
|
3129 |
|
|
down(&s->open_sem);
|
3130 |
|
|
}
|
3131 |
|
|
/* init the stuff */
|
3132 |
|
|
outb(1, s->iosynth);
|
3133 |
|
|
outb(0x20, s->iosynth+1); /* enable waveforms */
|
3134 |
|
|
outb(4, s->iosynth+2);
|
3135 |
|
|
outb(0, s->iosynth+3); /* no 4op enabled */
|
3136 |
|
|
outb(5, s->iosynth+2);
|
3137 |
|
|
outb(1, s->iosynth+3); /* enable OPL3 */
|
3138 |
|
|
s->open_mode |= FMODE_DMFM;
|
3139 |
|
|
up(&s->open_sem);
|
3140 |
|
|
MOD_INC_USE_COUNT;
|
3141 |
|
|
return 0;
|
3142 |
|
|
}
|
3143 |
|
|
|
3144 |
|
|
static int cm_dmfm_release(struct inode *inode, struct file *file)
|
3145 |
|
|
{
|
3146 |
|
|
struct cm_state *s = (struct cm_state *)file->private_data;
|
3147 |
|
|
unsigned int regb;
|
3148 |
|
|
|
3149 |
|
|
VALIDATE_STATE(s);
|
3150 |
|
|
lock_kernel();
|
3151 |
|
|
down(&s->open_sem);
|
3152 |
|
|
s->open_mode &= ~FMODE_DMFM;
|
3153 |
|
|
for (regb = 0xb0; regb < 0xb9; regb++) {
|
3154 |
|
|
outb(regb, s->iosynth);
|
3155 |
|
|
outb(0, s->iosynth+1);
|
3156 |
|
|
outb(regb, s->iosynth+2);
|
3157 |
|
|
outb(0, s->iosynth+3);
|
3158 |
|
|
}
|
3159 |
|
|
up(&s->open_sem);
|
3160 |
|
|
wake_up(&s->open_wait);
|
3161 |
|
|
unlock_kernel();
|
3162 |
|
|
return 0;
|
3163 |
|
|
}
|
3164 |
|
|
|
3165 |
|
|
static /*const*/ struct file_operations cm_dmfm_fops = {
|
3166 |
|
|
owner: THIS_MODULE,
|
3167 |
|
|
llseek: no_llseek,
|
3168 |
|
|
ioctl: cm_dmfm_ioctl,
|
3169 |
|
|
open: cm_dmfm_open,
|
3170 |
|
|
release: cm_dmfm_release,
|
3171 |
|
|
};
|
3172 |
|
|
#endif /* CONFIG_SOUND_CMPCI_FM */
|
3173 |
|
|
|
3174 |
|
|
|
3175 |
|
|
|
3176 |
|
|
static struct initvol {
|
3177 |
|
|
int mixch;
|
3178 |
|
|
int vol;
|
3179 |
|
|
} initvol[] __initdata = {
|
3180 |
|
|
{ SOUND_MIXER_WRITE_CD, 0x4f4f },
|
3181 |
|
|
{ SOUND_MIXER_WRITE_LINE, 0x4f4f },
|
3182 |
|
|
{ SOUND_MIXER_WRITE_MIC, 0x4f4f },
|
3183 |
|
|
{ SOUND_MIXER_WRITE_SYNTH, 0x4f4f },
|
3184 |
|
|
{ SOUND_MIXER_WRITE_VOLUME, 0x4f4f },
|
3185 |
|
|
{ SOUND_MIXER_WRITE_PCM, 0x4f4f }
|
3186 |
|
|
};
|
3187 |
|
|
|
3188 |
|
|
/* check chip version and capability */
|
3189 |
|
|
static int query_chip(struct cm_state *s)
|
3190 |
|
|
{
|
3191 |
|
|
int ChipVersion = -1;
|
3192 |
|
|
unsigned char RegValue;
|
3193 |
|
|
|
3194 |
|
|
// check reg 0Ch, bit 24-31
|
3195 |
|
|
RegValue = inb(s->iobase + CODEC_CMI_INT_HLDCLR + 3);
|
3196 |
|
|
if (RegValue == 0) {
|
3197 |
|
|
// check reg 08h, bit 24-28
|
3198 |
|
|
RegValue = inb(s->iobase + CODEC_CMI_CHFORMAT + 3);
|
3199 |
|
|
RegValue &= 0x1f;
|
3200 |
|
|
if (RegValue == 0) {
|
3201 |
|
|
ChipVersion = 33;
|
3202 |
|
|
s->max_channels = 4;
|
3203 |
|
|
s->capability |= CAN_AC3_SW;
|
3204 |
|
|
s->capability |= CAN_DUAL_DAC;
|
3205 |
|
|
} else {
|
3206 |
|
|
ChipVersion = 37;
|
3207 |
|
|
s->max_channels = 4;
|
3208 |
|
|
s->capability |= CAN_AC3_HW;
|
3209 |
|
|
s->capability |= CAN_DUAL_DAC;
|
3210 |
|
|
}
|
3211 |
|
|
} else {
|
3212 |
|
|
// check reg 0Ch, bit 26
|
3213 |
|
|
if (RegValue & (1 << (26-24))) {
|
3214 |
|
|
ChipVersion = 39;
|
3215 |
|
|
if (RegValue & (1 << (24-24)))
|
3216 |
|
|
s->max_channels = 6;
|
3217 |
|
|
else
|
3218 |
|
|
s->max_channels = 4;
|
3219 |
|
|
s->capability |= CAN_AC3_HW;
|
3220 |
|
|
s->capability |= CAN_DUAL_DAC;
|
3221 |
|
|
s->capability |= CAN_MULTI_CH_HW;
|
3222 |
|
|
} else {
|
3223 |
|
|
ChipVersion = 55; // 4 or 6 channels
|
3224 |
|
|
s->max_channels = 6;
|
3225 |
|
|
s->capability |= CAN_AC3_HW;
|
3226 |
|
|
s->capability |= CAN_DUAL_DAC;
|
3227 |
|
|
s->capability |= CAN_MULTI_CH_HW;
|
3228 |
|
|
}
|
3229 |
|
|
}
|
3230 |
|
|
// still limited to number of speakers
|
3231 |
|
|
if (s->max_channels > s->speakers)
|
3232 |
|
|
s->max_channels = s->speakers;
|
3233 |
|
|
return ChipVersion;
|
3234 |
|
|
}
|
3235 |
|
|
|
3236 |
|
|
#ifdef CONFIG_SOUND_CMPCI_MIDI
|
3237 |
|
|
static int mpuio = CONFIG_SOUND_CMPCI_MPUIO;
|
3238 |
|
|
#else
|
3239 |
|
|
static int mpuio;
|
3240 |
|
|
#endif
|
3241 |
|
|
#ifdef CONFIG_SOUND_CMPCI_FM
|
3242 |
|
|
static int fmio = CONFIG_SOUND_CMPCI_FMIO;
|
3243 |
|
|
#else
|
3244 |
|
|
static int fmio;
|
3245 |
|
|
#endif
|
3246 |
|
|
#ifdef CONFIG_SOUND_CMPCI_SPDIFINVERSE
|
3247 |
|
|
static int spdif_inverse = 1;
|
3248 |
|
|
#else
|
3249 |
|
|
static int spdif_inverse;
|
3250 |
|
|
#endif
|
3251 |
|
|
#ifdef CONFIG_SOUND_CMPCI_SPDIFLOOP
|
3252 |
|
|
static int spdif_loop = 1;
|
3253 |
|
|
#else
|
3254 |
|
|
static int spdif_loop;
|
3255 |
|
|
#endif
|
3256 |
|
|
#ifdef CONFIG_SOUND_CMPCI_SPEAKERS
|
3257 |
|
|
static int speakers = CONFIG_SOUND_CMPCI_SPEAKERS;
|
3258 |
|
|
#else
|
3259 |
|
|
static int speakers = 2;
|
3260 |
|
|
#endif
|
3261 |
|
|
#ifdef CONFIG_SOUND_CMPCI_LINE_REAR
|
3262 |
|
|
static int use_line_as_rear = 1;
|
3263 |
|
|
#else
|
3264 |
|
|
static int use_line_as_rear;
|
3265 |
|
|
#endif
|
3266 |
|
|
#ifdef CONFIG_SOUND_CMPCI_LINE_BASS
|
3267 |
|
|
static int use_line_as_bass = 1;
|
3268 |
|
|
#else
|
3269 |
|
|
static int use_line_as_bass;
|
3270 |
|
|
#endif
|
3271 |
|
|
#ifdef CONFIG_SOUND_CMPCI_MIC_BASS
|
3272 |
|
|
static int use_mic_as_bass = 1;
|
3273 |
|
|
#else
|
3274 |
|
|
static int use_mic_as_bass = 0;
|
3275 |
|
|
#endif
|
3276 |
|
|
#ifdef CONFIG_SOUND_CMPCI_JOYSTICK
|
3277 |
|
|
static int joystick = 1;
|
3278 |
|
|
#else
|
3279 |
|
|
static int joystick;
|
3280 |
|
|
#endif
|
3281 |
|
|
static int mic_boost = 0;
|
3282 |
|
|
MODULE_PARM(mpuio, "i");
|
3283 |
|
|
MODULE_PARM(fmio, "i");
|
3284 |
|
|
MODULE_PARM(spdif_inverse, "i");
|
3285 |
|
|
MODULE_PARM(spdif_loop, "i");
|
3286 |
|
|
MODULE_PARM(speakers, "i");
|
3287 |
|
|
MODULE_PARM(use_line_as_rear, "i");
|
3288 |
|
|
MODULE_PARM(use_line_as_bass, "i");
|
3289 |
|
|
MODULE_PARM(use_mic_as_bass, "i");
|
3290 |
|
|
MODULE_PARM(joystick, "i");
|
3291 |
|
|
MODULE_PARM(mic_boost, "i");
|
3292 |
|
|
MODULE_PARM_DESC(mpuio, "(0x330, 0x320, 0x310, 0x300) Base of MPU-401, 0 to disable");
|
3293 |
|
|
MODULE_PARM_DESC(fmio, "(0x388, 0x3C8, 0x3E0) Base of OPL3, 0 to disable");
|
3294 |
|
|
MODULE_PARM_DESC(spdif_inverse, "(1/0) Invert S/PDIF-in signal");
|
3295 |
|
|
MODULE_PARM_DESC(spdif_loop, "(1/0) Route S/PDIF-in to S/PDIF-out directly");
|
3296 |
|
|
MODULE_PARM_DESC(speakers, "(2-6) Number of speakers you connect");
|
3297 |
|
|
MODULE_PARM_DESC(use_line_as_rear, "(1/0) Use line-in jack as rear-out");
|
3298 |
|
|
MODULE_PARM_DESC(use_line_as_bass, "(1/0) Use line-in jack as bass/center");
|
3299 |
|
|
MODULE_PARM_DESC(use_mic_as_bass, "(1/0) Use mic-in jack as bass/center");
|
3300 |
|
|
MODULE_PARM_DESC(joystick, "(1/0) Enable joystick interface, still need joystick driver");
|
3301 |
|
|
MODULE_PARM_DESC(mic_boost, "(1/0) Enable microphone boost");
|
3302 |
|
|
|
3303 |
|
|
static int __devinit cm_probe(struct pci_dev *pcidev, const struct pci_device_id *pciid)
|
3304 |
|
|
{
|
3305 |
|
|
struct cm_state *s;
|
3306 |
|
|
mm_segment_t fs;
|
3307 |
|
|
int i, val, ret;
|
3308 |
|
|
unsigned char reg_mask = 0;
|
3309 |
|
|
struct {
|
3310 |
|
|
unsigned short deviceid;
|
3311 |
|
|
char *devicename;
|
3312 |
|
|
} devicetable[] =
|
3313 |
|
|
{
|
3314 |
|
|
{ PCI_DEVICE_ID_CMEDIA_CM8338A, "CM8338A" },
|
3315 |
|
|
{ PCI_DEVICE_ID_CMEDIA_CM8338B, "CM8338B" },
|
3316 |
|
|
{ PCI_DEVICE_ID_CMEDIA_CM8738, "CM8738" },
|
3317 |
|
|
{ PCI_DEVICE_ID_CMEDIA_CM8738B, "CM8738B" },
|
3318 |
|
|
};
|
3319 |
|
|
char *devicename = "unknown";
|
3320 |
|
|
if ((ret = pci_enable_device(pcidev)))
|
3321 |
|
|
return ret;
|
3322 |
|
|
if (pcidev->irq == 0)
|
3323 |
|
|
return -ENODEV;
|
3324 |
|
|
s = kmalloc(sizeof(*s), GFP_KERNEL);
|
3325 |
|
|
if (!s) {
|
3326 |
|
|
printk(KERN_WARNING "cmpci: out of memory\n");
|
3327 |
|
|
return -ENOMEM;
|
3328 |
|
|
}
|
3329 |
|
|
/* search device name */
|
3330 |
|
|
for (i = 0; i < sizeof(devicetable) / sizeof(devicetable[0]); i++) {
|
3331 |
|
|
if (devicetable[i].deviceid == pcidev->device)
|
3332 |
|
|
{
|
3333 |
|
|
devicename = devicetable[i].devicename;
|
3334 |
|
|
break;
|
3335 |
|
|
}
|
3336 |
|
|
}
|
3337 |
|
|
memset(s, 0, sizeof(struct cm_state));
|
3338 |
|
|
init_waitqueue_head(&s->dma_adc.wait);
|
3339 |
|
|
init_waitqueue_head(&s->dma_dac.wait);
|
3340 |
|
|
init_waitqueue_head(&s->open_wait);
|
3341 |
|
|
init_waitqueue_head(&s->midi.iwait);
|
3342 |
|
|
init_waitqueue_head(&s->midi.owait);
|
3343 |
|
|
init_MUTEX(&s->open_sem);
|
3344 |
|
|
spin_lock_init(&s->lock);
|
3345 |
|
|
s->magic = CM_MAGIC;
|
3346 |
|
|
s->iobase = pci_resource_start(pcidev, 0);
|
3347 |
|
|
#ifdef CONFIG_IA64
|
3348 |
|
|
/* The IA64 quirk handler didn't fix us up */
|
3349 |
|
|
if (s->iobase == 0xff00)
|
3350 |
|
|
{
|
3351 |
|
|
kfree(s);
|
3352 |
|
|
return -ENODEV;
|
3353 |
|
|
}
|
3354 |
|
|
#endif
|
3355 |
|
|
s->iosynth = fmio;
|
3356 |
|
|
s->iomidi = mpuio;
|
3357 |
|
|
s->gameport.io = 0x200;
|
3358 |
|
|
s->status = 0;
|
3359 |
|
|
/* range check */
|
3360 |
|
|
if (speakers < 2)
|
3361 |
|
|
speakers = 2;
|
3362 |
|
|
else if (speakers > 6)
|
3363 |
|
|
speakers = 6;
|
3364 |
|
|
s->speakers = speakers;
|
3365 |
|
|
if (s->iobase == 0)
|
3366 |
|
|
{
|
3367 |
|
|
kfree(s);
|
3368 |
|
|
return -ENODEV;
|
3369 |
|
|
}
|
3370 |
|
|
s->irq = pcidev->irq;
|
3371 |
|
|
|
3372 |
|
|
if (!request_region(s->iobase, CM_EXTENT_CODEC, "cmpci")) {
|
3373 |
|
|
printk(KERN_ERR "cmpci: io ports %#x-%#x in use\n", s->iobase, s->iobase+CM_EXTENT_CODEC-1);
|
3374 |
|
|
goto err_region5;
|
3375 |
|
|
}
|
3376 |
|
|
#ifdef CONFIG_SOUND_CMPCI_MIDI
|
3377 |
|
|
/* disable MPU-401 */
|
3378 |
|
|
maskb(s->iobase + CODEC_CMI_FUNCTRL1, ~0x04, 0);
|
3379 |
|
|
if (s->iomidi) {
|
3380 |
|
|
if (!request_region(s->iomidi, CM_EXTENT_MIDI, "cmpci Midi")) {
|
3381 |
|
|
printk(KERN_ERR "cmpci: io ports %#x-%#x in use\n", s->iomidi, s->iomidi+CM_EXTENT_MIDI-1);
|
3382 |
|
|
s->iomidi = 0;
|
3383 |
|
|
} else {
|
3384 |
|
|
/* set IO based at 0x330 */
|
3385 |
|
|
switch (s->iomidi) {
|
3386 |
|
|
case 0x330:
|
3387 |
|
|
reg_mask = 0;
|
3388 |
|
|
break;
|
3389 |
|
|
case 0x320:
|
3390 |
|
|
reg_mask = 0x20;
|
3391 |
|
|
break;
|
3392 |
|
|
case 0x310:
|
3393 |
|
|
reg_mask = 0x40;
|
3394 |
|
|
break;
|
3395 |
|
|
case 0x300:
|
3396 |
|
|
reg_mask = 0x60;
|
3397 |
|
|
break;
|
3398 |
|
|
default:
|
3399 |
|
|
s->iomidi = 0;
|
3400 |
|
|
break;
|
3401 |
|
|
}
|
3402 |
|
|
outb((inb(s->iobase + CODEC_CMI_LEGACY_CTRL + 3) & ~0x60) | reg_mask, s->iobase + CODEC_CMI_LEGACY_CTRL + 3);
|
3403 |
|
|
/* enable MPU-401 */
|
3404 |
|
|
if (s->iomidi) {
|
3405 |
|
|
maskb(s->iobase + CODEC_CMI_FUNCTRL1, ~0, 0x04);
|
3406 |
|
|
}
|
3407 |
|
|
}
|
3408 |
|
|
}
|
3409 |
|
|
#endif
|
3410 |
|
|
#ifdef CONFIG_SOUND_CMPCI_FM
|
3411 |
|
|
/* disable FM */
|
3412 |
|
|
maskb(s->iobase + CODEC_CMI_MISC_CTRL + 2, ~8, 0);
|
3413 |
|
|
if (s->iosynth) {
|
3414 |
|
|
if (!request_region(s->iosynth, CM_EXTENT_SYNTH, "cmpci FM")) {
|
3415 |
|
|
printk(KERN_ERR "cmpci: io ports %#x-%#x in use\n", s->iosynth, s->iosynth+CM_EXTENT_SYNTH-1);
|
3416 |
|
|
s->iosynth = 0;
|
3417 |
|
|
} else {
|
3418 |
|
|
/* set IO based at 0x388 */
|
3419 |
|
|
switch (s->iosynth) {
|
3420 |
|
|
case 0x388:
|
3421 |
|
|
reg_mask = 0;
|
3422 |
|
|
break;
|
3423 |
|
|
case 0x3C8:
|
3424 |
|
|
reg_mask = 0x01;
|
3425 |
|
|
break;
|
3426 |
|
|
case 0x3E0:
|
3427 |
|
|
reg_mask = 0x02;
|
3428 |
|
|
break;
|
3429 |
|
|
case 0x3E8:
|
3430 |
|
|
reg_mask = 0x03;
|
3431 |
|
|
break;
|
3432 |
|
|
default:
|
3433 |
|
|
s->iosynth = 0;
|
3434 |
|
|
break;
|
3435 |
|
|
}
|
3436 |
|
|
maskb(s->iobase + CODEC_CMI_LEGACY_CTRL + 3, ~0x03, reg_mask);
|
3437 |
|
|
/* enable FM */
|
3438 |
|
|
if (s->iosynth) {
|
3439 |
|
|
maskb(s->iobase + CODEC_CMI_MISC_CTRL + 2, ~0, 8);
|
3440 |
|
|
}
|
3441 |
|
|
}
|
3442 |
|
|
}
|
3443 |
|
|
#endif
|
3444 |
|
|
/* enable joystick */
|
3445 |
|
|
if (joystick) {
|
3446 |
|
|
if (s->gameport.io && !request_region(s->gameport.io, CM_EXTENT_GAME, "cmpci GAME")) {
|
3447 |
|
|
printk(KERN_ERR "cmpci: gameport io ports in use\n");
|
3448 |
|
|
s->gameport.io = 0;
|
3449 |
|
|
} else
|
3450 |
|
|
maskb(s->iobase + CODEC_CMI_FUNCTRL1, ~0, 0x02);
|
3451 |
|
|
} else {
|
3452 |
|
|
maskb(s->iobase + CODEC_CMI_FUNCTRL1, ~0x02, 0);
|
3453 |
|
|
s->gameport.io = 0;
|
3454 |
|
|
}
|
3455 |
|
|
/* initialize codec registers */
|
3456 |
|
|
outb(0, s->iobase + CODEC_CMI_INT_HLDCLR + 2); /* disable ints */
|
3457 |
|
|
outb(0, s->iobase + CODEC_CMI_FUNCTRL0 + 2); /* disable channels */
|
3458 |
|
|
/* reset mixer */
|
3459 |
|
|
wrmixer(s, DSP_MIX_DATARESETIDX, 0);
|
3460 |
|
|
|
3461 |
|
|
/* request irq */
|
3462 |
|
|
if (request_irq(s->irq, cm_interrupt, SA_SHIRQ, "cmpci", s)) {
|
3463 |
|
|
printk(KERN_ERR "cmpci: irq %u in use\n", s->irq);
|
3464 |
|
|
goto err_irq;
|
3465 |
|
|
}
|
3466 |
|
|
printk(KERN_INFO "cmpci: found %s adapter at io %#x irq %u\n",
|
3467 |
|
|
devicename, s->iobase, s->irq);
|
3468 |
|
|
/* register devices */
|
3469 |
|
|
if ((s->dev_audio = register_sound_dsp(&cm_audio_fops, -1)) < 0) {
|
3470 |
|
|
ret = s->dev_audio;
|
3471 |
|
|
goto err_dev1;
|
3472 |
|
|
}
|
3473 |
|
|
if ((s->dev_mixer = register_sound_mixer(&cm_mixer_fops, -1)) < 0) {
|
3474 |
|
|
ret = s->dev_mixer;
|
3475 |
|
|
goto err_dev2;
|
3476 |
|
|
}
|
3477 |
|
|
#ifdef CONFIG_SOUND_CMPCI_MIDI
|
3478 |
|
|
if ((s->dev_midi = register_sound_midi(&cm_midi_fops, -1)) < 0) {
|
3479 |
|
|
ret = s->dev_midi;
|
3480 |
|
|
goto err_dev3;
|
3481 |
|
|
}
|
3482 |
|
|
#endif
|
3483 |
|
|
#ifdef CONFIG_SOUND_CMPCI_FM
|
3484 |
|
|
if ((s->dev_dmfm = register_sound_special(&cm_dmfm_fops, 15 /* ?? */)) < 0) {
|
3485 |
|
|
ret = s->dev_dmfm;
|
3486 |
|
|
goto err_dev4;
|
3487 |
|
|
}
|
3488 |
|
|
#endif
|
3489 |
|
|
pci_set_master(pcidev); /* enable bus mastering */
|
3490 |
|
|
/* initialize the chips */
|
3491 |
|
|
fs = get_fs();
|
3492 |
|
|
set_fs(KERNEL_DS);
|
3493 |
|
|
/* set mixer output */
|
3494 |
|
|
frobindir(s, DSP_MIX_OUTMIXIDX, 0x1f, 0x1f);
|
3495 |
|
|
/* set mixer input */
|
3496 |
|
|
val = SOUND_MASK_LINE|SOUND_MASK_SYNTH|SOUND_MASK_CD|SOUND_MASK_MIC;
|
3497 |
|
|
mixer_ioctl(s, SOUND_MIXER_WRITE_RECSRC, (unsigned long)&val);
|
3498 |
|
|
for (i = 0; i < sizeof(initvol)/sizeof(initvol[0]); i++) {
|
3499 |
|
|
val = initvol[i].vol;
|
3500 |
|
|
mixer_ioctl(s, initvol[i].mixch, (unsigned long)&val);
|
3501 |
|
|
}
|
3502 |
|
|
/* use channel 1 for record, channel 0 for play */
|
3503 |
|
|
maskb(s->iobase + CODEC_CMI_FUNCTRL0, ~0, CHADC1);
|
3504 |
|
|
/* turn off VMIC3 - mic boost */
|
3505 |
|
|
if (mic_boost)
|
3506 |
|
|
maskb(s->iobase + CODEC_CMI_MIXER2, ~1, 0);
|
3507 |
|
|
else
|
3508 |
|
|
maskb(s->iobase + CODEC_CMI_MIXER2, ~0, 1);
|
3509 |
|
|
s->deviceid = pcidev->device;
|
3510 |
|
|
|
3511 |
|
|
if (pcidev->device == PCI_DEVICE_ID_CMEDIA_CM8738) {
|
3512 |
|
|
|
3513 |
|
|
/* chip version and hw capability check */
|
3514 |
|
|
s->chip_version = query_chip(s);
|
3515 |
|
|
printk(KERN_INFO "cmpci: chip version = 0%d\n", s->chip_version);
|
3516 |
|
|
|
3517 |
|
|
/* seet SPDIF-in inverse before enable SPDIF loop */
|
3518 |
|
|
set_spdifin_inverse(s, spdif_inverse);
|
3519 |
|
|
|
3520 |
|
|
/* enable SPDIF loop */
|
3521 |
|
|
set_spdif_loop(s, spdif_loop);
|
3522 |
|
|
|
3523 |
|
|
/* use SPDIF in #1 */
|
3524 |
|
|
set_spdifin_channel2(s, 0);
|
3525 |
|
|
|
3526 |
|
|
if (use_line_as_rear) {
|
3527 |
|
|
s->capability |= CAN_LINE_AS_REAR;
|
3528 |
|
|
s->status |= DO_LINE_AS_REAR;
|
3529 |
|
|
maskb(s->iobase + CODEC_CMI_MIXER1, ~0, SPK4);
|
3530 |
|
|
} else
|
3531 |
|
|
maskb(s->iobase + CODEC_CMI_MIXER1, ~SPK4, 0);
|
3532 |
|
|
if (s->chip_version >= 39) {
|
3533 |
|
|
if (use_line_as_bass) {
|
3534 |
|
|
s->capability |= CAN_LINE_AS_BASS;
|
3535 |
|
|
s->status |= DO_LINE_AS_BASS;
|
3536 |
|
|
maskb(s->iobase + CODEC_CMI_LEGACY_CTRL + 1, ~0, CB2LIN);
|
3537 |
|
|
} else
|
3538 |
|
|
maskb(s->iobase + CODEC_CMI_LEGACY_CTRL + 1, ~CB2LIN, 0);
|
3539 |
|
|
if (use_mic_as_bass) {
|
3540 |
|
|
s->capability |= CAN_MIC_AS_BASS;
|
3541 |
|
|
s->status |= DO_MIC_AS_BASS;
|
3542 |
|
|
maskb(s->iobase + CODEC_CMI_MISC, ~0, 0x04);
|
3543 |
|
|
} else
|
3544 |
|
|
maskb(s->iobase + CODEC_CMI_MISC, ~0x04, 0);
|
3545 |
|
|
}
|
3546 |
|
|
} else {
|
3547 |
|
|
s->chip_version = 0;
|
3548 |
|
|
/* 8338 will fall here */
|
3549 |
|
|
s->max_channels = 2;
|
3550 |
|
|
}
|
3551 |
|
|
/* register gameport */
|
3552 |
|
|
if (joystick)
|
3553 |
|
|
gameport_register_port(&s->gameport);
|
3554 |
|
|
/* store it in the driver field */
|
3555 |
|
|
pci_set_drvdata(pcidev, s);
|
3556 |
|
|
/* put it into driver list */
|
3557 |
|
|
list_add_tail(&s->devs, &devs);
|
3558 |
|
|
/* increment devindex */
|
3559 |
|
|
if (devindex < NR_DEVICE-1)
|
3560 |
|
|
devindex++;
|
3561 |
|
|
return 0;
|
3562 |
|
|
|
3563 |
|
|
#ifdef CONFIG_SOUND_CMPCI_FM
|
3564 |
|
|
unregister_sound_special(s->dev_dmfm);
|
3565 |
|
|
err_dev4:
|
3566 |
|
|
#endif
|
3567 |
|
|
#ifdef CONFIG_SOUND_CMPCI_MIDI
|
3568 |
|
|
unregister_sound_midi(s->dev_midi);
|
3569 |
|
|
err_dev3:
|
3570 |
|
|
#endif
|
3571 |
|
|
unregister_sound_mixer(s->dev_mixer);
|
3572 |
|
|
err_dev2:
|
3573 |
|
|
unregister_sound_dsp(s->dev_audio);
|
3574 |
|
|
err_dev1:
|
3575 |
|
|
printk(KERN_ERR "cmpci: cannot register misc device\n");
|
3576 |
|
|
free_irq(s->irq, s);
|
3577 |
|
|
err_irq:
|
3578 |
|
|
if (s->gameport.io)
|
3579 |
|
|
release_region(s->gameport.io, CM_EXTENT_GAME);
|
3580 |
|
|
#ifdef CONFIG_SOUND_CMPCI_FM
|
3581 |
|
|
if (s->iosynth) release_region(s->iosynth, CM_EXTENT_SYNTH);
|
3582 |
|
|
#endif
|
3583 |
|
|
#ifdef CONFIG_SOUND_CMPCI_MIDI
|
3584 |
|
|
if (s->iomidi) release_region(s->iomidi, CM_EXTENT_MIDI);
|
3585 |
|
|
#endif
|
3586 |
|
|
release_region(s->iobase, CM_EXTENT_CODEC);
|
3587 |
|
|
err_region5:
|
3588 |
|
|
kfree(s);
|
3589 |
|
|
return ret;
|
3590 |
|
|
}
|
3591 |
|
|
|
3592 |
|
|
/* --------------------------------------------------------------------- */
|
3593 |
|
|
|
3594 |
|
|
MODULE_AUTHOR("ChenLi Tien, cltien@cmedia.com.tw");
|
3595 |
|
|
MODULE_DESCRIPTION("CM8x38 Audio Driver");
|
3596 |
|
|
MODULE_LICENSE("GPL");
|
3597 |
|
|
|
3598 |
|
|
static void __devinit cm_remove(struct pci_dev *dev)
|
3599 |
|
|
{
|
3600 |
|
|
struct cm_state *s = pci_get_drvdata(dev);
|
3601 |
|
|
|
3602 |
|
|
if (!s)
|
3603 |
|
|
return;
|
3604 |
|
|
list_del(&s->devs);
|
3605 |
|
|
outb(0, s->iobase + CODEC_CMI_INT_HLDCLR + 2); /* disable ints */
|
3606 |
|
|
synchronize_irq();
|
3607 |
|
|
outb(0, s->iobase + CODEC_CMI_FUNCTRL0 + 2); /* disable channels */
|
3608 |
|
|
free_irq(s->irq, s);
|
3609 |
|
|
|
3610 |
|
|
/* reset mixer */
|
3611 |
|
|
wrmixer(s, DSP_MIX_DATARESETIDX, 0);
|
3612 |
|
|
|
3613 |
|
|
if (s->gameport.io) {
|
3614 |
|
|
gameport_unregister_port(&s->gameport);
|
3615 |
|
|
release_region(s->gameport.io, CM_EXTENT_GAME);
|
3616 |
|
|
}
|
3617 |
|
|
release_region(s->iobase, CM_EXTENT_CODEC);
|
3618 |
|
|
#ifdef CONFIG_SOUND_CMPCI_MIDI
|
3619 |
|
|
if (s->iomidi) release_region(s->iomidi, CM_EXTENT_MIDI);
|
3620 |
|
|
#endif
|
3621 |
|
|
#ifdef CONFIG_SOUND_CMPCI_FM
|
3622 |
|
|
if (s->iosynth) release_region(s->iosynth, CM_EXTENT_SYNTH);
|
3623 |
|
|
#endif
|
3624 |
|
|
unregister_sound_dsp(s->dev_audio);
|
3625 |
|
|
unregister_sound_mixer(s->dev_mixer);
|
3626 |
|
|
#ifdef CONFIG_SOUND_CMPCI_MIDI
|
3627 |
|
|
unregister_sound_midi(s->dev_midi);
|
3628 |
|
|
#endif
|
3629 |
|
|
#ifdef CONFIG_SOUND_CMPCI_FM
|
3630 |
|
|
unregister_sound_special(s->dev_dmfm);
|
3631 |
|
|
#endif
|
3632 |
|
|
kfree(s);
|
3633 |
|
|
pci_set_drvdata(dev, NULL);
|
3634 |
|
|
}
|
3635 |
|
|
|
3636 |
|
|
static struct pci_device_id id_table[] __devinitdata = {
|
3637 |
|
|
{ PCI_VENDOR_ID_CMEDIA, PCI_DEVICE_ID_CMEDIA_CM8738, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
|
3638 |
|
|
{ PCI_VENDOR_ID_CMEDIA, PCI_DEVICE_ID_CMEDIA_CM8338A, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
|
3639 |
|
|
{ PCI_VENDOR_ID_CMEDIA, PCI_DEVICE_ID_CMEDIA_CM8338B, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
|
3640 |
|
|
{ 0, }
|
3641 |
|
|
};
|
3642 |
|
|
|
3643 |
|
|
MODULE_DEVICE_TABLE(pci, id_table);
|
3644 |
|
|
|
3645 |
|
|
static struct pci_driver cm_driver = {
|
3646 |
|
|
name: "cmpci",
|
3647 |
|
|
id_table: id_table,
|
3648 |
|
|
probe: cm_probe,
|
3649 |
|
|
remove: cm_remove
|
3650 |
|
|
};
|
3651 |
|
|
|
3652 |
|
|
static int __init init_cmpci(void)
|
3653 |
|
|
{
|
3654 |
|
|
if (!pci_present()) /* No PCI bus in this machine! */
|
3655 |
|
|
return -ENODEV;
|
3656 |
|
|
printk(KERN_INFO "cmpci: version $Revision: 1.1.1.1 $ time " __TIME__ " " __DATE__ "\n");
|
3657 |
|
|
return pci_module_init(&cm_driver);
|
3658 |
|
|
}
|
3659 |
|
|
|
3660 |
|
|
static void __exit cleanup_cmpci(void)
|
3661 |
|
|
{
|
3662 |
|
|
printk(KERN_INFO "cmpci: unloading\n");
|
3663 |
|
|
pci_unregister_driver(&cm_driver);
|
3664 |
|
|
}
|
3665 |
|
|
|
3666 |
|
|
module_init(init_cmpci);
|
3667 |
|
|
module_exit(cleanup_cmpci);
|
3668 |
|
|
|