1 |
1275 |
phoenix |
/****************************************************************************/
|
2 |
|
|
|
3 |
|
|
/*
|
4 |
|
|
* esssolo1.c -- ESS Technology Solo1 (ES1946) audio driver.
|
5 |
|
|
*
|
6 |
|
|
* Copyright (C) 1998-2001, 2003 Thomas Sailer (t.sailer@alumni.ethz.ch)
|
7 |
|
|
*
|
8 |
|
|
* This program is free software; you can redistribute it and/or modify
|
9 |
|
|
* it under the terms of the GNU General Public License as published by
|
10 |
|
|
* the Free Software Foundation; either version 2 of the License, or
|
11 |
|
|
* (at your option) any later version.
|
12 |
|
|
*
|
13 |
|
|
* This program is distributed in the hope that it will be useful,
|
14 |
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
15 |
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
16 |
|
|
* GNU General Public License for more details.
|
17 |
|
|
*
|
18 |
|
|
* You should have received a copy of the GNU General Public License
|
19 |
|
|
* along with this program; if not, write to the Free Software
|
20 |
|
|
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
21 |
|
|
*
|
22 |
|
|
* Module command line parameters:
|
23 |
|
|
* none so far
|
24 |
|
|
*
|
25 |
|
|
* Supported devices:
|
26 |
|
|
* /dev/dsp standard /dev/dsp device, (mostly) OSS compatible
|
27 |
|
|
* /dev/mixer standard /dev/mixer device, (mostly) OSS compatible
|
28 |
|
|
* /dev/midi simple MIDI UART interface, no ioctl
|
29 |
|
|
*
|
30 |
|
|
* Revision history
|
31 |
|
|
* 10.11.1998 0.1 Initial release (without any hardware)
|
32 |
|
|
* 22.03.1999 0.2 cinfo.blocks should be reset after GETxPTR ioctl.
|
33 |
|
|
* reported by Johan Maes <joma@telindus.be>
|
34 |
|
|
* return EAGAIN instead of EBUSY when O_NONBLOCK
|
35 |
|
|
* read/write cannot be executed
|
36 |
|
|
* 07.04.1999 0.3 implemented the following ioctl's: SOUND_PCM_READ_RATE,
|
37 |
|
|
* SOUND_PCM_READ_CHANNELS, SOUND_PCM_READ_BITS;
|
38 |
|
|
* Alpha fixes reported by Peter Jones <pjones@redhat.com>
|
39 |
|
|
* 15.06.1999 0.4 Fix bad allocation bug.
|
40 |
|
|
* Thanks to Deti Fliegl <fliegl@in.tum.de>
|
41 |
|
|
* 28.06.1999 0.5 Add pci_set_master
|
42 |
|
|
* 12.08.1999 0.6 Fix MIDI UART crashing the driver
|
43 |
|
|
* Changed mixer semantics from OSS documented
|
44 |
|
|
* behaviour to OSS "code behaviour".
|
45 |
|
|
* Recording might actually work now.
|
46 |
|
|
* The real DDMA controller address register is at PCI config
|
47 |
|
|
* 0x60, while the register at 0x18 is used as a placeholder
|
48 |
|
|
* register for BIOS address allocation. This register
|
49 |
|
|
* is supposed to be copied into 0x60, according
|
50 |
|
|
* to the Solo1 datasheet. When I do that, I can access
|
51 |
|
|
* the DDMA registers except the mask bit, which
|
52 |
|
|
* is stuck at 1. When I copy the contents of 0x18 +0x10
|
53 |
|
|
* to the DDMA base register, everything seems to work.
|
54 |
|
|
* The fun part is that the Windows Solo1 driver doesn't
|
55 |
|
|
* seem to do these tricks.
|
56 |
|
|
* Bugs remaining: plops and clicks when starting/stopping playback
|
57 |
|
|
* 31.08.1999 0.7 add spin_lock_init
|
58 |
|
|
* replaced current->state = x with set_current_state(x)
|
59 |
|
|
* 03.09.1999 0.8 change read semantics for MIDI to match
|
60 |
|
|
* OSS more closely; remove possible wakeup race
|
61 |
|
|
* 07.10.1999 0.9 Fix initialization; complain if sequencer writes time out
|
62 |
|
|
* Revised resource grabbing for the FM synthesizer
|
63 |
|
|
* 28.10.1999 0.10 More waitqueue races fixed
|
64 |
|
|
* 09.12.1999 0.11 Work around stupid Alpha port issue (virt_to_bus(kmalloc(GFP_DMA)) > 16M)
|
65 |
|
|
* Disabling recording on Alpha
|
66 |
|
|
* 12.01.2000 0.12 Prevent some ioctl's from returning bad count values on underrun/overrun;
|
67 |
|
|
* Tim Janik's BSE (Bedevilled Sound Engine) found this
|
68 |
|
|
* Integrated (aka redid 8-)) APM support patch by Zach Brown
|
69 |
|
|
* 07.02.2000 0.13 Use pci_alloc_consistent and pci_register_driver
|
70 |
|
|
* 19.02.2000 0.14 Use pci_dma_supported to determine if recording should be disabled
|
71 |
|
|
* 13.03.2000 0.15 Reintroduce initialization of a couple of PCI config space registers
|
72 |
|
|
* 21.11.2000 0.16 Initialize dma buffers in poll, otherwise poll may return a bogus mask
|
73 |
|
|
* 12.12.2000 0.17 More dma buffer initializations, patch from
|
74 |
|
|
* Tjeerd Mulder <tjeerd.mulder@fujitsu-siemens.com>
|
75 |
|
|
* 31.01.2001 0.18 Register/Unregister gameport, original patch from
|
76 |
|
|
* Nathaniel Daw <daw@cs.cmu.edu>
|
77 |
|
|
* Fix SETTRIGGER non OSS API conformity
|
78 |
|
|
* 10.03.2001 provide abs function, prevent picking up a bogus kernel macro
|
79 |
|
|
* for abs. Bug report by Andrew Morton <andrewm@uow.edu.au>
|
80 |
|
|
* 15.05.2001 pci_enable_device moved, return values in probe cleaned
|
81 |
|
|
* up. Marcus Meissner <mm@caldera.de>
|
82 |
|
|
* 22.05.2001 0.19 more cleanups, changed PM to PCI 2.4 style, got rid
|
83 |
|
|
* of global list of devices, using pci device data.
|
84 |
|
|
* Marcus Meissner <mm@caldera.de>
|
85 |
|
|
* 03.01.2003 0.20 open_mode fixes from Georg Acher <acher@in.tum.de>
|
86 |
|
|
*/
|
87 |
|
|
|
88 |
|
|
/*****************************************************************************/
|
89 |
|
|
|
90 |
|
|
#include <linux/version.h>
|
91 |
|
|
#include <linux/module.h>
|
92 |
|
|
#include <linux/string.h>
|
93 |
|
|
#include <linux/ioport.h>
|
94 |
|
|
#include <linux/sched.h>
|
95 |
|
|
#include <linux/delay.h>
|
96 |
|
|
#include <linux/sound.h>
|
97 |
|
|
#include <linux/slab.h>
|
98 |
|
|
#include <linux/soundcard.h>
|
99 |
|
|
#include <linux/pci.h>
|
100 |
|
|
#include <linux/bitops.h>
|
101 |
|
|
#include <asm/io.h>
|
102 |
|
|
#include <asm/dma.h>
|
103 |
|
|
#include <linux/init.h>
|
104 |
|
|
#include <linux/poll.h>
|
105 |
|
|
#include <linux/spinlock.h>
|
106 |
|
|
#include <linux/smp_lock.h>
|
107 |
|
|
#include <linux/wrapper.h>
|
108 |
|
|
#include <asm/uaccess.h>
|
109 |
|
|
#include <asm/hardirq.h>
|
110 |
|
|
#include <linux/gameport.h>
|
111 |
|
|
|
112 |
|
|
#include "dm.h"
|
113 |
|
|
|
114 |
|
|
/* --------------------------------------------------------------------- */
|
115 |
|
|
|
116 |
|
|
#undef OSS_DOCUMENTED_MIXER_SEMANTICS
|
117 |
|
|
|
118 |
|
|
/* --------------------------------------------------------------------- */
|
119 |
|
|
|
120 |
|
|
#ifndef PCI_VENDOR_ID_ESS
|
121 |
|
|
#define PCI_VENDOR_ID_ESS 0x125d
|
122 |
|
|
#endif
|
123 |
|
|
#ifndef PCI_DEVICE_ID_ESS_SOLO1
|
124 |
|
|
#define PCI_DEVICE_ID_ESS_SOLO1 0x1969
|
125 |
|
|
#endif
|
126 |
|
|
|
127 |
|
|
#define SOLO1_MAGIC ((PCI_VENDOR_ID_ESS<<16)|PCI_DEVICE_ID_ESS_SOLO1)
|
128 |
|
|
|
129 |
|
|
#define DDMABASE_OFFSET 0 /* chip bug workaround kludge */
|
130 |
|
|
#define DDMABASE_EXTENT 16
|
131 |
|
|
|
132 |
|
|
#define IOBASE_EXTENT 16
|
133 |
|
|
#define SBBASE_EXTENT 16
|
134 |
|
|
#define VCBASE_EXTENT (DDMABASE_EXTENT+DDMABASE_OFFSET)
|
135 |
|
|
#define MPUBASE_EXTENT 4
|
136 |
|
|
#define GPBASE_EXTENT 4
|
137 |
|
|
#define GAMEPORT_EXTENT 4
|
138 |
|
|
|
139 |
|
|
#define FMSYNTH_EXTENT 4
|
140 |
|
|
|
141 |
|
|
/* MIDI buffer sizes */
|
142 |
|
|
|
143 |
|
|
#define MIDIINBUF 256
|
144 |
|
|
#define MIDIOUTBUF 256
|
145 |
|
|
|
146 |
|
|
#define FMODE_MIDI_SHIFT 3
|
147 |
|
|
#define FMODE_MIDI_READ (FMODE_READ << FMODE_MIDI_SHIFT)
|
148 |
|
|
#define FMODE_MIDI_WRITE (FMODE_WRITE << FMODE_MIDI_SHIFT)
|
149 |
|
|
|
150 |
|
|
#define FMODE_DMFM 0x10
|
151 |
|
|
|
152 |
|
|
static struct pci_driver solo1_driver;
|
153 |
|
|
|
154 |
|
|
/* --------------------------------------------------------------------- */
|
155 |
|
|
|
156 |
|
|
struct solo1_state {
|
157 |
|
|
/* magic */
|
158 |
|
|
unsigned int magic;
|
159 |
|
|
|
160 |
|
|
/* the corresponding pci_dev structure */
|
161 |
|
|
struct pci_dev *dev;
|
162 |
|
|
|
163 |
|
|
/* soundcore stuff */
|
164 |
|
|
int dev_audio;
|
165 |
|
|
int dev_mixer;
|
166 |
|
|
int dev_midi;
|
167 |
|
|
int dev_dmfm;
|
168 |
|
|
|
169 |
|
|
/* hardware resources */
|
170 |
|
|
unsigned long iobase, sbbase, vcbase, ddmabase, mpubase; /* long for SPARC */
|
171 |
|
|
unsigned int irq;
|
172 |
|
|
|
173 |
|
|
/* mixer registers */
|
174 |
|
|
struct {
|
175 |
|
|
unsigned short vol[10];
|
176 |
|
|
unsigned int recsrc;
|
177 |
|
|
unsigned int modcnt;
|
178 |
|
|
unsigned short micpreamp;
|
179 |
|
|
} mix;
|
180 |
|
|
|
181 |
|
|
/* wave stuff */
|
182 |
|
|
unsigned fmt;
|
183 |
|
|
unsigned channels;
|
184 |
|
|
unsigned rate;
|
185 |
|
|
unsigned char clkdiv;
|
186 |
|
|
unsigned ena;
|
187 |
|
|
|
188 |
|
|
spinlock_t lock;
|
189 |
|
|
struct semaphore open_sem;
|
190 |
|
|
mode_t open_mode;
|
191 |
|
|
wait_queue_head_t open_wait;
|
192 |
|
|
|
193 |
|
|
struct dmabuf {
|
194 |
|
|
void *rawbuf;
|
195 |
|
|
dma_addr_t dmaaddr;
|
196 |
|
|
unsigned buforder;
|
197 |
|
|
unsigned numfrag;
|
198 |
|
|
unsigned fragshift;
|
199 |
|
|
unsigned hwptr, swptr;
|
200 |
|
|
unsigned total_bytes;
|
201 |
|
|
int count;
|
202 |
|
|
unsigned error; /* over/underrun */
|
203 |
|
|
wait_queue_head_t wait;
|
204 |
|
|
/* redundant, but makes calculations easier */
|
205 |
|
|
unsigned fragsize;
|
206 |
|
|
unsigned dmasize;
|
207 |
|
|
unsigned fragsamples;
|
208 |
|
|
/* OSS stuff */
|
209 |
|
|
unsigned mapped:1;
|
210 |
|
|
unsigned ready:1;
|
211 |
|
|
unsigned endcleared:1;
|
212 |
|
|
unsigned enabled:1;
|
213 |
|
|
unsigned ossfragshift;
|
214 |
|
|
int ossmaxfrags;
|
215 |
|
|
unsigned subdivision;
|
216 |
|
|
} dma_dac, dma_adc;
|
217 |
|
|
|
218 |
|
|
/* midi stuff */
|
219 |
|
|
struct {
|
220 |
|
|
unsigned ird, iwr, icnt;
|
221 |
|
|
unsigned ord, owr, ocnt;
|
222 |
|
|
wait_queue_head_t iwait;
|
223 |
|
|
wait_queue_head_t owait;
|
224 |
|
|
struct timer_list timer;
|
225 |
|
|
unsigned char ibuf[MIDIINBUF];
|
226 |
|
|
unsigned char obuf[MIDIOUTBUF];
|
227 |
|
|
} midi;
|
228 |
|
|
|
229 |
|
|
struct gameport gameport;
|
230 |
|
|
};
|
231 |
|
|
|
232 |
|
|
/* --------------------------------------------------------------------- */
|
233 |
|
|
|
234 |
|
|
static inline void write_seq(struct solo1_state *s, unsigned char data)
|
235 |
|
|
{
|
236 |
|
|
int i;
|
237 |
|
|
unsigned long flags;
|
238 |
|
|
|
239 |
|
|
/* the __cli stunt is to send the data within the command window */
|
240 |
|
|
for (i = 0; i < 0xffff; i++) {
|
241 |
|
|
__save_flags(flags);
|
242 |
|
|
__cli();
|
243 |
|
|
if (!(inb(s->sbbase+0xc) & 0x80)) {
|
244 |
|
|
outb(data, s->sbbase+0xc);
|
245 |
|
|
__restore_flags(flags);
|
246 |
|
|
return;
|
247 |
|
|
}
|
248 |
|
|
__restore_flags(flags);
|
249 |
|
|
}
|
250 |
|
|
printk(KERN_ERR "esssolo1: write_seq timeout\n");
|
251 |
|
|
outb(data, s->sbbase+0xc);
|
252 |
|
|
}
|
253 |
|
|
|
254 |
|
|
static inline int read_seq(struct solo1_state *s, unsigned char *data)
|
255 |
|
|
{
|
256 |
|
|
int i;
|
257 |
|
|
|
258 |
|
|
if (!data)
|
259 |
|
|
return 0;
|
260 |
|
|
for (i = 0; i < 0xffff; i++)
|
261 |
|
|
if (inb(s->sbbase+0xe) & 0x80) {
|
262 |
|
|
*data = inb(s->sbbase+0xa);
|
263 |
|
|
return 1;
|
264 |
|
|
}
|
265 |
|
|
printk(KERN_ERR "esssolo1: read_seq timeout\n");
|
266 |
|
|
return 0;
|
267 |
|
|
}
|
268 |
|
|
|
269 |
|
|
static int inline reset_ctrl(struct solo1_state *s)
|
270 |
|
|
{
|
271 |
|
|
int i;
|
272 |
|
|
|
273 |
|
|
outb(3, s->sbbase+6); /* clear sequencer and FIFO */
|
274 |
|
|
udelay(10);
|
275 |
|
|
outb(0, s->sbbase+6);
|
276 |
|
|
for (i = 0; i < 0xffff; i++)
|
277 |
|
|
if (inb(s->sbbase+0xe) & 0x80)
|
278 |
|
|
if (inb(s->sbbase+0xa) == 0xaa) {
|
279 |
|
|
write_seq(s, 0xc6); /* enter enhanced mode */
|
280 |
|
|
return 1;
|
281 |
|
|
}
|
282 |
|
|
return 0;
|
283 |
|
|
}
|
284 |
|
|
|
285 |
|
|
static void write_ctrl(struct solo1_state *s, unsigned char reg, unsigned char data)
|
286 |
|
|
{
|
287 |
|
|
write_seq(s, reg);
|
288 |
|
|
write_seq(s, data);
|
289 |
|
|
}
|
290 |
|
|
|
291 |
|
|
#if 0 /* unused */
|
292 |
|
|
static unsigned char read_ctrl(struct solo1_state *s, unsigned char reg)
|
293 |
|
|
{
|
294 |
|
|
unsigned char r;
|
295 |
|
|
|
296 |
|
|
write_seq(s, 0xc0);
|
297 |
|
|
write_seq(s, reg);
|
298 |
|
|
read_seq(s, &r);
|
299 |
|
|
return r;
|
300 |
|
|
}
|
301 |
|
|
#endif /* unused */
|
302 |
|
|
|
303 |
|
|
static void write_mixer(struct solo1_state *s, unsigned char reg, unsigned char data)
|
304 |
|
|
{
|
305 |
|
|
outb(reg, s->sbbase+4);
|
306 |
|
|
outb(data, s->sbbase+5);
|
307 |
|
|
}
|
308 |
|
|
|
309 |
|
|
static unsigned char read_mixer(struct solo1_state *s, unsigned char reg)
|
310 |
|
|
{
|
311 |
|
|
outb(reg, s->sbbase+4);
|
312 |
|
|
return inb(s->sbbase+5);
|
313 |
|
|
}
|
314 |
|
|
|
315 |
|
|
/* --------------------------------------------------------------------- */
|
316 |
|
|
|
317 |
|
|
static inline unsigned ld2(unsigned int x)
|
318 |
|
|
{
|
319 |
|
|
unsigned r = 0;
|
320 |
|
|
|
321 |
|
|
if (x >= 0x10000) {
|
322 |
|
|
x >>= 16;
|
323 |
|
|
r += 16;
|
324 |
|
|
}
|
325 |
|
|
if (x >= 0x100) {
|
326 |
|
|
x >>= 8;
|
327 |
|
|
r += 8;
|
328 |
|
|
}
|
329 |
|
|
if (x >= 0x10) {
|
330 |
|
|
x >>= 4;
|
331 |
|
|
r += 4;
|
332 |
|
|
}
|
333 |
|
|
if (x >= 4) {
|
334 |
|
|
x >>= 2;
|
335 |
|
|
r += 2;
|
336 |
|
|
}
|
337 |
|
|
if (x >= 2)
|
338 |
|
|
r++;
|
339 |
|
|
return r;
|
340 |
|
|
}
|
341 |
|
|
|
342 |
|
|
/* --------------------------------------------------------------------- */
|
343 |
|
|
|
344 |
|
|
static inline void stop_dac(struct solo1_state *s)
|
345 |
|
|
{
|
346 |
|
|
unsigned long flags;
|
347 |
|
|
|
348 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
349 |
|
|
s->ena &= ~FMODE_WRITE;
|
350 |
|
|
write_mixer(s, 0x78, 0x10);
|
351 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
352 |
|
|
}
|
353 |
|
|
|
354 |
|
|
static void start_dac(struct solo1_state *s)
|
355 |
|
|
{
|
356 |
|
|
unsigned long flags;
|
357 |
|
|
|
358 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
359 |
|
|
if (!(s->ena & FMODE_WRITE) && (s->dma_dac.mapped || s->dma_dac.count > 0) && s->dma_dac.ready) {
|
360 |
|
|
s->ena |= FMODE_WRITE;
|
361 |
|
|
write_mixer(s, 0x78, 0x12);
|
362 |
|
|
udelay(10);
|
363 |
|
|
write_mixer(s, 0x78, 0x13);
|
364 |
|
|
}
|
365 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
366 |
|
|
}
|
367 |
|
|
|
368 |
|
|
static inline void stop_adc(struct solo1_state *s)
|
369 |
|
|
{
|
370 |
|
|
unsigned long flags;
|
371 |
|
|
|
372 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
373 |
|
|
s->ena &= ~FMODE_READ;
|
374 |
|
|
write_ctrl(s, 0xb8, 0xe);
|
375 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
376 |
|
|
}
|
377 |
|
|
|
378 |
|
|
static void start_adc(struct solo1_state *s)
|
379 |
|
|
{
|
380 |
|
|
unsigned long flags;
|
381 |
|
|
|
382 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
383 |
|
|
if (!(s->ena & FMODE_READ) && (s->dma_adc.mapped || s->dma_adc.count < (signed)(s->dma_adc.dmasize - 2*s->dma_adc.fragsize))
|
384 |
|
|
&& s->dma_adc.ready) {
|
385 |
|
|
s->ena |= FMODE_READ;
|
386 |
|
|
write_ctrl(s, 0xb8, 0xf);
|
387 |
|
|
#if 0
|
388 |
|
|
printk(KERN_DEBUG "solo1: DMAbuffer: 0x%08lx\n", (long)s->dma_adc.rawbuf);
|
389 |
|
|
printk(KERN_DEBUG "solo1: DMA: mask: 0x%02x cnt: 0x%04x addr: 0x%08x stat: 0x%02x\n",
|
390 |
|
|
inb(s->ddmabase+0xf), inw(s->ddmabase+4), inl(s->ddmabase), inb(s->ddmabase+8));
|
391 |
|
|
#endif
|
392 |
|
|
outb(0, s->ddmabase+0xd); /* master reset */
|
393 |
|
|
outb(1, s->ddmabase+0xf); /* mask */
|
394 |
|
|
outb(0x54/*0x14*/, s->ddmabase+0xb); /* DMA_MODE_READ | DMA_MODE_AUTOINIT */
|
395 |
|
|
outl(virt_to_bus(s->dma_adc.rawbuf), s->ddmabase);
|
396 |
|
|
outw(s->dma_adc.dmasize-1, s->ddmabase+4);
|
397 |
|
|
outb(0, s->ddmabase+0xf);
|
398 |
|
|
}
|
399 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
400 |
|
|
#if 0
|
401 |
|
|
printk(KERN_DEBUG "solo1: start DMA: reg B8: 0x%02x SBstat: 0x%02x\n"
|
402 |
|
|
KERN_DEBUG "solo1: DMA: stat: 0x%02x cnt: 0x%04x mask: 0x%02x\n",
|
403 |
|
|
read_ctrl(s, 0xb8), inb(s->sbbase+0xc),
|
404 |
|
|
inb(s->ddmabase+8), inw(s->ddmabase+4), inb(s->ddmabase+0xf));
|
405 |
|
|
printk(KERN_DEBUG "solo1: A1: 0x%02x A2: 0x%02x A4: 0x%02x A5: 0x%02x A8: 0x%02x\n"
|
406 |
|
|
KERN_DEBUG "solo1: B1: 0x%02x B2: 0x%02x B4: 0x%02x B7: 0x%02x B8: 0x%02x B9: 0x%02x\n",
|
407 |
|
|
read_ctrl(s, 0xa1), read_ctrl(s, 0xa2), read_ctrl(s, 0xa4), read_ctrl(s, 0xa5), read_ctrl(s, 0xa8),
|
408 |
|
|
read_ctrl(s, 0xb1), read_ctrl(s, 0xb2), read_ctrl(s, 0xb4), read_ctrl(s, 0xb7), read_ctrl(s, 0xb8),
|
409 |
|
|
read_ctrl(s, 0xb9));
|
410 |
|
|
#endif
|
411 |
|
|
}
|
412 |
|
|
|
413 |
|
|
/* --------------------------------------------------------------------- */
|
414 |
|
|
|
415 |
|
|
#define DMABUF_DEFAULTORDER (15-PAGE_SHIFT)
|
416 |
|
|
#define DMABUF_MINORDER 1
|
417 |
|
|
|
418 |
|
|
static inline void dealloc_dmabuf(struct solo1_state *s, struct dmabuf *db)
|
419 |
|
|
{
|
420 |
|
|
struct page *page, *pend;
|
421 |
|
|
|
422 |
|
|
if (db->rawbuf) {
|
423 |
|
|
/* undo marking the pages as reserved */
|
424 |
|
|
pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
|
425 |
|
|
for (page = virt_to_page(db->rawbuf); page <= pend; page++)
|
426 |
|
|
mem_map_unreserve(page);
|
427 |
|
|
pci_free_consistent(s->dev, PAGE_SIZE << db->buforder, db->rawbuf, db->dmaaddr);
|
428 |
|
|
}
|
429 |
|
|
db->rawbuf = NULL;
|
430 |
|
|
db->mapped = db->ready = 0;
|
431 |
|
|
}
|
432 |
|
|
|
433 |
|
|
static int prog_dmabuf(struct solo1_state *s, struct dmabuf *db)
|
434 |
|
|
{
|
435 |
|
|
int order;
|
436 |
|
|
unsigned bytespersec;
|
437 |
|
|
unsigned bufs, sample_shift = 0;
|
438 |
|
|
struct page *page, *pend;
|
439 |
|
|
|
440 |
|
|
db->hwptr = db->swptr = db->total_bytes = db->count = db->error = db->endcleared = 0;
|
441 |
|
|
if (!db->rawbuf) {
|
442 |
|
|
db->ready = db->mapped = 0;
|
443 |
|
|
for (order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER; order--)
|
444 |
|
|
if ((db->rawbuf = pci_alloc_consistent(s->dev, PAGE_SIZE << order, &db->dmaaddr)))
|
445 |
|
|
break;
|
446 |
|
|
if (!db->rawbuf)
|
447 |
|
|
return -ENOMEM;
|
448 |
|
|
db->buforder = order;
|
449 |
|
|
/* now mark the pages as reserved; otherwise remap_page_range doesn't do what we want */
|
450 |
|
|
pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
|
451 |
|
|
for (page = virt_to_page(db->rawbuf); page <= pend; page++)
|
452 |
|
|
mem_map_reserve(page);
|
453 |
|
|
}
|
454 |
|
|
if (s->fmt & (AFMT_S16_LE | AFMT_U16_LE))
|
455 |
|
|
sample_shift++;
|
456 |
|
|
if (s->channels > 1)
|
457 |
|
|
sample_shift++;
|
458 |
|
|
bytespersec = s->rate << sample_shift;
|
459 |
|
|
bufs = PAGE_SIZE << db->buforder;
|
460 |
|
|
if (db->ossfragshift) {
|
461 |
|
|
if ((1000 << db->ossfragshift) < bytespersec)
|
462 |
|
|
db->fragshift = ld2(bytespersec/1000);
|
463 |
|
|
else
|
464 |
|
|
db->fragshift = db->ossfragshift;
|
465 |
|
|
} else {
|
466 |
|
|
db->fragshift = ld2(bytespersec/100/(db->subdivision ? db->subdivision : 1));
|
467 |
|
|
if (db->fragshift < 3)
|
468 |
|
|
db->fragshift = 3;
|
469 |
|
|
}
|
470 |
|
|
db->numfrag = bufs >> db->fragshift;
|
471 |
|
|
while (db->numfrag < 4 && db->fragshift > 3) {
|
472 |
|
|
db->fragshift--;
|
473 |
|
|
db->numfrag = bufs >> db->fragshift;
|
474 |
|
|
}
|
475 |
|
|
db->fragsize = 1 << db->fragshift;
|
476 |
|
|
if (db->ossmaxfrags >= 4 && db->ossmaxfrags < db->numfrag)
|
477 |
|
|
db->numfrag = db->ossmaxfrags;
|
478 |
|
|
db->fragsamples = db->fragsize >> sample_shift;
|
479 |
|
|
db->dmasize = db->numfrag << db->fragshift;
|
480 |
|
|
db->enabled = 1;
|
481 |
|
|
return 0;
|
482 |
|
|
}
|
483 |
|
|
|
484 |
|
|
static inline int prog_dmabuf_adc(struct solo1_state *s)
|
485 |
|
|
{
|
486 |
|
|
unsigned long va;
|
487 |
|
|
int c;
|
488 |
|
|
|
489 |
|
|
stop_adc(s);
|
490 |
|
|
/* check if PCI implementation supports 24bit busmaster DMA */
|
491 |
|
|
if (s->dev->dma_mask > 0xffffff)
|
492 |
|
|
return -EIO;
|
493 |
|
|
if ((c = prog_dmabuf(s, &s->dma_adc)))
|
494 |
|
|
return c;
|
495 |
|
|
va = s->dma_adc.dmaaddr;
|
496 |
|
|
if ((va & ~((1<<24)-1)))
|
497 |
|
|
panic("solo1: buffer above 16M boundary");
|
498 |
|
|
outb(0, s->ddmabase+0xd); /* clear */
|
499 |
|
|
outb(1, s->ddmabase+0xf); /* mask */
|
500 |
|
|
/*outb(0, s->ddmabase+8);*/ /* enable (enable is active low!) */
|
501 |
|
|
outb(0x54, s->ddmabase+0xb); /* DMA_MODE_READ | DMA_MODE_AUTOINIT */
|
502 |
|
|
outl(va, s->ddmabase);
|
503 |
|
|
outw(s->dma_adc.dmasize-1, s->ddmabase+4);
|
504 |
|
|
c = - s->dma_adc.fragsamples;
|
505 |
|
|
write_ctrl(s, 0xa4, c);
|
506 |
|
|
write_ctrl(s, 0xa5, c >> 8);
|
507 |
|
|
outb(0, s->ddmabase+0xf);
|
508 |
|
|
s->dma_adc.ready = 1;
|
509 |
|
|
return 0;
|
510 |
|
|
}
|
511 |
|
|
|
512 |
|
|
static inline int prog_dmabuf_dac(struct solo1_state *s)
|
513 |
|
|
{
|
514 |
|
|
unsigned long va;
|
515 |
|
|
int c;
|
516 |
|
|
|
517 |
|
|
stop_dac(s);
|
518 |
|
|
if ((c = prog_dmabuf(s, &s->dma_dac)))
|
519 |
|
|
return c;
|
520 |
|
|
memset(s->dma_dac.rawbuf, (s->fmt & (AFMT_U8 | AFMT_U16_LE)) ? 0 : 0x80, s->dma_dac.dmasize); /* almost correct for U16 */
|
521 |
|
|
va = s->dma_dac.dmaaddr;
|
522 |
|
|
if ((va ^ (va + s->dma_dac.dmasize - 1)) & ~((1<<20)-1))
|
523 |
|
|
panic("solo1: buffer crosses 1M boundary");
|
524 |
|
|
outl(va, s->iobase);
|
525 |
|
|
/* warning: s->dma_dac.dmasize & 0xffff must not be zero! i.e. this limits us to a 32k buffer */
|
526 |
|
|
outw(s->dma_dac.dmasize, s->iobase+4);
|
527 |
|
|
c = - s->dma_dac.fragsamples;
|
528 |
|
|
write_mixer(s, 0x74, c);
|
529 |
|
|
write_mixer(s, 0x76, c >> 8);
|
530 |
|
|
outb(0xa, s->iobase+6);
|
531 |
|
|
s->dma_dac.ready = 1;
|
532 |
|
|
return 0;
|
533 |
|
|
}
|
534 |
|
|
|
535 |
|
|
static inline void clear_advance(void *buf, unsigned bsize, unsigned bptr, unsigned len, unsigned char c)
|
536 |
|
|
{
|
537 |
|
|
if (bptr + len > bsize) {
|
538 |
|
|
unsigned x = bsize - bptr;
|
539 |
|
|
memset(((char *)buf) + bptr, c, x);
|
540 |
|
|
bptr = 0;
|
541 |
|
|
len -= x;
|
542 |
|
|
}
|
543 |
|
|
memset(((char *)buf) + bptr, c, len);
|
544 |
|
|
}
|
545 |
|
|
|
546 |
|
|
/* call with spinlock held! */
|
547 |
|
|
|
548 |
|
|
static void solo1_update_ptr(struct solo1_state *s)
|
549 |
|
|
{
|
550 |
|
|
int diff;
|
551 |
|
|
unsigned hwptr;
|
552 |
|
|
|
553 |
|
|
/* update ADC pointer */
|
554 |
|
|
if (s->ena & FMODE_READ) {
|
555 |
|
|
hwptr = (s->dma_adc.dmasize - 1 - inw(s->ddmabase+4)) % s->dma_adc.dmasize;
|
556 |
|
|
diff = (s->dma_adc.dmasize + hwptr - s->dma_adc.hwptr) % s->dma_adc.dmasize;
|
557 |
|
|
s->dma_adc.hwptr = hwptr;
|
558 |
|
|
s->dma_adc.total_bytes += diff;
|
559 |
|
|
s->dma_adc.count += diff;
|
560 |
|
|
#if 0
|
561 |
|
|
printk(KERN_DEBUG "solo1: rd: hwptr %u swptr %u dmasize %u count %u\n",
|
562 |
|
|
s->dma_adc.hwptr, s->dma_adc.swptr, s->dma_adc.dmasize, s->dma_adc.count);
|
563 |
|
|
#endif
|
564 |
|
|
if (s->dma_adc.mapped) {
|
565 |
|
|
if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
|
566 |
|
|
wake_up(&s->dma_adc.wait);
|
567 |
|
|
} else {
|
568 |
|
|
if (s->dma_adc.count > (signed)(s->dma_adc.dmasize - ((3 * s->dma_adc.fragsize) >> 1))) {
|
569 |
|
|
s->ena &= ~FMODE_READ;
|
570 |
|
|
write_ctrl(s, 0xb8, 0xe);
|
571 |
|
|
s->dma_adc.error++;
|
572 |
|
|
}
|
573 |
|
|
if (s->dma_adc.count > 0)
|
574 |
|
|
wake_up(&s->dma_adc.wait);
|
575 |
|
|
}
|
576 |
|
|
}
|
577 |
|
|
/* update DAC pointer */
|
578 |
|
|
if (s->ena & FMODE_WRITE) {
|
579 |
|
|
hwptr = (s->dma_dac.dmasize - inw(s->iobase+4)) % s->dma_dac.dmasize;
|
580 |
|
|
diff = (s->dma_dac.dmasize + hwptr - s->dma_dac.hwptr) % s->dma_dac.dmasize;
|
581 |
|
|
s->dma_dac.hwptr = hwptr;
|
582 |
|
|
s->dma_dac.total_bytes += diff;
|
583 |
|
|
#if 0
|
584 |
|
|
printk(KERN_DEBUG "solo1: wr: hwptr %u swptr %u dmasize %u count %u\n",
|
585 |
|
|
s->dma_dac.hwptr, s->dma_dac.swptr, s->dma_dac.dmasize, s->dma_dac.count);
|
586 |
|
|
#endif
|
587 |
|
|
if (s->dma_dac.mapped) {
|
588 |
|
|
s->dma_dac.count += diff;
|
589 |
|
|
if (s->dma_dac.count >= (signed)s->dma_dac.fragsize)
|
590 |
|
|
wake_up(&s->dma_dac.wait);
|
591 |
|
|
} else {
|
592 |
|
|
s->dma_dac.count -= diff;
|
593 |
|
|
if (s->dma_dac.count <= 0) {
|
594 |
|
|
s->ena &= ~FMODE_WRITE;
|
595 |
|
|
write_mixer(s, 0x78, 0x12);
|
596 |
|
|
s->dma_dac.error++;
|
597 |
|
|
} else if (s->dma_dac.count <= (signed)s->dma_dac.fragsize && !s->dma_dac.endcleared) {
|
598 |
|
|
clear_advance(s->dma_dac.rawbuf, s->dma_dac.dmasize, s->dma_dac.swptr,
|
599 |
|
|
s->dma_dac.fragsize, (s->fmt & (AFMT_U8 | AFMT_U16_LE)) ? 0 : 0x80);
|
600 |
|
|
s->dma_dac.endcleared = 1;
|
601 |
|
|
}
|
602 |
|
|
if (s->dma_dac.count < (signed)s->dma_dac.dmasize)
|
603 |
|
|
wake_up(&s->dma_dac.wait);
|
604 |
|
|
}
|
605 |
|
|
}
|
606 |
|
|
}
|
607 |
|
|
|
608 |
|
|
/* --------------------------------------------------------------------- */
|
609 |
|
|
|
610 |
|
|
static void prog_codec(struct solo1_state *s)
|
611 |
|
|
{
|
612 |
|
|
unsigned long flags;
|
613 |
|
|
int fdiv, filter;
|
614 |
|
|
unsigned char c;
|
615 |
|
|
|
616 |
|
|
reset_ctrl(s);
|
617 |
|
|
write_seq(s, 0xd3);
|
618 |
|
|
/* program sampling rates */
|
619 |
|
|
filter = s->rate * 9 / 20; /* Set filter roll-off to 90% of rate/2 */
|
620 |
|
|
fdiv = 256 - 7160000 / (filter * 82);
|
621 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
622 |
|
|
write_ctrl(s, 0xa1, s->clkdiv);
|
623 |
|
|
write_ctrl(s, 0xa2, fdiv);
|
624 |
|
|
write_mixer(s, 0x70, s->clkdiv);
|
625 |
|
|
write_mixer(s, 0x72, fdiv);
|
626 |
|
|
/* program ADC parameters */
|
627 |
|
|
write_ctrl(s, 0xb8, 0xe);
|
628 |
|
|
write_ctrl(s, 0xb9, /*0x1*/0);
|
629 |
|
|
write_ctrl(s, 0xa8, (s->channels > 1) ? 0x11 : 0x12);
|
630 |
|
|
c = 0xd0;
|
631 |
|
|
if (s->fmt & (AFMT_S16_LE | AFMT_U16_LE))
|
632 |
|
|
c |= 0x04;
|
633 |
|
|
if (s->fmt & (AFMT_S16_LE | AFMT_S8))
|
634 |
|
|
c |= 0x20;
|
635 |
|
|
if (s->channels > 1)
|
636 |
|
|
c ^= 0x48;
|
637 |
|
|
write_ctrl(s, 0xb7, (c & 0x70) | 1);
|
638 |
|
|
write_ctrl(s, 0xb7, c);
|
639 |
|
|
write_ctrl(s, 0xb1, 0x50);
|
640 |
|
|
write_ctrl(s, 0xb2, 0x50);
|
641 |
|
|
/* program DAC parameters */
|
642 |
|
|
c = 0x40;
|
643 |
|
|
if (s->fmt & (AFMT_S16_LE | AFMT_U16_LE))
|
644 |
|
|
c |= 1;
|
645 |
|
|
if (s->fmt & (AFMT_S16_LE | AFMT_S8))
|
646 |
|
|
c |= 4;
|
647 |
|
|
if (s->channels > 1)
|
648 |
|
|
c |= 2;
|
649 |
|
|
write_mixer(s, 0x7a, c);
|
650 |
|
|
write_mixer(s, 0x78, 0x10);
|
651 |
|
|
s->ena = 0;
|
652 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
653 |
|
|
}
|
654 |
|
|
|
655 |
|
|
/* --------------------------------------------------------------------- */
|
656 |
|
|
|
657 |
|
|
static const char invalid_magic[] = KERN_CRIT "solo1: invalid magic value\n";
|
658 |
|
|
|
659 |
|
|
#define VALIDATE_STATE(s) \
|
660 |
|
|
({ \
|
661 |
|
|
if (!(s) || (s)->magic != SOLO1_MAGIC) { \
|
662 |
|
|
printk(invalid_magic); \
|
663 |
|
|
return -ENXIO; \
|
664 |
|
|
} \
|
665 |
|
|
})
|
666 |
|
|
|
667 |
|
|
/* --------------------------------------------------------------------- */
|
668 |
|
|
|
669 |
|
|
static int mixer_ioctl(struct solo1_state *s, unsigned int cmd, unsigned long arg)
|
670 |
|
|
{
|
671 |
|
|
static const unsigned int mixer_src[8] = {
|
672 |
|
|
SOUND_MASK_MIC, SOUND_MASK_MIC, SOUND_MASK_CD, SOUND_MASK_VOLUME,
|
673 |
|
|
SOUND_MASK_MIC, 0, SOUND_MASK_LINE, 0
|
674 |
|
|
};
|
675 |
|
|
static const unsigned char mixtable1[SOUND_MIXER_NRDEVICES] = {
|
676 |
|
|
[SOUND_MIXER_PCM] = 1, /* voice */
|
677 |
|
|
[SOUND_MIXER_SYNTH] = 2, /* FM */
|
678 |
|
|
[SOUND_MIXER_CD] = 3, /* CD */
|
679 |
|
|
[SOUND_MIXER_LINE] = 4, /* Line */
|
680 |
|
|
[SOUND_MIXER_LINE1] = 5, /* AUX */
|
681 |
|
|
[SOUND_MIXER_MIC] = 6, /* Mic */
|
682 |
|
|
[SOUND_MIXER_LINE2] = 7, /* Mono in */
|
683 |
|
|
[SOUND_MIXER_SPEAKER] = 8, /* Speaker */
|
684 |
|
|
[SOUND_MIXER_RECLEV] = 9, /* Recording level */
|
685 |
|
|
[SOUND_MIXER_VOLUME] = 10 /* Master Volume */
|
686 |
|
|
};
|
687 |
|
|
static const unsigned char mixreg[] = {
|
688 |
|
|
0x7c, /* voice */
|
689 |
|
|
0x36, /* FM */
|
690 |
|
|
0x38, /* CD */
|
691 |
|
|
0x3e, /* Line */
|
692 |
|
|
0x3a, /* AUX */
|
693 |
|
|
0x1a, /* Mic */
|
694 |
|
|
0x6d /* Mono in */
|
695 |
|
|
};
|
696 |
|
|
unsigned char l, r, rl, rr, vidx;
|
697 |
|
|
int i, val;
|
698 |
|
|
|
699 |
|
|
VALIDATE_STATE(s);
|
700 |
|
|
|
701 |
|
|
if (cmd == SOUND_MIXER_PRIVATE1) {
|
702 |
|
|
/* enable/disable/query mixer preamp */
|
703 |
|
|
if (get_user(val, (int *)arg))
|
704 |
|
|
return -EFAULT;
|
705 |
|
|
if (val != -1) {
|
706 |
|
|
val = val ? 0xff : 0xf7;
|
707 |
|
|
write_mixer(s, 0x7d, (read_mixer(s, 0x7d) | 0x08) & val);
|
708 |
|
|
}
|
709 |
|
|
val = (read_mixer(s, 0x7d) & 0x08) ? 1 : 0;
|
710 |
|
|
return put_user(val, (int *)arg);
|
711 |
|
|
}
|
712 |
|
|
if (cmd == SOUND_MIXER_PRIVATE2) {
|
713 |
|
|
/* enable/disable/query spatializer */
|
714 |
|
|
if (get_user(val, (int *)arg))
|
715 |
|
|
return -EFAULT;
|
716 |
|
|
if (val != -1) {
|
717 |
|
|
val &= 0x3f;
|
718 |
|
|
write_mixer(s, 0x52, val);
|
719 |
|
|
write_mixer(s, 0x50, val ? 0x08 : 0);
|
720 |
|
|
}
|
721 |
|
|
return put_user(read_mixer(s, 0x52), (int *)arg);
|
722 |
|
|
}
|
723 |
|
|
if (cmd == SOUND_MIXER_INFO) {
|
724 |
|
|
mixer_info info;
|
725 |
|
|
strncpy(info.id, "Solo1", sizeof(info.id));
|
726 |
|
|
strncpy(info.name, "ESS Solo1", sizeof(info.name));
|
727 |
|
|
info.modify_counter = s->mix.modcnt;
|
728 |
|
|
if (copy_to_user((void *)arg, &info, sizeof(info)))
|
729 |
|
|
return -EFAULT;
|
730 |
|
|
return 0;
|
731 |
|
|
}
|
732 |
|
|
if (cmd == SOUND_OLD_MIXER_INFO) {
|
733 |
|
|
_old_mixer_info info;
|
734 |
|
|
strncpy(info.id, "Solo1", sizeof(info.id));
|
735 |
|
|
strncpy(info.name, "ESS Solo1", sizeof(info.name));
|
736 |
|
|
if (copy_to_user((void *)arg, &info, sizeof(info)))
|
737 |
|
|
return -EFAULT;
|
738 |
|
|
return 0;
|
739 |
|
|
}
|
740 |
|
|
if (cmd == OSS_GETVERSION)
|
741 |
|
|
return put_user(SOUND_VERSION, (int *)arg);
|
742 |
|
|
if (_IOC_TYPE(cmd) != 'M' || _SIOC_SIZE(cmd) != sizeof(int))
|
743 |
|
|
return -EINVAL;
|
744 |
|
|
if (_SIOC_DIR(cmd) == _SIOC_READ) {
|
745 |
|
|
switch (_IOC_NR(cmd)) {
|
746 |
|
|
case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
|
747 |
|
|
return put_user(mixer_src[read_mixer(s, 0x1c) & 7], (int *)arg);
|
748 |
|
|
|
749 |
|
|
case SOUND_MIXER_DEVMASK: /* Arg contains a bit for each supported device */
|
750 |
|
|
return put_user(SOUND_MASK_PCM | SOUND_MASK_SYNTH | SOUND_MASK_CD |
|
751 |
|
|
SOUND_MASK_LINE | SOUND_MASK_LINE1 | SOUND_MASK_MIC |
|
752 |
|
|
SOUND_MASK_VOLUME | SOUND_MASK_LINE2 | SOUND_MASK_RECLEV |
|
753 |
|
|
SOUND_MASK_SPEAKER, (int *)arg);
|
754 |
|
|
|
755 |
|
|
case SOUND_MIXER_RECMASK: /* Arg contains a bit for each supported recording source */
|
756 |
|
|
return put_user(SOUND_MASK_LINE | SOUND_MASK_MIC | SOUND_MASK_CD | SOUND_MASK_VOLUME, (int *)arg);
|
757 |
|
|
|
758 |
|
|
case SOUND_MIXER_STEREODEVS: /* Mixer channels supporting stereo */
|
759 |
|
|
return put_user(SOUND_MASK_PCM | SOUND_MASK_SYNTH | SOUND_MASK_CD |
|
760 |
|
|
SOUND_MASK_LINE | SOUND_MASK_LINE1 | SOUND_MASK_MIC |
|
761 |
|
|
SOUND_MASK_VOLUME | SOUND_MASK_LINE2 | SOUND_MASK_RECLEV, (int *)arg);
|
762 |
|
|
|
763 |
|
|
case SOUND_MIXER_CAPS:
|
764 |
|
|
return put_user(SOUND_CAP_EXCL_INPUT, (int *)arg);
|
765 |
|
|
|
766 |
|
|
default:
|
767 |
|
|
i = _IOC_NR(cmd);
|
768 |
|
|
if (i >= SOUND_MIXER_NRDEVICES || !(vidx = mixtable1[i]))
|
769 |
|
|
return -EINVAL;
|
770 |
|
|
return put_user(s->mix.vol[vidx-1], (int *)arg);
|
771 |
|
|
}
|
772 |
|
|
}
|
773 |
|
|
if (_SIOC_DIR(cmd) != (_SIOC_READ|_SIOC_WRITE))
|
774 |
|
|
return -EINVAL;
|
775 |
|
|
s->mix.modcnt++;
|
776 |
|
|
switch (_IOC_NR(cmd)) {
|
777 |
|
|
case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
|
778 |
|
|
#if 0
|
779 |
|
|
{
|
780 |
|
|
static const unsigned char regs[] = {
|
781 |
|
|
0x1c, 0x1a, 0x36, 0x38, 0x3a, 0x3c, 0x3e, 0x60, 0x62, 0x6d, 0x7c
|
782 |
|
|
};
|
783 |
|
|
int i;
|
784 |
|
|
|
785 |
|
|
for (i = 0; i < sizeof(regs); i++)
|
786 |
|
|
printk(KERN_DEBUG "solo1: mixer reg 0x%02x: 0x%02x\n",
|
787 |
|
|
regs[i], read_mixer(s, regs[i]));
|
788 |
|
|
printk(KERN_DEBUG "solo1: ctrl reg 0x%02x: 0x%02x\n",
|
789 |
|
|
0xb4, read_ctrl(s, 0xb4));
|
790 |
|
|
}
|
791 |
|
|
#endif
|
792 |
|
|
if (get_user(val, (int *)arg))
|
793 |
|
|
return -EFAULT;
|
794 |
|
|
i = hweight32(val);
|
795 |
|
|
if (i == 0)
|
796 |
|
|
return 0;
|
797 |
|
|
else if (i > 1)
|
798 |
|
|
val &= ~mixer_src[read_mixer(s, 0x1c) & 7];
|
799 |
|
|
for (i = 0; i < 8; i++) {
|
800 |
|
|
if (mixer_src[i] & val)
|
801 |
|
|
break;
|
802 |
|
|
}
|
803 |
|
|
if (i > 7)
|
804 |
|
|
return 0;
|
805 |
|
|
write_mixer(s, 0x1c, i);
|
806 |
|
|
return 0;
|
807 |
|
|
|
808 |
|
|
case SOUND_MIXER_VOLUME:
|
809 |
|
|
if (get_user(val, (int *)arg))
|
810 |
|
|
return -EFAULT;
|
811 |
|
|
l = val & 0xff;
|
812 |
|
|
if (l > 100)
|
813 |
|
|
l = 100;
|
814 |
|
|
r = (val >> 8) & 0xff;
|
815 |
|
|
if (r > 100)
|
816 |
|
|
r = 100;
|
817 |
|
|
if (l < 6) {
|
818 |
|
|
rl = 0x40;
|
819 |
|
|
l = 0;
|
820 |
|
|
} else {
|
821 |
|
|
rl = (l * 2 - 11) / 3;
|
822 |
|
|
l = (rl * 3 + 11) / 2;
|
823 |
|
|
}
|
824 |
|
|
if (r < 6) {
|
825 |
|
|
rr = 0x40;
|
826 |
|
|
r = 0;
|
827 |
|
|
} else {
|
828 |
|
|
rr = (r * 2 - 11) / 3;
|
829 |
|
|
r = (rr * 3 + 11) / 2;
|
830 |
|
|
}
|
831 |
|
|
write_mixer(s, 0x60, rl);
|
832 |
|
|
write_mixer(s, 0x62, rr);
|
833 |
|
|
#ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
|
834 |
|
|
s->mix.vol[9] = ((unsigned int)r << 8) | l;
|
835 |
|
|
#else
|
836 |
|
|
s->mix.vol[9] = val;
|
837 |
|
|
#endif
|
838 |
|
|
return put_user(s->mix.vol[9], (int *)arg);
|
839 |
|
|
|
840 |
|
|
case SOUND_MIXER_SPEAKER:
|
841 |
|
|
if (get_user(val, (int *)arg))
|
842 |
|
|
return -EFAULT;
|
843 |
|
|
l = val & 0xff;
|
844 |
|
|
if (l > 100)
|
845 |
|
|
l = 100;
|
846 |
|
|
else if (l < 2)
|
847 |
|
|
l = 2;
|
848 |
|
|
rl = (l - 2) / 14;
|
849 |
|
|
l = rl * 14 + 2;
|
850 |
|
|
write_mixer(s, 0x3c, rl);
|
851 |
|
|
#ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
|
852 |
|
|
s->mix.vol[7] = l * 0x101;
|
853 |
|
|
#else
|
854 |
|
|
s->mix.vol[7] = val;
|
855 |
|
|
#endif
|
856 |
|
|
return put_user(s->mix.vol[7], (int *)arg);
|
857 |
|
|
|
858 |
|
|
case SOUND_MIXER_RECLEV:
|
859 |
|
|
if (get_user(val, (int *)arg))
|
860 |
|
|
return -EFAULT;
|
861 |
|
|
l = (val << 1) & 0x1fe;
|
862 |
|
|
if (l > 200)
|
863 |
|
|
l = 200;
|
864 |
|
|
else if (l < 5)
|
865 |
|
|
l = 5;
|
866 |
|
|
r = (val >> 7) & 0x1fe;
|
867 |
|
|
if (r > 200)
|
868 |
|
|
r = 200;
|
869 |
|
|
else if (r < 5)
|
870 |
|
|
r = 5;
|
871 |
|
|
rl = (l - 5) / 13;
|
872 |
|
|
rr = (r - 5) / 13;
|
873 |
|
|
r = (rl * 13 + 5) / 2;
|
874 |
|
|
l = (rr * 13 + 5) / 2;
|
875 |
|
|
write_ctrl(s, 0xb4, (rl << 4) | rr);
|
876 |
|
|
#ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
|
877 |
|
|
s->mix.vol[8] = ((unsigned int)r << 8) | l;
|
878 |
|
|
#else
|
879 |
|
|
s->mix.vol[8] = val;
|
880 |
|
|
#endif
|
881 |
|
|
return put_user(s->mix.vol[8], (int *)arg);
|
882 |
|
|
|
883 |
|
|
default:
|
884 |
|
|
i = _IOC_NR(cmd);
|
885 |
|
|
if (i >= SOUND_MIXER_NRDEVICES || !(vidx = mixtable1[i]))
|
886 |
|
|
return -EINVAL;
|
887 |
|
|
if (get_user(val, (int *)arg))
|
888 |
|
|
return -EFAULT;
|
889 |
|
|
l = (val << 1) & 0x1fe;
|
890 |
|
|
if (l > 200)
|
891 |
|
|
l = 200;
|
892 |
|
|
else if (l < 5)
|
893 |
|
|
l = 5;
|
894 |
|
|
r = (val >> 7) & 0x1fe;
|
895 |
|
|
if (r > 200)
|
896 |
|
|
r = 200;
|
897 |
|
|
else if (r < 5)
|
898 |
|
|
r = 5;
|
899 |
|
|
rl = (l - 5) / 13;
|
900 |
|
|
rr = (r - 5) / 13;
|
901 |
|
|
r = (rl * 13 + 5) / 2;
|
902 |
|
|
l = (rr * 13 + 5) / 2;
|
903 |
|
|
write_mixer(s, mixreg[vidx-1], (rl << 4) | rr);
|
904 |
|
|
#ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
|
905 |
|
|
s->mix.vol[vidx-1] = ((unsigned int)r << 8) | l;
|
906 |
|
|
#else
|
907 |
|
|
s->mix.vol[vidx-1] = val;
|
908 |
|
|
#endif
|
909 |
|
|
return put_user(s->mix.vol[vidx-1], (int *)arg);
|
910 |
|
|
}
|
911 |
|
|
}
|
912 |
|
|
|
913 |
|
|
/* --------------------------------------------------------------------- */
|
914 |
|
|
|
915 |
|
|
static int solo1_open_mixdev(struct inode *inode, struct file *file)
|
916 |
|
|
{
|
917 |
|
|
int minor = MINOR(inode->i_rdev);
|
918 |
|
|
struct solo1_state *s = NULL;
|
919 |
|
|
struct pci_dev *pci_dev;
|
920 |
|
|
|
921 |
|
|
pci_for_each_dev(pci_dev) {
|
922 |
|
|
struct pci_driver *drvr;
|
923 |
|
|
drvr = pci_dev_driver (pci_dev);
|
924 |
|
|
if (drvr != &solo1_driver)
|
925 |
|
|
continue;
|
926 |
|
|
s = (struct solo1_state*)pci_get_drvdata(pci_dev);
|
927 |
|
|
if (!s)
|
928 |
|
|
continue;
|
929 |
|
|
if (s->dev_mixer == minor)
|
930 |
|
|
break;
|
931 |
|
|
}
|
932 |
|
|
if (!s)
|
933 |
|
|
return -ENODEV;
|
934 |
|
|
VALIDATE_STATE(s);
|
935 |
|
|
file->private_data = s;
|
936 |
|
|
return 0;
|
937 |
|
|
}
|
938 |
|
|
|
939 |
|
|
static int solo1_release_mixdev(struct inode *inode, struct file *file)
|
940 |
|
|
{
|
941 |
|
|
struct solo1_state *s = (struct solo1_state *)file->private_data;
|
942 |
|
|
|
943 |
|
|
VALIDATE_STATE(s);
|
944 |
|
|
return 0;
|
945 |
|
|
}
|
946 |
|
|
|
947 |
|
|
static int solo1_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
|
948 |
|
|
{
|
949 |
|
|
return mixer_ioctl((struct solo1_state *)file->private_data, cmd, arg);
|
950 |
|
|
}
|
951 |
|
|
|
952 |
|
|
static /*const*/ struct file_operations solo1_mixer_fops = {
|
953 |
|
|
owner: THIS_MODULE,
|
954 |
|
|
llseek: no_llseek,
|
955 |
|
|
ioctl: solo1_ioctl_mixdev,
|
956 |
|
|
open: solo1_open_mixdev,
|
957 |
|
|
release: solo1_release_mixdev,
|
958 |
|
|
};
|
959 |
|
|
|
960 |
|
|
/* --------------------------------------------------------------------- */
|
961 |
|
|
|
962 |
|
|
static int drain_dac(struct solo1_state *s, int nonblock)
|
963 |
|
|
{
|
964 |
|
|
DECLARE_WAITQUEUE(wait, current);
|
965 |
|
|
unsigned long flags;
|
966 |
|
|
int count;
|
967 |
|
|
unsigned tmo;
|
968 |
|
|
|
969 |
|
|
if (s->dma_dac.mapped)
|
970 |
|
|
return 0;
|
971 |
|
|
add_wait_queue(&s->dma_dac.wait, &wait);
|
972 |
|
|
for (;;) {
|
973 |
|
|
set_current_state(TASK_INTERRUPTIBLE);
|
974 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
975 |
|
|
count = s->dma_dac.count;
|
976 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
977 |
|
|
if (count <= 0)
|
978 |
|
|
break;
|
979 |
|
|
if (signal_pending(current))
|
980 |
|
|
break;
|
981 |
|
|
if (nonblock) {
|
982 |
|
|
remove_wait_queue(&s->dma_dac.wait, &wait);
|
983 |
|
|
set_current_state(TASK_RUNNING);
|
984 |
|
|
return -EBUSY;
|
985 |
|
|
}
|
986 |
|
|
tmo = 3 * HZ * (count + s->dma_dac.fragsize) / 2 / s->rate;
|
987 |
|
|
if (s->fmt & (AFMT_S16_LE | AFMT_U16_LE))
|
988 |
|
|
tmo >>= 1;
|
989 |
|
|
if (s->channels > 1)
|
990 |
|
|
tmo >>= 1;
|
991 |
|
|
if (!schedule_timeout(tmo + 1))
|
992 |
|
|
printk(KERN_DEBUG "solo1: dma timed out??\n");
|
993 |
|
|
}
|
994 |
|
|
remove_wait_queue(&s->dma_dac.wait, &wait);
|
995 |
|
|
set_current_state(TASK_RUNNING);
|
996 |
|
|
if (signal_pending(current))
|
997 |
|
|
return -ERESTARTSYS;
|
998 |
|
|
return 0;
|
999 |
|
|
}
|
1000 |
|
|
|
1001 |
|
|
/* --------------------------------------------------------------------- */
|
1002 |
|
|
|
1003 |
|
|
static ssize_t solo1_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
|
1004 |
|
|
{
|
1005 |
|
|
struct solo1_state *s = (struct solo1_state *)file->private_data;
|
1006 |
|
|
DECLARE_WAITQUEUE(wait, current);
|
1007 |
|
|
ssize_t ret;
|
1008 |
|
|
unsigned long flags;
|
1009 |
|
|
unsigned swptr;
|
1010 |
|
|
int cnt;
|
1011 |
|
|
|
1012 |
|
|
VALIDATE_STATE(s);
|
1013 |
|
|
if (ppos != &file->f_pos)
|
1014 |
|
|
return -ESPIPE;
|
1015 |
|
|
if (s->dma_adc.mapped)
|
1016 |
|
|
return -ENXIO;
|
1017 |
|
|
if (!s->dma_adc.ready && (ret = prog_dmabuf_adc(s)))
|
1018 |
|
|
return ret;
|
1019 |
|
|
if (!access_ok(VERIFY_WRITE, buffer, count))
|
1020 |
|
|
return -EFAULT;
|
1021 |
|
|
ret = 0;
|
1022 |
|
|
add_wait_queue(&s->dma_adc.wait, &wait);
|
1023 |
|
|
while (count > 0) {
|
1024 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
1025 |
|
|
swptr = s->dma_adc.swptr;
|
1026 |
|
|
cnt = s->dma_adc.dmasize-swptr;
|
1027 |
|
|
if (s->dma_adc.count < cnt)
|
1028 |
|
|
cnt = s->dma_adc.count;
|
1029 |
|
|
if (cnt <= 0)
|
1030 |
|
|
__set_current_state(TASK_INTERRUPTIBLE);
|
1031 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
1032 |
|
|
if (cnt > count)
|
1033 |
|
|
cnt = count;
|
1034 |
|
|
#ifdef DEBUGREC
|
1035 |
|
|
printk(KERN_DEBUG "solo1_read: reg B8: 0x%02x DMAstat: 0x%02x DMAcnt: 0x%04x SBstat: 0x%02x cnt: %u\n",
|
1036 |
|
|
read_ctrl(s, 0xb8), inb(s->ddmabase+8), inw(s->ddmabase+4), inb(s->sbbase+0xc), cnt);
|
1037 |
|
|
#endif
|
1038 |
|
|
if (cnt <= 0) {
|
1039 |
|
|
if (s->dma_adc.enabled)
|
1040 |
|
|
start_adc(s);
|
1041 |
|
|
#ifdef DEBUGREC
|
1042 |
|
|
printk(KERN_DEBUG "solo1_read: regs: A1: 0x%02x A2: 0x%02x A4: 0x%02x A5: 0x%02x A8: 0x%02x\n"
|
1043 |
|
|
KERN_DEBUG "solo1_read: regs: B1: 0x%02x B2: 0x%02x B7: 0x%02x B8: 0x%02x B9: 0x%02x\n"
|
1044 |
|
|
KERN_DEBUG "solo1_read: DMA: addr: 0x%08x cnt: 0x%04x stat: 0x%02x mask: 0x%02x\n"
|
1045 |
|
|
KERN_DEBUG "solo1_read: SBstat: 0x%02x cnt: %u\n",
|
1046 |
|
|
read_ctrl(s, 0xa1), read_ctrl(s, 0xa2), read_ctrl(s, 0xa4), read_ctrl(s, 0xa5), read_ctrl(s, 0xa8),
|
1047 |
|
|
read_ctrl(s, 0xb1), read_ctrl(s, 0xb2), read_ctrl(s, 0xb7), read_ctrl(s, 0xb8), read_ctrl(s, 0xb9),
|
1048 |
|
|
inl(s->ddmabase), inw(s->ddmabase+4), inb(s->ddmabase+8), inb(s->ddmabase+15), inb(s->sbbase+0xc), cnt);
|
1049 |
|
|
#endif
|
1050 |
|
|
if (inb(s->ddmabase+15) & 1)
|
1051 |
|
|
printk(KERN_ERR "solo1: cannot start recording, DDMA mask bit stuck at 1\n");
|
1052 |
|
|
if (file->f_flags & O_NONBLOCK) {
|
1053 |
|
|
if (!ret)
|
1054 |
|
|
ret = -EAGAIN;
|
1055 |
|
|
break;
|
1056 |
|
|
}
|
1057 |
|
|
schedule();
|
1058 |
|
|
#ifdef DEBUGREC
|
1059 |
|
|
printk(KERN_DEBUG "solo1_read: regs: A1: 0x%02x A2: 0x%02x A4: 0x%02x A5: 0x%02x A8: 0x%02x\n"
|
1060 |
|
|
KERN_DEBUG "solo1_read: regs: B1: 0x%02x B2: 0x%02x B7: 0x%02x B8: 0x%02x B9: 0x%02x\n"
|
1061 |
|
|
KERN_DEBUG "solo1_read: DMA: addr: 0x%08x cnt: 0x%04x stat: 0x%02x mask: 0x%02x\n"
|
1062 |
|
|
KERN_DEBUG "solo1_read: SBstat: 0x%02x cnt: %u\n",
|
1063 |
|
|
read_ctrl(s, 0xa1), read_ctrl(s, 0xa2), read_ctrl(s, 0xa4), read_ctrl(s, 0xa5), read_ctrl(s, 0xa8),
|
1064 |
|
|
read_ctrl(s, 0xb1), read_ctrl(s, 0xb2), read_ctrl(s, 0xb7), read_ctrl(s, 0xb8), read_ctrl(s, 0xb9),
|
1065 |
|
|
inl(s->ddmabase), inw(s->ddmabase+4), inb(s->ddmabase+8), inb(s->ddmabase+15), inb(s->sbbase+0xc), cnt);
|
1066 |
|
|
#endif
|
1067 |
|
|
if (signal_pending(current)) {
|
1068 |
|
|
if (!ret)
|
1069 |
|
|
ret = -ERESTARTSYS;
|
1070 |
|
|
break;
|
1071 |
|
|
}
|
1072 |
|
|
continue;
|
1073 |
|
|
}
|
1074 |
|
|
if (copy_to_user(buffer, s->dma_adc.rawbuf + swptr, cnt)) {
|
1075 |
|
|
if (!ret)
|
1076 |
|
|
ret = -EFAULT;
|
1077 |
|
|
break;
|
1078 |
|
|
}
|
1079 |
|
|
swptr = (swptr + cnt) % s->dma_adc.dmasize;
|
1080 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
1081 |
|
|
s->dma_adc.swptr = swptr;
|
1082 |
|
|
s->dma_adc.count -= cnt;
|
1083 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
1084 |
|
|
count -= cnt;
|
1085 |
|
|
buffer += cnt;
|
1086 |
|
|
ret += cnt;
|
1087 |
|
|
if (s->dma_adc.enabled)
|
1088 |
|
|
start_adc(s);
|
1089 |
|
|
#ifdef DEBUGREC
|
1090 |
|
|
printk(KERN_DEBUG "solo1_read: reg B8: 0x%02x DMAstat: 0x%02x DMAcnt: 0x%04x SBstat: 0x%02x\n",
|
1091 |
|
|
read_ctrl(s, 0xb8), inb(s->ddmabase+8), inw(s->ddmabase+4), inb(s->sbbase+0xc));
|
1092 |
|
|
#endif
|
1093 |
|
|
}
|
1094 |
|
|
remove_wait_queue(&s->dma_adc.wait, &wait);
|
1095 |
|
|
set_current_state(TASK_RUNNING);
|
1096 |
|
|
return ret;
|
1097 |
|
|
}
|
1098 |
|
|
|
1099 |
|
|
static ssize_t solo1_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
|
1100 |
|
|
{
|
1101 |
|
|
struct solo1_state *s = (struct solo1_state *)file->private_data;
|
1102 |
|
|
DECLARE_WAITQUEUE(wait, current);
|
1103 |
|
|
ssize_t ret;
|
1104 |
|
|
unsigned long flags;
|
1105 |
|
|
unsigned swptr;
|
1106 |
|
|
int cnt;
|
1107 |
|
|
|
1108 |
|
|
VALIDATE_STATE(s);
|
1109 |
|
|
if (ppos != &file->f_pos)
|
1110 |
|
|
return -ESPIPE;
|
1111 |
|
|
if (s->dma_dac.mapped)
|
1112 |
|
|
return -ENXIO;
|
1113 |
|
|
if (!s->dma_dac.ready && (ret = prog_dmabuf_dac(s)))
|
1114 |
|
|
return ret;
|
1115 |
|
|
if (!access_ok(VERIFY_READ, buffer, count))
|
1116 |
|
|
return -EFAULT;
|
1117 |
|
|
#if 0
|
1118 |
|
|
printk(KERN_DEBUG "solo1_write: reg 70: 0x%02x 71: 0x%02x 72: 0x%02x 74: 0x%02x 76: 0x%02x 78: 0x%02x 7A: 0x%02x\n"
|
1119 |
|
|
KERN_DEBUG "solo1_write: DMA: addr: 0x%08x cnt: 0x%04x stat: 0x%02x SBstat: 0x%02x\n",
|
1120 |
|
|
read_mixer(s, 0x70), read_mixer(s, 0x71), read_mixer(s, 0x72), read_mixer(s, 0x74), read_mixer(s, 0x76),
|
1121 |
|
|
read_mixer(s, 0x78), read_mixer(s, 0x7a), inl(s->iobase), inw(s->iobase+4), inb(s->iobase+6), inb(s->sbbase+0xc));
|
1122 |
|
|
printk(KERN_DEBUG "solo1_write: reg 78: 0x%02x reg 7A: 0x%02x DMAcnt: 0x%04x DMAstat: 0x%02x SBstat: 0x%02x\n",
|
1123 |
|
|
read_mixer(s, 0x78), read_mixer(s, 0x7a), inw(s->iobase+4), inb(s->iobase+6), inb(s->sbbase+0xc));
|
1124 |
|
|
#endif
|
1125 |
|
|
ret = 0;
|
1126 |
|
|
add_wait_queue(&s->dma_dac.wait, &wait);
|
1127 |
|
|
while (count > 0) {
|
1128 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
1129 |
|
|
if (s->dma_dac.count < 0) {
|
1130 |
|
|
s->dma_dac.count = 0;
|
1131 |
|
|
s->dma_dac.swptr = s->dma_dac.hwptr;
|
1132 |
|
|
}
|
1133 |
|
|
swptr = s->dma_dac.swptr;
|
1134 |
|
|
cnt = s->dma_dac.dmasize-swptr;
|
1135 |
|
|
if (s->dma_dac.count + cnt > s->dma_dac.dmasize)
|
1136 |
|
|
cnt = s->dma_dac.dmasize - s->dma_dac.count;
|
1137 |
|
|
if (cnt <= 0)
|
1138 |
|
|
__set_current_state(TASK_INTERRUPTIBLE);
|
1139 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
1140 |
|
|
if (cnt > count)
|
1141 |
|
|
cnt = count;
|
1142 |
|
|
if (cnt <= 0) {
|
1143 |
|
|
if (s->dma_dac.enabled)
|
1144 |
|
|
start_dac(s);
|
1145 |
|
|
if (file->f_flags & O_NONBLOCK) {
|
1146 |
|
|
if (!ret)
|
1147 |
|
|
ret = -EAGAIN;
|
1148 |
|
|
break;
|
1149 |
|
|
}
|
1150 |
|
|
schedule();
|
1151 |
|
|
if (signal_pending(current)) {
|
1152 |
|
|
if (!ret)
|
1153 |
|
|
ret = -ERESTARTSYS;
|
1154 |
|
|
break;
|
1155 |
|
|
}
|
1156 |
|
|
continue;
|
1157 |
|
|
}
|
1158 |
|
|
if (copy_from_user(s->dma_dac.rawbuf + swptr, buffer, cnt)) {
|
1159 |
|
|
if (!ret)
|
1160 |
|
|
ret = -EFAULT;
|
1161 |
|
|
break;
|
1162 |
|
|
}
|
1163 |
|
|
swptr = (swptr + cnt) % s->dma_dac.dmasize;
|
1164 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
1165 |
|
|
s->dma_dac.swptr = swptr;
|
1166 |
|
|
s->dma_dac.count += cnt;
|
1167 |
|
|
s->dma_dac.endcleared = 0;
|
1168 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
1169 |
|
|
count -= cnt;
|
1170 |
|
|
buffer += cnt;
|
1171 |
|
|
ret += cnt;
|
1172 |
|
|
if (s->dma_dac.enabled)
|
1173 |
|
|
start_dac(s);
|
1174 |
|
|
}
|
1175 |
|
|
remove_wait_queue(&s->dma_dac.wait, &wait);
|
1176 |
|
|
set_current_state(TASK_RUNNING);
|
1177 |
|
|
return ret;
|
1178 |
|
|
}
|
1179 |
|
|
|
1180 |
|
|
/* No kernel lock - we have our own spinlock */
|
1181 |
|
|
static unsigned int solo1_poll(struct file *file, struct poll_table_struct *wait)
|
1182 |
|
|
{
|
1183 |
|
|
struct solo1_state *s = (struct solo1_state *)file->private_data;
|
1184 |
|
|
unsigned long flags;
|
1185 |
|
|
unsigned int mask = 0;
|
1186 |
|
|
|
1187 |
|
|
VALIDATE_STATE(s);
|
1188 |
|
|
if (file->f_mode & FMODE_WRITE) {
|
1189 |
|
|
if (!s->dma_dac.ready && prog_dmabuf_dac(s))
|
1190 |
|
|
return 0;
|
1191 |
|
|
poll_wait(file, &s->dma_dac.wait, wait);
|
1192 |
|
|
}
|
1193 |
|
|
if (file->f_mode & FMODE_READ) {
|
1194 |
|
|
if (!s->dma_adc.ready && prog_dmabuf_adc(s))
|
1195 |
|
|
return 0;
|
1196 |
|
|
poll_wait(file, &s->dma_adc.wait, wait);
|
1197 |
|
|
}
|
1198 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
1199 |
|
|
solo1_update_ptr(s);
|
1200 |
|
|
if (file->f_mode & FMODE_READ) {
|
1201 |
|
|
if (s->dma_adc.mapped) {
|
1202 |
|
|
if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
|
1203 |
|
|
mask |= POLLIN | POLLRDNORM;
|
1204 |
|
|
} else {
|
1205 |
|
|
if (s->dma_adc.count > 0)
|
1206 |
|
|
mask |= POLLIN | POLLRDNORM;
|
1207 |
|
|
}
|
1208 |
|
|
}
|
1209 |
|
|
if (file->f_mode & FMODE_WRITE) {
|
1210 |
|
|
if (s->dma_dac.mapped) {
|
1211 |
|
|
if (s->dma_dac.count >= (signed)s->dma_dac.fragsize)
|
1212 |
|
|
mask |= POLLOUT | POLLWRNORM;
|
1213 |
|
|
} else {
|
1214 |
|
|
if ((signed)s->dma_dac.dmasize > s->dma_dac.count)
|
1215 |
|
|
mask |= POLLOUT | POLLWRNORM;
|
1216 |
|
|
}
|
1217 |
|
|
}
|
1218 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
1219 |
|
|
return mask;
|
1220 |
|
|
}
|
1221 |
|
|
|
1222 |
|
|
|
1223 |
|
|
static int solo1_mmap(struct file *file, struct vm_area_struct *vma)
|
1224 |
|
|
{
|
1225 |
|
|
struct solo1_state *s = (struct solo1_state *)file->private_data;
|
1226 |
|
|
struct dmabuf *db;
|
1227 |
|
|
int ret = -EINVAL;
|
1228 |
|
|
unsigned long size;
|
1229 |
|
|
|
1230 |
|
|
VALIDATE_STATE(s);
|
1231 |
|
|
lock_kernel();
|
1232 |
|
|
if (vma->vm_flags & VM_WRITE) {
|
1233 |
|
|
if ((ret = prog_dmabuf_dac(s)) != 0)
|
1234 |
|
|
goto out;
|
1235 |
|
|
db = &s->dma_dac;
|
1236 |
|
|
} else if (vma->vm_flags & VM_READ) {
|
1237 |
|
|
if ((ret = prog_dmabuf_adc(s)) != 0)
|
1238 |
|
|
goto out;
|
1239 |
|
|
db = &s->dma_adc;
|
1240 |
|
|
} else
|
1241 |
|
|
goto out;
|
1242 |
|
|
ret = -EINVAL;
|
1243 |
|
|
if (vma->vm_pgoff != 0)
|
1244 |
|
|
goto out;
|
1245 |
|
|
size = vma->vm_end - vma->vm_start;
|
1246 |
|
|
if (size > (PAGE_SIZE << db->buforder))
|
1247 |
|
|
goto out;
|
1248 |
|
|
ret = -EAGAIN;
|
1249 |
|
|
if (remap_page_range(vma->vm_start, virt_to_phys(db->rawbuf), size, vma->vm_page_prot))
|
1250 |
|
|
goto out;
|
1251 |
|
|
db->mapped = 1;
|
1252 |
|
|
ret = 0;
|
1253 |
|
|
out:
|
1254 |
|
|
unlock_kernel();
|
1255 |
|
|
return ret;
|
1256 |
|
|
}
|
1257 |
|
|
|
1258 |
|
|
static int solo1_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
|
1259 |
|
|
{
|
1260 |
|
|
struct solo1_state *s = (struct solo1_state *)file->private_data;
|
1261 |
|
|
unsigned long flags;
|
1262 |
|
|
audio_buf_info abinfo;
|
1263 |
|
|
count_info cinfo;
|
1264 |
|
|
int val, mapped, ret, count;
|
1265 |
|
|
int div1, div2;
|
1266 |
|
|
unsigned rate1, rate2;
|
1267 |
|
|
|
1268 |
|
|
VALIDATE_STATE(s);
|
1269 |
|
|
mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac.mapped) ||
|
1270 |
|
|
((file->f_mode & FMODE_READ) && s->dma_adc.mapped);
|
1271 |
|
|
switch (cmd) {
|
1272 |
|
|
case OSS_GETVERSION:
|
1273 |
|
|
return put_user(SOUND_VERSION, (int *)arg);
|
1274 |
|
|
|
1275 |
|
|
case SNDCTL_DSP_SYNC:
|
1276 |
|
|
if (file->f_mode & FMODE_WRITE)
|
1277 |
|
|
return drain_dac(s, 0/*file->f_flags & O_NONBLOCK*/);
|
1278 |
|
|
return 0;
|
1279 |
|
|
|
1280 |
|
|
case SNDCTL_DSP_SETDUPLEX:
|
1281 |
|
|
return 0;
|
1282 |
|
|
|
1283 |
|
|
case SNDCTL_DSP_GETCAPS:
|
1284 |
|
|
return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, (int *)arg);
|
1285 |
|
|
|
1286 |
|
|
case SNDCTL_DSP_RESET:
|
1287 |
|
|
if (file->f_mode & FMODE_WRITE) {
|
1288 |
|
|
stop_dac(s);
|
1289 |
|
|
synchronize_irq();
|
1290 |
|
|
s->dma_dac.swptr = s->dma_dac.hwptr = s->dma_dac.count = s->dma_dac.total_bytes = 0;
|
1291 |
|
|
}
|
1292 |
|
|
if (file->f_mode & FMODE_READ) {
|
1293 |
|
|
stop_adc(s);
|
1294 |
|
|
synchronize_irq();
|
1295 |
|
|
s->dma_adc.swptr = s->dma_adc.hwptr = s->dma_adc.count = s->dma_adc.total_bytes = 0;
|
1296 |
|
|
}
|
1297 |
|
|
prog_codec(s);
|
1298 |
|
|
return 0;
|
1299 |
|
|
|
1300 |
|
|
case SNDCTL_DSP_SPEED:
|
1301 |
|
|
if (get_user(val, (int *)arg))
|
1302 |
|
|
return -EFAULT;
|
1303 |
|
|
if (val >= 0) {
|
1304 |
|
|
stop_adc(s);
|
1305 |
|
|
stop_dac(s);
|
1306 |
|
|
s->dma_adc.ready = s->dma_dac.ready = 0;
|
1307 |
|
|
/* program sampling rates */
|
1308 |
|
|
if (val > 48000)
|
1309 |
|
|
val = 48000;
|
1310 |
|
|
if (val < 6300)
|
1311 |
|
|
val = 6300;
|
1312 |
|
|
div1 = (768000 + val / 2) / val;
|
1313 |
|
|
rate1 = (768000 + div1 / 2) / div1;
|
1314 |
|
|
div1 = -div1;
|
1315 |
|
|
div2 = (793800 + val / 2) / val;
|
1316 |
|
|
rate2 = (793800 + div2 / 2) / div2;
|
1317 |
|
|
div2 = (-div2) & 0x7f;
|
1318 |
|
|
if (abs(val - rate2) < abs(val - rate1)) {
|
1319 |
|
|
rate1 = rate2;
|
1320 |
|
|
div1 = div2;
|
1321 |
|
|
}
|
1322 |
|
|
s->rate = rate1;
|
1323 |
|
|
s->clkdiv = div1;
|
1324 |
|
|
prog_codec(s);
|
1325 |
|
|
}
|
1326 |
|
|
return put_user(s->rate, (int *)arg);
|
1327 |
|
|
|
1328 |
|
|
case SNDCTL_DSP_STEREO:
|
1329 |
|
|
if (get_user(val, (int *)arg))
|
1330 |
|
|
return -EFAULT;
|
1331 |
|
|
stop_adc(s);
|
1332 |
|
|
stop_dac(s);
|
1333 |
|
|
s->dma_adc.ready = s->dma_dac.ready = 0;
|
1334 |
|
|
/* program channels */
|
1335 |
|
|
s->channels = val ? 2 : 1;
|
1336 |
|
|
prog_codec(s);
|
1337 |
|
|
return 0;
|
1338 |
|
|
|
1339 |
|
|
case SNDCTL_DSP_CHANNELS:
|
1340 |
|
|
if (get_user(val, (int *)arg))
|
1341 |
|
|
return -EFAULT;
|
1342 |
|
|
if (val != 0) {
|
1343 |
|
|
stop_adc(s);
|
1344 |
|
|
stop_dac(s);
|
1345 |
|
|
s->dma_adc.ready = s->dma_dac.ready = 0;
|
1346 |
|
|
/* program channels */
|
1347 |
|
|
s->channels = (val >= 2) ? 2 : 1;
|
1348 |
|
|
prog_codec(s);
|
1349 |
|
|
}
|
1350 |
|
|
return put_user(s->channels, (int *)arg);
|
1351 |
|
|
|
1352 |
|
|
case SNDCTL_DSP_GETFMTS: /* Returns a mask */
|
1353 |
|
|
return put_user(AFMT_S16_LE|AFMT_U16_LE|AFMT_S8|AFMT_U8, (int *)arg);
|
1354 |
|
|
|
1355 |
|
|
case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
|
1356 |
|
|
if (get_user(val, (int *)arg))
|
1357 |
|
|
return -EFAULT;
|
1358 |
|
|
if (val != AFMT_QUERY) {
|
1359 |
|
|
stop_adc(s);
|
1360 |
|
|
stop_dac(s);
|
1361 |
|
|
s->dma_adc.ready = s->dma_dac.ready = 0;
|
1362 |
|
|
/* program format */
|
1363 |
|
|
if (val != AFMT_S16_LE && val != AFMT_U16_LE &&
|
1364 |
|
|
val != AFMT_S8 && val != AFMT_U8)
|
1365 |
|
|
val = AFMT_U8;
|
1366 |
|
|
s->fmt = val;
|
1367 |
|
|
prog_codec(s);
|
1368 |
|
|
}
|
1369 |
|
|
return put_user(s->fmt, (int *)arg);
|
1370 |
|
|
|
1371 |
|
|
case SNDCTL_DSP_POST:
|
1372 |
|
|
return 0;
|
1373 |
|
|
|
1374 |
|
|
case SNDCTL_DSP_GETTRIGGER:
|
1375 |
|
|
val = 0;
|
1376 |
|
|
if (file->f_mode & s->ena & FMODE_READ)
|
1377 |
|
|
val |= PCM_ENABLE_INPUT;
|
1378 |
|
|
if (file->f_mode & s->ena & FMODE_WRITE)
|
1379 |
|
|
val |= PCM_ENABLE_OUTPUT;
|
1380 |
|
|
return put_user(val, (int *)arg);
|
1381 |
|
|
|
1382 |
|
|
case SNDCTL_DSP_SETTRIGGER:
|
1383 |
|
|
if (get_user(val, (int *)arg))
|
1384 |
|
|
return -EFAULT;
|
1385 |
|
|
if (file->f_mode & FMODE_READ) {
|
1386 |
|
|
if (val & PCM_ENABLE_INPUT) {
|
1387 |
|
|
if (!s->dma_adc.ready && (ret = prog_dmabuf_adc(s)))
|
1388 |
|
|
return ret;
|
1389 |
|
|
s->dma_dac.enabled = 1;
|
1390 |
|
|
start_adc(s);
|
1391 |
|
|
if (inb(s->ddmabase+15) & 1)
|
1392 |
|
|
printk(KERN_ERR "solo1: cannot start recording, DDMA mask bit stuck at 1\n");
|
1393 |
|
|
} else {
|
1394 |
|
|
s->dma_dac.enabled = 0;
|
1395 |
|
|
stop_adc(s);
|
1396 |
|
|
}
|
1397 |
|
|
}
|
1398 |
|
|
if (file->f_mode & FMODE_WRITE) {
|
1399 |
|
|
if (val & PCM_ENABLE_OUTPUT) {
|
1400 |
|
|
if (!s->dma_dac.ready && (ret = prog_dmabuf_dac(s)))
|
1401 |
|
|
return ret;
|
1402 |
|
|
s->dma_dac.enabled = 1;
|
1403 |
|
|
start_dac(s);
|
1404 |
|
|
} else {
|
1405 |
|
|
s->dma_dac.enabled = 0;
|
1406 |
|
|
stop_dac(s);
|
1407 |
|
|
}
|
1408 |
|
|
}
|
1409 |
|
|
return 0;
|
1410 |
|
|
|
1411 |
|
|
case SNDCTL_DSP_GETOSPACE:
|
1412 |
|
|
if (!(file->f_mode & FMODE_WRITE))
|
1413 |
|
|
return -EINVAL;
|
1414 |
|
|
if (!s->dma_dac.ready && (val = prog_dmabuf_dac(s)) != 0)
|
1415 |
|
|
return val;
|
1416 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
1417 |
|
|
solo1_update_ptr(s);
|
1418 |
|
|
abinfo.fragsize = s->dma_dac.fragsize;
|
1419 |
|
|
count = s->dma_dac.count;
|
1420 |
|
|
if (count < 0)
|
1421 |
|
|
count = 0;
|
1422 |
|
|
abinfo.bytes = s->dma_dac.dmasize - count;
|
1423 |
|
|
abinfo.fragstotal = s->dma_dac.numfrag;
|
1424 |
|
|
abinfo.fragments = abinfo.bytes >> s->dma_dac.fragshift;
|
1425 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
1426 |
|
|
return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
|
1427 |
|
|
|
1428 |
|
|
case SNDCTL_DSP_GETISPACE:
|
1429 |
|
|
if (!(file->f_mode & FMODE_READ))
|
1430 |
|
|
return -EINVAL;
|
1431 |
|
|
if (!s->dma_adc.ready && (val = prog_dmabuf_adc(s)) != 0)
|
1432 |
|
|
return val;
|
1433 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
1434 |
|
|
solo1_update_ptr(s);
|
1435 |
|
|
abinfo.fragsize = s->dma_adc.fragsize;
|
1436 |
|
|
abinfo.bytes = s->dma_adc.count;
|
1437 |
|
|
abinfo.fragstotal = s->dma_adc.numfrag;
|
1438 |
|
|
abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift;
|
1439 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
1440 |
|
|
return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
|
1441 |
|
|
|
1442 |
|
|
case SNDCTL_DSP_NONBLOCK:
|
1443 |
|
|
file->f_flags |= O_NONBLOCK;
|
1444 |
|
|
return 0;
|
1445 |
|
|
|
1446 |
|
|
case SNDCTL_DSP_GETODELAY:
|
1447 |
|
|
if (!(file->f_mode & FMODE_WRITE))
|
1448 |
|
|
return -EINVAL;
|
1449 |
|
|
if (!s->dma_dac.ready && (val = prog_dmabuf_dac(s)) != 0)
|
1450 |
|
|
return val;
|
1451 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
1452 |
|
|
solo1_update_ptr(s);
|
1453 |
|
|
count = s->dma_dac.count;
|
1454 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
1455 |
|
|
if (count < 0)
|
1456 |
|
|
count = 0;
|
1457 |
|
|
return put_user(count, (int *)arg);
|
1458 |
|
|
|
1459 |
|
|
case SNDCTL_DSP_GETIPTR:
|
1460 |
|
|
if (!(file->f_mode & FMODE_READ))
|
1461 |
|
|
return -EINVAL;
|
1462 |
|
|
if (!s->dma_adc.ready && (val = prog_dmabuf_adc(s)) != 0)
|
1463 |
|
|
return val;
|
1464 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
1465 |
|
|
solo1_update_ptr(s);
|
1466 |
|
|
cinfo.bytes = s->dma_adc.total_bytes;
|
1467 |
|
|
cinfo.blocks = s->dma_adc.count >> s->dma_adc.fragshift;
|
1468 |
|
|
cinfo.ptr = s->dma_adc.hwptr;
|
1469 |
|
|
if (s->dma_adc.mapped)
|
1470 |
|
|
s->dma_adc.count &= s->dma_adc.fragsize-1;
|
1471 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
1472 |
|
|
return copy_to_user((void *)arg, &cinfo, sizeof(cinfo)) ? -EFAULT : 0;
|
1473 |
|
|
|
1474 |
|
|
case SNDCTL_DSP_GETOPTR:
|
1475 |
|
|
if (!(file->f_mode & FMODE_WRITE))
|
1476 |
|
|
return -EINVAL;
|
1477 |
|
|
if (!s->dma_dac.ready && (val = prog_dmabuf_dac(s)) != 0)
|
1478 |
|
|
return val;
|
1479 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
1480 |
|
|
solo1_update_ptr(s);
|
1481 |
|
|
cinfo.bytes = s->dma_dac.total_bytes;
|
1482 |
|
|
count = s->dma_dac.count;
|
1483 |
|
|
if (count < 0)
|
1484 |
|
|
count = 0;
|
1485 |
|
|
cinfo.blocks = count >> s->dma_dac.fragshift;
|
1486 |
|
|
cinfo.ptr = s->dma_dac.hwptr;
|
1487 |
|
|
if (s->dma_dac.mapped)
|
1488 |
|
|
s->dma_dac.count &= s->dma_dac.fragsize-1;
|
1489 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
1490 |
|
|
#if 0
|
1491 |
|
|
printk(KERN_DEBUG "esssolo1: GETOPTR: bytes %u blocks %u ptr %u, buforder %u numfrag %u fragshift %u\n"
|
1492 |
|
|
KERN_DEBUG "esssolo1: swptr %u count %u fragsize %u dmasize %u fragsamples %u\n",
|
1493 |
|
|
cinfo.bytes, cinfo.blocks, cinfo.ptr, s->dma_dac.buforder, s->dma_dac.numfrag, s->dma_dac.fragshift,
|
1494 |
|
|
s->dma_dac.swptr, s->dma_dac.count, s->dma_dac.fragsize, s->dma_dac.dmasize, s->dma_dac.fragsamples);
|
1495 |
|
|
#endif
|
1496 |
|
|
return copy_to_user((void *)arg, &cinfo, sizeof(cinfo)) ? -EFAULT : 0;
|
1497 |
|
|
|
1498 |
|
|
case SNDCTL_DSP_GETBLKSIZE:
|
1499 |
|
|
if (file->f_mode & FMODE_WRITE) {
|
1500 |
|
|
if ((val = prog_dmabuf_dac(s)))
|
1501 |
|
|
return val;
|
1502 |
|
|
return put_user(s->dma_dac.fragsize, (int *)arg);
|
1503 |
|
|
}
|
1504 |
|
|
if ((val = prog_dmabuf_adc(s)))
|
1505 |
|
|
return val;
|
1506 |
|
|
return put_user(s->dma_adc.fragsize, (int *)arg);
|
1507 |
|
|
|
1508 |
|
|
case SNDCTL_DSP_SETFRAGMENT:
|
1509 |
|
|
if (get_user(val, (int *)arg))
|
1510 |
|
|
return -EFAULT;
|
1511 |
|
|
if (file->f_mode & FMODE_READ) {
|
1512 |
|
|
s->dma_adc.ossfragshift = val & 0xffff;
|
1513 |
|
|
s->dma_adc.ossmaxfrags = (val >> 16) & 0xffff;
|
1514 |
|
|
if (s->dma_adc.ossfragshift < 4)
|
1515 |
|
|
s->dma_adc.ossfragshift = 4;
|
1516 |
|
|
if (s->dma_adc.ossfragshift > 15)
|
1517 |
|
|
s->dma_adc.ossfragshift = 15;
|
1518 |
|
|
if (s->dma_adc.ossmaxfrags < 4)
|
1519 |
|
|
s->dma_adc.ossmaxfrags = 4;
|
1520 |
|
|
}
|
1521 |
|
|
if (file->f_mode & FMODE_WRITE) {
|
1522 |
|
|
s->dma_dac.ossfragshift = val & 0xffff;
|
1523 |
|
|
s->dma_dac.ossmaxfrags = (val >> 16) & 0xffff;
|
1524 |
|
|
if (s->dma_dac.ossfragshift < 4)
|
1525 |
|
|
s->dma_dac.ossfragshift = 4;
|
1526 |
|
|
if (s->dma_dac.ossfragshift > 15)
|
1527 |
|
|
s->dma_dac.ossfragshift = 15;
|
1528 |
|
|
if (s->dma_dac.ossmaxfrags < 4)
|
1529 |
|
|
s->dma_dac.ossmaxfrags = 4;
|
1530 |
|
|
}
|
1531 |
|
|
return 0;
|
1532 |
|
|
|
1533 |
|
|
case SNDCTL_DSP_SUBDIVIDE:
|
1534 |
|
|
if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
|
1535 |
|
|
(file->f_mode & FMODE_WRITE && s->dma_dac.subdivision))
|
1536 |
|
|
return -EINVAL;
|
1537 |
|
|
if (get_user(val, (int *)arg))
|
1538 |
|
|
return -EFAULT;
|
1539 |
|
|
if (val != 1 && val != 2 && val != 4)
|
1540 |
|
|
return -EINVAL;
|
1541 |
|
|
if (file->f_mode & FMODE_READ)
|
1542 |
|
|
s->dma_adc.subdivision = val;
|
1543 |
|
|
if (file->f_mode & FMODE_WRITE)
|
1544 |
|
|
s->dma_dac.subdivision = val;
|
1545 |
|
|
return 0;
|
1546 |
|
|
|
1547 |
|
|
case SOUND_PCM_READ_RATE:
|
1548 |
|
|
return put_user(s->rate, (int *)arg);
|
1549 |
|
|
|
1550 |
|
|
case SOUND_PCM_READ_CHANNELS:
|
1551 |
|
|
return put_user(s->channels, (int *)arg);
|
1552 |
|
|
|
1553 |
|
|
case SOUND_PCM_READ_BITS:
|
1554 |
|
|
return put_user((s->fmt & (AFMT_S8|AFMT_U8)) ? 8 : 16, (int *)arg);
|
1555 |
|
|
|
1556 |
|
|
case SOUND_PCM_WRITE_FILTER:
|
1557 |
|
|
case SNDCTL_DSP_SETSYNCRO:
|
1558 |
|
|
case SOUND_PCM_READ_FILTER:
|
1559 |
|
|
return -EINVAL;
|
1560 |
|
|
|
1561 |
|
|
}
|
1562 |
|
|
return mixer_ioctl(s, cmd, arg);
|
1563 |
|
|
}
|
1564 |
|
|
|
1565 |
|
|
static int solo1_release(struct inode *inode, struct file *file)
|
1566 |
|
|
{
|
1567 |
|
|
struct solo1_state *s = (struct solo1_state *)file->private_data;
|
1568 |
|
|
|
1569 |
|
|
VALIDATE_STATE(s);
|
1570 |
|
|
lock_kernel();
|
1571 |
|
|
if (file->f_mode & FMODE_WRITE)
|
1572 |
|
|
drain_dac(s, file->f_flags & O_NONBLOCK);
|
1573 |
|
|
down(&s->open_sem);
|
1574 |
|
|
if (file->f_mode & FMODE_WRITE) {
|
1575 |
|
|
stop_dac(s);
|
1576 |
|
|
outb(0, s->iobase+6); /* disable DMA */
|
1577 |
|
|
dealloc_dmabuf(s, &s->dma_dac);
|
1578 |
|
|
}
|
1579 |
|
|
if (file->f_mode & FMODE_READ) {
|
1580 |
|
|
stop_adc(s);
|
1581 |
|
|
outb(1, s->ddmabase+0xf); /* mask DMA channel */
|
1582 |
|
|
outb(0, s->ddmabase+0xd); /* DMA master clear */
|
1583 |
|
|
dealloc_dmabuf(s, &s->dma_adc);
|
1584 |
|
|
}
|
1585 |
|
|
s->open_mode &= ~(FMODE_READ | FMODE_WRITE);
|
1586 |
|
|
wake_up(&s->open_wait);
|
1587 |
|
|
up(&s->open_sem);
|
1588 |
|
|
unlock_kernel();
|
1589 |
|
|
return 0;
|
1590 |
|
|
}
|
1591 |
|
|
|
1592 |
|
|
static int solo1_open(struct inode *inode, struct file *file)
|
1593 |
|
|
{
|
1594 |
|
|
int minor = MINOR(inode->i_rdev);
|
1595 |
|
|
DECLARE_WAITQUEUE(wait, current);
|
1596 |
|
|
struct solo1_state *s = NULL;
|
1597 |
|
|
struct pci_dev *pci_dev;
|
1598 |
|
|
|
1599 |
|
|
pci_for_each_dev(pci_dev) {
|
1600 |
|
|
struct pci_driver *drvr;
|
1601 |
|
|
|
1602 |
|
|
drvr = pci_dev_driver(pci_dev);
|
1603 |
|
|
if (drvr != &solo1_driver)
|
1604 |
|
|
continue;
|
1605 |
|
|
s = (struct solo1_state*)pci_get_drvdata(pci_dev);
|
1606 |
|
|
if (!s)
|
1607 |
|
|
continue;
|
1608 |
|
|
if (!((s->dev_audio ^ minor) & ~0xf))
|
1609 |
|
|
break;
|
1610 |
|
|
}
|
1611 |
|
|
if (!s)
|
1612 |
|
|
return -ENODEV;
|
1613 |
|
|
VALIDATE_STATE(s);
|
1614 |
|
|
file->private_data = s;
|
1615 |
|
|
/* wait for device to become free */
|
1616 |
|
|
down(&s->open_sem);
|
1617 |
|
|
while (s->open_mode & (FMODE_READ | FMODE_WRITE)) {
|
1618 |
|
|
if (file->f_flags & O_NONBLOCK) {
|
1619 |
|
|
up(&s->open_sem);
|
1620 |
|
|
return -EBUSY;
|
1621 |
|
|
}
|
1622 |
|
|
add_wait_queue(&s->open_wait, &wait);
|
1623 |
|
|
__set_current_state(TASK_INTERRUPTIBLE);
|
1624 |
|
|
up(&s->open_sem);
|
1625 |
|
|
schedule();
|
1626 |
|
|
remove_wait_queue(&s->open_wait, &wait);
|
1627 |
|
|
set_current_state(TASK_RUNNING);
|
1628 |
|
|
if (signal_pending(current))
|
1629 |
|
|
return -ERESTARTSYS;
|
1630 |
|
|
down(&s->open_sem);
|
1631 |
|
|
}
|
1632 |
|
|
s->fmt = AFMT_U8;
|
1633 |
|
|
s->channels = 1;
|
1634 |
|
|
s->rate = 8000;
|
1635 |
|
|
s->clkdiv = 96 | 0x80;
|
1636 |
|
|
s->ena = 0;
|
1637 |
|
|
s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags = s->dma_adc.subdivision = 0;
|
1638 |
|
|
s->dma_adc.enabled = 1;
|
1639 |
|
|
s->dma_dac.ossfragshift = s->dma_dac.ossmaxfrags = s->dma_dac.subdivision = 0;
|
1640 |
|
|
s->dma_dac.enabled = 1;
|
1641 |
|
|
s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
|
1642 |
|
|
up(&s->open_sem);
|
1643 |
|
|
prog_codec(s);
|
1644 |
|
|
return 0;
|
1645 |
|
|
}
|
1646 |
|
|
|
1647 |
|
|
static /*const*/ struct file_operations solo1_audio_fops = {
|
1648 |
|
|
owner: THIS_MODULE,
|
1649 |
|
|
llseek: no_llseek,
|
1650 |
|
|
read: solo1_read,
|
1651 |
|
|
write: solo1_write,
|
1652 |
|
|
poll: solo1_poll,
|
1653 |
|
|
ioctl: solo1_ioctl,
|
1654 |
|
|
mmap: solo1_mmap,
|
1655 |
|
|
open: solo1_open,
|
1656 |
|
|
release: solo1_release,
|
1657 |
|
|
};
|
1658 |
|
|
|
1659 |
|
|
/* --------------------------------------------------------------------- */
|
1660 |
|
|
|
1661 |
|
|
/* hold spinlock for the following! */
|
1662 |
|
|
static void solo1_handle_midi(struct solo1_state *s)
|
1663 |
|
|
{
|
1664 |
|
|
unsigned char ch;
|
1665 |
|
|
int wake;
|
1666 |
|
|
|
1667 |
|
|
if (!(s->mpubase))
|
1668 |
|
|
return;
|
1669 |
|
|
wake = 0;
|
1670 |
|
|
while (!(inb(s->mpubase+1) & 0x80)) {
|
1671 |
|
|
ch = inb(s->mpubase);
|
1672 |
|
|
if (s->midi.icnt < MIDIINBUF) {
|
1673 |
|
|
s->midi.ibuf[s->midi.iwr] = ch;
|
1674 |
|
|
s->midi.iwr = (s->midi.iwr + 1) % MIDIINBUF;
|
1675 |
|
|
s->midi.icnt++;
|
1676 |
|
|
}
|
1677 |
|
|
wake = 1;
|
1678 |
|
|
}
|
1679 |
|
|
if (wake)
|
1680 |
|
|
wake_up(&s->midi.iwait);
|
1681 |
|
|
wake = 0;
|
1682 |
|
|
while (!(inb(s->mpubase+1) & 0x40) && s->midi.ocnt > 0) {
|
1683 |
|
|
outb(s->midi.obuf[s->midi.ord], s->mpubase);
|
1684 |
|
|
s->midi.ord = (s->midi.ord + 1) % MIDIOUTBUF;
|
1685 |
|
|
s->midi.ocnt--;
|
1686 |
|
|
if (s->midi.ocnt < MIDIOUTBUF-16)
|
1687 |
|
|
wake = 1;
|
1688 |
|
|
}
|
1689 |
|
|
if (wake)
|
1690 |
|
|
wake_up(&s->midi.owait);
|
1691 |
|
|
}
|
1692 |
|
|
|
1693 |
|
|
static void solo1_interrupt(int irq, void *dev_id, struct pt_regs *regs)
|
1694 |
|
|
{
|
1695 |
|
|
struct solo1_state *s = (struct solo1_state *)dev_id;
|
1696 |
|
|
unsigned int intsrc;
|
1697 |
|
|
|
1698 |
|
|
/* fastpath out, to ease interrupt sharing */
|
1699 |
|
|
intsrc = inb(s->iobase+7); /* get interrupt source(s) */
|
1700 |
|
|
if (!intsrc)
|
1701 |
|
|
return;
|
1702 |
|
|
(void)inb(s->sbbase+0xe); /* clear interrupt */
|
1703 |
|
|
spin_lock(&s->lock);
|
1704 |
|
|
/* clear audio interrupts first */
|
1705 |
|
|
if (intsrc & 0x20)
|
1706 |
|
|
write_mixer(s, 0x7a, read_mixer(s, 0x7a) & 0x7f);
|
1707 |
|
|
solo1_update_ptr(s);
|
1708 |
|
|
solo1_handle_midi(s);
|
1709 |
|
|
spin_unlock(&s->lock);
|
1710 |
|
|
}
|
1711 |
|
|
|
1712 |
|
|
static void solo1_midi_timer(unsigned long data)
|
1713 |
|
|
{
|
1714 |
|
|
struct solo1_state *s = (struct solo1_state *)data;
|
1715 |
|
|
unsigned long flags;
|
1716 |
|
|
|
1717 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
1718 |
|
|
solo1_handle_midi(s);
|
1719 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
1720 |
|
|
s->midi.timer.expires = jiffies+1;
|
1721 |
|
|
add_timer(&s->midi.timer);
|
1722 |
|
|
}
|
1723 |
|
|
|
1724 |
|
|
/* --------------------------------------------------------------------- */
|
1725 |
|
|
|
1726 |
|
|
static ssize_t solo1_midi_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
|
1727 |
|
|
{
|
1728 |
|
|
struct solo1_state *s = (struct solo1_state *)file->private_data;
|
1729 |
|
|
DECLARE_WAITQUEUE(wait, current);
|
1730 |
|
|
ssize_t ret;
|
1731 |
|
|
unsigned long flags;
|
1732 |
|
|
unsigned ptr;
|
1733 |
|
|
int cnt;
|
1734 |
|
|
|
1735 |
|
|
VALIDATE_STATE(s);
|
1736 |
|
|
if (ppos != &file->f_pos)
|
1737 |
|
|
return -ESPIPE;
|
1738 |
|
|
if (!access_ok(VERIFY_WRITE, buffer, count))
|
1739 |
|
|
return -EFAULT;
|
1740 |
|
|
if (count == 0)
|
1741 |
|
|
return 0;
|
1742 |
|
|
ret = 0;
|
1743 |
|
|
add_wait_queue(&s->midi.iwait, &wait);
|
1744 |
|
|
while (count > 0) {
|
1745 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
1746 |
|
|
ptr = s->midi.ird;
|
1747 |
|
|
cnt = MIDIINBUF - ptr;
|
1748 |
|
|
if (s->midi.icnt < cnt)
|
1749 |
|
|
cnt = s->midi.icnt;
|
1750 |
|
|
if (cnt <= 0)
|
1751 |
|
|
__set_current_state(TASK_INTERRUPTIBLE);
|
1752 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
1753 |
|
|
if (cnt > count)
|
1754 |
|
|
cnt = count;
|
1755 |
|
|
if (cnt <= 0) {
|
1756 |
|
|
if (file->f_flags & O_NONBLOCK) {
|
1757 |
|
|
if (!ret)
|
1758 |
|
|
ret = -EAGAIN;
|
1759 |
|
|
break;
|
1760 |
|
|
}
|
1761 |
|
|
schedule();
|
1762 |
|
|
if (signal_pending(current)) {
|
1763 |
|
|
if (!ret)
|
1764 |
|
|
ret = -ERESTARTSYS;
|
1765 |
|
|
break;
|
1766 |
|
|
}
|
1767 |
|
|
continue;
|
1768 |
|
|
}
|
1769 |
|
|
if (copy_to_user(buffer, s->midi.ibuf + ptr, cnt)) {
|
1770 |
|
|
if (!ret)
|
1771 |
|
|
ret = -EFAULT;
|
1772 |
|
|
break;
|
1773 |
|
|
}
|
1774 |
|
|
ptr = (ptr + cnt) % MIDIINBUF;
|
1775 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
1776 |
|
|
s->midi.ird = ptr;
|
1777 |
|
|
s->midi.icnt -= cnt;
|
1778 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
1779 |
|
|
count -= cnt;
|
1780 |
|
|
buffer += cnt;
|
1781 |
|
|
ret += cnt;
|
1782 |
|
|
break;
|
1783 |
|
|
}
|
1784 |
|
|
__set_current_state(TASK_RUNNING);
|
1785 |
|
|
remove_wait_queue(&s->midi.iwait, &wait);
|
1786 |
|
|
return ret;
|
1787 |
|
|
}
|
1788 |
|
|
|
1789 |
|
|
static ssize_t solo1_midi_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
|
1790 |
|
|
{
|
1791 |
|
|
struct solo1_state *s = (struct solo1_state *)file->private_data;
|
1792 |
|
|
DECLARE_WAITQUEUE(wait, current);
|
1793 |
|
|
ssize_t ret;
|
1794 |
|
|
unsigned long flags;
|
1795 |
|
|
unsigned ptr;
|
1796 |
|
|
int cnt;
|
1797 |
|
|
|
1798 |
|
|
VALIDATE_STATE(s);
|
1799 |
|
|
if (ppos != &file->f_pos)
|
1800 |
|
|
return -ESPIPE;
|
1801 |
|
|
if (!access_ok(VERIFY_READ, buffer, count))
|
1802 |
|
|
return -EFAULT;
|
1803 |
|
|
if (count == 0)
|
1804 |
|
|
return 0;
|
1805 |
|
|
ret = 0;
|
1806 |
|
|
add_wait_queue(&s->midi.owait, &wait);
|
1807 |
|
|
while (count > 0) {
|
1808 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
1809 |
|
|
ptr = s->midi.owr;
|
1810 |
|
|
cnt = MIDIOUTBUF - ptr;
|
1811 |
|
|
if (s->midi.ocnt + cnt > MIDIOUTBUF)
|
1812 |
|
|
cnt = MIDIOUTBUF - s->midi.ocnt;
|
1813 |
|
|
if (cnt <= 0) {
|
1814 |
|
|
__set_current_state(TASK_INTERRUPTIBLE);
|
1815 |
|
|
solo1_handle_midi(s);
|
1816 |
|
|
}
|
1817 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
1818 |
|
|
if (cnt > count)
|
1819 |
|
|
cnt = count;
|
1820 |
|
|
if (cnt <= 0) {
|
1821 |
|
|
if (file->f_flags & O_NONBLOCK) {
|
1822 |
|
|
if (!ret)
|
1823 |
|
|
ret = -EAGAIN;
|
1824 |
|
|
break;
|
1825 |
|
|
}
|
1826 |
|
|
schedule();
|
1827 |
|
|
if (signal_pending(current)) {
|
1828 |
|
|
if (!ret)
|
1829 |
|
|
ret = -ERESTARTSYS;
|
1830 |
|
|
break;
|
1831 |
|
|
}
|
1832 |
|
|
continue;
|
1833 |
|
|
}
|
1834 |
|
|
if (copy_from_user(s->midi.obuf + ptr, buffer, cnt)) {
|
1835 |
|
|
if (!ret)
|
1836 |
|
|
ret = -EFAULT;
|
1837 |
|
|
break;
|
1838 |
|
|
}
|
1839 |
|
|
ptr = (ptr + cnt) % MIDIOUTBUF;
|
1840 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
1841 |
|
|
s->midi.owr = ptr;
|
1842 |
|
|
s->midi.ocnt += cnt;
|
1843 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
1844 |
|
|
count -= cnt;
|
1845 |
|
|
buffer += cnt;
|
1846 |
|
|
ret += cnt;
|
1847 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
1848 |
|
|
solo1_handle_midi(s);
|
1849 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
1850 |
|
|
}
|
1851 |
|
|
__set_current_state(TASK_RUNNING);
|
1852 |
|
|
remove_wait_queue(&s->midi.owait, &wait);
|
1853 |
|
|
return ret;
|
1854 |
|
|
}
|
1855 |
|
|
|
1856 |
|
|
/* No kernel lock - we have our own spinlock */
|
1857 |
|
|
static unsigned int solo1_midi_poll(struct file *file, struct poll_table_struct *wait)
|
1858 |
|
|
{
|
1859 |
|
|
struct solo1_state *s = (struct solo1_state *)file->private_data;
|
1860 |
|
|
unsigned long flags;
|
1861 |
|
|
unsigned int mask = 0;
|
1862 |
|
|
|
1863 |
|
|
VALIDATE_STATE(s);
|
1864 |
|
|
if (file->f_flags & FMODE_WRITE)
|
1865 |
|
|
poll_wait(file, &s->midi.owait, wait);
|
1866 |
|
|
if (file->f_flags & FMODE_READ)
|
1867 |
|
|
poll_wait(file, &s->midi.iwait, wait);
|
1868 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
1869 |
|
|
if (file->f_flags & FMODE_READ) {
|
1870 |
|
|
if (s->midi.icnt > 0)
|
1871 |
|
|
mask |= POLLIN | POLLRDNORM;
|
1872 |
|
|
}
|
1873 |
|
|
if (file->f_flags & FMODE_WRITE) {
|
1874 |
|
|
if (s->midi.ocnt < MIDIOUTBUF)
|
1875 |
|
|
mask |= POLLOUT | POLLWRNORM;
|
1876 |
|
|
}
|
1877 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
1878 |
|
|
return mask;
|
1879 |
|
|
}
|
1880 |
|
|
|
1881 |
|
|
static int solo1_midi_open(struct inode *inode, struct file *file)
|
1882 |
|
|
{
|
1883 |
|
|
int minor = MINOR(inode->i_rdev);
|
1884 |
|
|
DECLARE_WAITQUEUE(wait, current);
|
1885 |
|
|
unsigned long flags;
|
1886 |
|
|
struct solo1_state *s = NULL;
|
1887 |
|
|
struct pci_dev *pci_dev;
|
1888 |
|
|
|
1889 |
|
|
pci_for_each_dev(pci_dev) {
|
1890 |
|
|
struct pci_driver *drvr;
|
1891 |
|
|
|
1892 |
|
|
drvr = pci_dev_driver(pci_dev);
|
1893 |
|
|
if (drvr != &solo1_driver)
|
1894 |
|
|
continue;
|
1895 |
|
|
s = (struct solo1_state*)pci_get_drvdata(pci_dev);
|
1896 |
|
|
if (!s)
|
1897 |
|
|
continue;
|
1898 |
|
|
if (s->dev_midi == minor)
|
1899 |
|
|
break;
|
1900 |
|
|
}
|
1901 |
|
|
if (!s)
|
1902 |
|
|
return -ENODEV;
|
1903 |
|
|
VALIDATE_STATE(s);
|
1904 |
|
|
file->private_data = s;
|
1905 |
|
|
/* wait for device to become free */
|
1906 |
|
|
down(&s->open_sem);
|
1907 |
|
|
while (s->open_mode & (file->f_mode << FMODE_MIDI_SHIFT)) {
|
1908 |
|
|
if (file->f_flags & O_NONBLOCK) {
|
1909 |
|
|
up(&s->open_sem);
|
1910 |
|
|
return -EBUSY;
|
1911 |
|
|
}
|
1912 |
|
|
add_wait_queue(&s->open_wait, &wait);
|
1913 |
|
|
__set_current_state(TASK_INTERRUPTIBLE);
|
1914 |
|
|
up(&s->open_sem);
|
1915 |
|
|
schedule();
|
1916 |
|
|
remove_wait_queue(&s->open_wait, &wait);
|
1917 |
|
|
set_current_state(TASK_RUNNING);
|
1918 |
|
|
if (signal_pending(current))
|
1919 |
|
|
return -ERESTARTSYS;
|
1920 |
|
|
down(&s->open_sem);
|
1921 |
|
|
}
|
1922 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
1923 |
|
|
if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
|
1924 |
|
|
s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
|
1925 |
|
|
s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
|
1926 |
|
|
outb(0xff, s->mpubase+1); /* reset command */
|
1927 |
|
|
outb(0x3f, s->mpubase+1); /* uart command */
|
1928 |
|
|
if (!(inb(s->mpubase+1) & 0x80))
|
1929 |
|
|
inb(s->mpubase);
|
1930 |
|
|
s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
|
1931 |
|
|
outb(0xb0, s->iobase + 7); /* enable A1, A2, MPU irq's */
|
1932 |
|
|
init_timer(&s->midi.timer);
|
1933 |
|
|
s->midi.timer.expires = jiffies+1;
|
1934 |
|
|
s->midi.timer.data = (unsigned long)s;
|
1935 |
|
|
s->midi.timer.function = solo1_midi_timer;
|
1936 |
|
|
add_timer(&s->midi.timer);
|
1937 |
|
|
}
|
1938 |
|
|
if (file->f_mode & FMODE_READ) {
|
1939 |
|
|
s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
|
1940 |
|
|
}
|
1941 |
|
|
if (file->f_mode & FMODE_WRITE) {
|
1942 |
|
|
s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
|
1943 |
|
|
}
|
1944 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
1945 |
|
|
s->open_mode |= (file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ | FMODE_MIDI_WRITE);
|
1946 |
|
|
up(&s->open_sem);
|
1947 |
|
|
return 0;
|
1948 |
|
|
}
|
1949 |
|
|
|
1950 |
|
|
static int solo1_midi_release(struct inode *inode, struct file *file)
|
1951 |
|
|
{
|
1952 |
|
|
struct solo1_state *s = (struct solo1_state *)file->private_data;
|
1953 |
|
|
DECLARE_WAITQUEUE(wait, current);
|
1954 |
|
|
unsigned long flags;
|
1955 |
|
|
unsigned count, tmo;
|
1956 |
|
|
|
1957 |
|
|
VALIDATE_STATE(s);
|
1958 |
|
|
|
1959 |
|
|
lock_kernel();
|
1960 |
|
|
if (file->f_mode & FMODE_WRITE) {
|
1961 |
|
|
add_wait_queue(&s->midi.owait, &wait);
|
1962 |
|
|
for (;;) {
|
1963 |
|
|
__set_current_state(TASK_INTERRUPTIBLE);
|
1964 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
1965 |
|
|
count = s->midi.ocnt;
|
1966 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
1967 |
|
|
if (count <= 0)
|
1968 |
|
|
break;
|
1969 |
|
|
if (signal_pending(current))
|
1970 |
|
|
break;
|
1971 |
|
|
if (file->f_flags & O_NONBLOCK)
|
1972 |
|
|
break;
|
1973 |
|
|
tmo = (count * HZ) / 3100;
|
1974 |
|
|
if (!schedule_timeout(tmo ? : 1) && tmo)
|
1975 |
|
|
printk(KERN_DEBUG "solo1: midi timed out??\n");
|
1976 |
|
|
}
|
1977 |
|
|
remove_wait_queue(&s->midi.owait, &wait);
|
1978 |
|
|
set_current_state(TASK_RUNNING);
|
1979 |
|
|
}
|
1980 |
|
|
down(&s->open_sem);
|
1981 |
|
|
s->open_mode &= ~((file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ|FMODE_MIDI_WRITE));
|
1982 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
1983 |
|
|
if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
|
1984 |
|
|
outb(0x30, s->iobase + 7); /* enable A1, A2 irq's */
|
1985 |
|
|
del_timer(&s->midi.timer);
|
1986 |
|
|
}
|
1987 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
1988 |
|
|
wake_up(&s->open_wait);
|
1989 |
|
|
up(&s->open_sem);
|
1990 |
|
|
unlock_kernel();
|
1991 |
|
|
return 0;
|
1992 |
|
|
}
|
1993 |
|
|
|
1994 |
|
|
static /*const*/ struct file_operations solo1_midi_fops = {
|
1995 |
|
|
owner: THIS_MODULE,
|
1996 |
|
|
llseek: no_llseek,
|
1997 |
|
|
read: solo1_midi_read,
|
1998 |
|
|
write: solo1_midi_write,
|
1999 |
|
|
poll: solo1_midi_poll,
|
2000 |
|
|
open: solo1_midi_open,
|
2001 |
|
|
release: solo1_midi_release,
|
2002 |
|
|
};
|
2003 |
|
|
|
2004 |
|
|
/* --------------------------------------------------------------------- */
|
2005 |
|
|
|
2006 |
|
|
static int solo1_dmfm_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
|
2007 |
|
|
{
|
2008 |
|
|
static const unsigned char op_offset[18] = {
|
2009 |
|
|
0x00, 0x01, 0x02, 0x03, 0x04, 0x05,
|
2010 |
|
|
0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D,
|
2011 |
|
|
0x10, 0x11, 0x12, 0x13, 0x14, 0x15
|
2012 |
|
|
};
|
2013 |
|
|
struct solo1_state *s = (struct solo1_state *)file->private_data;
|
2014 |
|
|
struct dm_fm_voice v;
|
2015 |
|
|
struct dm_fm_note n;
|
2016 |
|
|
struct dm_fm_params p;
|
2017 |
|
|
unsigned int io;
|
2018 |
|
|
unsigned int regb;
|
2019 |
|
|
|
2020 |
|
|
switch (cmd) {
|
2021 |
|
|
case FM_IOCTL_RESET:
|
2022 |
|
|
for (regb = 0xb0; regb < 0xb9; regb++) {
|
2023 |
|
|
outb(regb, s->sbbase);
|
2024 |
|
|
outb(0, s->sbbase+1);
|
2025 |
|
|
outb(regb, s->sbbase+2);
|
2026 |
|
|
outb(0, s->sbbase+3);
|
2027 |
|
|
}
|
2028 |
|
|
return 0;
|
2029 |
|
|
|
2030 |
|
|
case FM_IOCTL_PLAY_NOTE:
|
2031 |
|
|
if (copy_from_user(&n, (void *)arg, sizeof(n)))
|
2032 |
|
|
return -EFAULT;
|
2033 |
|
|
if (n.voice >= 18)
|
2034 |
|
|
return -EINVAL;
|
2035 |
|
|
if (n.voice >= 9) {
|
2036 |
|
|
regb = n.voice - 9;
|
2037 |
|
|
io = s->sbbase+2;
|
2038 |
|
|
} else {
|
2039 |
|
|
regb = n.voice;
|
2040 |
|
|
io = s->sbbase;
|
2041 |
|
|
}
|
2042 |
|
|
outb(0xa0 + regb, io);
|
2043 |
|
|
outb(n.fnum & 0xff, io+1);
|
2044 |
|
|
outb(0xb0 + regb, io);
|
2045 |
|
|
outb(((n.fnum >> 8) & 3) | ((n.octave & 7) << 2) | ((n.key_on & 1) << 5), io+1);
|
2046 |
|
|
return 0;
|
2047 |
|
|
|
2048 |
|
|
case FM_IOCTL_SET_VOICE:
|
2049 |
|
|
if (copy_from_user(&v, (void *)arg, sizeof(v)))
|
2050 |
|
|
return -EFAULT;
|
2051 |
|
|
if (v.voice >= 18)
|
2052 |
|
|
return -EINVAL;
|
2053 |
|
|
regb = op_offset[v.voice];
|
2054 |
|
|
io = s->sbbase + ((v.op & 1) << 1);
|
2055 |
|
|
outb(0x20 + regb, io);
|
2056 |
|
|
outb(((v.am & 1) << 7) | ((v.vibrato & 1) << 6) | ((v.do_sustain & 1) << 5) |
|
2057 |
|
|
((v.kbd_scale & 1) << 4) | (v.harmonic & 0xf), io+1);
|
2058 |
|
|
outb(0x40 + regb, io);
|
2059 |
|
|
outb(((v.scale_level & 0x3) << 6) | (v.volume & 0x3f), io+1);
|
2060 |
|
|
outb(0x60 + regb, io);
|
2061 |
|
|
outb(((v.attack & 0xf) << 4) | (v.decay & 0xf), io+1);
|
2062 |
|
|
outb(0x80 + regb, io);
|
2063 |
|
|
outb(((v.sustain & 0xf) << 4) | (v.release & 0xf), io+1);
|
2064 |
|
|
outb(0xe0 + regb, io);
|
2065 |
|
|
outb(v.waveform & 0x7, io+1);
|
2066 |
|
|
if (n.voice >= 9) {
|
2067 |
|
|
regb = n.voice - 9;
|
2068 |
|
|
io = s->sbbase+2;
|
2069 |
|
|
} else {
|
2070 |
|
|
regb = n.voice;
|
2071 |
|
|
io = s->sbbase;
|
2072 |
|
|
}
|
2073 |
|
|
outb(0xc0 + regb, io);
|
2074 |
|
|
outb(((v.right & 1) << 5) | ((v.left & 1) << 4) | ((v.feedback & 7) << 1) |
|
2075 |
|
|
(v.connection & 1), io+1);
|
2076 |
|
|
return 0;
|
2077 |
|
|
|
2078 |
|
|
case FM_IOCTL_SET_PARAMS:
|
2079 |
|
|
if (copy_from_user(&p, (void *)arg, sizeof(p)))
|
2080 |
|
|
return -EFAULT;
|
2081 |
|
|
outb(0x08, s->sbbase);
|
2082 |
|
|
outb((p.kbd_split & 1) << 6, s->sbbase+1);
|
2083 |
|
|
outb(0xbd, s->sbbase);
|
2084 |
|
|
outb(((p.am_depth & 1) << 7) | ((p.vib_depth & 1) << 6) | ((p.rhythm & 1) << 5) | ((p.bass & 1) << 4) |
|
2085 |
|
|
((p.snare & 1) << 3) | ((p.tomtom & 1) << 2) | ((p.cymbal & 1) << 1) | (p.hihat & 1), s->sbbase+1);
|
2086 |
|
|
return 0;
|
2087 |
|
|
|
2088 |
|
|
case FM_IOCTL_SET_OPL:
|
2089 |
|
|
outb(4, s->sbbase+2);
|
2090 |
|
|
outb(arg, s->sbbase+3);
|
2091 |
|
|
return 0;
|
2092 |
|
|
|
2093 |
|
|
case FM_IOCTL_SET_MODE:
|
2094 |
|
|
outb(5, s->sbbase+2);
|
2095 |
|
|
outb(arg & 1, s->sbbase+3);
|
2096 |
|
|
return 0;
|
2097 |
|
|
|
2098 |
|
|
default:
|
2099 |
|
|
return -EINVAL;
|
2100 |
|
|
}
|
2101 |
|
|
}
|
2102 |
|
|
|
2103 |
|
|
static int solo1_dmfm_open(struct inode *inode, struct file *file)
|
2104 |
|
|
{
|
2105 |
|
|
int minor = MINOR(inode->i_rdev);
|
2106 |
|
|
DECLARE_WAITQUEUE(wait, current);
|
2107 |
|
|
struct solo1_state *s = NULL;
|
2108 |
|
|
struct pci_dev *pci_dev;
|
2109 |
|
|
|
2110 |
|
|
pci_for_each_dev(pci_dev) {
|
2111 |
|
|
struct pci_driver *drvr;
|
2112 |
|
|
|
2113 |
|
|
drvr = pci_dev_driver(pci_dev);
|
2114 |
|
|
if (drvr != &solo1_driver)
|
2115 |
|
|
continue;
|
2116 |
|
|
s = (struct solo1_state*)pci_get_drvdata(pci_dev);
|
2117 |
|
|
if (!s)
|
2118 |
|
|
continue;
|
2119 |
|
|
if (s->dev_dmfm == minor)
|
2120 |
|
|
break;
|
2121 |
|
|
}
|
2122 |
|
|
if (!s)
|
2123 |
|
|
return -ENODEV;
|
2124 |
|
|
VALIDATE_STATE(s);
|
2125 |
|
|
file->private_data = s;
|
2126 |
|
|
/* wait for device to become free */
|
2127 |
|
|
down(&s->open_sem);
|
2128 |
|
|
while (s->open_mode & FMODE_DMFM) {
|
2129 |
|
|
if (file->f_flags & O_NONBLOCK) {
|
2130 |
|
|
up(&s->open_sem);
|
2131 |
|
|
return -EBUSY;
|
2132 |
|
|
}
|
2133 |
|
|
add_wait_queue(&s->open_wait, &wait);
|
2134 |
|
|
__set_current_state(TASK_INTERRUPTIBLE);
|
2135 |
|
|
up(&s->open_sem);
|
2136 |
|
|
schedule();
|
2137 |
|
|
remove_wait_queue(&s->open_wait, &wait);
|
2138 |
|
|
set_current_state(TASK_RUNNING);
|
2139 |
|
|
if (signal_pending(current))
|
2140 |
|
|
return -ERESTARTSYS;
|
2141 |
|
|
down(&s->open_sem);
|
2142 |
|
|
}
|
2143 |
|
|
if (!request_region(s->sbbase, FMSYNTH_EXTENT, "ESS Solo1")) {
|
2144 |
|
|
up(&s->open_sem);
|
2145 |
|
|
printk(KERN_ERR "solo1: FM synth io ports in use, opl3 loaded?\n");
|
2146 |
|
|
return -EBUSY;
|
2147 |
|
|
}
|
2148 |
|
|
/* init the stuff */
|
2149 |
|
|
outb(1, s->sbbase);
|
2150 |
|
|
outb(0x20, s->sbbase+1); /* enable waveforms */
|
2151 |
|
|
outb(4, s->sbbase+2);
|
2152 |
|
|
outb(0, s->sbbase+3); /* no 4op enabled */
|
2153 |
|
|
outb(5, s->sbbase+2);
|
2154 |
|
|
outb(1, s->sbbase+3); /* enable OPL3 */
|
2155 |
|
|
s->open_mode |= FMODE_DMFM;
|
2156 |
|
|
up(&s->open_sem);
|
2157 |
|
|
return 0;
|
2158 |
|
|
}
|
2159 |
|
|
|
2160 |
|
|
static int solo1_dmfm_release(struct inode *inode, struct file *file)
|
2161 |
|
|
{
|
2162 |
|
|
struct solo1_state *s = (struct solo1_state *)file->private_data;
|
2163 |
|
|
unsigned int regb;
|
2164 |
|
|
|
2165 |
|
|
VALIDATE_STATE(s);
|
2166 |
|
|
lock_kernel();
|
2167 |
|
|
down(&s->open_sem);
|
2168 |
|
|
s->open_mode &= ~FMODE_DMFM;
|
2169 |
|
|
for (regb = 0xb0; regb < 0xb9; regb++) {
|
2170 |
|
|
outb(regb, s->sbbase);
|
2171 |
|
|
outb(0, s->sbbase+1);
|
2172 |
|
|
outb(regb, s->sbbase+2);
|
2173 |
|
|
outb(0, s->sbbase+3);
|
2174 |
|
|
}
|
2175 |
|
|
release_region(s->sbbase, FMSYNTH_EXTENT);
|
2176 |
|
|
wake_up(&s->open_wait);
|
2177 |
|
|
up(&s->open_sem);
|
2178 |
|
|
unlock_kernel();
|
2179 |
|
|
return 0;
|
2180 |
|
|
}
|
2181 |
|
|
|
2182 |
|
|
static /*const*/ struct file_operations solo1_dmfm_fops = {
|
2183 |
|
|
owner: THIS_MODULE,
|
2184 |
|
|
llseek: no_llseek,
|
2185 |
|
|
ioctl: solo1_dmfm_ioctl,
|
2186 |
|
|
open: solo1_dmfm_open,
|
2187 |
|
|
release: solo1_dmfm_release,
|
2188 |
|
|
};
|
2189 |
|
|
|
2190 |
|
|
/* --------------------------------------------------------------------- */
|
2191 |
|
|
|
2192 |
|
|
static struct initvol {
|
2193 |
|
|
int mixch;
|
2194 |
|
|
int vol;
|
2195 |
|
|
} initvol[] __initdata = {
|
2196 |
|
|
{ SOUND_MIXER_WRITE_VOLUME, 0x4040 },
|
2197 |
|
|
{ SOUND_MIXER_WRITE_PCM, 0x4040 },
|
2198 |
|
|
{ SOUND_MIXER_WRITE_SYNTH, 0x4040 },
|
2199 |
|
|
{ SOUND_MIXER_WRITE_CD, 0x4040 },
|
2200 |
|
|
{ SOUND_MIXER_WRITE_LINE, 0x4040 },
|
2201 |
|
|
{ SOUND_MIXER_WRITE_LINE1, 0x4040 },
|
2202 |
|
|
{ SOUND_MIXER_WRITE_LINE2, 0x4040 },
|
2203 |
|
|
{ SOUND_MIXER_WRITE_RECLEV, 0x4040 },
|
2204 |
|
|
{ SOUND_MIXER_WRITE_SPEAKER, 0x4040 },
|
2205 |
|
|
{ SOUND_MIXER_WRITE_MIC, 0x4040 }
|
2206 |
|
|
};
|
2207 |
|
|
|
2208 |
|
|
static int setup_solo1(struct solo1_state *s)
|
2209 |
|
|
{
|
2210 |
|
|
struct pci_dev *pcidev = s->dev;
|
2211 |
|
|
mm_segment_t fs;
|
2212 |
|
|
int i, val;
|
2213 |
|
|
|
2214 |
|
|
/* initialize DDMA base address */
|
2215 |
|
|
printk(KERN_DEBUG "solo1: ddma base address: 0x%lx\n", s->ddmabase);
|
2216 |
|
|
pci_write_config_word(pcidev, 0x60, (s->ddmabase & (~0xf)) | 1);
|
2217 |
|
|
/* set DMA policy to DDMA, IRQ emulation off (CLKRUN disabled for now) */
|
2218 |
|
|
pci_write_config_dword(pcidev, 0x50, 0);
|
2219 |
|
|
/* disable legacy audio address decode */
|
2220 |
|
|
pci_write_config_word(pcidev, 0x40, 0x907f);
|
2221 |
|
|
|
2222 |
|
|
/* initialize the chips */
|
2223 |
|
|
if (!reset_ctrl(s)) {
|
2224 |
|
|
printk(KERN_ERR "esssolo1: cannot reset controller\n");
|
2225 |
|
|
return -1;
|
2226 |
|
|
}
|
2227 |
|
|
outb(0xb0, s->iobase+7); /* enable A1, A2, MPU irq's */
|
2228 |
|
|
|
2229 |
|
|
/* initialize mixer regs */
|
2230 |
|
|
write_mixer(s, 0x7f, 0); /* disable music digital recording */
|
2231 |
|
|
write_mixer(s, 0x7d, 0x0c); /* enable mic preamp, MONO_OUT is 2nd DAC right channel */
|
2232 |
|
|
write_mixer(s, 0x64, 0x45); /* volume control */
|
2233 |
|
|
write_mixer(s, 0x48, 0x10); /* enable music DAC/ES6xx interface */
|
2234 |
|
|
write_mixer(s, 0x50, 0); /* disable spatializer */
|
2235 |
|
|
write_mixer(s, 0x52, 0);
|
2236 |
|
|
write_mixer(s, 0x14, 0); /* DAC1 minimum volume */
|
2237 |
|
|
write_mixer(s, 0x71, 0x20); /* enable new 0xA1 reg format */
|
2238 |
|
|
outb(0, s->ddmabase+0xd); /* DMA master clear */
|
2239 |
|
|
outb(1, s->ddmabase+0xf); /* mask channel */
|
2240 |
|
|
/*outb(0, s->ddmabase+0x8);*/ /* enable controller (enable is low active!!) */
|
2241 |
|
|
|
2242 |
|
|
pci_set_master(pcidev); /* enable bus mastering */
|
2243 |
|
|
|
2244 |
|
|
fs = get_fs();
|
2245 |
|
|
set_fs(KERNEL_DS);
|
2246 |
|
|
val = SOUND_MASK_LINE;
|
2247 |
|
|
mixer_ioctl(s, SOUND_MIXER_WRITE_RECSRC, (unsigned long)&val);
|
2248 |
|
|
for (i = 0; i < sizeof(initvol)/sizeof(initvol[0]); i++) {
|
2249 |
|
|
val = initvol[i].vol;
|
2250 |
|
|
mixer_ioctl(s, initvol[i].mixch, (unsigned long)&val);
|
2251 |
|
|
}
|
2252 |
|
|
val = 1; /* enable mic preamp */
|
2253 |
|
|
mixer_ioctl(s, SOUND_MIXER_PRIVATE1, (unsigned long)&val);
|
2254 |
|
|
set_fs(fs);
|
2255 |
|
|
return 0;
|
2256 |
|
|
}
|
2257 |
|
|
|
2258 |
|
|
static int
|
2259 |
|
|
solo1_suspend(struct pci_dev *pci_dev, u32 state) {
|
2260 |
|
|
struct solo1_state *s = (struct solo1_state*)pci_get_drvdata(pci_dev);
|
2261 |
|
|
if (!s)
|
2262 |
|
|
return 1;
|
2263 |
|
|
outb(0, s->iobase+6);
|
2264 |
|
|
/* DMA master clear */
|
2265 |
|
|
outb(0, s->ddmabase+0xd);
|
2266 |
|
|
/* reset sequencer and FIFO */
|
2267 |
|
|
outb(3, s->sbbase+6);
|
2268 |
|
|
/* turn off DDMA controller address space */
|
2269 |
|
|
pci_write_config_word(s->dev, 0x60, 0);
|
2270 |
|
|
return 0;
|
2271 |
|
|
}
|
2272 |
|
|
|
2273 |
|
|
static int
|
2274 |
|
|
solo1_resume(struct pci_dev *pci_dev) {
|
2275 |
|
|
struct solo1_state *s = (struct solo1_state*)pci_get_drvdata(pci_dev);
|
2276 |
|
|
if (!s)
|
2277 |
|
|
return 1;
|
2278 |
|
|
setup_solo1(s);
|
2279 |
|
|
return 0;
|
2280 |
|
|
}
|
2281 |
|
|
|
2282 |
|
|
static int __devinit solo1_probe(struct pci_dev *pcidev, const struct pci_device_id *pciid)
|
2283 |
|
|
{
|
2284 |
|
|
struct solo1_state *s;
|
2285 |
|
|
int ret;
|
2286 |
|
|
|
2287 |
|
|
if ((ret=pci_enable_device(pcidev)))
|
2288 |
|
|
return ret;
|
2289 |
|
|
if (!(pci_resource_flags(pcidev, 0) & IORESOURCE_IO) ||
|
2290 |
|
|
!(pci_resource_flags(pcidev, 1) & IORESOURCE_IO) ||
|
2291 |
|
|
!(pci_resource_flags(pcidev, 2) & IORESOURCE_IO) ||
|
2292 |
|
|
!(pci_resource_flags(pcidev, 3) & IORESOURCE_IO))
|
2293 |
|
|
return -ENODEV;
|
2294 |
|
|
if (pcidev->irq == 0)
|
2295 |
|
|
return -ENODEV;
|
2296 |
|
|
|
2297 |
|
|
/* Recording requires 24-bit DMA, so attempt to set dma mask
|
2298 |
|
|
* to 24 bits first, then 32 bits (playback only) if that fails.
|
2299 |
|
|
*/
|
2300 |
|
|
if (pci_set_dma_mask(pcidev, 0x00ffffff) &&
|
2301 |
|
|
pci_set_dma_mask(pcidev, 0xffffffff)) {
|
2302 |
|
|
printk(KERN_WARNING "solo1: architecture does not support 24bit or 32bit PCI busmaster DMA\n");
|
2303 |
|
|
return -ENODEV;
|
2304 |
|
|
}
|
2305 |
|
|
|
2306 |
|
|
if (!(s = kmalloc(sizeof(struct solo1_state), GFP_KERNEL))) {
|
2307 |
|
|
printk(KERN_WARNING "solo1: out of memory\n");
|
2308 |
|
|
return -ENOMEM;
|
2309 |
|
|
}
|
2310 |
|
|
memset(s, 0, sizeof(struct solo1_state));
|
2311 |
|
|
init_waitqueue_head(&s->dma_adc.wait);
|
2312 |
|
|
init_waitqueue_head(&s->dma_dac.wait);
|
2313 |
|
|
init_waitqueue_head(&s->open_wait);
|
2314 |
|
|
init_waitqueue_head(&s->midi.iwait);
|
2315 |
|
|
init_waitqueue_head(&s->midi.owait);
|
2316 |
|
|
init_MUTEX(&s->open_sem);
|
2317 |
|
|
spin_lock_init(&s->lock);
|
2318 |
|
|
s->magic = SOLO1_MAGIC;
|
2319 |
|
|
s->dev = pcidev;
|
2320 |
|
|
s->iobase = pci_resource_start(pcidev, 0);
|
2321 |
|
|
s->sbbase = pci_resource_start(pcidev, 1);
|
2322 |
|
|
s->vcbase = pci_resource_start(pcidev, 2);
|
2323 |
|
|
s->ddmabase = s->vcbase + DDMABASE_OFFSET;
|
2324 |
|
|
s->mpubase = pci_resource_start(pcidev, 3);
|
2325 |
|
|
s->gameport.io = pci_resource_start(pcidev, 4);
|
2326 |
|
|
s->irq = pcidev->irq;
|
2327 |
|
|
ret = -EBUSY;
|
2328 |
|
|
if (!request_region(s->iobase, IOBASE_EXTENT, "ESS Solo1")) {
|
2329 |
|
|
printk(KERN_ERR "solo1: io ports in use\n");
|
2330 |
|
|
goto err_region1;
|
2331 |
|
|
}
|
2332 |
|
|
if (!request_region(s->sbbase+FMSYNTH_EXTENT, SBBASE_EXTENT-FMSYNTH_EXTENT, "ESS Solo1")) {
|
2333 |
|
|
printk(KERN_ERR "solo1: io ports in use\n");
|
2334 |
|
|
goto err_region2;
|
2335 |
|
|
}
|
2336 |
|
|
if (!request_region(s->ddmabase, DDMABASE_EXTENT, "ESS Solo1")) {
|
2337 |
|
|
printk(KERN_ERR "solo1: io ports in use\n");
|
2338 |
|
|
goto err_region3;
|
2339 |
|
|
}
|
2340 |
|
|
if (!request_region(s->mpubase, MPUBASE_EXTENT, "ESS Solo1")) {
|
2341 |
|
|
printk(KERN_ERR "solo1: io ports in use\n");
|
2342 |
|
|
goto err_region4;
|
2343 |
|
|
}
|
2344 |
|
|
if (s->gameport.io && !request_region(s->gameport.io, GAMEPORT_EXTENT, "ESS Solo1")) {
|
2345 |
|
|
printk(KERN_ERR "solo1: gameport io ports in use\n");
|
2346 |
|
|
s->gameport.io = 0;
|
2347 |
|
|
}
|
2348 |
|
|
if ((ret=request_irq(s->irq,solo1_interrupt,SA_SHIRQ,"ESS Solo1",s))) {
|
2349 |
|
|
printk(KERN_ERR "solo1: irq %u in use\n", s->irq);
|
2350 |
|
|
goto err_irq;
|
2351 |
|
|
}
|
2352 |
|
|
printk(KERN_INFO "solo1: joystick port at %#x\n", s->gameport.io+1);
|
2353 |
|
|
/* register devices */
|
2354 |
|
|
if ((s->dev_audio = register_sound_dsp(&solo1_audio_fops, -1)) < 0) {
|
2355 |
|
|
ret = s->dev_audio;
|
2356 |
|
|
goto err_dev1;
|
2357 |
|
|
}
|
2358 |
|
|
if ((s->dev_mixer = register_sound_mixer(&solo1_mixer_fops, -1)) < 0) {
|
2359 |
|
|
ret = s->dev_mixer;
|
2360 |
|
|
goto err_dev2;
|
2361 |
|
|
}
|
2362 |
|
|
if ((s->dev_midi = register_sound_midi(&solo1_midi_fops, -1)) < 0) {
|
2363 |
|
|
ret = s->dev_midi;
|
2364 |
|
|
goto err_dev3;
|
2365 |
|
|
}
|
2366 |
|
|
if ((s->dev_dmfm = register_sound_special(&solo1_dmfm_fops, 15 /* ?? */)) < 0) {
|
2367 |
|
|
ret = s->dev_dmfm;
|
2368 |
|
|
goto err_dev4;
|
2369 |
|
|
}
|
2370 |
|
|
if (setup_solo1(s)) {
|
2371 |
|
|
ret = -EIO;
|
2372 |
|
|
goto err;
|
2373 |
|
|
}
|
2374 |
|
|
/* register gameport */
|
2375 |
|
|
gameport_register_port(&s->gameport);
|
2376 |
|
|
/* store it in the driver field */
|
2377 |
|
|
pci_set_drvdata(pcidev, s);
|
2378 |
|
|
return 0;
|
2379 |
|
|
|
2380 |
|
|
err:
|
2381 |
|
|
unregister_sound_special(s->dev_dmfm);
|
2382 |
|
|
err_dev4:
|
2383 |
|
|
unregister_sound_midi(s->dev_midi);
|
2384 |
|
|
err_dev3:
|
2385 |
|
|
unregister_sound_mixer(s->dev_mixer);
|
2386 |
|
|
err_dev2:
|
2387 |
|
|
unregister_sound_dsp(s->dev_audio);
|
2388 |
|
|
err_dev1:
|
2389 |
|
|
printk(KERN_ERR "solo1: initialisation error\n");
|
2390 |
|
|
free_irq(s->irq, s);
|
2391 |
|
|
err_irq:
|
2392 |
|
|
if (s->gameport.io)
|
2393 |
|
|
release_region(s->gameport.io, GAMEPORT_EXTENT);
|
2394 |
|
|
release_region(s->mpubase, MPUBASE_EXTENT);
|
2395 |
|
|
err_region4:
|
2396 |
|
|
release_region(s->ddmabase, DDMABASE_EXTENT);
|
2397 |
|
|
err_region3:
|
2398 |
|
|
release_region(s->sbbase+FMSYNTH_EXTENT, SBBASE_EXTENT-FMSYNTH_EXTENT);
|
2399 |
|
|
err_region2:
|
2400 |
|
|
release_region(s->iobase, IOBASE_EXTENT);
|
2401 |
|
|
err_region1:
|
2402 |
|
|
kfree(s);
|
2403 |
|
|
return ret;
|
2404 |
|
|
}
|
2405 |
|
|
|
2406 |
|
|
static void __devinit solo1_remove(struct pci_dev *dev)
|
2407 |
|
|
{
|
2408 |
|
|
struct solo1_state *s = pci_get_drvdata(dev);
|
2409 |
|
|
|
2410 |
|
|
if (!s)
|
2411 |
|
|
return;
|
2412 |
|
|
/* stop DMA controller */
|
2413 |
|
|
outb(0, s->iobase+6);
|
2414 |
|
|
outb(0, s->ddmabase+0xd); /* DMA master clear */
|
2415 |
|
|
outb(3, s->sbbase+6); /* reset sequencer and FIFO */
|
2416 |
|
|
synchronize_irq();
|
2417 |
|
|
pci_write_config_word(s->dev, 0x60, 0); /* turn off DDMA controller address space */
|
2418 |
|
|
free_irq(s->irq, s);
|
2419 |
|
|
if (s->gameport.io) {
|
2420 |
|
|
gameport_unregister_port(&s->gameport);
|
2421 |
|
|
release_region(s->gameport.io, GAMEPORT_EXTENT);
|
2422 |
|
|
}
|
2423 |
|
|
release_region(s->iobase, IOBASE_EXTENT);
|
2424 |
|
|
release_region(s->sbbase+FMSYNTH_EXTENT, SBBASE_EXTENT-FMSYNTH_EXTENT);
|
2425 |
|
|
release_region(s->ddmabase, DDMABASE_EXTENT);
|
2426 |
|
|
release_region(s->mpubase, MPUBASE_EXTENT);
|
2427 |
|
|
unregister_sound_dsp(s->dev_audio);
|
2428 |
|
|
unregister_sound_mixer(s->dev_mixer);
|
2429 |
|
|
unregister_sound_midi(s->dev_midi);
|
2430 |
|
|
unregister_sound_special(s->dev_dmfm);
|
2431 |
|
|
kfree(s);
|
2432 |
|
|
pci_set_drvdata(dev, NULL);
|
2433 |
|
|
}
|
2434 |
|
|
|
2435 |
|
|
static struct pci_device_id id_table[] __devinitdata = {
|
2436 |
|
|
{ PCI_VENDOR_ID_ESS, PCI_DEVICE_ID_ESS_SOLO1, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
|
2437 |
|
|
{ 0, }
|
2438 |
|
|
};
|
2439 |
|
|
|
2440 |
|
|
MODULE_DEVICE_TABLE(pci, id_table);
|
2441 |
|
|
|
2442 |
|
|
static struct pci_driver solo1_driver = {
|
2443 |
|
|
name: "ESS Solo1",
|
2444 |
|
|
id_table: id_table,
|
2445 |
|
|
probe: solo1_probe,
|
2446 |
|
|
remove: solo1_remove,
|
2447 |
|
|
suspend: solo1_suspend,
|
2448 |
|
|
resume: solo1_resume
|
2449 |
|
|
};
|
2450 |
|
|
|
2451 |
|
|
|
2452 |
|
|
static int __init init_solo1(void)
|
2453 |
|
|
{
|
2454 |
|
|
if (!pci_present()) /* No PCI bus in this machine! */
|
2455 |
|
|
return -ENODEV;
|
2456 |
|
|
printk(KERN_INFO "solo1: version v0.20 time " __TIME__ " " __DATE__ "\n");
|
2457 |
|
|
if (!pci_register_driver(&solo1_driver)) {
|
2458 |
|
|
pci_unregister_driver(&solo1_driver);
|
2459 |
|
|
return -ENODEV;
|
2460 |
|
|
}
|
2461 |
|
|
return 0;
|
2462 |
|
|
}
|
2463 |
|
|
|
2464 |
|
|
/* --------------------------------------------------------------------- */
|
2465 |
|
|
|
2466 |
|
|
MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
|
2467 |
|
|
MODULE_DESCRIPTION("ESS Solo1 Driver");
|
2468 |
|
|
MODULE_LICENSE("GPL");
|
2469 |
|
|
|
2470 |
|
|
|
2471 |
|
|
static void __exit cleanup_solo1(void)
|
2472 |
|
|
{
|
2473 |
|
|
printk(KERN_INFO "solo1: unloading\n");
|
2474 |
|
|
pci_unregister_driver(&solo1_driver);
|
2475 |
|
|
}
|
2476 |
|
|
|
2477 |
|
|
/* --------------------------------------------------------------------- */
|
2478 |
|
|
|
2479 |
|
|
module_init(init_solo1);
|
2480 |
|
|
module_exit(cleanup_solo1);
|
2481 |
|
|
|