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[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [drivers/] [sound/] [maestro.c] - Blame information for rev 1780

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1 1275 phoenix
/*****************************************************************************
2
 *
3
 *      ESS Maestro/Maestro-2/Maestro-2E driver for Linux 2.[23].x
4
 *
5
 *      This program is free software; you can redistribute it and/or modify
6
 *      it under the terms of the GNU General Public License as published by
7
 *      the Free Software Foundation; either version 2 of the License, or
8
 *      (at your option) any later version.
9
 *
10
 *      This program is distributed in the hope that it will be useful,
11
 *      but WITHOUT ANY WARRANTY; without even the implied warranty of
12
 *      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13
 *      GNU General Public License for more details.
14
 *
15
 *      You should have received a copy of the GNU General Public License
16
 *      along with this program; if not, write to the Free Software
17
 *      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18
 *
19
 *      (c) Copyright 1999       Alan Cox <alan.cox@linux.org>
20
 *
21
 *      Based heavily on SonicVibes.c:
22
 *      Copyright (C) 1998-1999  Thomas Sailer (sailer@ife.ee.ethz.ch)
23
 *
24
 *      Heavily modified by Zach Brown <zab@zabbo.net> based on lunch
25
 *      with ESS engineers.  Many thanks to Howard Kim for providing
26
 *      contacts and hardware.  Honorable mention goes to Eric
27
 *      Brombaugh for all sorts of things.  Best regards to the
28
 *      proprietors of Hack Central for fine lodging.
29
 *
30
 *  Supported devices:
31
 *  /dev/dsp0-3    standard /dev/dsp device, (mostly) OSS compatible
32
 *  /dev/mixer  standard /dev/mixer device, (mostly) OSS compatible
33
 *
34
 *  Hardware Description
35
 *
36
 *      A working Maestro setup contains the Maestro chip wired to a
37
 *      codec or 2.  In the Maestro we have the APUs, the ASSP, and the
38
 *      Wavecache.  The APUs can be though of as virtual audio routing
39
 *      channels.  They can take data from a number of sources and perform
40
 *      basic encodings of the data.  The wavecache is a storehouse for
41
 *      PCM data.  Typically it deals with PCI and interracts with the
42
 *      APUs.  The ASSP is a wacky DSP like device that ESS is loth
43
 *      to release docs on.  Thankfully it isn't required on the Maestro
44
 *      until you start doing insane things like FM emulation and surround
45
 *      encoding.  The codecs are almost always AC-97 compliant codecs,
46
 *      but it appears that early Maestros may have had PT101 (an ESS
47
 *      part?) wired to them.  The only real difference in the Maestro
48
 *      families is external goop like docking capability, memory for
49
 *      the ASSP, and initialization differences.
50
 *
51
 *  Driver Operation
52
 *
53
 *      We only drive the APU/Wavecache as typical DACs and drive the
54
 *      mixers in the codecs.  There are 64 APUs.  We assign 6 to each
55
 *      /dev/dsp? device.  2 channels for output, and 4 channels for
56
 *      input.
57
 *
58
 *      Each APU can do a number of things, but we only really use
59
 *      3 basic functions.  For playback we use them to convert PCM
60
 *      data fetched over PCI by the wavecahche into analog data that
61
 *      is handed to the codec.  One APU for mono, and a pair for stereo.
62
 *      When in stereo, the combination of smarts in the APU and Wavecache
63
 *      decide which wavecache gets the left or right channel.
64
 *
65
 *      For record we still use the old overly mono system.  For each in
66
 *      coming channel the data comes in from the codec, through a 'input'
67
 *      APU, through another rate converter APU, and then into memory via
68
 *      the wavecache and PCI.  If its stereo, we mash it back into LRLR in
69
 *      software.  The pass between the 2 APUs is supposedly what requires us
70
 *      to have a 512 byte buffer sitting around in wavecache/memory.
71
 *
72
 *      The wavecache makes our life even more fun.  First off, it can
73
 *      only address the first 28 bits of PCI address space, making it
74
 *      useless on quite a few architectures.  Secondly, its insane.
75
 *      It claims to fetch from 4 regions of PCI space, each 4 meg in length.
76
 *      But that doesn't really work.  You can only use 1 region.  So all our
77
 *      allocations have to be in 4meg of each other.  Booo.  Hiss.
78
 *      So we have a module parameter, dsps_order, that is the order of
79
 *      the number of dsps to provide.  All their buffer space is allocated
80
 *      on open time.  The sonicvibes OSS routines we inherited really want
81
 *      power of 2 buffers, so we have all those next to each other, then
82
 *      512 byte regions for the recording wavecaches.  This ends up
83
 *      wasting quite a bit of memory.  The only fixes I can see would be
84
 *      getting a kernel allocator that could work in zones, or figuring out
85
 *      just how to coerce the WP into doing what we want.
86
 *
87
 *      The indirection of the various registers means we have to spinlock
88
 *      nearly all register accesses.  We have the main register indirection
89
 *      like the wave cache, maestro registers, etc.  Then we have beasts
90
 *      like the APU interface that is indirect registers gotten at through
91
 *      the main maestro indirection.  Ouch.  We spinlock around the actual
92
 *      ports on a per card basis.  This means spinlock activity at each IO
93
 *      operation, but the only IO operation clusters are in non critical
94
 *      paths and it makes the code far easier to follow.  Interrupts are
95
 *      blocked while holding the locks because the int handler has to
96
 *      get at some of them :(.  The mixer interface doesn't, however.
97
 *      We also have an OSS state lock that is thrown around in a few
98
 *      places.
99
 *
100
 *      This driver has brute force APM suspend support.  We catch suspend
101
 *      notifications and stop all work being done on the chip.  Any people
102
 *      that try between this shutdown and the real suspend operation will
103
 *      be put to sleep.  When we resume we restore our software state on
104
 *      the chip and wake up the people that were using it.  The code thats
105
 *      being used now is quite dirty and assumes we're on a uni-processor
106
 *      machine.  Much of it will need to be cleaned up for SMP ACPI or
107
 *      similar.
108
 *
109
 *      We also pay attention to PCI power management now.  The driver
110
 *      will power down units of the chip that it knows aren't needed.
111
 *      The WaveProcessor and company are only powered on when people
112
 *      have /dev/dsp*s open.  On removal the driver will
113
 *      power down the maestro entirely.  There could still be
114
 *      trouble with BIOSen that magically change power states
115
 *      themselves, but we'll see.
116
 *
117
 * History
118
 *  v0.15 - May 21 2001 - Marcus Meissner <mm@caldera.de>
119
 *      Ported to Linux 2.4 PCI API. Some clean ups, global devs list
120
 *      removed (now using pci device driver data).
121
 *      PM needs to be polished still. Bumped version.
122
 *  (still kind of v0.14) May 13 2001 - Ben Pfaff <pfaffben@msu.edu>
123
 *      Add support for 978 docking and basic hardware volume control
124
 *  (still kind of v0.14) Nov 23 - Alan Cox <alan@redhat.com>
125
 *      Add clocking= for people with seriously warped hardware
126
 *  (still v0.14) Nov 10 2000 - Bartlomiej Zolnierkiewicz <bkz@linux-ide.org>
127
 *      add __init to maestro_ac97_init() and maestro_install()
128
 *  (still based on v0.14) Mar 29 2000 - Zach Brown <zab@redhat.com>
129
 *      move to 2.3 power management interface, which
130
 *              required hacking some suspend/resume/check paths
131
 *      make static compilation work
132
 *  v0.14 - Jan 28 2000 - Zach Brown <zab@redhat.com>
133
 *      add PCI power management through ACPI regs.
134
 *      we now shut down on machine reboot/halt
135
 *      leave scary PCI config items alone (isa stuff, mostly)
136
 *      enable 1921s, it seems only mine was broke.
137
 *      fix swapped left/right pcm dac.  har har.
138
 *      up bob freq, increase buffers, fix pointers at underflow
139
 *      silly compilation problems
140
 *  v0.13 - Nov 18 1999 - Zach Brown <zab@redhat.com>
141
 *      fix nec Versas?  man would that be cool.
142
 *  v0.12 - Nov 12 1999 - Zach Brown <zab@redhat.com>
143
 *      brown bag volume max fix..
144
 *  v0.11 - Nov 11 1999 - Zach Brown <zab@redhat.com>
145
 *      use proper stereo apu decoding, mmap/write should work.
146
 *      make volume sliders more useful, tweak rate calculation.
147
 *      fix lame 8bit format reporting bug.  duh. apm apu saving buglet also
148
 *      fix maestro 1 clock freq "bug", remove pt101 support
149
 *  v0.10 - Oct 28 1999 - Zach Brown <zab@redhat.com>
150
 *      aha, so, sometimes the WP writes a status word to offset 0
151
 *        from one of the PCMBARs.  rearrange allocation accordingly..
152
 *        cheers again to Eric for being a good hacker in investigating this.
153
 *      Jeroen Hoogervorst submits 7500 fix out of nowhere.  yay.  :)
154
 *  v0.09 - Oct 23 1999 - Zach Brown <zab@redhat.com>
155
 *      added APM support.
156
 *      re-order something such that some 2Es now work.  Magic!
157
 *      new codec reset routine.  made some codecs come to life.
158
 *      fix clear_advance, sync some control with ESS.
159
 *      now write to all base regs to be paranoid.
160
 *  v0.08 - Oct 20 1999 - Zach Brown <zab@redhat.com>
161
 *      Fix initial buflen bug.  I am so smart.  also smp compiling..
162
 *      I owe Eric yet another beer: fixed recmask, igain,
163
 *        muting, and adc sync consistency.  Go Team.
164
 *  v0.07 - Oct 4 1999 - Zach Brown <zab@redhat.com>
165
 *      tweak adc/dac, formating, and stuff to allow full duplex
166
 *      allocate dsps memory at open() so we can fit in the wavecache window
167
 *      fix wavecache braindamage.  again.  no more scribbling?
168
 *      fix ess 1921 codec bug on some laptops.
169
 *      fix dumb pci scanning bug
170
 *      started 2.3 cleanup, redid spinlocks, little cleanups
171
 *  v0.06 - Sep 20 1999 - Zach Brown <zab@redhat.com>
172
 *      fix wavecache thinkos.  limit to 1 /dev/dsp.
173
 *      eric is wearing his thinking toque this week.
174
 *              spotted apu mode bugs and gain ramping problem
175
 *      don't touch weird mixer regs, make recmask optional
176
 *      fixed igain inversion, defaults for mixers, clean up rec_start
177
 *      make mono recording work.
178
 *      report subsystem stuff, please send reports.
179
 *      littles: parallel out, amp now
180
 *  v0.05 - Sep 17 1999 - Zach Brown <zab@redhat.com>
181
 *      merged and fixed up Eric's initial recording code
182
 *      munged format handling to catch misuse, needs rewrite.
183
 *      revert ring bus init, fixup shared int, add pci busmaster setting
184
 *      fix mixer oss interface, fix mic mute and recmask
185
 *      mask off unsupported mixers, reset with all 1s, modularize defaults
186
 *      make sure bob is running while we need it
187
 *      got rid of device limit, initial minimal apm hooks
188
 *      pull out dead code/includes, only allow multimedia/audio maestros
189
 *  v0.04 - Sep 01 1999 - Zach Brown <zab@redhat.com>
190
 *      copied memory leak fix from sonicvibes driver
191
 *      different ac97 reset, play with 2.0 ac97, simplify ring bus setup
192
 *      bob freq code, region sanity, jitter sync fix; all from Eric
193
 *
194
 * TODO
195
 *      fix bob frequency
196
 *      endianness
197
 *      do smart things with ac97 2.0 bits.
198
 *      dual codecs
199
 *      leave 54->61 open
200
 *
201
 *      it also would be fun to have a mode that would not use pci dma at all
202
 *      but would copy into the wavecache on board memory and use that
203
 *      on architectures that don't like the maestro's pci dma ickiness.
204
 */
205
 
206
/*****************************************************************************/
207
 
208
#include <linux/version.h>
209
#include <linux/module.h>
210
#include <linux/sched.h>
211
#include <linux/smp_lock.h>
212
#include <linux/wrapper.h>
213
#include <linux/string.h>
214
#include <linux/ctype.h>
215
#include <linux/ioport.h>
216
#include <linux/delay.h>
217
#include <linux/sound.h>
218
#include <linux/slab.h>
219
#include <linux/soundcard.h>
220
#include <linux/pci.h>
221
#include <linux/spinlock.h>
222
#include <asm/io.h>
223
#include <asm/dma.h>
224
#include <linux/init.h>
225
#include <linux/poll.h>
226
#include <linux/reboot.h>
227
#include <asm/uaccess.h>
228
#include <asm/hardirq.h>
229
#include <linux/bitops.h>
230
 
231
#include <linux/pm.h>
232
static int maestro_pm_callback(struct pm_dev *dev, pm_request_t rqst, void *d);
233
 
234
#include "maestro.h"
235
 
236
static struct pci_driver maestro_pci_driver;
237
 
238
/* --------------------------------------------------------------------- */
239
 
240
#define M_DEBUG 1
241
 
242
#ifdef M_DEBUG
243
static int debug=0;
244
#define M_printk(args...) {if (debug) printk(args);}
245
#else
246
#define M_printk(x)
247
#endif
248
 
249
/* we try to setup 2^(dsps_order) /dev/dsp devices */
250
static int dsps_order=0;
251
/* wether or not we mess around with power management */
252
static int use_pm=2; /* set to 1 for force */
253
/* clocking for broken hardware - a few laptops seem to use a 50Khz clock
254
        ie insmod with clocking=50000 or so */
255
 
256
static int clocking=48000;
257
 
258
MODULE_AUTHOR("Zach Brown <zab@zabbo.net>, Alan Cox <alan@redhat.com>");
259
MODULE_DESCRIPTION("ESS Maestro Driver");
260
MODULE_LICENSE("GPL");
261
 
262
#ifdef M_DEBUG
263
MODULE_PARM(debug,"i");
264
#endif
265
MODULE_PARM(dsps_order,"i");
266
MODULE_PARM(use_pm,"i");
267
MODULE_PARM(clocking, "i");
268
 
269
/* --------------------------------------------------------------------- */
270
#define DRIVER_VERSION "0.15"
271
 
272
#ifndef PCI_VENDOR_ESS
273
#define PCI_VENDOR_ESS                  0x125D
274
#define PCI_DEVICE_ID_ESS_ESS1968       0x1968          /* Maestro 2    */
275
#define PCI_DEVICE_ID_ESS_ESS1978       0x1978          /* Maestro 2E   */
276
 
277
#define PCI_VENDOR_ESS_OLD              0x1285          /* Platform Tech, 
278
                                                the people the maestro
279
                                                was bought from */
280
#define PCI_DEVICE_ID_ESS_ESS0100       0x0100          /* maestro 1 */
281
#endif /* PCI_VENDOR_ESS */
282
 
283
#define ESS_CHAN_HARD           0x100
284
 
285
/* NEC Versas ? */
286
#define NEC_VERSA_SUBID1        0x80581033
287
#define NEC_VERSA_SUBID2        0x803c1033
288
 
289
 
290
/* changed so that I could actually find all the
291
        references and fix them up.  its a little more readable now. */
292
#define ESS_FMT_STEREO  0x01
293
#define ESS_FMT_16BIT   0x02
294
#define ESS_FMT_MASK    0x03
295
#define ESS_DAC_SHIFT   0   
296
#define ESS_ADC_SHIFT   4
297
 
298
#define ESS_STATE_MAGIC         0x125D1968
299
#define ESS_CARD_MAGIC          0x19283746
300
 
301
#define DAC_RUNNING             1
302
#define ADC_RUNNING             2
303
 
304
#define MAX_DSP_ORDER   2
305
#define MAX_DSPS        (1<<MAX_DSP_ORDER)
306
#define NR_DSPS         (1<<dsps_order)
307
#define NR_IDRS         32
308
 
309
#define NR_APUS         64
310
#define NR_APU_REGS     16
311
 
312
/* acpi states */
313
enum {
314
        ACPI_D0=0,
315
        ACPI_D1,
316
        ACPI_D2,
317
        ACPI_D3
318
};
319
 
320
/* bits in the acpi masks */
321
#define ACPI_12MHZ      ( 1 << 15)
322
#define ACPI_24MHZ      ( 1 << 14)
323
#define ACPI_978        ( 1 << 13)
324
#define ACPI_SPDIF      ( 1 << 12)
325
#define ACPI_GLUE       ( 1 << 11)
326
#define ACPI__10        ( 1 << 10) /* reserved */
327
#define ACPI_PCIINT     ( 1 << 9)
328
#define ACPI_HV         ( 1 << 8) /* hardware volume */
329
#define ACPI_GPIO       ( 1 << 7)
330
#define ACPI_ASSP       ( 1 << 6)
331
#define ACPI_SB         ( 1 << 5) /* sb emul */
332
#define ACPI_FM         ( 1 << 4) /* fm emul */
333
#define ACPI_RB         ( 1 << 3) /* ringbus / aclink */
334
#define ACPI_MIDI       ( 1 << 2) 
335
#define ACPI_GP         ( 1 << 1) /* game port */
336
#define ACPI_WP         ( 1 << 0) /* wave processor */
337
 
338
#define ACPI_ALL        (0xffff)
339
#define ACPI_SLEEP      (~(ACPI_SPDIF|ACPI_ASSP|ACPI_SB|ACPI_FM| \
340
                        ACPI_MIDI|ACPI_GP|ACPI_WP))
341
#define ACPI_NONE       (ACPI__10)
342
 
343
/* these masks indicate which units we care about at
344
        which states */
345
u16 acpi_state_mask[] = {
346
        [ACPI_D0] = ACPI_ALL,
347
        [ACPI_D1] = ACPI_SLEEP,
348
        [ACPI_D2] = ACPI_SLEEP,
349
        [ACPI_D3] = ACPI_NONE
350
};
351
 
352
static char version[] __devinitdata =
353
KERN_INFO "maestro: version " DRIVER_VERSION " time " __TIME__ " " __DATE__ "\n";
354
 
355
 
356
 
357
static const unsigned sample_size[] = { 1, 2, 2, 4 };
358
static const unsigned sample_shift[] = { 0, 1, 1, 2 };
359
 
360
enum card_types_t {
361
        TYPE_MAESTRO,
362
        TYPE_MAESTRO2,
363
        TYPE_MAESTRO2E
364
};
365
 
366
static const char *card_names[]={
367
        [TYPE_MAESTRO] = "ESS Maestro",
368
        [TYPE_MAESTRO2] = "ESS Maestro 2",
369
        [TYPE_MAESTRO2E] = "ESS Maestro 2E"
370
};
371
 
372
static int clock_freq[]={
373
        [TYPE_MAESTRO] = (49152000L / 1024L),
374
        [TYPE_MAESTRO2] = (50000000L / 1024L),
375
        [TYPE_MAESTRO2E] = (50000000L / 1024L)
376
};
377
 
378
static int maestro_notifier(struct notifier_block *nb, unsigned long event, void *buf);
379
 
380
static struct notifier_block maestro_nb = {maestro_notifier, NULL, 0};
381
 
382
/* --------------------------------------------------------------------- */
383
 
384
struct ess_state {
385
        unsigned int magic;
386
        /* FIXME: we probably want submixers in here, but only one record pair */
387
        u8 apu[6];              /* l/r output, l/r intput converters, l/r input apus */
388
        u8 apu_mode[6];         /* Running mode for this APU */
389
        u8 apu_pan[6];          /* Panning setup for this APU */
390
        u32 apu_base[6];        /* base address for this apu */
391
        struct ess_card *card;  /* Card info */
392
        /* wave stuff */
393
        unsigned int rateadc, ratedac;
394
        unsigned char fmt, enable;
395
 
396
        int index;
397
 
398
        /* this locks around the oss state in the driver */
399
        spinlock_t lock;
400
        /* only let 1 be opening at a time */
401
        struct semaphore open_sem;
402
        wait_queue_head_t open_wait;
403
        mode_t open_mode;
404
 
405
        /* soundcore stuff */
406
        int dev_audio;
407
 
408
        struct dmabuf {
409
                void *rawbuf;
410
                unsigned buforder;
411
                unsigned numfrag;
412
                unsigned fragshift;
413
                /* XXX zab - swptr only in here so that it can be referenced by
414
                        clear_advance, as far as I can tell :( */
415
                unsigned hwptr, swptr;
416
                unsigned total_bytes;
417
                int count;
418
                unsigned error; /* over/underrun */
419
                wait_queue_head_t wait;
420
                /* redundant, but makes calculations easier */
421
                unsigned fragsize;
422
                unsigned dmasize;
423
                unsigned fragsamples;
424
                /* OSS stuff */
425
                unsigned mapped:1;
426
                unsigned ready:1;       /* our oss buffers are ready to go */
427
                unsigned endcleared:1;
428
                unsigned ossfragshift;
429
                int ossmaxfrags;
430
                unsigned subdivision;
431
                u16 base;               /* Offset for ptr */
432
        } dma_dac, dma_adc;
433
 
434
        /* pointer to each dsp?s piece of the apu->src buffer page */
435
        void *mixbuf;
436
 
437
};
438
 
439
struct ess_card {
440
        unsigned int magic;
441
 
442
        /* We keep maestro cards in a linked list */
443
        struct ess_card *next;
444
 
445
        int dev_mixer;
446
 
447
        int card_type;
448
 
449
        /* as most of this is static,
450
                perhaps it should be a pointer to a global struct */
451
        struct mixer_goo {
452
                int modcnt;
453
                int supported_mixers;
454
                int stereo_mixers;
455
                int record_sources;
456
                /* the caller must guarantee arg sanity before calling these */
457
/*              int (*read_mixer)(struct ess_card *card, int index);*/
458
                void (*write_mixer)(struct ess_card *card,int mixer, unsigned int left,unsigned int right);
459
                int (*recmask_io)(struct ess_card *card,int rw,int mask);
460
                unsigned int mixer_state[SOUND_MIXER_NRDEVICES];
461
        } mix;
462
 
463
        int power_regs;
464
 
465
        int in_suspend;
466
        wait_queue_head_t suspend_queue;
467
 
468
        struct ess_state channels[MAX_DSPS];
469
        u16 maestro_map[NR_IDRS];       /* Register map */
470
        /* we have to store this junk so that we can come back from a
471
                suspend */
472
        u16 apu_map[NR_APUS][NR_APU_REGS];      /* contents of apu regs */
473
 
474
        /* this locks around the physical registers on the card */
475
        spinlock_t lock;
476
 
477
        /* memory for this card.. wavecache limited :(*/
478
        void *dmapages;
479
        int dmaorder;
480
 
481
        /* hardware resources */
482
        struct pci_dev *pcidev;
483
        u32 iobase;
484
        u32 irq;
485
 
486
        int bob_freq;
487
        char dsps_open;
488
 
489
        int dock_mute_vol;
490
};
491
 
492
static void set_mixer(struct ess_card *card,unsigned int mixer, unsigned int val );
493
 
494
static unsigned
495
ld2(unsigned int x)
496
{
497
        unsigned r = 0;
498
 
499
        if (x >= 0x10000) {
500
                x >>= 16;
501
                r += 16;
502
        }
503
        if (x >= 0x100) {
504
                x >>= 8;
505
                r += 8;
506
        }
507
        if (x >= 0x10) {
508
                x >>= 4;
509
                r += 4;
510
        }
511
        if (x >= 4) {
512
                x >>= 2;
513
                r += 2;
514
        }
515
        if (x >= 2)
516
                r++;
517
        return r;
518
}
519
 
520
 
521
/* --------------------------------------------------------------------- */
522
 
523
static void check_suspend(struct ess_card *card);
524
 
525
/* --------------------------------------------------------------------- */
526
 
527
 
528
/*
529
 *      ESS Maestro AC97 codec programming interface.
530
 */
531
 
532
static void maestro_ac97_set(struct ess_card *card, u8 cmd, u16 val)
533
{
534
        int io = card->iobase;
535
        int i;
536
        /*
537
         *      Wait for the codec bus to be free
538
         */
539
 
540
        check_suspend(card);
541
 
542
        for(i=0;i<10000;i++)
543
        {
544
                if(!(inb(io+ESS_AC97_INDEX)&1))
545
                        break;
546
        }
547
        /*
548
         *      Write the bus
549
         */
550
        outw(val, io+ESS_AC97_DATA);
551
        mdelay(1);
552
        outb(cmd, io+ESS_AC97_INDEX);
553
        mdelay(1);
554
}
555
 
556
static u16 maestro_ac97_get(struct ess_card *card, u8 cmd)
557
{
558
        int io = card->iobase;
559
        int sanity=10000;
560
        u16 data;
561
        int i;
562
 
563
        check_suspend(card);
564
        /*
565
         *      Wait for the codec bus to be free
566
         */
567
 
568
        for(i=0;i<10000;i++)
569
        {
570
                if(!(inb(io+ESS_AC97_INDEX)&1))
571
                        break;
572
        }
573
 
574
        outb(cmd|0x80, io+ESS_AC97_INDEX);
575
        mdelay(1);
576
 
577
        while(inb(io+ESS_AC97_INDEX)&1)
578
        {
579
                sanity--;
580
                if(!sanity)
581
                {
582
                        printk(KERN_ERR "maestro: ac97 codec timeout reading 0x%x.\n",cmd);
583
                        return 0;
584
                }
585
        }
586
        data=inw(io+ESS_AC97_DATA);
587
        mdelay(1);
588
        return data;
589
}
590
 
591
/* OSS interface to the ac97s.. */
592
 
593
#define AC97_STEREO_MASK (SOUND_MASK_VOLUME|\
594
        SOUND_MASK_PCM|SOUND_MASK_LINE|SOUND_MASK_CD|\
595
        SOUND_MASK_VIDEO|SOUND_MASK_LINE1|SOUND_MASK_IGAIN)
596
 
597
#define AC97_SUPPORTED_MASK (AC97_STEREO_MASK | \
598
        SOUND_MASK_BASS|SOUND_MASK_TREBLE|SOUND_MASK_MIC|\
599
        SOUND_MASK_SPEAKER)
600
 
601
#define AC97_RECORD_MASK (SOUND_MASK_MIC|\
602
        SOUND_MASK_CD| SOUND_MASK_VIDEO| SOUND_MASK_LINE1| SOUND_MASK_LINE|\
603
        SOUND_MASK_PHONEIN)
604
 
605
#define supported_mixer(CARD,FOO) ( CARD->mix.supported_mixers & (1<<FOO) )
606
 
607
/* this table has default mixer values for all OSS mixers.
608
        be sure to fill it in if you add oss mixers
609
        to anyone's supported mixer defines */
610
 
611
 unsigned int mixer_defaults[SOUND_MIXER_NRDEVICES] = {
612
        [SOUND_MIXER_VOLUME] =          0x3232,
613
        [SOUND_MIXER_BASS] =            0x3232,
614
        [SOUND_MIXER_TREBLE] =          0x3232,
615
        [SOUND_MIXER_SPEAKER] =         0x3232,
616
        [SOUND_MIXER_MIC] =     0x8000, /* annoying */
617
        [SOUND_MIXER_LINE] =    0x3232,
618
        [SOUND_MIXER_CD] =      0x3232,
619
        [SOUND_MIXER_VIDEO] =   0x3232,
620
        [SOUND_MIXER_LINE1] =   0x3232,
621
        [SOUND_MIXER_PCM] =             0x3232,
622
        [SOUND_MIXER_IGAIN] =           0x3232
623
};
624
 
625
static struct ac97_mixer_hw {
626
        unsigned char offset;
627
        int scale;
628
} ac97_hw[SOUND_MIXER_NRDEVICES]= {
629
        [SOUND_MIXER_VOLUME]    =       {0x02,63},
630
        [SOUND_MIXER_BASS]      =       {0x08,15},
631
        [SOUND_MIXER_TREBLE]    =       {0x08,15},
632
        [SOUND_MIXER_SPEAKER]   =       {0x0a,15},
633
        [SOUND_MIXER_MIC]       =       {0x0e,31},
634
        [SOUND_MIXER_LINE]      =       {0x10,31},
635
        [SOUND_MIXER_CD]        =       {0x12,31},
636
        [SOUND_MIXER_VIDEO]     =       {0x14,31},
637
        [SOUND_MIXER_LINE1]     =       {0x16,31},
638
        [SOUND_MIXER_PCM]       =       {0x18,31},
639
        [SOUND_MIXER_IGAIN]     =       {0x1c,15}
640
};
641
 
642
#if 0 /* *shrug* removed simply because we never used it.
643
                feel free to implement again if needed */
644
 
645
/* reads the given OSS mixer from the ac97
646
        the caller must have insured that the ac97 knows
647
        about that given mixer, and should be holding a
648
        spinlock for the card */
649
static int ac97_read_mixer(struct ess_card *card, int mixer)
650
{
651
        u16 val;
652
        int ret=0;
653
        struct ac97_mixer_hw *mh = &ac97_hw[mixer];
654
 
655
        val = maestro_ac97_get(card, mh->offset);
656
 
657
        if(AC97_STEREO_MASK & (1<<mixer)) {
658
                /* nice stereo mixers .. */
659
                int left,right;
660
 
661
                left = (val >> 8)  & 0x7f;
662
                right = val  & 0x7f;
663
 
664
                if (mixer == SOUND_MIXER_IGAIN) {
665
                        right = (right * 100) / mh->scale;
666
                        left = (left * 100) / mh->scale;
667
                else {
668
                        right = 100 - ((right * 100) / mh->scale);
669
                        left = 100 - ((left * 100) / mh->scale);
670
                }
671
 
672
                ret = left | (right << 8);
673
        } else if (mixer == SOUND_MIXER_SPEAKER) {
674
                ret = 100 - ((((val & 0x1e)>>1) * 100) / mh->scale);
675
        } else if (mixer == SOUND_MIXER_MIC) {
676
                ret = 100 - (((val & 0x1f) * 100) / mh->scale);
677
        /*  the low bit is optional in the tone sliders and masking
678
                it lets is avoid the 0xf 'bypass'.. */
679
        } else if (mixer == SOUND_MIXER_BASS) {
680
                ret = 100 - ((((val >> 8) & 0xe) * 100) / mh->scale);
681
        } else if (mixer == SOUND_MIXER_TREBLE) {
682
                ret = 100 - (((val & 0xe) * 100) / mh->scale);
683
        }
684
 
685
        M_printk("read mixer %d (0x%x) %x -> %x\n",mixer,mh->offset,val,ret);
686
 
687
        return ret;
688
}
689
#endif
690
 
691
/* write the OSS encoded volume to the given OSS encoded mixer,
692
        again caller's job to make sure all is well in arg land,
693
        call with spinlock held */
694
 
695
/* linear scale -> log */
696
static unsigned char lin2log[101] =
697
{
698
0, 0 , 15 , 23 , 30 , 34 , 38 , 42 , 45 , 47 ,
699
50 , 52 , 53 , 55 , 57 , 58 , 60 , 61 , 62 ,
700
63 , 65 , 66 , 67 , 68 , 69 , 69 , 70 , 71 ,
701
72 , 73 , 73 , 74 , 75 , 75 , 76 , 77 , 77 ,
702
78 , 78 , 79 , 80 , 80 , 81 , 81 , 82 , 82 ,
703
83 , 83 , 84 , 84 , 84 , 85 , 85 , 86 , 86 ,
704
87 , 87 , 87 , 88 , 88 , 88 , 89 , 89 , 89 ,
705
90 , 90 , 90 , 91 , 91 , 91 , 92 , 92 , 92 ,
706
93 , 93 , 93 , 94 , 94 , 94 , 94 , 95 , 95 ,
707
95 , 95 , 96 , 96 , 96 , 96 , 97 , 97 , 97 ,
708
97 , 98 , 98 , 98 , 98 , 99 , 99 , 99 , 99 , 99
709
};
710
 
711
static void ac97_write_mixer(struct ess_card *card,int mixer, unsigned int left, unsigned int right)
712
{
713
        u16 val=0;
714
        struct ac97_mixer_hw *mh = &ac97_hw[mixer];
715
 
716
        M_printk("wrote mixer %d (0x%x) %d,%d",mixer,mh->offset,left,right);
717
 
718
        if(AC97_STEREO_MASK & (1<<mixer)) {
719
                /* stereo mixers, mute them if we can */
720
 
721
                if (mixer == SOUND_MIXER_IGAIN) {
722
                        /* igain's slider is reversed.. */
723
                        right = (right * mh->scale) / 100;
724
                        left = (left * mh->scale) / 100;
725
                        if ((left == 0) && (right == 0))
726
                                val |= 0x8000;
727
                } else {
728
                        /* log conversion for the stereo controls */
729
                        if((left == 0) && (right == 0))
730
                                val = 0x8000;
731
                        right = ((100 - lin2log[right]) * mh->scale) / 100;
732
                        left = ((100 - lin2log[left]) * mh->scale) / 100;
733
                }
734
 
735
                val |= (left << 8) | right;
736
 
737
        } else if (mixer == SOUND_MIXER_SPEAKER) {
738
                val = (((100 - left) * mh->scale) / 100) << 1;
739
        } else if (mixer == SOUND_MIXER_MIC) {
740
                val = maestro_ac97_get(card, mh->offset) & ~0x801f;
741
                val |= (((100 - left) * mh->scale) / 100);
742
        /*  the low bit is optional in the tone sliders and masking
743
                it lets is avoid the 0xf 'bypass'.. */
744
        } else if (mixer == SOUND_MIXER_BASS) {
745
                val = maestro_ac97_get(card , mh->offset) & ~0x0f00;
746
                val |= ((((100 - left) * mh->scale) / 100) << 8) & 0x0e00;
747
        } else if (mixer == SOUND_MIXER_TREBLE)  {
748
                val = maestro_ac97_get(card , mh->offset) & ~0x000f;
749
                val |= (((100 - left) * mh->scale) / 100) & 0x000e;
750
        }
751
 
752
        maestro_ac97_set(card , mh->offset, val);
753
 
754
        M_printk(" -> %x\n",val);
755
}
756
 
757
/* the following tables allow us to go from
758
        OSS <-> ac97 quickly. */
759
 
760
enum ac97_recsettings {
761
        AC97_REC_MIC=0,
762
        AC97_REC_CD,
763
        AC97_REC_VIDEO,
764
        AC97_REC_AUX,
765
        AC97_REC_LINE,
766
        AC97_REC_STEREO, /* combination of all enabled outputs..  */
767
        AC97_REC_MONO,        /*.. or the mono equivalent */
768
        AC97_REC_PHONE
769
};
770
 
771
static unsigned int ac97_oss_mask[] = {
772
        [AC97_REC_MIC] = SOUND_MASK_MIC,
773
        [AC97_REC_CD] = SOUND_MASK_CD,
774
        [AC97_REC_VIDEO] = SOUND_MASK_VIDEO,
775
        [AC97_REC_AUX] = SOUND_MASK_LINE1,
776
        [AC97_REC_LINE] = SOUND_MASK_LINE,
777
        [AC97_REC_PHONE] = SOUND_MASK_PHONEIN
778
};
779
 
780
/* indexed by bit position */
781
static unsigned int ac97_oss_rm[] = {
782
        [SOUND_MIXER_MIC] = AC97_REC_MIC,
783
        [SOUND_MIXER_CD] = AC97_REC_CD,
784
        [SOUND_MIXER_VIDEO] = AC97_REC_VIDEO,
785
        [SOUND_MIXER_LINE1] = AC97_REC_AUX,
786
        [SOUND_MIXER_LINE] = AC97_REC_LINE,
787
        [SOUND_MIXER_PHONEIN] = AC97_REC_PHONE
788
};
789
 
790
/* read or write the recmask
791
        the ac97 can really have left and right recording
792
        inputs independantly set, but OSS doesn't seem to
793
        want us to express that to the user.
794
        the caller guarantees that we have a supported bit set,
795
        and they must be holding the card's spinlock */
796
static int
797
ac97_recmask_io(struct ess_card *card, int read, int mask)
798
{
799
        unsigned int val = ac97_oss_mask[ maestro_ac97_get(card, 0x1a) & 0x7 ];
800
 
801
        if (read) return val;
802
 
803
        /* oss can have many inputs, maestro cant.  try
804
                to pick the 'new' one */
805
 
806
        if (mask != val) mask &= ~val;
807
 
808
        val = ffs(mask) - 1;
809
        val = ac97_oss_rm[val];
810
        val |= val << 8;  /* set both channels */
811
 
812
        M_printk("maestro: setting ac97 recmask to 0x%x\n",val);
813
 
814
        maestro_ac97_set(card,0x1a,val);
815
 
816
        return 0;
817
};
818
 
819
/*
820
 *      The Maestro can be wired to a standard AC97 compliant codec
821
 *      (see www.intel.com for the pdf's on this), or to a PT101 codec
822
 *      which appears to be the ES1918 (data sheet on the esstech.com.tw site)
823
 *
824
 *      The PT101 setup is untested.
825
 */
826
 
827
static u16 __init maestro_ac97_init(struct ess_card *card)
828
{
829
        u16 vend1, vend2, caps;
830
 
831
        card->mix.supported_mixers = AC97_SUPPORTED_MASK;
832
        card->mix.stereo_mixers = AC97_STEREO_MASK;
833
        card->mix.record_sources = AC97_RECORD_MASK;
834
/*      card->mix.read_mixer = ac97_read_mixer;*/
835
        card->mix.write_mixer = ac97_write_mixer;
836
        card->mix.recmask_io = ac97_recmask_io;
837
 
838
        vend1 = maestro_ac97_get(card, 0x7c);
839
        vend2 = maestro_ac97_get(card, 0x7e);
840
 
841
        caps = maestro_ac97_get(card, 0x00);
842
 
843
        printk(KERN_INFO "maestro: AC97 Codec detected: v: 0x%2x%2x caps: 0x%x pwr: 0x%x\n",
844
                vend1,vend2,caps,maestro_ac97_get(card,0x26) & 0xf);
845
 
846
        if (! (caps & 0x4) ) {
847
                /* no bass/treble nobs */
848
                card->mix.supported_mixers &= ~(SOUND_MASK_BASS|SOUND_MASK_TREBLE);
849
        }
850
 
851
        /* XXX endianness, dork head. */
852
        /* vendor specifc bits.. */
853
        switch ((long)(vend1 << 16) | vend2) {
854
        case 0x545200ff:        /* TriTech */
855
                /* no idea what this does */
856
                maestro_ac97_set(card,0x2a,0x0001);
857
                maestro_ac97_set(card,0x2c,0x0000);
858
                maestro_ac97_set(card,0x2c,0xffff);
859
                break;
860
#if 0   /* i thought the problems I was seeing were with
861
        the 1921, but apparently they were with the pci board
862
        it was on, so this code is commented out.
863
         lets see if this holds true. */
864
        case 0x83847609:        /* ESS 1921 */
865
                /* writing to 0xe (mic) or 0x1a (recmask) seems
866
                        to hang this codec */
867
                card->mix.supported_mixers &= ~(SOUND_MASK_MIC);
868
                card->mix.record_sources = 0;
869
                card->mix.recmask_io = NULL;
870
#if 0   /* don't ask.  I have yet to see what these actually do. */
871
                maestro_ac97_set(card,0x76,0xABBA); /* o/~ Take a chance on me o/~ */
872
                udelay(20);
873
                maestro_ac97_set(card,0x78,0x3002);
874
                udelay(20);
875
                maestro_ac97_set(card,0x78,0x3802);
876
                udelay(20);
877
#endif
878
                break;
879
#endif
880
        default: break;
881
        }
882
 
883
        maestro_ac97_set(card, 0x1E, 0x0404);
884
        /* null misc stuff */
885
        maestro_ac97_set(card, 0x20, 0x0000);
886
 
887
        return 0;
888
}
889
 
890
#if 0  /* there has been 1 person on the planet with a pt101 that we
891
        know of.  If they care, they can put this back in :) */
892
static u16 maestro_pt101_init(struct ess_card *card,int iobase)
893
{
894
        printk(KERN_INFO "maestro: PT101 Codec detected, initializing but _not_ installing mixer device.\n");
895
        /* who knows.. */
896
        maestro_ac97_set(iobase, 0x2A, 0x0001);
897
        maestro_ac97_set(iobase, 0x2C, 0x0000);
898
        maestro_ac97_set(iobase, 0x2C, 0xFFFF);
899
        maestro_ac97_set(iobase, 0x10, 0x9F1F);
900
        maestro_ac97_set(iobase, 0x12, 0x0808);
901
        maestro_ac97_set(iobase, 0x14, 0x9F1F);
902
        maestro_ac97_set(iobase, 0x16, 0x9F1F);
903
        maestro_ac97_set(iobase, 0x18, 0x0404);
904
        maestro_ac97_set(iobase, 0x1A, 0x0000);
905
        maestro_ac97_set(iobase, 0x1C, 0x0000);
906
        maestro_ac97_set(iobase, 0x02, 0x0404);
907
        maestro_ac97_set(iobase, 0x04, 0x0808);
908
        maestro_ac97_set(iobase, 0x0C, 0x801F);
909
        maestro_ac97_set(iobase, 0x0E, 0x801F);
910
        return 0;
911
}
912
#endif
913
 
914
/* this is very magic, and very slow.. */
915
static void
916
maestro_ac97_reset(int ioaddr, struct pci_dev *pcidev)
917
{
918
        u16 save_68;
919
        u16 w;
920
        u32 vend;
921
 
922
        outw( inw(ioaddr + 0x38) & 0xfffc, ioaddr + 0x38);
923
        outw( inw(ioaddr + 0x3a) & 0xfffc, ioaddr + 0x3a);
924
        outw( inw(ioaddr + 0x3c) & 0xfffc, ioaddr + 0x3c);
925
 
926
        /* reset the first codec */
927
        outw(0x0000,  ioaddr+0x36);
928
        save_68 = inw(ioaddr+0x68);
929
        pci_read_config_word(pcidev, 0x58, &w); /* something magical with gpio and bus arb. */
930
        pci_read_config_dword(pcidev, PCI_SUBSYSTEM_VENDOR_ID, &vend);
931
        if( w & 0x1)
932
                save_68 |= 0x10;
933
        outw(0xfffe, ioaddr + 0x64);    /* tickly gpio 0.. */
934
        outw(0x0001, ioaddr + 0x68);
935
        outw(0x0000, ioaddr + 0x60);
936
        udelay(20);
937
        outw(0x0001, ioaddr + 0x60);
938
        mdelay(20);
939
 
940
        outw(save_68 | 0x1, ioaddr + 0x68);     /* now restore .. */
941
        outw( (inw(ioaddr + 0x38) & 0xfffc)|0x1, ioaddr + 0x38);
942
        outw( (inw(ioaddr + 0x3a) & 0xfffc)|0x1, ioaddr + 0x3a);
943
        outw( (inw(ioaddr + 0x3c) & 0xfffc)|0x1, ioaddr + 0x3c);
944
 
945
        /* now the second codec */
946
        outw(0x0000,  ioaddr+0x36);
947
        outw(0xfff7, ioaddr + 0x64);
948
        save_68 = inw(ioaddr+0x68);
949
        outw(0x0009, ioaddr + 0x68);
950
        outw(0x0001, ioaddr + 0x60);
951
        udelay(20);
952
        outw(0x0009, ioaddr + 0x60);
953
        mdelay(500);    /* .. ouch.. */
954
        outw( inw(ioaddr + 0x38) & 0xfffc, ioaddr + 0x38);
955
        outw( inw(ioaddr + 0x3a) & 0xfffc, ioaddr + 0x3a);
956
        outw( inw(ioaddr + 0x3c) & 0xfffc, ioaddr + 0x3c);
957
 
958
#if 0 /* the loop here needs to be much better if we want it.. */
959
        M_printk("trying software reset\n");
960
        /* try and do a software reset */
961
        outb(0x80|0x7c, ioaddr + 0x30);
962
        for (w=0; ; w++) {
963
                if ((inw(ioaddr+ 0x30) & 1) == 0) {
964
                        if(inb(ioaddr + 0x32) !=0) break;
965
 
966
                        outb(0x80|0x7d, ioaddr + 0x30);
967
                        if (((inw(ioaddr+ 0x30) & 1) == 0) && (inb(ioaddr + 0x32) !=0)) break;
968
                        outb(0x80|0x7f, ioaddr + 0x30);
969
                        if (((inw(ioaddr+ 0x30) & 1) == 0) && (inb(ioaddr + 0x32) !=0)) break;
970
                }
971
 
972
                if( w > 10000) {
973
                        outb( inb(ioaddr + 0x37) | 0x08, ioaddr + 0x37);  /* do a software reset */
974
                        mdelay(500); /* oh my.. */
975
                        outb( inb(ioaddr + 0x37) & ~0x08, ioaddr + 0x37);
976
                        udelay(1);
977
                        outw( 0x80, ioaddr+0x30);
978
                        for(w = 0 ; w < 10000; w++) {
979
                                if((inw(ioaddr + 0x30) & 1) ==0) break;
980
                        }
981
                }
982
        }
983
#endif
984
        if ( vend == NEC_VERSA_SUBID1 || vend == NEC_VERSA_SUBID2) {
985
                /* turn on external amp? */
986
                outw(0xf9ff, ioaddr + 0x64);
987
                outw(inw(ioaddr+0x68) | 0x600, ioaddr + 0x68);
988
                outw(0x0209, ioaddr + 0x60);
989
        }
990
 
991
        /* Turn on the 978 docking chip.
992
           First frob the "master output enable" bit,
993
           then set most of the playback volume control registers to max. */
994
        outb(inb(ioaddr+0xc0)|(1<<5), ioaddr+0xc0);
995
        outb(0xff, ioaddr+0xc3);
996
        outb(0xff, ioaddr+0xc4);
997
        outb(0xff, ioaddr+0xc6);
998
        outb(0xff, ioaddr+0xc8);
999
        outb(0x3f, ioaddr+0xcf);
1000
        outb(0x3f, ioaddr+0xd0);
1001
}
1002
/*
1003
 *      Indirect register access. Not all registers are readable so we
1004
 *      need to keep register state ourselves
1005
 */
1006
 
1007
#define WRITEABLE_MAP   0xEFFFFF
1008
#define READABLE_MAP    0x64003F
1009
 
1010
/*
1011
 *      The Maestro engineers were a little indirection happy. These indirected
1012
 *      registers themselves include indirect registers at another layer
1013
 */
1014
 
1015
static void __maestro_write(struct ess_card *card, u16 reg, u16 data)
1016
{
1017
        long ioaddr = card->iobase;
1018
 
1019
        outw(reg, ioaddr+0x02);
1020
        outw(data, ioaddr+0x00);
1021
        if( reg >= NR_IDRS) printk("maestro: IDR %d out of bounds!\n",reg);
1022
        else card->maestro_map[reg]=data;
1023
 
1024
}
1025
 
1026
static void maestro_write(struct ess_state *s, u16 reg, u16 data)
1027
{
1028
        unsigned long flags;
1029
 
1030
        check_suspend(s->card);
1031
        spin_lock_irqsave(&s->card->lock,flags);
1032
 
1033
        __maestro_write(s->card,reg,data);
1034
 
1035
        spin_unlock_irqrestore(&s->card->lock,flags);
1036
}
1037
 
1038
static u16 __maestro_read(struct ess_card *card, u16 reg)
1039
{
1040
        long ioaddr = card->iobase;
1041
 
1042
        outw(reg, ioaddr+0x02);
1043
        return card->maestro_map[reg]=inw(ioaddr+0x00);
1044
}
1045
 
1046
static u16 maestro_read(struct ess_state *s, u16 reg)
1047
{
1048
        if(READABLE_MAP & (1<<reg))
1049
        {
1050
                unsigned long flags;
1051
                check_suspend(s->card);
1052
                spin_lock_irqsave(&s->card->lock,flags);
1053
 
1054
                __maestro_read(s->card,reg);
1055
 
1056
                spin_unlock_irqrestore(&s->card->lock,flags);
1057
        }
1058
        return s->card->maestro_map[reg];
1059
}
1060
 
1061
/*
1062
 *      These routines handle accessing the second level indirections to the
1063
 *      wave ram.
1064
 */
1065
 
1066
/*
1067
 *      The register names are the ones ESS uses (see 104T31.ZIP)
1068
 */
1069
 
1070
#define IDR0_DATA_PORT          0x00
1071
#define IDR1_CRAM_POINTER       0x01
1072
#define IDR2_CRAM_DATA          0x02
1073
#define IDR3_WAVE_DATA          0x03
1074
#define IDR4_WAVE_PTR_LOW       0x04
1075
#define IDR5_WAVE_PTR_HI        0x05
1076
#define IDR6_TIMER_CTRL         0x06
1077
#define IDR7_WAVE_ROMRAM        0x07
1078
 
1079
static void apu_index_set(struct ess_card *card, u16 index)
1080
{
1081
        int i;
1082
        __maestro_write(card, IDR1_CRAM_POINTER, index);
1083
        for(i=0;i<1000;i++)
1084
                if(__maestro_read(card, IDR1_CRAM_POINTER)==index)
1085
                        return;
1086
        printk(KERN_WARNING "maestro: APU register select failed.\n");
1087
}
1088
 
1089
static void apu_data_set(struct ess_card *card, u16 data)
1090
{
1091
        int i;
1092
        for(i=0;i<1000;i++)
1093
        {
1094
                if(__maestro_read(card, IDR0_DATA_PORT)==data)
1095
                        return;
1096
                __maestro_write(card, IDR0_DATA_PORT, data);
1097
        }
1098
}
1099
 
1100
/*
1101
 *      This is the public interface for APU manipulation. It handles the
1102
 *      interlock to avoid two APU writes in parallel etc. Don't diddle
1103
 *      directly with the stuff above.
1104
 */
1105
 
1106
static void apu_set_register(struct ess_state *s, u16 channel, u8 reg, u16 data)
1107
{
1108
        unsigned long flags;
1109
 
1110
        check_suspend(s->card);
1111
 
1112
        if(channel&ESS_CHAN_HARD)
1113
                channel&=~ESS_CHAN_HARD;
1114
        else
1115
        {
1116
                if(channel>5)
1117
                        printk("BAD CHANNEL %d.\n",channel);
1118
                else
1119
                        channel = s->apu[channel];
1120
                /* store based on real hardware apu/reg */
1121
                s->card->apu_map[channel][reg]=data;
1122
        }
1123
        reg|=(channel<<4);
1124
 
1125
        /* hooray for double indirection!! */
1126
        spin_lock_irqsave(&s->card->lock,flags);
1127
 
1128
        apu_index_set(s->card, reg);
1129
        apu_data_set(s->card, data);
1130
 
1131
        spin_unlock_irqrestore(&s->card->lock,flags);
1132
}
1133
 
1134
static u16 apu_get_register(struct ess_state *s, u16 channel, u8 reg)
1135
{
1136
        unsigned long flags;
1137
        u16 v;
1138
 
1139
        check_suspend(s->card);
1140
 
1141
        if(channel&ESS_CHAN_HARD)
1142
                channel&=~ESS_CHAN_HARD;
1143
        else
1144
                channel = s->apu[channel];
1145
 
1146
        reg|=(channel<<4);
1147
 
1148
        spin_lock_irqsave(&s->card->lock,flags);
1149
 
1150
        apu_index_set(s->card, reg);
1151
        v=__maestro_read(s->card, IDR0_DATA_PORT);
1152
 
1153
        spin_unlock_irqrestore(&s->card->lock,flags);
1154
        return v;
1155
}
1156
 
1157
 
1158
/*
1159
 *      The wavecache buffers between the APUs and
1160
 *      pci bus mastering
1161
 */
1162
 
1163
static void wave_set_register(struct ess_state *s, u16 reg, u16 value)
1164
{
1165
        long ioaddr = s->card->iobase;
1166
        unsigned long flags;
1167
        check_suspend(s->card);
1168
 
1169
        spin_lock_irqsave(&s->card->lock,flags);
1170
 
1171
        outw(reg, ioaddr+0x10);
1172
        outw(value, ioaddr+0x12);
1173
 
1174
        spin_unlock_irqrestore(&s->card->lock,flags);
1175
}
1176
 
1177
static u16 wave_get_register(struct ess_state *s, u16 reg)
1178
{
1179
        long ioaddr = s->card->iobase;
1180
        unsigned long flags;
1181
        u16 value;
1182
        check_suspend(s->card);
1183
 
1184
        spin_lock_irqsave(&s->card->lock,flags);
1185
        outw(reg, ioaddr+0x10);
1186
        value=inw(ioaddr+0x12);
1187
        spin_unlock_irqrestore(&s->card->lock,flags);
1188
 
1189
        return value;
1190
}
1191
 
1192
static void sound_reset(int ioaddr)
1193
{
1194
        outw(0x2000, 0x18+ioaddr);
1195
        udelay(1);
1196
        outw(0x0000, 0x18+ioaddr);
1197
        udelay(1);
1198
}
1199
 
1200
/* sets the play formats of these apus, should be passed the already shifted format */
1201
static void set_apu_fmt(struct ess_state *s, int apu, int mode)
1202
{
1203
        int apu_fmt = 0x10;
1204
 
1205
        if(!(mode&ESS_FMT_16BIT)) apu_fmt+=0x20;
1206
        if((mode&ESS_FMT_STEREO)) apu_fmt+=0x10;
1207
        s->apu_mode[apu]   = apu_fmt;
1208
        s->apu_mode[apu+1] = apu_fmt;
1209
}
1210
 
1211
/* this only fixes the output apu mode to be later set by start_dac and
1212
        company.  output apu modes are set in ess_rec_setup */
1213
static void set_fmt(struct ess_state *s, unsigned char mask, unsigned char data)
1214
{
1215
        s->fmt = (s->fmt & mask) | data;
1216
        set_apu_fmt(s, 0, (s->fmt >> ESS_DAC_SHIFT) & ESS_FMT_MASK);
1217
}
1218
 
1219
/* this is off by a little bit.. */
1220
static u32 compute_rate(struct ess_state *s, u32 freq)
1221
{
1222
        u32 clock = clock_freq[s->card->card_type];
1223
 
1224
        freq = (freq * clocking)/48000;
1225
 
1226
        if (freq == 48000)
1227
                return 0x10000;
1228
 
1229
        return ((freq / clock) <<16 )+
1230
                (((freq % clock) << 16) / clock);
1231
}
1232
 
1233
static void set_dac_rate(struct ess_state *s, unsigned int rate)
1234
{
1235
        u32 freq;
1236
        int fmt = (s->fmt >> ESS_DAC_SHIFT) & ESS_FMT_MASK;
1237
 
1238
        if (rate > 48000)
1239
                rate = 48000;
1240
        if (rate < 4000)
1241
                rate = 4000;
1242
 
1243
        s->ratedac = rate;
1244
 
1245
        if(! (fmt & ESS_FMT_16BIT) && !(fmt & ESS_FMT_STEREO))
1246
                rate >>= 1;
1247
 
1248
/*      M_printk("computing dac rate %d with mode %d\n",rate,s->fmt);*/
1249
 
1250
        freq = compute_rate(s, rate);
1251
 
1252
        /* Load the frequency, turn on 6dB */
1253
        apu_set_register(s, 0, 2,(apu_get_register(s, 0, 2)&0x00FF)|
1254
                ( ((freq&0xFF)<<8)|0x10 ));
1255
        apu_set_register(s, 0, 3, freq>>8);
1256
        apu_set_register(s, 1, 2,(apu_get_register(s, 1, 2)&0x00FF)|
1257
                ( ((freq&0xFF)<<8)|0x10 ));
1258
        apu_set_register(s, 1, 3, freq>>8);
1259
}
1260
 
1261
static void set_adc_rate(struct ess_state *s, unsigned rate)
1262
{
1263
        u32 freq;
1264
 
1265
        /* Sample Rate conversion APUs don't like 0x10000 for their rate */
1266
        if (rate > 47999)
1267
                rate = 47999;
1268
        if (rate < 4000)
1269
                rate = 4000;
1270
 
1271
        s->rateadc = rate;
1272
 
1273
        freq = compute_rate(s, rate);
1274
 
1275
        /* Load the frequency, turn on 6dB */
1276
        apu_set_register(s, 2, 2,(apu_get_register(s, 2, 2)&0x00FF)|
1277
                ( ((freq&0xFF)<<8)|0x10 ));
1278
        apu_set_register(s, 2, 3, freq>>8);
1279
        apu_set_register(s, 3, 2,(apu_get_register(s, 3, 2)&0x00FF)|
1280
                ( ((freq&0xFF)<<8)|0x10 ));
1281
        apu_set_register(s, 3, 3, freq>>8);
1282
 
1283
        /* fix mixer rate at 48khz.  and its _must_ be 0x10000. */
1284
        freq = 0x10000;
1285
 
1286
        apu_set_register(s, 4, 2,(apu_get_register(s, 4, 2)&0x00FF)|
1287
                ( ((freq&0xFF)<<8)|0x10 ));
1288
        apu_set_register(s, 4, 3, freq>>8);
1289
        apu_set_register(s, 5, 2,(apu_get_register(s, 5, 2)&0x00FF)|
1290
                ( ((freq&0xFF)<<8)|0x10 ));
1291
        apu_set_register(s, 5, 3, freq>>8);
1292
}
1293
 
1294
/* Stop our host of recording apus */
1295
static inline void stop_adc(struct ess_state *s)
1296
{
1297
        /* XXX lets hope we don't have to lock around this */
1298
        if (! (s->enable & ADC_RUNNING)) return;
1299
 
1300
        s->enable &= ~ADC_RUNNING;
1301
        apu_set_register(s, 2, 0, apu_get_register(s, 2, 0)&0xFF0F);
1302
        apu_set_register(s, 3, 0, apu_get_register(s, 3, 0)&0xFF0F);
1303
        apu_set_register(s, 4, 0, apu_get_register(s, 2, 0)&0xFF0F);
1304
        apu_set_register(s, 5, 0, apu_get_register(s, 3, 0)&0xFF0F);
1305
}
1306
 
1307
/* stop output apus */
1308
static void stop_dac(struct ess_state *s)
1309
{
1310
        /* XXX have to lock around this? */
1311
        if (! (s->enable & DAC_RUNNING)) return;
1312
 
1313
        s->enable &= ~DAC_RUNNING;
1314
        apu_set_register(s, 0, 0, apu_get_register(s, 0, 0)&0xFF0F);
1315
        apu_set_register(s, 1, 0, apu_get_register(s, 1, 0)&0xFF0F);
1316
}
1317
 
1318
static void start_dac(struct ess_state *s)
1319
{
1320
        /* XXX locks? */
1321
        if (    (s->dma_dac.mapped || s->dma_dac.count > 0) &&
1322
                s->dma_dac.ready &&
1323
                (! (s->enable & DAC_RUNNING)) ) {
1324
 
1325
                s->enable |= DAC_RUNNING;
1326
 
1327
                apu_set_register(s, 0, 0,
1328
                        (apu_get_register(s, 0, 0)&0xFF0F)|s->apu_mode[0]);
1329
 
1330
                if((s->fmt >> ESS_DAC_SHIFT)  & ESS_FMT_STEREO)
1331
                        apu_set_register(s, 1, 0,
1332
                                (apu_get_register(s, 1, 0)&0xFF0F)|s->apu_mode[1]);
1333
        }
1334
}
1335
 
1336
static void start_adc(struct ess_state *s)
1337
{
1338
        /* XXX locks? */
1339
        if ((s->dma_adc.mapped || s->dma_adc.count < (signed)(s->dma_adc.dmasize - 2*s->dma_adc.fragsize))
1340
            && s->dma_adc.ready && (! (s->enable & ADC_RUNNING)) ) {
1341
 
1342
                s->enable |= ADC_RUNNING;
1343
                apu_set_register(s, 2, 0,
1344
                        (apu_get_register(s, 2, 0)&0xFF0F)|s->apu_mode[2]);
1345
                apu_set_register(s, 4, 0,
1346
                        (apu_get_register(s, 4, 0)&0xFF0F)|s->apu_mode[4]);
1347
 
1348
                if( s->fmt & (ESS_FMT_STEREO << ESS_ADC_SHIFT)) {
1349
                        apu_set_register(s, 3, 0,
1350
                                (apu_get_register(s, 3, 0)&0xFF0F)|s->apu_mode[3]);
1351
                        apu_set_register(s, 5, 0,
1352
                                (apu_get_register(s, 5, 0)&0xFF0F)|s->apu_mode[5]);
1353
                }
1354
 
1355
        }
1356
}
1357
 
1358
 
1359
/*
1360
 *      Native play back driver
1361
 */
1362
 
1363
/* the mode passed should be already shifted and masked */
1364
static void
1365
ess_play_setup(struct ess_state *ess, int mode, u32 rate, void *buffer, int size)
1366
{
1367
        u32 pa;
1368
        u32 tmpval;
1369
        int high_apu = 0;
1370
        int channel;
1371
 
1372
        M_printk("mode=%d rate=%d buf=%p len=%d.\n",
1373
                mode, rate, buffer, size);
1374
 
1375
        /* all maestro sizes are in 16bit words */
1376
        size >>=1;
1377
 
1378
        if(mode&ESS_FMT_STEREO) {
1379
                high_apu++;
1380
                /* only 16/stereo gets size divided */
1381
                if(mode&ESS_FMT_16BIT)
1382
                        size>>=1;
1383
        }
1384
 
1385
        for(channel=0; channel <= high_apu; channel++)
1386
        {
1387
                pa = virt_to_bus(buffer);
1388
 
1389
                /* set the wavecache control reg */
1390
                tmpval = (pa - 0x10) & 0xFFF8;
1391
                if(!(mode & ESS_FMT_16BIT)) tmpval |= 4;
1392
                if(mode & ESS_FMT_STEREO) tmpval |= 2;
1393
                ess->apu_base[channel]=tmpval;
1394
                wave_set_register(ess, ess->apu[channel]<<3, tmpval);
1395
 
1396
                pa -= virt_to_bus(ess->card->dmapages);
1397
                pa>>=1; /* words */
1398
 
1399
                /* base offset of dma calcs when reading the pointer
1400
                        on the left one */
1401
                if(!channel) ess->dma_dac.base = pa&0xFFFF;
1402
 
1403
                pa|=0x00400000;                 /* System RAM */
1404
 
1405
                /* XXX the 16bit here might not be needed.. */
1406
                if((mode & ESS_FMT_STEREO) && (mode & ESS_FMT_16BIT)) {
1407
                        if(channel)
1408
                                pa|=0x00800000;                 /* Stereo */
1409
                        pa>>=1;
1410
                }
1411
 
1412
/* XXX think about endianess when writing these registers */
1413
                M_printk("maestro: ess_play_setup: APU[%d] pa = 0x%x\n", ess->apu[channel], pa);
1414
                /* start of sample */
1415
                apu_set_register(ess, channel, 4, ((pa>>16)&0xFF)<<8);
1416
                apu_set_register(ess, channel, 5, pa&0xFFFF);
1417
                /* sample end */
1418
                apu_set_register(ess, channel, 6, (pa+size)&0xFFFF);
1419
                /* setting loop len == sample len */
1420
                apu_set_register(ess, channel, 7, size);
1421
 
1422
                /* clear effects/env.. */
1423
                apu_set_register(ess, channel, 8, 0x0000);
1424
                /* set amp now to 0xd0 (?), low byte is 'amplitude dest'? */
1425
                apu_set_register(ess, channel, 9, 0xD000);
1426
 
1427
                /* clear routing stuff */
1428
                apu_set_register(ess, channel, 11, 0x0000);
1429
                /* dma on, no envelopes, filter to all 1s) */
1430
                apu_set_register(ess, channel, 0, 0x400F);
1431
 
1432
                if(mode&ESS_FMT_16BIT)
1433
                        ess->apu_mode[channel]=0x10;
1434
                else
1435
                        ess->apu_mode[channel]=0x30;
1436
 
1437
                if(mode&ESS_FMT_STEREO) {
1438
                        /* set panning: left or right */
1439
                        apu_set_register(ess, channel, 10, 0x8F00 | (channel ? 0 : 0x10));
1440
                        ess->apu_mode[channel] += 0x10;
1441
                } else
1442
                        apu_set_register(ess, channel, 10, 0x8F08);
1443
        }
1444
 
1445
        /* clear WP interrupts */
1446
        outw(1, ess->card->iobase+0x04);
1447
        /* enable WP ints */
1448
        outw(inw(ess->card->iobase+0x18)|4, ess->card->iobase+0x18);
1449
 
1450
        /* go team! */
1451
        set_dac_rate(ess,rate);
1452
        start_dac(ess);
1453
}
1454
 
1455
/*
1456
 *      Native record driver
1457
 */
1458
 
1459
/* again, passed mode is alrady shifted/masked */
1460
static void
1461
ess_rec_setup(struct ess_state *ess, int mode, u32 rate, void *buffer, int size)
1462
{
1463
        int apu_step = 2;
1464
        int channel;
1465
 
1466
        M_printk("maestro: ess_rec_setup: mode=%d rate=%d buf=0x%p len=%d.\n",
1467
                mode, rate, buffer, size);
1468
 
1469
        /* all maestro sizes are in 16bit words */
1470
        size >>=1;
1471
 
1472
        /* we're given the full size of the buffer, but
1473
        in stereo each channel will only use its half */
1474
        if(mode&ESS_FMT_STEREO) {
1475
                size >>=1;
1476
                apu_step = 1;
1477
        }
1478
 
1479
        /* APU assignments: 2 = mono/left SRC
1480
                            3 = right SRC
1481
                            4 = mono/left Input Mixer
1482
                            5 = right Input Mixer */
1483
        for(channel=2;channel<6;channel+=apu_step)
1484
        {
1485
                int i;
1486
                int bsize, route;
1487
                u32 pa;
1488
                u32 tmpval;
1489
 
1490
                /* data seems to flow from the codec, through an apu into
1491
                        the 'mixbuf' bit of page, then through the SRC apu
1492
                        and out to the real 'buffer'.  ok.  sure.  */
1493
 
1494
                if(channel & 0x04) {
1495
                        /* ok, we're an input mixer going from adc
1496
                                through the mixbuf to the other apus */
1497
 
1498
                        if(!(channel & 0x01)) {
1499
                                pa = virt_to_bus(ess->mixbuf);
1500
                        } else {
1501
                                pa = virt_to_bus(ess->mixbuf + (PAGE_SIZE >> 4));
1502
                        }
1503
 
1504
                        /* we source from a 'magic' apu */
1505
                        bsize = PAGE_SIZE >> 5; /* half of this channels alloc, in words */
1506
                        route = 0x14 + (channel - 4); /* parallel in crap, see maestro reg 0xC [8-11] */
1507
                        ess->apu_mode[channel] = 0x90;  /* Input Mixer */
1508
 
1509
                } else {
1510
                        /* we're a rate converter taking
1511
                                input from the input apus and outputing it to
1512
                                system memory */
1513
                        if(!(channel & 0x01))  {
1514
                                pa = virt_to_bus(buffer);
1515
                        } else {
1516
                                /* right channel records its split half.
1517
                                *2 accomodates for rampant shifting earlier */
1518
                                pa = virt_to_bus(buffer + size*2);
1519
                        }
1520
 
1521
                        ess->apu_mode[channel] = 0xB0;  /* Sample Rate Converter */
1522
 
1523
                        bsize = size;
1524
                        /* get input from inputing apu */
1525
                        route = channel + 2;
1526
                }
1527
 
1528
                M_printk("maestro: ess_rec_setup: getting pa 0x%x from %d\n",pa,channel);
1529
 
1530
                /* set the wavecache control reg */
1531
                tmpval = (pa - 0x10) & 0xFFF8;
1532
                ess->apu_base[channel]=tmpval;
1533
                wave_set_register(ess, ess->apu[channel]<<3, tmpval);
1534
 
1535
                pa -= virt_to_bus(ess->card->dmapages);
1536
                pa>>=1; /* words */
1537
 
1538
                /* base offset of dma calcs when reading the pointer
1539
                        on this left one */
1540
                if(channel==2) ess->dma_adc.base = pa&0xFFFF;
1541
 
1542
                pa|=0x00400000;                 /* bit 22 -> System RAM */
1543
 
1544
                M_printk("maestro: ess_rec_setup: APU[%d] pa = 0x%x size = 0x%x route = 0x%x\n",
1545
                        ess->apu[channel], pa, bsize, route);
1546
 
1547
                /* Begin loading the APU */
1548
                for(i=0;i<15;i++)                /* clear all PBRs */
1549
                        apu_set_register(ess, channel, i, 0x0000);
1550
 
1551
                apu_set_register(ess, channel, 0, 0x400F);
1552
 
1553
                /* need to enable subgroups.. and we should probably
1554
                        have different groups for different /dev/dsps..  */
1555
                apu_set_register(ess, channel, 2, 0x8);
1556
 
1557
                /* Load the buffer into the wave engine */
1558
                apu_set_register(ess, channel, 4, ((pa>>16)&0xFF)<<8);
1559
                /* XXX reg is little endian.. */
1560
                apu_set_register(ess, channel, 5, pa&0xFFFF);
1561
                apu_set_register(ess, channel, 6, (pa+bsize)&0xFFFF);
1562
                apu_set_register(ess, channel, 7, bsize);
1563
 
1564
                /* clear effects/env.. */
1565
                apu_set_register(ess, channel, 8, 0x00F0);
1566
 
1567
                /* amplitude now?  sure.  why not.  */
1568
                apu_set_register(ess, channel, 9, 0x0000);
1569
 
1570
                /* set filter tune, radius, polar pan */
1571
                apu_set_register(ess, channel, 10, 0x8F08);
1572
 
1573
                /* route input */
1574
                apu_set_register(ess, channel, 11, route);
1575
        }
1576
 
1577
        /* clear WP interrupts */
1578
        outw(1, ess->card->iobase+0x04);
1579
        /* enable WP ints */
1580
        outw(inw(ess->card->iobase+0x18)|4, ess->card->iobase+0x18);
1581
 
1582
        /* let 'er rip */
1583
        set_adc_rate(ess,rate);
1584
        start_adc(ess);
1585
}
1586
/* --------------------------------------------------------------------- */
1587
 
1588
static void set_dmaa(struct ess_state *s, unsigned int addr, unsigned int count)
1589
{
1590
        M_printk("set_dmaa??\n");
1591
}
1592
 
1593
static void set_dmac(struct ess_state *s, unsigned int addr, unsigned int count)
1594
{
1595
        M_printk("set_dmac??\n");
1596
}
1597
 
1598
/* Playback pointer */
1599
static inline unsigned get_dmaa(struct ess_state *s)
1600
{
1601
        int offset;
1602
 
1603
        offset = apu_get_register(s,0,5);
1604
 
1605
/*      M_printk("dmaa: offset: %d, base: %d\n",offset,s->dma_dac.base); */
1606
 
1607
        offset-=s->dma_dac.base;
1608
 
1609
        return (offset&0xFFFE)<<1; /* hardware is in words */
1610
}
1611
 
1612
/* Record pointer */
1613
static inline unsigned get_dmac(struct ess_state *s)
1614
{
1615
        int offset;
1616
 
1617
        offset = apu_get_register(s,2,5);
1618
 
1619
/*      M_printk("dmac: offset: %d, base: %d\n",offset,s->dma_adc.base); */
1620
 
1621
        /* The offset is an address not a position relative to base */
1622
        offset-=s->dma_adc.base;
1623
 
1624
        return (offset&0xFFFE)<<1; /* hardware is in words */
1625
}
1626
 
1627
/*
1628
 *      Meet Bob, the timer...
1629
 */
1630
 
1631
static void ess_interrupt(int irq, void *dev_id, struct pt_regs *regs);
1632
 
1633
static void stop_bob(struct ess_state *s)
1634
{
1635
        /* Mask IDR 11,17 */
1636
        maestro_write(s,  0x11, maestro_read(s, 0x11)&~1);
1637
        maestro_write(s,  0x17, maestro_read(s, 0x17)&~1);
1638
}
1639
 
1640
/* eventually we could be clever and limit bob ints
1641
        to the frequency at which our smallest duration
1642
        chunks may expire */
1643
#define ESS_SYSCLK      50000000
1644
static void start_bob(struct ess_state *s)
1645
{
1646
        int prescale;
1647
        int divide;
1648
 
1649
        /* XXX make freq selector much smarter, see calc_bob_rate */
1650
        int freq = 200;
1651
 
1652
        /* compute ideal interrupt frequency for buffer size & play rate */
1653
        /* first, find best prescaler value to match freq */
1654
        for(prescale=5;prescale<12;prescale++)
1655
                if(freq > (ESS_SYSCLK>>(prescale+9)))
1656
                        break;
1657
 
1658
        /* next, back off prescaler whilst getting divider into optimum range */
1659
        divide=1;
1660
        while((prescale > 5) && (divide<32))
1661
        {
1662
                prescale--;
1663
                divide <<=1;
1664
        }
1665
        divide>>=1;
1666
 
1667
        /* now fine-tune the divider for best match */
1668
        for(;divide<31;divide++)
1669
                if(freq >= ((ESS_SYSCLK>>(prescale+9))/(divide+1)))
1670
                        break;
1671
 
1672
        /* divide = 0 is illegal, but don't let prescale = 4! */
1673
        if(divide == 0)
1674
        {
1675
                divide++;
1676
                if(prescale>5)
1677
                        prescale--;
1678
        }
1679
 
1680
        maestro_write(s, 6, 0x9000 | (prescale<<5) | divide); /* set reg */
1681
 
1682
        /* Now set IDR 11/17 */
1683
        maestro_write(s, 0x11, maestro_read(s, 0x11)|1);
1684
        maestro_write(s, 0x17, maestro_read(s, 0x17)|1);
1685
}
1686
/* --------------------------------------------------------------------- */
1687
 
1688
/* this quickly calculates the frequency needed for bob
1689
        and sets it if its different than what bob is
1690
        currently running at.  its called often so
1691
        needs to be fairly quick. */
1692
#define BOB_MIN 50
1693
#define BOB_MAX 400
1694
static void calc_bob_rate(struct ess_state *s) {
1695
#if 0 /* this thing tries to set the frequency of bob such that
1696
        there are 2 interrupts / buffer walked by the dac/adc.  That
1697
        is probably very wrong for people who actually care about
1698
        mid buffer positioning.  it should be calculated as bytes/interrupt
1699
        and that needs to be decided :)  so for now just use the static 150
1700
        in start_bob.*/
1701
 
1702
        unsigned int dac_rate=2,adc_rate=1,newrate;
1703
        static int israte=-1;
1704
 
1705
        if (s->dma_dac.fragsize == 0) dac_rate = BOB_MIN;
1706
        else  {
1707
                dac_rate =      (2 * s->ratedac * sample_size[(s->fmt >> ESS_DAC_SHIFT) & ESS_FMT_MASK]) /
1708
                                (s->dma_dac.fragsize) ;
1709
        }
1710
 
1711
        if (s->dma_adc.fragsize == 0) adc_rate = BOB_MIN;
1712
        else {
1713
                adc_rate =      (2 * s->rateadc * sample_size[(s->fmt >> ESS_DAC_SHIFT) & ESS_FMT_MASK]) /
1714
                                (s->dma_adc.fragsize) ;
1715
        }
1716
 
1717
        if(dac_rate > adc_rate) newrate = adc_rate;
1718
        else newrate=dac_rate;
1719
 
1720
        if(newrate > BOB_MAX) newrate = BOB_MAX;
1721
        else {
1722
                if(newrate < BOB_MIN)
1723
                        newrate = BOB_MIN;
1724
        }
1725
 
1726
        if( israte != newrate) {
1727
                printk("dac: %d  adc: %d rate: %d\n",dac_rate,adc_rate,israte);
1728
                israte=newrate;
1729
        }
1730
#endif
1731
 
1732
}
1733
 
1734
static int
1735
prog_dmabuf(struct ess_state *s, unsigned rec)
1736
{
1737
        struct dmabuf *db = rec ? &s->dma_adc : &s->dma_dac;
1738
        unsigned rate = rec ? s->rateadc : s->ratedac;
1739
        unsigned bytepersec;
1740
        unsigned bufs;
1741
        unsigned char fmt;
1742
        unsigned long flags;
1743
 
1744
        spin_lock_irqsave(&s->lock, flags);
1745
        fmt = s->fmt;
1746
        if (rec) {
1747
                stop_adc(s);
1748
                fmt >>= ESS_ADC_SHIFT;
1749
        } else {
1750
                stop_dac(s);
1751
                fmt >>= ESS_DAC_SHIFT;
1752
        }
1753
        spin_unlock_irqrestore(&s->lock, flags);
1754
        fmt &= ESS_FMT_MASK;
1755
 
1756
        db->hwptr = db->swptr = db->total_bytes = db->count = db->error = db->endcleared = 0;
1757
 
1758
        /* this algorithm is a little nuts.. where did /1000 come from? */
1759
        bytepersec = rate << sample_shift[fmt];
1760
        bufs = PAGE_SIZE << db->buforder;
1761
        if (db->ossfragshift) {
1762
                if ((1000 << db->ossfragshift) < bytepersec)
1763
                        db->fragshift = ld2(bytepersec/1000);
1764
                else
1765
                        db->fragshift = db->ossfragshift;
1766
        } else {
1767
                db->fragshift = ld2(bytepersec/100/(db->subdivision ? db->subdivision : 1));
1768
                if (db->fragshift < 3)
1769
                        db->fragshift = 3;
1770
        }
1771
        db->numfrag = bufs >> db->fragshift;
1772
        while (db->numfrag < 4 && db->fragshift > 3) {
1773
                db->fragshift--;
1774
                db->numfrag = bufs >> db->fragshift;
1775
        }
1776
        db->fragsize = 1 << db->fragshift;
1777
        if (db->ossmaxfrags >= 4 && db->ossmaxfrags < db->numfrag)
1778
                db->numfrag = db->ossmaxfrags;
1779
        db->fragsamples = db->fragsize >> sample_shift[fmt];
1780
        db->dmasize = db->numfrag << db->fragshift;
1781
 
1782
        M_printk("maestro: setup oss: numfrag: %d fragsize: %d dmasize: %d\n",db->numfrag,db->fragsize,db->dmasize);
1783
 
1784
        memset(db->rawbuf, (fmt & ESS_FMT_16BIT) ? 0 : 0x80, db->dmasize);
1785
 
1786
        spin_lock_irqsave(&s->lock, flags);
1787
        if (rec)
1788
                ess_rec_setup(s, fmt, s->rateadc, db->rawbuf, db->dmasize);
1789
        else
1790
                ess_play_setup(s, fmt, s->ratedac, db->rawbuf, db->dmasize);
1791
 
1792
        spin_unlock_irqrestore(&s->lock, flags);
1793
        db->ready = 1;
1794
 
1795
        return 0;
1796
}
1797
 
1798
static __inline__ void
1799
clear_advance(struct ess_state *s)
1800
{
1801
        unsigned char c = ((s->fmt >> ESS_DAC_SHIFT) & ESS_FMT_16BIT) ? 0 : 0x80;
1802
 
1803
        unsigned char *buf = s->dma_dac.rawbuf;
1804
        unsigned bsize = s->dma_dac.dmasize;
1805
        unsigned bptr = s->dma_dac.swptr;
1806
        unsigned len = s->dma_dac.fragsize;
1807
 
1808
        if (bptr + len > bsize) {
1809
                unsigned x = bsize - bptr;
1810
                memset(buf + bptr, c, x);
1811
                /* account for wrapping? */
1812
                bptr = 0;
1813
                len -= x;
1814
        }
1815
        memset(buf + bptr, c, len);
1816
}
1817
 
1818
/* call with spinlock held! */
1819
static void
1820
ess_update_ptr(struct ess_state *s)
1821
{
1822
        unsigned hwptr;
1823
        int diff;
1824
 
1825
        /* update ADC pointer */
1826
        if (s->dma_adc.ready) {
1827
                /* oh boy should this all be re-written.  everything in the current code paths think
1828
                that the various counters/pointers are expressed in bytes to the user but we have
1829
                two apus doing stereo stuff so we fix it up here.. it propogates to all the various
1830
                counters from here.  */
1831
                if ( s->fmt & (ESS_FMT_STEREO << ESS_ADC_SHIFT)) {
1832
                        hwptr = (get_dmac(s)*2) % s->dma_adc.dmasize;
1833
                } else {
1834
                        hwptr = get_dmac(s) % s->dma_adc.dmasize;
1835
                }
1836
                diff = (s->dma_adc.dmasize + hwptr - s->dma_adc.hwptr) % s->dma_adc.dmasize;
1837
                s->dma_adc.hwptr = hwptr;
1838
                s->dma_adc.total_bytes += diff;
1839
                s->dma_adc.count += diff;
1840
                if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
1841
                        wake_up(&s->dma_adc.wait);
1842
                if (!s->dma_adc.mapped) {
1843
                        if (s->dma_adc.count > (signed)(s->dma_adc.dmasize - ((3 * s->dma_adc.fragsize) >> 1))) {
1844
                                /* FILL ME
1845
                                wrindir(s, SV_CIENABLE, s->enable); */
1846
                                stop_adc(s);
1847
                                /* brute force everyone back in sync, sigh */
1848
                                s->dma_adc.count = 0;
1849
                                s->dma_adc.swptr = 0;
1850
                                s->dma_adc.hwptr = 0;
1851
                                s->dma_adc.error++;
1852
                        }
1853
                }
1854
        }
1855
        /* update DAC pointer */
1856
        if (s->dma_dac.ready) {
1857
                hwptr = get_dmaa(s) % s->dma_dac.dmasize;
1858
                /* the apu only reports the length it has seen, not the
1859
                        length of the memory that has been used (the WP
1860
                        knows that) */
1861
                if ( ((s->fmt >> ESS_DAC_SHIFT) & ESS_FMT_MASK) == (ESS_FMT_STEREO|ESS_FMT_16BIT))
1862
                        hwptr<<=1;
1863
 
1864
                diff = (s->dma_dac.dmasize + hwptr - s->dma_dac.hwptr) % s->dma_dac.dmasize;
1865
/*              M_printk("updating dac: hwptr: %d diff: %d\n",hwptr,diff);*/
1866
                s->dma_dac.hwptr = hwptr;
1867
                s->dma_dac.total_bytes += diff;
1868
                if (s->dma_dac.mapped) {
1869
                        s->dma_dac.count += diff;
1870
                        if (s->dma_dac.count >= (signed)s->dma_dac.fragsize) {
1871
                                wake_up(&s->dma_dac.wait);
1872
                        }
1873
                } else {
1874
                        s->dma_dac.count -= diff;
1875
/*                      M_printk("maestro: ess_update_ptr: diff: %d, count: %d\n", diff, s->dma_dac.count); */
1876
                        if (s->dma_dac.count <= 0) {
1877
                                M_printk("underflow! diff: %d count: %d hw: %d sw: %d\n", diff, s->dma_dac.count,
1878
                                        hwptr, s->dma_dac.swptr);
1879
                                /* FILL ME
1880
                                wrindir(s, SV_CIENABLE, s->enable); */
1881
                                /* XXX how on earth can calling this with the lock held work.. */
1882
                                stop_dac(s);
1883
                                /* brute force everyone back in sync, sigh */
1884
                                s->dma_dac.count = 0;
1885
                                s->dma_dac.swptr = hwptr;
1886
                                s->dma_dac.error++;
1887
                        } else if (s->dma_dac.count <= (signed)s->dma_dac.fragsize && !s->dma_dac.endcleared) {
1888
                                clear_advance(s);
1889
                                s->dma_dac.endcleared = 1;
1890
                        }
1891
                        if (s->dma_dac.count + (signed)s->dma_dac.fragsize <= (signed)s->dma_dac.dmasize) {
1892
                                wake_up(&s->dma_dac.wait);
1893
/*                              printk("waking up DAC count: %d sw: %d hw: %d\n",s->dma_dac.count, s->dma_dac.swptr,
1894
                                        hwptr);*/
1895
                        }
1896
                }
1897
        }
1898
}
1899
 
1900
static void
1901
ess_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1902
{
1903
        struct ess_state *s;
1904
        struct ess_card *c = (struct ess_card *)dev_id;
1905
        int i;
1906
        u32 event;
1907
 
1908
        if ( ! (event = inb(c->iobase+0x1A)) ) return;
1909
 
1910
        outw(inw(c->iobase+4)&1, c->iobase+4);
1911
 
1912
/*      M_printk("maestro int: %x\n",event);*/
1913
        if(event&(1<<6))
1914
        {
1915
                int x;
1916
                enum {UP_EVT, DOWN_EVT, MUTE_EVT} vol_evt;
1917
                int volume;
1918
 
1919
                /* Figure out which volume control button was pushed,
1920
                   based on differences from the default register
1921
                   values. */
1922
                x = inb(c->iobase+0x1c);
1923
                if (x&1) vol_evt = MUTE_EVT;
1924
                else if (((x>>1)&7) > 4) vol_evt = UP_EVT;
1925
                else vol_evt = DOWN_EVT;
1926
 
1927
                /* Reset the volume control registers. */
1928
                outb(0x88, c->iobase+0x1c);
1929
                outb(0x88, c->iobase+0x1d);
1930
                outb(0x88, c->iobase+0x1e);
1931
                outb(0x88, c->iobase+0x1f);
1932
 
1933
                /* Deal with the button press in a hammer-handed
1934
                   manner by adjusting the master mixer volume. */
1935
                volume = c->mix.mixer_state[0] & 0xff;
1936
                if (vol_evt == UP_EVT) {
1937
                        volume += 10;
1938
                        if (volume > 100)
1939
                                volume = 100;
1940
                }
1941
                else if (vol_evt == DOWN_EVT) {
1942
                        volume -= 10;
1943
                        if (volume < 0)
1944
                                volume = 0;
1945
                } else {
1946
                        /* vol_evt == MUTE_EVT */
1947
                        if (volume == 0)
1948
                                volume = c->dock_mute_vol;
1949
                        else {
1950
                                c->dock_mute_vol = volume;
1951
                                volume = 0;
1952
                        }
1953
                }
1954
                set_mixer (c, 0, (volume << 8) | volume);
1955
        }
1956
 
1957
        /* Ack all the interrupts. */
1958
        outb(0xFF, c->iobase+0x1A);
1959
 
1960
        /*
1961
         *      Update the pointers for all APU's we are running.
1962
         */
1963
        for(i=0;i<NR_DSPS;i++)
1964
        {
1965
                s=&c->channels[i];
1966
                if(s->dev_audio == -1)
1967
                        break;
1968
                spin_lock(&s->lock);
1969
                ess_update_ptr(s);
1970
                spin_unlock(&s->lock);
1971
        }
1972
}
1973
 
1974
 
1975
/* --------------------------------------------------------------------- */
1976
 
1977
static const char invalid_magic[] = KERN_CRIT "maestro: invalid magic value in %s\n";
1978
 
1979
#define VALIDATE_MAGIC(FOO,MAG)                         \
1980
({                                                \
1981
        if (!(FOO) || (FOO)->magic != MAG) { \
1982
                printk(invalid_magic,__FUNCTION__);            \
1983
                return -ENXIO;                    \
1984
        }                                         \
1985
})
1986
 
1987
#define VALIDATE_STATE(a) VALIDATE_MAGIC(a,ESS_STATE_MAGIC)
1988
#define VALIDATE_CARD(a) VALIDATE_MAGIC(a,ESS_CARD_MAGIC)
1989
 
1990
static void set_mixer(struct ess_card *card,unsigned int mixer, unsigned int val )
1991
{
1992
        unsigned int left,right;
1993
        /* cleanse input a little */
1994
        right = ((val >> 8)  & 0xff) ;
1995
        left = (val  & 0xff) ;
1996
 
1997
        if(right > 100) right = 100;
1998
        if(left > 100) left = 100;
1999
 
2000
        card->mix.mixer_state[mixer]=(right << 8) | left;
2001
        card->mix.write_mixer(card,mixer,left,right);
2002
}
2003
 
2004
static void
2005
mixer_push_state(struct ess_card *card)
2006
{
2007
        int i;
2008
        for(i = 0 ; i < SOUND_MIXER_NRDEVICES ; i++) {
2009
                if( ! supported_mixer(card,i)) continue;
2010
 
2011
                set_mixer(card,i,card->mix.mixer_state[i]);
2012
        }
2013
}
2014
 
2015
static int mixer_ioctl(struct ess_card *card, unsigned int cmd, unsigned long arg)
2016
{
2017
        int i, val=0;
2018
       unsigned long flags;
2019
 
2020
        VALIDATE_CARD(card);
2021
        if (cmd == SOUND_MIXER_INFO) {
2022
                mixer_info info;
2023
                strncpy(info.id, card_names[card->card_type], sizeof(info.id));
2024
                strncpy(info.name,card_names[card->card_type],sizeof(info.name));
2025
                info.modify_counter = card->mix.modcnt;
2026
                if (copy_to_user((void *)arg, &info, sizeof(info)))
2027
                        return -EFAULT;
2028
                return 0;
2029
        }
2030
        if (cmd == SOUND_OLD_MIXER_INFO) {
2031
                _old_mixer_info info;
2032
                strncpy(info.id, card_names[card->card_type], sizeof(info.id));
2033
                strncpy(info.name,card_names[card->card_type],sizeof(info.name));
2034
                if (copy_to_user((void *)arg, &info, sizeof(info)))
2035
                        return -EFAULT;
2036
                return 0;
2037
        }
2038
        if (cmd == OSS_GETVERSION)
2039
                return put_user(SOUND_VERSION, (int *)arg);
2040
 
2041
        if (_IOC_TYPE(cmd) != 'M' || _IOC_SIZE(cmd) != sizeof(int))
2042
                return -EINVAL;
2043
 
2044
        if (_IOC_DIR(cmd) == _IOC_READ) {
2045
                switch (_IOC_NR(cmd)) {
2046
                case SOUND_MIXER_RECSRC: /* give them the current record source */
2047
 
2048
                        if(!card->mix.recmask_io) {
2049
                                val = 0;
2050
                        } else {
2051
                               spin_lock_irqsave(&card->lock, flags);
2052
                                val = card->mix.recmask_io(card,1,0);
2053
                               spin_unlock_irqrestore(&card->lock, flags);
2054
                        }
2055
                        break;
2056
 
2057
                case SOUND_MIXER_DEVMASK: /* give them the supported mixers */
2058
                        val = card->mix.supported_mixers;
2059
                        break;
2060
 
2061
                case SOUND_MIXER_RECMASK: /* Arg contains a bit for each supported recording source */
2062
                        val = card->mix.record_sources;
2063
                        break;
2064
 
2065
                case SOUND_MIXER_STEREODEVS: /* Mixer channels supporting stereo */
2066
                        val = card->mix.stereo_mixers;
2067
                        break;
2068
 
2069
                case SOUND_MIXER_CAPS:
2070
                        val = SOUND_CAP_EXCL_INPUT;
2071
                        break;
2072
 
2073
                default: /* read a specific mixer */
2074
                        i = _IOC_NR(cmd);
2075
 
2076
                        if ( ! supported_mixer(card,i))
2077
                                return -EINVAL;
2078
 
2079
                        /* do we ever want to touch the hardware? */
2080
/*                     spin_lock_irqsave(&card->lock, flags);
2081
                        val = card->mix.read_mixer(card,i);
2082
                       spin_unlock_irqrestore(&card->lock, flags);*/
2083
 
2084
                        val = card->mix.mixer_state[i];
2085
/*                      M_printk("returned 0x%x for mixer %d\n",val,i);*/
2086
 
2087
                        break;
2088
                }
2089
                return put_user(val,(int *)arg);
2090
        }
2091
 
2092
        if (_IOC_DIR(cmd) != (_IOC_WRITE|_IOC_READ))
2093
                return -EINVAL;
2094
 
2095
        card->mix.modcnt++;
2096
 
2097
        if (get_user(val, (int *)arg))
2098
                return -EFAULT;
2099
 
2100
        switch (_IOC_NR(cmd)) {
2101
        case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
2102
 
2103
                if (!card->mix.recmask_io) return -EINVAL;
2104
                if(!val) return 0;
2105
                if(! (val &= card->mix.record_sources)) return -EINVAL;
2106
 
2107
               spin_lock_irqsave(&card->lock, flags);
2108
                card->mix.recmask_io(card,0,val);
2109
               spin_unlock_irqrestore(&card->lock, flags);
2110
                return 0;
2111
 
2112
        default:
2113
                i = _IOC_NR(cmd);
2114
 
2115
                if ( ! supported_mixer(card,i))
2116
                        return -EINVAL;
2117
 
2118
               spin_lock_irqsave(&card->lock, flags);
2119
                set_mixer(card,i,val);
2120
               spin_unlock_irqrestore(&card->lock, flags);
2121
 
2122
                return 0;
2123
        }
2124
}
2125
 
2126
/* --------------------------------------------------------------------- */
2127
static int ess_open_mixdev(struct inode *inode, struct file *file)
2128
{
2129
        int minor = MINOR(inode->i_rdev);
2130
        struct ess_card *card = NULL;
2131
        struct pci_dev *pdev;
2132
        struct pci_driver *drvr;
2133
 
2134
        pci_for_each_dev(pdev) {
2135
                drvr = pci_dev_driver (pdev);
2136
                if (drvr == &maestro_pci_driver) {
2137
                        card = (struct ess_card*)pci_get_drvdata (pdev);
2138
                        if (!card)
2139
                                continue;
2140
                        if (card->dev_mixer == minor)
2141
                                break;
2142
                }
2143
        }
2144
        if (!card)
2145
                return -ENODEV;
2146
        file->private_data = card;
2147
        return 0;
2148
}
2149
 
2150
static int ess_release_mixdev(struct inode *inode, struct file *file)
2151
{
2152
        struct ess_card *card = (struct ess_card *)file->private_data;
2153
 
2154
        VALIDATE_CARD(card);
2155
 
2156
        return 0;
2157
}
2158
 
2159
static int ess_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
2160
{
2161
        struct ess_card *card = (struct ess_card *)file->private_data;
2162
 
2163
        VALIDATE_CARD(card);
2164
 
2165
        return mixer_ioctl(card, cmd, arg);
2166
}
2167
 
2168
static /*const*/ struct file_operations ess_mixer_fops = {
2169
        owner:          THIS_MODULE,
2170
        llseek:         no_llseek,
2171
        ioctl:          ess_ioctl_mixdev,
2172
        open:           ess_open_mixdev,
2173
        release:        ess_release_mixdev,
2174
};
2175
 
2176
/* --------------------------------------------------------------------- */
2177
 
2178
static int drain_dac(struct ess_state *s, int nonblock)
2179
{
2180
        DECLARE_WAITQUEUE(wait,current);
2181
        unsigned long flags;
2182
        int count;
2183
        signed long tmo;
2184
 
2185
        if (s->dma_dac.mapped || !s->dma_dac.ready)
2186
                return 0;
2187
        current->state = TASK_INTERRUPTIBLE;
2188
        add_wait_queue(&s->dma_dac.wait, &wait);
2189
        for (;;) {
2190
                /* XXX uhm.. questionable locking*/
2191
                spin_lock_irqsave(&s->lock, flags);
2192
                count = s->dma_dac.count;
2193
                spin_unlock_irqrestore(&s->lock, flags);
2194
                if (count <= 0)
2195
                        break;
2196
                if (signal_pending(current))
2197
                        break;
2198
                if (nonblock) {
2199
                        remove_wait_queue(&s->dma_dac.wait, &wait);
2200
                        current->state = TASK_RUNNING;
2201
                        return -EBUSY;
2202
                }
2203
                tmo = (count * HZ) / s->ratedac;
2204
                tmo >>= sample_shift[(s->fmt >> ESS_DAC_SHIFT) & ESS_FMT_MASK];
2205
                /* XXX this is just broken.  someone is waking us up alot, or schedule_timeout is broken.
2206
                        or something.  who cares. - zach */
2207
                if (!schedule_timeout(tmo ? tmo : 1) && tmo)
2208
                        M_printk(KERN_DEBUG "maestro: dma timed out?? %ld\n",jiffies);
2209
        }
2210
        remove_wait_queue(&s->dma_dac.wait, &wait);
2211
        current->state = TASK_RUNNING;
2212
        if (signal_pending(current))
2213
                return -ERESTARTSYS;
2214
        return 0;
2215
}
2216
 
2217
/* --------------------------------------------------------------------- */
2218
/* Zach sez: "god this is gross.." */
2219
static int
2220
comb_stereo(unsigned char *real_buffer,unsigned char  *tmp_buffer, int offset,
2221
        int count, int bufsize)
2222
{
2223
        /* No such thing as stereo recording, so we
2224
        use dual input mixers.  which means we have to
2225
        combine mono to stereo buffer.  yuck.
2226
 
2227
        but we don't have to be able to work a byte at a time..*/
2228
 
2229
        unsigned char *so,*left,*right;
2230
        int i;
2231
 
2232
        so = tmp_buffer;
2233
        left = real_buffer + offset;
2234
        right = real_buffer + bufsize/2 + offset;
2235
 
2236
/*      M_printk("comb_stereo writing %d to %p from %p and %p, offset: %d size: %d\n",count/2, tmp_buffer,left,right,offset,bufsize);*/
2237
 
2238
        for(i=count/4; i ; i--) {
2239
                (*(so+2)) = *(right++);
2240
                (*(so+3)) = *(right++);
2241
                (*so) = *(left++);
2242
                (*(so+1)) = *(left++);
2243
                so+=4;
2244
        }
2245
 
2246
        return 0;
2247
}
2248
 
2249
/* in this loop, dma_adc.count signifies the amount of data thats waiting
2250
        to be copied to the user's buffer.  it is filled by the interrupt
2251
        handler and drained by this loop. */
2252
static ssize_t
2253
ess_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
2254
{
2255
        struct ess_state *s = (struct ess_state *)file->private_data;
2256
        ssize_t ret;
2257
        unsigned long flags;
2258
        unsigned swptr;
2259
        int cnt;
2260
        unsigned char *combbuf = NULL;
2261
 
2262
        VALIDATE_STATE(s);
2263
        if (ppos != &file->f_pos)
2264
                return -ESPIPE;
2265
        if (s->dma_adc.mapped)
2266
                return -ENXIO;
2267
        if (!s->dma_adc.ready && (ret = prog_dmabuf(s, 1)))
2268
                return ret;
2269
        if (!access_ok(VERIFY_WRITE, buffer, count))
2270
                return -EFAULT;
2271
        if(!(combbuf = kmalloc(count,GFP_KERNEL)))
2272
                return -ENOMEM;
2273
        ret = 0;
2274
 
2275
        calc_bob_rate(s);
2276
 
2277
        while (count > 0) {
2278
                spin_lock_irqsave(&s->lock, flags);
2279
                /* remember, all these things are expressed in bytes to be
2280
                        sent to the user.. hence the evil / 2 down below */
2281
                swptr = s->dma_adc.swptr;
2282
                cnt = s->dma_adc.dmasize-swptr;
2283
                if (s->dma_adc.count < cnt)
2284
                        cnt = s->dma_adc.count;
2285
                spin_unlock_irqrestore(&s->lock, flags);
2286
 
2287
                if (cnt > count)
2288
                        cnt = count;
2289
 
2290
                if ( cnt > 0 ) cnt &= ~3;
2291
 
2292
                if (cnt <= 0) {
2293
                        start_adc(s);
2294
                        if (file->f_flags & O_NONBLOCK)
2295
                        {
2296
                                ret = ret ? ret : -EAGAIN;
2297
                                goto rec_return_free;
2298
                        }
2299
                        if (!interruptible_sleep_on_timeout(&s->dma_adc.wait, HZ)) {
2300
                                if(! s->card->in_suspend) printk(KERN_DEBUG "maestro: read: chip lockup? dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
2301
                                       s->dma_adc.dmasize, s->dma_adc.fragsize, s->dma_adc.count,
2302
                                       s->dma_adc.hwptr, s->dma_adc.swptr);
2303
                                stop_adc(s);
2304
                                spin_lock_irqsave(&s->lock, flags);
2305
                                set_dmac(s, virt_to_bus(s->dma_adc.rawbuf), s->dma_adc.numfrag << s->dma_adc.fragshift);
2306
                                /* program enhanced mode registers */
2307
                                /* FILL ME */
2308
/*                              wrindir(s, SV_CIDMACBASECOUNT1, (s->dma_adc.fragsamples-1) >> 8);
2309
                                wrindir(s, SV_CIDMACBASECOUNT0, s->dma_adc.fragsamples-1); */
2310
                                s->dma_adc.count = s->dma_adc.hwptr = s->dma_adc.swptr = 0;
2311
                                spin_unlock_irqrestore(&s->lock, flags);
2312
                        }
2313
                        if (signal_pending(current))
2314
                        {
2315
                                ret = ret ? ret : -ERESTARTSYS;
2316
                                goto rec_return_free;
2317
                        }
2318
                        continue;
2319
                }
2320
 
2321
                if(s->fmt & (ESS_FMT_STEREO << ESS_ADC_SHIFT)) {
2322
                        /* swptr/2 so that we know the real offset in each apu's buffer */
2323
                        comb_stereo(s->dma_adc.rawbuf,combbuf,swptr/2,cnt,s->dma_adc.dmasize);
2324
                        if (copy_to_user(buffer, combbuf, cnt)) {
2325
                                ret = ret ? ret : -EFAULT;
2326
                                goto rec_return_free;
2327
                        }
2328
                } else  {
2329
                        if (copy_to_user(buffer, s->dma_adc.rawbuf + swptr, cnt)) {
2330
                                ret = ret ? ret : -EFAULT;
2331
                                goto rec_return_free;
2332
                        }
2333
                }
2334
 
2335
                swptr = (swptr + cnt) % s->dma_adc.dmasize;
2336
                spin_lock_irqsave(&s->lock, flags);
2337
                s->dma_adc.swptr = swptr;
2338
                s->dma_adc.count -= cnt;
2339
                spin_unlock_irqrestore(&s->lock, flags);
2340
                count -= cnt;
2341
                buffer += cnt;
2342
                ret += cnt;
2343
                start_adc(s);
2344
        }
2345
 
2346
rec_return_free:
2347
        if(combbuf) kfree(combbuf);
2348
        return ret;
2349
}
2350
 
2351
static ssize_t
2352
ess_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
2353
{
2354
        struct ess_state *s = (struct ess_state *)file->private_data;
2355
        ssize_t ret;
2356
        unsigned long flags;
2357
        unsigned swptr;
2358
        int cnt;
2359
 
2360
        VALIDATE_STATE(s);
2361
        if (ppos != &file->f_pos)
2362
                return -ESPIPE;
2363
        if (s->dma_dac.mapped)
2364
                return -ENXIO;
2365
        if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0)))
2366
                return ret;
2367
        if (!access_ok(VERIFY_READ, buffer, count))
2368
                return -EFAULT;
2369
        ret = 0;
2370
 
2371
        calc_bob_rate(s);
2372
 
2373
        while (count > 0) {
2374
                spin_lock_irqsave(&s->lock, flags);
2375
 
2376
                if (s->dma_dac.count < 0) {
2377
                        s->dma_dac.count = 0;
2378
                        s->dma_dac.swptr = s->dma_dac.hwptr;
2379
                }
2380
                swptr = s->dma_dac.swptr;
2381
 
2382
                cnt = s->dma_dac.dmasize-swptr;
2383
 
2384
                if (s->dma_dac.count + cnt > s->dma_dac.dmasize)
2385
                        cnt = s->dma_dac.dmasize - s->dma_dac.count;
2386
 
2387
                spin_unlock_irqrestore(&s->lock, flags);
2388
 
2389
                if (cnt > count)
2390
                        cnt = count;
2391
 
2392
                if (cnt <= 0) {
2393
                        start_dac(s);
2394
                        if (file->f_flags & O_NONBLOCK) {
2395
                                if(!ret) ret = -EAGAIN;
2396
                                goto return_free;
2397
                        }
2398
                        if (!interruptible_sleep_on_timeout(&s->dma_dac.wait, HZ)) {
2399
                                if(! s->card->in_suspend) printk(KERN_DEBUG "maestro: write: chip lockup? dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
2400
                                       s->dma_dac.dmasize, s->dma_dac.fragsize, s->dma_dac.count,
2401
                                       s->dma_dac.hwptr, s->dma_dac.swptr);
2402
                                stop_dac(s);
2403
                                spin_lock_irqsave(&s->lock, flags);
2404
                                set_dmaa(s, virt_to_bus(s->dma_dac.rawbuf), s->dma_dac.numfrag << s->dma_dac.fragshift);
2405
                                /* program enhanced mode registers */
2406
/*                              wrindir(s, SV_CIDMAABASECOUNT1, (s->dma_dac.fragsamples-1) >> 8);
2407
                                wrindir(s, SV_CIDMAABASECOUNT0, s->dma_dac.fragsamples-1); */
2408
                                /* FILL ME */
2409
                                s->dma_dac.count = s->dma_dac.hwptr = s->dma_dac.swptr = 0;
2410
                                spin_unlock_irqrestore(&s->lock, flags);
2411
                        }
2412
                        if (signal_pending(current)) {
2413
                                if (!ret) ret = -ERESTARTSYS;
2414
                                goto return_free;
2415
                        }
2416
                        continue;
2417
                }
2418
                if (copy_from_user(s->dma_dac.rawbuf + swptr, buffer, cnt)) {
2419
                        if (!ret) ret = -EFAULT;
2420
                        goto return_free;
2421
                }
2422
/*              printk("wrote %d bytes at sw: %d cnt: %d while hw: %d\n",cnt, swptr, s->dma_dac.count, s->dma_dac.hwptr);*/
2423
 
2424
                swptr = (swptr + cnt) % s->dma_dac.dmasize;
2425
 
2426
                spin_lock_irqsave(&s->lock, flags);
2427
                s->dma_dac.swptr = swptr;
2428
                s->dma_dac.count += cnt;
2429
                s->dma_dac.endcleared = 0;
2430
                spin_unlock_irqrestore(&s->lock, flags);
2431
                count -= cnt;
2432
                buffer += cnt;
2433
                ret += cnt;
2434
                start_dac(s);
2435
        }
2436
return_free:
2437
        return ret;
2438
}
2439
 
2440
/* No kernel lock - we have our own spinlock */
2441
static unsigned int ess_poll(struct file *file, struct poll_table_struct *wait)
2442
{
2443
        struct ess_state *s = (struct ess_state *)file->private_data;
2444
        unsigned long flags;
2445
        unsigned int mask = 0;
2446
 
2447
        VALIDATE_STATE(s);
2448
 
2449
/* In 0.14 prog_dmabuf always returns success anyway ... */
2450
        if (file->f_mode & FMODE_WRITE) {
2451
                if (!s->dma_dac.ready && prog_dmabuf(s, 0))
2452
                        return 0;
2453
        }
2454
        if (file->f_mode & FMODE_READ) {
2455
                if (!s->dma_adc.ready && prog_dmabuf(s, 1))
2456
                        return 0;
2457
        }
2458
 
2459
        if (file->f_mode & FMODE_WRITE)
2460
                poll_wait(file, &s->dma_dac.wait, wait);
2461
        if (file->f_mode & FMODE_READ)
2462
                poll_wait(file, &s->dma_adc.wait, wait);
2463
        spin_lock_irqsave(&s->lock, flags);
2464
        ess_update_ptr(s);
2465
        if (file->f_mode & FMODE_READ) {
2466
                if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
2467
                        mask |= POLLIN | POLLRDNORM;
2468
        }
2469
        if (file->f_mode & FMODE_WRITE) {
2470
                if (s->dma_dac.mapped) {
2471
                        if (s->dma_dac.count >= (signed)s->dma_dac.fragsize)
2472
                                mask |= POLLOUT | POLLWRNORM;
2473
                } else {
2474
                        if ((signed)s->dma_dac.dmasize >= s->dma_dac.count + (signed)s->dma_dac.fragsize)
2475
                                mask |= POLLOUT | POLLWRNORM;
2476
                }
2477
        }
2478
        spin_unlock_irqrestore(&s->lock, flags);
2479
        return mask;
2480
}
2481
 
2482
static int ess_mmap(struct file *file, struct vm_area_struct *vma)
2483
{
2484
        struct ess_state *s = (struct ess_state *)file->private_data;
2485
        struct dmabuf *db;
2486
        int ret = -EINVAL;
2487
        unsigned long size;
2488
 
2489
        VALIDATE_STATE(s);
2490
        lock_kernel();
2491
        if (vma->vm_flags & VM_WRITE) {
2492
                if ((ret = prog_dmabuf(s, 1)) != 0)
2493
                        goto out;
2494
                db = &s->dma_dac;
2495
        } else
2496
#if 0
2497
        /* if we can have the wp/wc do the combining
2498
                we can turn this back on.  */
2499
              if (vma->vm_flags & VM_READ) {
2500
                if ((ret = prog_dmabuf(s, 0)) != 0)
2501
                        goto out;
2502
                db = &s->dma_adc;
2503
        } else
2504
#endif
2505
                goto out;
2506
        ret = -EINVAL;
2507
        if (vma->vm_pgoff != 0)
2508
                goto out;
2509
        size = vma->vm_end - vma->vm_start;
2510
        if (size > (PAGE_SIZE << db->buforder))
2511
                goto out;
2512
        ret = -EAGAIN;
2513
        if (remap_page_range(vma->vm_start, virt_to_phys(db->rawbuf), size, vma->vm_page_prot))
2514
                goto out;
2515
        db->mapped = 1;
2516
        ret = 0;
2517
out:
2518
        unlock_kernel();
2519
        return ret;
2520
}
2521
 
2522
static int ess_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
2523
{
2524
        struct ess_state *s = (struct ess_state *)file->private_data;
2525
        unsigned long flags;
2526
        audio_buf_info abinfo;
2527
        count_info cinfo;
2528
        int val, mapped, ret;
2529
        unsigned char fmtm, fmtd;
2530
 
2531
/*      printk("maestro: ess_ioctl: cmd %d\n", cmd);*/
2532
 
2533
        VALIDATE_STATE(s);
2534
        mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac.mapped) ||
2535
                ((file->f_mode & FMODE_READ) && s->dma_adc.mapped);
2536
        switch (cmd) {
2537
        case OSS_GETVERSION:
2538
                return put_user(SOUND_VERSION, (int *)arg);
2539
 
2540
        case SNDCTL_DSP_SYNC:
2541
                if (file->f_mode & FMODE_WRITE)
2542
                        return drain_dac(s, file->f_flags & O_NONBLOCK);
2543
                return 0;
2544
 
2545
        case SNDCTL_DSP_SETDUPLEX:
2546
                /* XXX fix */
2547
                return 0;
2548
 
2549
        case SNDCTL_DSP_GETCAPS:
2550
                return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, (int *)arg);
2551
 
2552
        case SNDCTL_DSP_RESET:
2553
                if (file->f_mode & FMODE_WRITE) {
2554
                        stop_dac(s);
2555
                        synchronize_irq();
2556
                        s->dma_dac.swptr = s->dma_dac.hwptr = s->dma_dac.count = s->dma_dac.total_bytes = 0;
2557
                }
2558
                if (file->f_mode & FMODE_READ) {
2559
                        stop_adc(s);
2560
                        synchronize_irq();
2561
                        s->dma_adc.swptr = s->dma_adc.hwptr = s->dma_adc.count = s->dma_adc.total_bytes = 0;
2562
                }
2563
                return 0;
2564
 
2565
        case SNDCTL_DSP_SPEED:
2566
                if (get_user(val, (int *)arg))
2567
                        return -EFAULT;
2568
                if (val >= 0) {
2569
                        if (file->f_mode & FMODE_READ) {
2570
                                stop_adc(s);
2571
                                s->dma_adc.ready = 0;
2572
                                set_adc_rate(s, val);
2573
                        }
2574
                        if (file->f_mode & FMODE_WRITE) {
2575
                                stop_dac(s);
2576
                                s->dma_dac.ready = 0;
2577
                                set_dac_rate(s, val);
2578
                        }
2579
                }
2580
                return put_user((file->f_mode & FMODE_READ) ? s->rateadc : s->ratedac, (int *)arg);
2581
 
2582
        case SNDCTL_DSP_STEREO:
2583
                if (get_user(val, (int *)arg))
2584
                        return -EFAULT;
2585
                fmtd = 0;
2586
                fmtm = ~0;
2587
                if (file->f_mode & FMODE_READ) {
2588
                        stop_adc(s);
2589
                        s->dma_adc.ready = 0;
2590
                        if (val)
2591
                                fmtd |= ESS_FMT_STEREO << ESS_ADC_SHIFT;
2592
                        else
2593
                                fmtm &= ~(ESS_FMT_STEREO << ESS_ADC_SHIFT);
2594
                }
2595
                if (file->f_mode & FMODE_WRITE) {
2596
                        stop_dac(s);
2597
                        s->dma_dac.ready = 0;
2598
                        if (val)
2599
                                fmtd |= ESS_FMT_STEREO << ESS_DAC_SHIFT;
2600
                        else
2601
                                fmtm &= ~(ESS_FMT_STEREO << ESS_DAC_SHIFT);
2602
                }
2603
                set_fmt(s, fmtm, fmtd);
2604
                return 0;
2605
 
2606
        case SNDCTL_DSP_CHANNELS:
2607
                if (get_user(val, (int *)arg))
2608
                        return -EFAULT;
2609
                if (val != 0) {
2610
                        fmtd = 0;
2611
                        fmtm = ~0;
2612
                        if (file->f_mode & FMODE_READ) {
2613
                                stop_adc(s);
2614
                                s->dma_adc.ready = 0;
2615
                                if (val >= 2)
2616
                                        fmtd |= ESS_FMT_STEREO << ESS_ADC_SHIFT;
2617
                                else
2618
                                        fmtm &= ~(ESS_FMT_STEREO << ESS_ADC_SHIFT);
2619
                        }
2620
                        if (file->f_mode & FMODE_WRITE) {
2621
                                stop_dac(s);
2622
                                s->dma_dac.ready = 0;
2623
                                if (val >= 2)
2624
                                        fmtd |= ESS_FMT_STEREO << ESS_DAC_SHIFT;
2625
                                else
2626
                                        fmtm &= ~(ESS_FMT_STEREO << ESS_DAC_SHIFT);
2627
                        }
2628
                        set_fmt(s, fmtm, fmtd);
2629
                }
2630
                return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (ESS_FMT_STEREO << ESS_ADC_SHIFT)
2631
                                           : (ESS_FMT_STEREO << ESS_DAC_SHIFT))) ? 2 : 1, (int *)arg);
2632
 
2633
        case SNDCTL_DSP_GETFMTS: /* Returns a mask */
2634
                return put_user(AFMT_U8|AFMT_S16_LE, (int *)arg);
2635
 
2636
        case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
2637
                if (get_user(val, (int *)arg))
2638
                        return -EFAULT;
2639
                if (val != AFMT_QUERY) {
2640
                        fmtd = 0;
2641
                        fmtm = ~0;
2642
                        if (file->f_mode & FMODE_READ) {
2643
                                stop_adc(s);
2644
                                s->dma_adc.ready = 0;
2645
        /* fixed at 16bit for now */
2646
                                fmtd |= ESS_FMT_16BIT << ESS_ADC_SHIFT;
2647
#if 0
2648
                                if (val == AFMT_S16_LE)
2649
                                        fmtd |= ESS_FMT_16BIT << ESS_ADC_SHIFT;
2650
                                else
2651
                                        fmtm &= ~(ESS_FMT_16BIT << ESS_ADC_SHIFT);
2652
#endif
2653
                        }
2654
                        if (file->f_mode & FMODE_WRITE) {
2655
                                stop_dac(s);
2656
                                s->dma_dac.ready = 0;
2657
                                if (val == AFMT_S16_LE)
2658
                                        fmtd |= ESS_FMT_16BIT << ESS_DAC_SHIFT;
2659
                                else
2660
                                        fmtm &= ~(ESS_FMT_16BIT << ESS_DAC_SHIFT);
2661
                        }
2662
                        set_fmt(s, fmtm, fmtd);
2663
                }
2664
                return put_user((s->fmt & ((file->f_mode & FMODE_READ) ?
2665
                        (ESS_FMT_16BIT << ESS_ADC_SHIFT)
2666
                        : (ESS_FMT_16BIT << ESS_DAC_SHIFT))) ?
2667
                                AFMT_S16_LE :
2668
                                AFMT_U8,
2669
                        (int *)arg);
2670
 
2671
        case SNDCTL_DSP_POST:
2672
                return 0;
2673
 
2674
        case SNDCTL_DSP_GETTRIGGER:
2675
                val = 0;
2676
                if ((file->f_mode & FMODE_READ) && (s->enable & ADC_RUNNING))
2677
                        val |= PCM_ENABLE_INPUT;
2678
                if ((file->f_mode & FMODE_WRITE) && (s->enable & DAC_RUNNING))
2679
                        val |= PCM_ENABLE_OUTPUT;
2680
                return put_user(val, (int *)arg);
2681
 
2682
        case SNDCTL_DSP_SETTRIGGER:
2683
                if (get_user(val, (int *)arg))
2684
                        return -EFAULT;
2685
                if (file->f_mode & FMODE_READ) {
2686
                        if (val & PCM_ENABLE_INPUT) {
2687
                                if (!s->dma_adc.ready && (ret =  prog_dmabuf(s, 1)))
2688
                                        return ret;
2689
                                start_adc(s);
2690
                        } else
2691
                                stop_adc(s);
2692
                }
2693
                if (file->f_mode & FMODE_WRITE) {
2694
                        if (val & PCM_ENABLE_OUTPUT) {
2695
                                if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0)))
2696
                                        return ret;
2697
                                start_dac(s);
2698
                        } else
2699
                                stop_dac(s);
2700
                }
2701
                return 0;
2702
 
2703
        case SNDCTL_DSP_GETOSPACE:
2704
                if (!(file->f_mode & FMODE_WRITE))
2705
                        return -EINVAL;
2706
                if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0)))
2707
                        return ret;
2708
                spin_lock_irqsave(&s->lock, flags);
2709
                ess_update_ptr(s);
2710
                abinfo.fragsize = s->dma_dac.fragsize;
2711
                abinfo.bytes = s->dma_dac.dmasize - s->dma_dac.count;
2712
                abinfo.fragstotal = s->dma_dac.numfrag;
2713
                abinfo.fragments = abinfo.bytes >> s->dma_dac.fragshift;
2714
                spin_unlock_irqrestore(&s->lock, flags);
2715
                return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
2716
 
2717
        case SNDCTL_DSP_GETISPACE:
2718
                if (!(file->f_mode & FMODE_READ))
2719
                        return -EINVAL;
2720
                if (!s->dma_adc.ready && (ret =  prog_dmabuf(s, 1)))
2721
                        return ret;
2722
                spin_lock_irqsave(&s->lock, flags);
2723
                ess_update_ptr(s);
2724
                abinfo.fragsize = s->dma_adc.fragsize;
2725
                abinfo.bytes = s->dma_adc.count;
2726
                abinfo.fragstotal = s->dma_adc.numfrag;
2727
                abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift;
2728
                spin_unlock_irqrestore(&s->lock, flags);
2729
                return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
2730
 
2731
        case SNDCTL_DSP_NONBLOCK:
2732
                file->f_flags |= O_NONBLOCK;
2733
                return 0;
2734
 
2735
        case SNDCTL_DSP_GETODELAY:
2736
                if (!(file->f_mode & FMODE_WRITE))
2737
                        return -EINVAL;
2738
                if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0)))
2739
                        return ret;
2740
                spin_lock_irqsave(&s->lock, flags);
2741
                ess_update_ptr(s);
2742
                val = s->dma_dac.count;
2743
                spin_unlock_irqrestore(&s->lock, flags);
2744
                return put_user(val, (int *)arg);
2745
 
2746
        case SNDCTL_DSP_GETIPTR:
2747
                if (!(file->f_mode & FMODE_READ))
2748
                        return -EINVAL;
2749
                if (!s->dma_adc.ready && (ret =  prog_dmabuf(s, 1)))
2750
                        return ret;
2751
                spin_lock_irqsave(&s->lock, flags);
2752
                ess_update_ptr(s);
2753
                cinfo.bytes = s->dma_adc.total_bytes;
2754
                cinfo.blocks = s->dma_adc.count >> s->dma_adc.fragshift;
2755
                cinfo.ptr = s->dma_adc.hwptr;
2756
                if (s->dma_adc.mapped)
2757
                        s->dma_adc.count &= s->dma_adc.fragsize-1;
2758
                spin_unlock_irqrestore(&s->lock, flags);
2759
                return copy_to_user((void *)arg, &cinfo, sizeof(cinfo)) ? -EFAULT : 0;
2760
 
2761
        case SNDCTL_DSP_GETOPTR:
2762
                if (!(file->f_mode & FMODE_WRITE))
2763
                        return -EINVAL;
2764
                if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0)))
2765
                        return ret;
2766
                spin_lock_irqsave(&s->lock, flags);
2767
                ess_update_ptr(s);
2768
                cinfo.bytes = s->dma_dac.total_bytes;
2769
                cinfo.blocks = s->dma_dac.count >> s->dma_dac.fragshift;
2770
                cinfo.ptr = s->dma_dac.hwptr;
2771
                if (s->dma_dac.mapped)
2772
                        s->dma_dac.count &= s->dma_dac.fragsize-1;
2773
                spin_unlock_irqrestore(&s->lock, flags);
2774
                return copy_to_user((void *)arg, &cinfo, sizeof(cinfo)) ? -EFAULT : 0;
2775
 
2776
        case SNDCTL_DSP_GETBLKSIZE:
2777
                if (file->f_mode & FMODE_WRITE) {
2778
                        if ((val = prog_dmabuf(s, 0)))
2779
                                return val;
2780
                        return put_user(s->dma_dac.fragsize, (int *)arg);
2781
                }
2782
                if ((val = prog_dmabuf(s, 1)))
2783
                        return val;
2784
                return put_user(s->dma_adc.fragsize, (int *)arg);
2785
 
2786
        case SNDCTL_DSP_SETFRAGMENT:
2787
                if (get_user(val, (int *)arg))
2788
                        return -EFAULT;
2789
                M_printk("maestro: SETFRAGMENT: %0x\n",val);
2790
                if (file->f_mode & FMODE_READ) {
2791
                        s->dma_adc.ossfragshift = val & 0xffff;
2792
                        s->dma_adc.ossmaxfrags = (val >> 16) & 0xffff;
2793
                        if (s->dma_adc.ossfragshift < 4)
2794
                                s->dma_adc.ossfragshift = 4;
2795
                        if (s->dma_adc.ossfragshift > 15)
2796
                                s->dma_adc.ossfragshift = 15;
2797
                        if (s->dma_adc.ossmaxfrags < 4)
2798
                                s->dma_adc.ossmaxfrags = 4;
2799
                }
2800
                if (file->f_mode & FMODE_WRITE) {
2801
                        s->dma_dac.ossfragshift = val & 0xffff;
2802
                        s->dma_dac.ossmaxfrags = (val >> 16) & 0xffff;
2803
                        if (s->dma_dac.ossfragshift < 4)
2804
                                s->dma_dac.ossfragshift = 4;
2805
                        if (s->dma_dac.ossfragshift > 15)
2806
                                s->dma_dac.ossfragshift = 15;
2807
                        if (s->dma_dac.ossmaxfrags < 4)
2808
                                s->dma_dac.ossmaxfrags = 4;
2809
                }
2810
                return 0;
2811
 
2812
        case SNDCTL_DSP_SUBDIVIDE:
2813
                if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
2814
                    (file->f_mode & FMODE_WRITE && s->dma_dac.subdivision))
2815
                        return -EINVAL;
2816
                if (get_user(val, (int *)arg))
2817
                        return -EFAULT;
2818
                if (val != 1 && val != 2 && val != 4)
2819
                        return -EINVAL;
2820
                if (file->f_mode & FMODE_READ)
2821
                        s->dma_adc.subdivision = val;
2822
                if (file->f_mode & FMODE_WRITE)
2823
                        s->dma_dac.subdivision = val;
2824
                return 0;
2825
 
2826
        case SOUND_PCM_READ_RATE:
2827
                return put_user((file->f_mode & FMODE_READ) ? s->rateadc : s->ratedac, (int *)arg);
2828
 
2829
        case SOUND_PCM_READ_CHANNELS:
2830
                return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (ESS_FMT_STEREO << ESS_ADC_SHIFT)
2831
                                           : (ESS_FMT_STEREO << ESS_DAC_SHIFT))) ? 2 : 1, (int *)arg);
2832
 
2833
        case SOUND_PCM_READ_BITS:
2834
                return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (ESS_FMT_16BIT << ESS_ADC_SHIFT)
2835
                                           : (ESS_FMT_16BIT << ESS_DAC_SHIFT))) ? 16 : 8, (int *)arg);
2836
 
2837
        case SOUND_PCM_WRITE_FILTER:
2838
        case SNDCTL_DSP_SETSYNCRO:
2839
        case SOUND_PCM_READ_FILTER:
2840
                return -EINVAL;
2841
 
2842
        }
2843
        return -EINVAL;
2844
}
2845
 
2846
static void
2847
set_base_registers(struct ess_state *s,void *vaddr)
2848
{
2849
        unsigned long packed_phys = virt_to_bus(vaddr)>>12;
2850
        wave_set_register(s, 0x01FC , packed_phys);
2851
        wave_set_register(s, 0x01FD , packed_phys);
2852
        wave_set_register(s, 0x01FE , packed_phys);
2853
        wave_set_register(s, 0x01FF , packed_phys);
2854
}
2855
 
2856
/*
2857
 * this guy makes sure we're in the right power
2858
 * state for what we want to be doing
2859
 */
2860
static void maestro_power(struct ess_card *card, int tostate)
2861
{
2862
        u16 active_mask = acpi_state_mask[tostate];
2863
        u8 state;
2864
 
2865
        if(!use_pm) return;
2866
 
2867
        pci_read_config_byte(card->pcidev, card->power_regs+0x4, &state);
2868
        state&=3;
2869
 
2870
        /* make sure we're in the right state */
2871
        if(state != tostate) {
2872
                M_printk(KERN_WARNING "maestro: dev %02x:%02x.%x switching from D%d to D%d\n",
2873
                        card->pcidev->bus->number,
2874
                        PCI_SLOT(card->pcidev->devfn),
2875
                        PCI_FUNC(card->pcidev->devfn),
2876
                        state,tostate);
2877
                pci_write_config_byte(card->pcidev, card->power_regs+0x4, tostate);
2878
        }
2879
 
2880
        /* and make sure the units we care about are on
2881
                XXX we might want to do this before state flipping? */
2882
        pci_write_config_word(card->pcidev, 0x54, ~ active_mask);
2883
        pci_write_config_word(card->pcidev, 0x56, ~ active_mask);
2884
}
2885
 
2886
/* we allocate a large power of two for all our memory.
2887
        this is cut up into (not to scale :):
2888
        |silly fifo word        | 512byte mixbuf per adc        | dac/adc * channels |
2889
*/
2890
static int
2891
allocate_buffers(struct ess_state *s)
2892
{
2893
        void *rawbuf=NULL;
2894
        int order,i;
2895
        struct page *page, *pend;
2896
 
2897
        /* alloc as big a chunk as we can */
2898
        for (order = (dsps_order + (16-PAGE_SHIFT) + 1); order >= (dsps_order + 2 + 1); order--)
2899
                if((rawbuf = (void *)__get_free_pages(GFP_KERNEL|GFP_DMA, order)))
2900
                        break;
2901
 
2902
        if (!rawbuf)
2903
                return 1;
2904
 
2905
        M_printk("maestro: allocated %ld (%d) bytes at %p\n",PAGE_SIZE<<order,order, rawbuf);
2906
 
2907
        if ((virt_to_bus(rawbuf) + (PAGE_SIZE << order) - 1) & ~((1<<28)-1))  {
2908
                printk(KERN_ERR "maestro: DMA buffer beyond 256MB! busaddr 0x%lx  size %ld\n",
2909
                        virt_to_bus(rawbuf), PAGE_SIZE << order);
2910
                kfree(rawbuf);
2911
                return 1;
2912
        }
2913
 
2914
        s->card->dmapages = rawbuf;
2915
        s->card->dmaorder = order;
2916
 
2917
        for(i=0;i<NR_DSPS;i++) {
2918
                struct ess_state *ess = &s->card->channels[i];
2919
 
2920
                if(ess->dev_audio == -1)
2921
                        continue;
2922
 
2923
                ess->dma_dac.ready = s->dma_dac.mapped = 0;
2924
                ess->dma_adc.ready = s->dma_adc.mapped = 0;
2925
                ess->dma_adc.buforder = ess->dma_dac.buforder = order - 1 - dsps_order - 1;
2926
 
2927
                /* offset dac and adc buffers starting half way through and then at each [da][ad]c's
2928
                        order's intervals.. */
2929
                ess->dma_dac.rawbuf = rawbuf + (PAGE_SIZE<<(order-1)) + (i * ( PAGE_SIZE << (ess->dma_dac.buforder + 1 )));
2930
                ess->dma_adc.rawbuf = ess->dma_dac.rawbuf + ( PAGE_SIZE << ess->dma_dac.buforder);
2931
                /* offset mixbuf by a mixbuf so that the lame status fifo can
2932
                        happily scribble away.. */
2933
                ess->mixbuf = rawbuf + (512 * (i+1));
2934
 
2935
                M_printk("maestro: setup apu %d: dac: %p adc: %p mix: %p\n",i,ess->dma_dac.rawbuf,
2936
                        ess->dma_adc.rawbuf, ess->mixbuf);
2937
 
2938
        }
2939
 
2940
        /* now mark the pages as reserved; otherwise remap_page_range doesn't do what we want */
2941
        pend = virt_to_page(rawbuf + (PAGE_SIZE << order) - 1);
2942
        for (page = virt_to_page(rawbuf); page <= pend; page++)
2943
                mem_map_reserve(page);
2944
 
2945
        return 0;
2946
}
2947
static void
2948
free_buffers(struct ess_state *s)
2949
{
2950
        struct page *page, *pend;
2951
 
2952
        s->dma_dac.rawbuf = s->dma_adc.rawbuf = NULL;
2953
        s->dma_dac.mapped = s->dma_adc.mapped = 0;
2954
        s->dma_dac.ready = s->dma_adc.ready = 0;
2955
 
2956
        M_printk("maestro: freeing %p\n",s->card->dmapages);
2957
        /* undo marking the pages as reserved */
2958
 
2959
        pend = virt_to_page(s->card->dmapages + (PAGE_SIZE << s->card->dmaorder) - 1);
2960
        for (page = virt_to_page(s->card->dmapages); page <= pend; page++)
2961
                mem_map_unreserve(page);
2962
 
2963
        free_pages((unsigned long)s->card->dmapages,s->card->dmaorder);
2964
        s->card->dmapages = NULL;
2965
}
2966
 
2967
static int
2968
ess_open(struct inode *inode, struct file *file)
2969
{
2970
        int minor = MINOR(inode->i_rdev);
2971
        struct ess_state *s = NULL;
2972
        unsigned char fmtm = ~0, fmts = 0;
2973
        struct pci_dev *pdev;
2974
        /*
2975
         *      Scan the cards and find the channel. We only
2976
         *      do this at open time so it is ok
2977
         */
2978
 
2979
        pci_for_each_dev(pdev) {
2980
                struct ess_card *c;
2981
                struct pci_driver *drvr;
2982
 
2983
                drvr = pci_dev_driver (pdev);
2984
                if (drvr == &maestro_pci_driver) {
2985
                        int i;
2986
                        struct ess_state *sp;
2987
 
2988
                        c = (struct ess_card*)pci_get_drvdata (pdev);
2989
                        if (!c)
2990
                                continue;
2991
                        for(i=0;i<NR_DSPS;i++)
2992
                        {
2993
                                sp=&c->channels[i];
2994
                                if(sp->dev_audio < 0)
2995
                                        continue;
2996
                                if((sp->dev_audio ^ minor) & ~0xf)
2997
                                        continue;
2998
                                s=sp;
2999
                        }
3000
                }
3001
        }
3002
        if (!s)
3003
                return -ENODEV;
3004
 
3005
        VALIDATE_STATE(s);
3006
        file->private_data = s;
3007
        /* wait for device to become free */
3008
        down(&s->open_sem);
3009
        while (s->open_mode & file->f_mode) {
3010
                if (file->f_flags & O_NONBLOCK) {
3011
                        up(&s->open_sem);
3012
                        return -EWOULDBLOCK;
3013
                }
3014
                up(&s->open_sem);
3015
                interruptible_sleep_on(&s->open_wait);
3016
                if (signal_pending(current))
3017
                        return -ERESTARTSYS;
3018
                down(&s->open_sem);
3019
        }
3020
 
3021
        /* under semaphore.. */
3022
        if ((s->card->dmapages==NULL) && allocate_buffers(s)) {
3023
                up(&s->open_sem);
3024
                return -ENOMEM;
3025
        }
3026
 
3027
        /* we're covered by the open_sem */
3028
        if( ! s->card->dsps_open )  {
3029
                maestro_power(s->card,ACPI_D0);
3030
                start_bob(s);
3031
        }
3032
        s->card->dsps_open++;
3033
        M_printk("maestro: open, %d bobs now\n",s->card->dsps_open);
3034
 
3035
        /* ok, lets write WC base regs now that we've
3036
                powered up the chip */
3037
        M_printk("maestro: writing 0x%lx (bus 0x%lx) to the wp\n",virt_to_bus(s->card->dmapages),
3038
                ((virt_to_bus(s->card->dmapages))&0xFFE00000)>>12);
3039
        set_base_registers(s,s->card->dmapages);
3040
 
3041
        if (file->f_mode & FMODE_READ) {
3042
/*
3043
                fmtm &= ~((ESS_FMT_STEREO | ESS_FMT_16BIT) << ESS_ADC_SHIFT);
3044
                if ((minor & 0xf) == SND_DEV_DSP16)
3045
                        fmts |= ESS_FMT_16BIT << ESS_ADC_SHIFT; */
3046
 
3047
                fmtm &= ~((ESS_FMT_STEREO|ESS_FMT_16BIT) << ESS_ADC_SHIFT);
3048
                fmts = (ESS_FMT_STEREO|ESS_FMT_16BIT) << ESS_ADC_SHIFT;
3049
 
3050
                s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags = s->dma_adc.subdivision = 0;
3051
                set_adc_rate(s, 8000);
3052
        }
3053
        if (file->f_mode & FMODE_WRITE) {
3054
                fmtm &= ~((ESS_FMT_STEREO | ESS_FMT_16BIT) << ESS_DAC_SHIFT);
3055
                if ((minor & 0xf) == SND_DEV_DSP16)
3056
                        fmts |= ESS_FMT_16BIT << ESS_DAC_SHIFT;
3057
 
3058
                s->dma_dac.ossfragshift = s->dma_dac.ossmaxfrags = s->dma_dac.subdivision = 0;
3059
                set_dac_rate(s, 8000);
3060
        }
3061
        set_fmt(s, fmtm, fmts);
3062
        s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
3063
 
3064
        up(&s->open_sem);
3065
        return 0;
3066
}
3067
 
3068
static int
3069
ess_release(struct inode *inode, struct file *file)
3070
{
3071
        struct ess_state *s = (struct ess_state *)file->private_data;
3072
 
3073
        VALIDATE_STATE(s);
3074
        lock_kernel();
3075
        if (file->f_mode & FMODE_WRITE)
3076
                drain_dac(s, file->f_flags & O_NONBLOCK);
3077
        down(&s->open_sem);
3078
        if (file->f_mode & FMODE_WRITE) {
3079
                stop_dac(s);
3080
        }
3081
        if (file->f_mode & FMODE_READ) {
3082
                stop_adc(s);
3083
        }
3084
 
3085
        s->open_mode &= (~file->f_mode) & (FMODE_READ|FMODE_WRITE);
3086
        /* we're covered by the open_sem */
3087
        M_printk("maestro: %d dsps now alive\n",s->card->dsps_open-1);
3088
        if( --s->card->dsps_open <= 0) {
3089
                s->card->dsps_open = 0;
3090
                stop_bob(s);
3091
                free_buffers(s);
3092
                maestro_power(s->card,ACPI_D2);
3093
        }
3094
        up(&s->open_sem);
3095
        wake_up(&s->open_wait);
3096
        unlock_kernel();
3097
        return 0;
3098
}
3099
 
3100
static struct file_operations ess_audio_fops = {
3101
        owner:          THIS_MODULE,
3102
        llseek:         no_llseek,
3103
        read:           ess_read,
3104
        write:          ess_write,
3105
        poll:           ess_poll,
3106
        ioctl:          ess_ioctl,
3107
        mmap:           ess_mmap,
3108
        open:           ess_open,
3109
        release:        ess_release,
3110
};
3111
 
3112
static int
3113
maestro_config(struct ess_card *card)
3114
{
3115
        struct pci_dev *pcidev = card->pcidev;
3116
        struct ess_state *ess = &card->channels[0];
3117
        int apu,iobase  = card->iobase;
3118
        u16 w;
3119
        u32 n;
3120
 
3121
        /* We used to muck around with pci config space that
3122
         * we had no business messing with.  We don't know enough
3123
         * about the machine to know which DMA mode is appropriate,
3124
         * etc.  We were guessing wrong on some machines and making
3125
         * them unhappy.  We now trust in the BIOS to do things right,
3126
         * which almost certainly means a new host of problems will
3127
         * arise with broken BIOS implementations.  screw 'em.
3128
         * We're already intolerant of machines that don't assign
3129
         * IRQs.
3130
         */
3131
 
3132
        /* do config work at full power */
3133
        maestro_power(card,ACPI_D0);
3134
 
3135
        pci_read_config_word(pcidev, 0x50, &w);
3136
 
3137
        w&=~(1<<5);                     /* Don't swap left/right (undoc)*/
3138
 
3139
        pci_write_config_word(pcidev, 0x50, w);
3140
 
3141
        pci_read_config_word(pcidev, 0x52, &w);
3142
        w&=~(1<<15);            /* Turn off internal clock multiplier */
3143
        /* XXX how do we know which to use? */
3144
        w&=~(1<<14);            /* External clock */
3145
 
3146
        w|= (1<<7);             /* Hardware volume control on */
3147
        w|= (1<<6);             /* Debounce off: easier to push the HWV buttons. */
3148
        w&=~(1<<5);             /* GPIO 4:5 */
3149
        w|= (1<<4);             /* Disconnect from the CHI.  Enabling this made a dell 7500 work. */
3150
        w&=~(1<<2);             /* MIDI fix off (undoc) */
3151
        w&=~(1<<1);             /* reserved, always write 0 */
3152
        pci_write_config_word(pcidev, 0x52, w);
3153
 
3154
        /*
3155
         *      Legacy mode
3156
         */
3157
 
3158
        pci_read_config_word(pcidev, 0x40, &w);
3159
        w|=(1<<15);     /* legacy decode off */
3160
        w&=~(1<<14);    /* Disable SIRQ */
3161
        w&=~(0x1f);     /* disable mpu irq/io, game port, fm, SB */
3162
 
3163
        pci_write_config_word(pcidev, 0x40, w);
3164
 
3165
        /* Set up 978 docking control chip. */
3166
        pci_read_config_word(pcidev, 0x58, &w);
3167
        w|=1<<2;        /* Enable 978. */
3168
        w|=1<<3;        /* Turn on 978 hardware volume control. */
3169
        w&=~(1<<11);    /* Turn on 978 mixer volume control. */
3170
        pci_write_config_word(pcidev, 0x58, w);
3171
 
3172
        sound_reset(iobase);
3173
 
3174
        /*
3175
         *      Ring Bus Setup
3176
         */
3177
 
3178
        /* setup usual 0x34 stuff.. 0x36 may be chip specific */
3179
        outw(0xC090, iobase+0x34); /* direct sound, stereo */
3180
        udelay(20);
3181
        outw(0x3000, iobase+0x36); /* direct sound, stereo */
3182
        udelay(20);
3183
 
3184
 
3185
        /*
3186
         *      Reset the CODEC
3187
         */
3188
 
3189
        maestro_ac97_reset(iobase,pcidev);
3190
 
3191
        /*
3192
         *      Ring Bus Setup
3193
         */
3194
 
3195
        n=inl(iobase+0x34);
3196
        n&=~0xF000;
3197
        n|=12<<12;              /* Direct Sound, Stereo */
3198
        outl(n, iobase+0x34);
3199
 
3200
        n=inl(iobase+0x34);
3201
        n&=~0x0F00;             /* Modem off */
3202
        outl(n, iobase+0x34);
3203
 
3204
        n=inl(iobase+0x34);
3205
        n&=~0x00F0;
3206
        n|=9<<4;                /* DAC, Stereo */
3207
        outl(n, iobase+0x34);
3208
 
3209
        n=inl(iobase+0x34);
3210
        n&=~0x000F;             /* ASSP off */
3211
        outl(n, iobase+0x34);
3212
 
3213
        n=inl(iobase+0x34);
3214
        n|=(1<<29);             /* Enable ring bus */
3215
        outl(n, iobase+0x34);
3216
 
3217
        n=inl(iobase+0x34);
3218
        n|=(1<<28);             /* Enable serial bus */
3219
        outl(n, iobase+0x34);
3220
 
3221
        n=inl(iobase+0x34);
3222
        n&=~0x00F00000;         /* MIC off */
3223
        outl(n, iobase+0x34);
3224
 
3225
        n=inl(iobase+0x34);
3226
        n&=~0x000F0000;         /* I2S off */
3227
        outl(n, iobase+0x34);
3228
 
3229
 
3230
        w=inw(iobase+0x18);
3231
        w&=~(1<<7);             /* ClkRun off */
3232
        outw(w, iobase+0x18);
3233
 
3234
        w=inw(iobase+0x18);
3235
        w&=~(1<<6);             /* Hardware volume control interrupt off... for now. */
3236
        outw(w, iobase+0x18);
3237
 
3238
        w=inw(iobase+0x18);
3239
        w&=~(1<<4);             /* ASSP irq off */
3240
        outw(w, iobase+0x18);
3241
 
3242
        w=inw(iobase+0x18);
3243
        w&=~(1<<3);             /* ISDN irq off */
3244
        outw(w, iobase+0x18);
3245
 
3246
        w=inw(iobase+0x18);
3247
        w|=(1<<2);              /* Direct Sound IRQ on */
3248
        outw(w, iobase+0x18);
3249
 
3250
        w=inw(iobase+0x18);
3251
        w&=~(1<<1);             /* MPU401 IRQ off */
3252
        outw(w, iobase+0x18);
3253
 
3254
        w=inw(iobase+0x18);
3255
        w|=(1<<0);               /* SB IRQ on */
3256
        outw(w, iobase+0x18);
3257
 
3258
        /* Set hardware volume control registers to midpoints.
3259
           We can tell which button was pushed based on how they change. */
3260
        outb(0x88, iobase+0x1c);
3261
        outb(0x88, iobase+0x1d);
3262
        outb(0x88, iobase+0x1e);
3263
        outb(0x88, iobase+0x1f);
3264
 
3265
        /* it appears some maestros (dell 7500) only work if these are set,
3266
                regardless of wether we use the assp or not. */
3267
 
3268
        outb(0, iobase+0xA4);
3269
        outb(3, iobase+0xA2);
3270
        outb(0, iobase+0xA6);
3271
 
3272
        for(apu=0;apu<16;apu++)
3273
        {
3274
                /* Write 0 into the buffer area 0x1E0->1EF */
3275
                outw(0x01E0+apu, 0x10+iobase);
3276
                outw(0x0000, 0x12+iobase);
3277
 
3278
                /*
3279
                 * The 1.10 test program seem to write 0 into the buffer area
3280
                 * 0x1D0-0x1DF too.
3281
                 */
3282
                outw(0x01D0+apu, 0x10+iobase);
3283
                outw(0x0000, 0x12+iobase);
3284
        }
3285
 
3286
#if 1
3287
        wave_set_register(ess, IDR7_WAVE_ROMRAM,
3288
                (wave_get_register(ess, IDR7_WAVE_ROMRAM)&0xFF00));
3289
        wave_set_register(ess, IDR7_WAVE_ROMRAM,
3290
                wave_get_register(ess, IDR7_WAVE_ROMRAM)|0x100);
3291
        wave_set_register(ess, IDR7_WAVE_ROMRAM,
3292
                wave_get_register(ess, IDR7_WAVE_ROMRAM)&~0x200);
3293
        wave_set_register(ess, IDR7_WAVE_ROMRAM,
3294
                wave_get_register(ess, IDR7_WAVE_ROMRAM)|~0x400);
3295
#else           
3296
        maestro_write(ess, IDR7_WAVE_ROMRAM,
3297
                (maestro_read(ess, IDR7_WAVE_ROMRAM)&0xFF00));
3298
        maestro_write(ess, IDR7_WAVE_ROMRAM,
3299
                maestro_read(ess, IDR7_WAVE_ROMRAM)|0x100);
3300
        maestro_write(ess, IDR7_WAVE_ROMRAM,
3301
                maestro_read(ess, IDR7_WAVE_ROMRAM)&~0x200);
3302
        maestro_write(ess, IDR7_WAVE_ROMRAM,
3303
                maestro_read(ess, IDR7_WAVE_ROMRAM)|0x400);
3304
#endif
3305
 
3306
        maestro_write(ess, IDR2_CRAM_DATA, 0x0000);
3307
        maestro_write(ess, 0x08, 0xB004);
3308
        /* Now back to the DirectSound stuff */
3309
        maestro_write(ess, 0x09, 0x001B);
3310
        maestro_write(ess, 0x0A, 0x8000);
3311
        maestro_write(ess, 0x0B, 0x3F37);
3312
        maestro_write(ess, 0x0C, 0x0098);
3313
 
3314
        /* parallel out ?? */
3315
        maestro_write(ess, 0x0C,
3316
                (maestro_read(ess, 0x0C)&~0xF000)|0x8000);
3317
        /* parallel in, has something to do with recording :) */
3318
        maestro_write(ess, 0x0C,
3319
                (maestro_read(ess, 0x0C)&~0x0F00)|0x0500);
3320
 
3321
        maestro_write(ess, 0x0D, 0x7632);
3322
 
3323
        /* Wave cache control on - test off, sg off,
3324
                enable, enable extra chans 1Mb */
3325
 
3326
        outw(inw(0x14+iobase)|(1<<8),0x14+iobase);
3327
        outw(inw(0x14+iobase)&0xFE03,0x14+iobase);
3328
        outw((inw(0x14+iobase)&0xFFFC), 0x14+iobase);
3329
        outw(inw(0x14+iobase)|(1<<7),0x14+iobase);
3330
 
3331
        outw(0xA1A0, 0x14+iobase);      /* 0300 ? */
3332
 
3333
        /* Now clear the APU control ram */
3334
        for(apu=0;apu<NR_APUS;apu++)
3335
        {
3336
                for(w=0;w<NR_APU_REGS;w++)
3337
                        apu_set_register(ess, apu|ESS_CHAN_HARD, w, 0);
3338
 
3339
        }
3340
 
3341
        return 0;
3342
 
3343
}
3344
 
3345
/* this guy tries to find the pci power management
3346
 * register bank.  this should really be in core
3347
 * code somewhere.  1 on success. */
3348
int
3349
parse_power(struct ess_card *card, struct pci_dev *pcidev)
3350
{
3351
        u32 n;
3352
        u16 w;
3353
        u8 next;
3354
        int max = 64;  /* an a 8bit guy pointing to 32bit guys
3355
                                can only express so much. */
3356
 
3357
        card->power_regs = 0;
3358
 
3359
        /* check to see if we have a capabilities list in
3360
                the config register */
3361
        pci_read_config_word(pcidev, PCI_STATUS, &w);
3362
        if(!(w & PCI_STATUS_CAP_LIST)) return 0;
3363
 
3364
        /* walk the list, starting at the head. */
3365
        pci_read_config_byte(pcidev,PCI_CAPABILITY_LIST,&next);
3366
 
3367
        while(next && max--) {
3368
                pci_read_config_dword(pcidev, next & ~3, &n);
3369
                if((n & 0xff) == PCI_CAP_ID_PM) {
3370
                        card->power_regs = next;
3371
                        break;
3372
                }
3373
                next = ((n>>8) & 0xff);
3374
        }
3375
 
3376
        return card->power_regs ? 1 : 0;
3377
}
3378
 
3379
static int __init
3380
maestro_probe(struct pci_dev *pcidev,const struct pci_device_id *pdid)
3381
{
3382
        int card_type = pdid->driver_data;
3383
        u32 n;
3384
        int iobase;
3385
        int i, ret;
3386
        struct ess_card *card;
3387
        struct ess_state *ess;
3388
        struct pm_dev *pmdev;
3389
        int num = 0;
3390
 
3391
/* when built into the kernel, we only print version if device is found */
3392
#ifndef MODULE
3393
        static int printed_version;
3394
        if (!printed_version++)
3395
                printk(version);
3396
#endif
3397
 
3398
        /* don't pick up weird modem maestros */
3399
        if(((pcidev->class >> 8) & 0xffff) != PCI_CLASS_MULTIMEDIA_AUDIO)
3400
                return -ENODEV;
3401
 
3402
 
3403
        if ((ret=pci_enable_device(pcidev)))
3404
                return ret;
3405
 
3406
        iobase = pci_resource_start(pcidev,0);
3407
        if (!iobase || !(pci_resource_flags(pcidev, 0 ) & IORESOURCE_IO))
3408
                return -ENODEV;
3409
 
3410
        if(pcidev->irq == 0)
3411
                return -ENODEV;
3412
 
3413
        /* stake our claim on the iospace */
3414
        if( request_region(iobase, 256, card_names[card_type]) == NULL )
3415
        {
3416
                printk(KERN_WARNING "maestro: can't allocate 256 bytes I/O at 0x%4.4x\n", iobase);
3417
                return -EBUSY;
3418
        }
3419
 
3420
        /* just to be sure */
3421
        pci_set_master(pcidev);
3422
 
3423
        card = kmalloc(sizeof(struct ess_card), GFP_KERNEL);
3424
        if(card == NULL)
3425
        {
3426
                printk(KERN_WARNING "maestro: out of memory\n");
3427
                release_region(iobase, 256);
3428
                return -ENOMEM;
3429
        }
3430
 
3431
        memset(card, 0, sizeof(*card));
3432
        card->pcidev = pcidev;
3433
 
3434
        pmdev = pm_register(PM_PCI_DEV, PM_PCI_ID(pcidev),
3435
                        maestro_pm_callback);
3436
        if (pmdev)
3437
                pmdev->data = card;
3438
 
3439
        card->iobase = iobase;
3440
        card->card_type = card_type;
3441
        card->irq = pcidev->irq;
3442
        card->magic = ESS_CARD_MAGIC;
3443
        spin_lock_init(&card->lock);
3444
        init_waitqueue_head(&card->suspend_queue);
3445
 
3446
        card->dock_mute_vol = 50;
3447
 
3448
        /* init our groups of 6 apus */
3449
        for(i=0;i<NR_DSPS;i++)
3450
        {
3451
                struct ess_state *s=&card->channels[i];
3452
 
3453
                s->index = i;
3454
 
3455
                s->card = card;
3456
                init_waitqueue_head(&s->dma_adc.wait);
3457
                init_waitqueue_head(&s->dma_dac.wait);
3458
                init_waitqueue_head(&s->open_wait);
3459
                spin_lock_init(&s->lock);
3460
                init_MUTEX(&s->open_sem);
3461
                s->magic = ESS_STATE_MAGIC;
3462
 
3463
                s->apu[0] = 6*i;
3464
                s->apu[1] = (6*i)+1;
3465
                s->apu[2] = (6*i)+2;
3466
                s->apu[3] = (6*i)+3;
3467
                s->apu[4] = (6*i)+4;
3468
                s->apu[5] = (6*i)+5;
3469
 
3470
                if(s->dma_adc.ready || s->dma_dac.ready || s->dma_adc.rawbuf)
3471
                        printk("maestro: BOTCH!\n");
3472
                /* register devices */
3473
                if ((s->dev_audio = register_sound_dsp(&ess_audio_fops, -1)) < 0)
3474
                        break;
3475
        }
3476
 
3477
        num = i;
3478
 
3479
        /* clear the rest if we ran out of slots to register */
3480
        for(;i<NR_DSPS;i++)
3481
        {
3482
                struct ess_state *s=&card->channels[i];
3483
                s->dev_audio = -1;
3484
        }
3485
 
3486
        ess = &card->channels[0];
3487
 
3488
        /*
3489
         *      Ok card ready. Begin setup proper
3490
         */
3491
 
3492
        printk(KERN_INFO "maestro: Configuring %s found at IO 0x%04X IRQ %d\n",
3493
                card_names[card_type],iobase,card->irq);
3494
        pci_read_config_dword(pcidev, PCI_SUBSYSTEM_VENDOR_ID, &n);
3495
        printk(KERN_INFO "maestro:  subvendor id: 0x%08x\n",n);
3496
 
3497
        /* turn off power management unless:
3498
         *      - the user explicitly asks for it
3499
         *              or
3500
         *              - we're not a 2e, lesser chipps seem to have problems.
3501
         *              - we're not on our _very_ small whitelist.  some implemenetations
3502
         *                      really dont' like the pm code, others require it.
3503
         *                      feel free to expand this as required.
3504
         */
3505
#define SUBSYSTEM_VENDOR(x) (x&0xffff)
3506
        if(     (use_pm != 1) &&
3507
                ((card_type != TYPE_MAESTRO2E)  || (SUBSYSTEM_VENDOR(n) != 0x1028)))
3508
                        use_pm = 0;
3509
 
3510
        if(!use_pm)
3511
                printk(KERN_INFO "maestro: not attempting power management.\n");
3512
        else {
3513
                if(!parse_power(card,pcidev))
3514
                        printk(KERN_INFO "maestro: no PCI power management interface found.\n");
3515
                else {
3516
                        pci_read_config_dword(pcidev, card->power_regs, &n);
3517
                        printk(KERN_INFO "maestro: PCI power management capability: 0x%x\n",n>>16);
3518
                }
3519
        }
3520
 
3521
        maestro_config(card);
3522
 
3523
        if(maestro_ac97_get(card, 0x00)==0x0080) {
3524
                printk(KERN_ERR "maestro: my goodness!  you seem to have a pt101 codec, which is quite rare.\n"
3525
                                "\tyou should tell someone about this.\n");
3526
        } else {
3527
                maestro_ac97_init(card);
3528
        }
3529
 
3530
        if ((card->dev_mixer = register_sound_mixer(&ess_mixer_fops, -1)) < 0) {
3531
                printk("maestro: couldn't register mixer!\n");
3532
        } else {
3533
                memcpy(card->mix.mixer_state,mixer_defaults,sizeof(card->mix.mixer_state));
3534
                mixer_push_state(card);
3535
        }
3536
 
3537
        if((ret=request_irq(card->irq, ess_interrupt, SA_SHIRQ, card_names[card_type], card)))
3538
        {
3539
                printk(KERN_ERR "maestro: unable to allocate irq %d,\n", card->irq);
3540
                unregister_sound_mixer(card->dev_mixer);
3541
                for(i=0;i<NR_DSPS;i++)
3542
                {
3543
                        struct ess_state *s = &card->channels[i];
3544
                        if(s->dev_audio != -1)
3545
                                unregister_sound_dsp(s->dev_audio);
3546
                }
3547
                release_region(card->iobase, 256);
3548
                unregister_reboot_notifier(&maestro_nb);
3549
                kfree(card);
3550
                return ret;
3551
        }
3552
 
3553
        /* Turn on hardware volume control interrupt.
3554
           This has to come after we grab the IRQ above,
3555
           or a crash will result on installation if a button has been pressed,
3556
           because in that case we'll get an immediate interrupt. */
3557
        n = inw(iobase+0x18);
3558
        n|=(1<<6);
3559
        outw(n, iobase+0x18);
3560
 
3561
        pci_set_drvdata(pcidev,card);
3562
        /* now go to sleep 'till something interesting happens */
3563
        maestro_power(card,ACPI_D2);
3564
 
3565
        printk(KERN_INFO "maestro: %d channels configured.\n", num);
3566
        return 0;
3567
}
3568
 
3569
static void maestro_remove(struct pci_dev *pcidev) {
3570
        struct ess_card *card = pci_get_drvdata(pcidev);
3571
        int i;
3572
        u32 n;
3573
 
3574
        /* XXX maybe should force stop bob, but should be all
3575
                stopped by _release by now */
3576
 
3577
        /* Turn off hardware volume control interrupt.
3578
           This has to come before we leave the IRQ below,
3579
           or a crash results if a button is pressed ! */
3580
 
3581
        n = inw(card->iobase+0x18);
3582
        n&=~(1<<6);
3583
        outw(n, card->iobase+0x18);
3584
 
3585
        free_irq(card->irq, card);
3586
        unregister_sound_mixer(card->dev_mixer);
3587
        for(i=0;i<NR_DSPS;i++)
3588
        {
3589
                struct ess_state *ess = &card->channels[i];
3590
                if(ess->dev_audio != -1)
3591
                        unregister_sound_dsp(ess->dev_audio);
3592
        }
3593
        /* Goodbye, Mr. Bond. */
3594
        maestro_power(card,ACPI_D3);
3595
        release_region(card->iobase, 256);
3596
        kfree(card);
3597
        pci_set_drvdata(pcidev,NULL);
3598
}
3599
 
3600
static struct pci_device_id maestro_pci_tbl[] __devinitdata = {
3601
        {PCI_VENDOR_ESS, PCI_DEVICE_ID_ESS_ESS1968, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TYPE_MAESTRO2},
3602
        {PCI_VENDOR_ESS, PCI_DEVICE_ID_ESS_ESS1978, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TYPE_MAESTRO2E},
3603
        {PCI_VENDOR_ESS_OLD, PCI_DEVICE_ID_ESS_ESS0100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, TYPE_MAESTRO},
3604
        {0,}
3605
};
3606
MODULE_DEVICE_TABLE(pci, maestro_pci_tbl);
3607
 
3608
static struct pci_driver maestro_pci_driver = {
3609
        name:"maestro",
3610
        id_table:maestro_pci_tbl,
3611
        probe:maestro_probe,
3612
        remove:maestro_remove,
3613
};
3614
 
3615
int __init init_maestro(void)
3616
{
3617
        int rc;
3618
 
3619
        rc = pci_module_init(&maestro_pci_driver);
3620
        if (rc < 0)
3621
                return rc;
3622
 
3623
        if (register_reboot_notifier(&maestro_nb))
3624
                printk(KERN_WARNING "maestro: reboot notifier registration failed; may not reboot properly.\n");
3625
#ifdef MODULE
3626
        printk(version);
3627
#endif
3628
        if (dsps_order < 0)   {
3629
                dsps_order = 1;
3630
                printk(KERN_WARNING "maestro: clipping dsps_order to %d\n",dsps_order);
3631
        }
3632
        else if (dsps_order > MAX_DSP_ORDER)  {
3633
                dsps_order = MAX_DSP_ORDER;
3634
                printk(KERN_WARNING "maestro: clipping dsps_order to %d\n",dsps_order);
3635
        }
3636
        return 0;
3637
}
3638
 
3639
static int maestro_notifier(struct notifier_block *nb, unsigned long event, void *buf)
3640
{
3641
        /* this notifier is called when the kernel is really shut down. */
3642
        M_printk("maestro: shutting down\n");
3643
        /* this will remove all card instances too */
3644
        pci_unregister_driver(&maestro_pci_driver);
3645
        /* XXX dunno about power management */
3646
        return NOTIFY_OK;
3647
}
3648
 
3649
/* --------------------------------------------------------------------- */
3650
 
3651
 
3652
void cleanup_maestro(void) {
3653
        M_printk("maestro: unloading\n");
3654
        pci_unregister_driver(&maestro_pci_driver);
3655
        pm_unregister_all(maestro_pm_callback);
3656
        unregister_reboot_notifier(&maestro_nb);
3657
}
3658
 
3659
/* --------------------------------------------------------------------- */
3660
 
3661
void
3662
check_suspend(struct ess_card *card)
3663
{
3664
        DECLARE_WAITQUEUE(wait, current);
3665
 
3666
        if(!card->in_suspend) return;
3667
 
3668
        card->in_suspend++;
3669
        add_wait_queue(&(card->suspend_queue), &wait);
3670
        current->state = TASK_UNINTERRUPTIBLE;
3671
        schedule();
3672
        remove_wait_queue(&(card->suspend_queue), &wait);
3673
        current->state = TASK_RUNNING;
3674
}
3675
 
3676
static int
3677
maestro_suspend(struct ess_card *card)
3678
{
3679
        unsigned long flags;
3680
        int i,j;
3681
 
3682
        save_flags(flags);
3683
        cli(); /* over-kill */
3684
 
3685
        M_printk("maestro: apm in dev %p\n",card);
3686
 
3687
        /* we have to read from the apu regs, need
3688
                to power it up */
3689
        maestro_power(card,ACPI_D0);
3690
 
3691
        for(i=0;i<NR_DSPS;i++) {
3692
                struct ess_state *s = &card->channels[i];
3693
 
3694
                if(s->dev_audio == -1)
3695
                        continue;
3696
 
3697
                M_printk("maestro: stopping apus for device %d\n",i);
3698
                stop_dac(s);
3699
                stop_adc(s);
3700
                for(j=0;j<6;j++)
3701
                        card->apu_map[s->apu[j]][5]=apu_get_register(s,j,5);
3702
 
3703
        }
3704
 
3705
        /* get rid of interrupts? */
3706
        if( card->dsps_open > 0)
3707
                stop_bob(&card->channels[0]);
3708
 
3709
        card->in_suspend++;
3710
 
3711
        restore_flags(flags);
3712
 
3713
        /* we trust in the bios to power down the chip on suspend.
3714
         * XXX I'm also not sure that in_suspend will protect
3715
         * against all reg accesses from here on out.
3716
         */
3717
        return 0;
3718
}
3719
static int
3720
maestro_resume(struct ess_card *card)
3721
{
3722
        unsigned long flags;
3723
        int i;
3724
 
3725
        save_flags(flags);
3726
        cli(); /* over-kill */
3727
 
3728
        card->in_suspend = 0;
3729
 
3730
        M_printk("maestro: resuming card at %p\n",card);
3731
 
3732
        /* restore all our config */
3733
        maestro_config(card);
3734
        /* need to restore the base pointers.. */
3735
        if(card->dmapages)
3736
                set_base_registers(&card->channels[0],card->dmapages);
3737
 
3738
        mixer_push_state(card);
3739
 
3740
        /* set each channels' apu control registers before
3741
         * restoring audio
3742
         */
3743
        for(i=0;i<NR_DSPS;i++) {
3744
                struct ess_state *s = &card->channels[i];
3745
                int chan,reg;
3746
 
3747
                if(s->dev_audio == -1)
3748
                        continue;
3749
 
3750
                for(chan = 0 ; chan < 6 ; chan++) {
3751
                        wave_set_register(s,s->apu[chan]<<3,s->apu_base[chan]);
3752
                        for(reg = 1 ; reg < NR_APU_REGS ; reg++)
3753
                                apu_set_register(s,chan,reg,s->card->apu_map[s->apu[chan]][reg]);
3754
                }
3755
                for(chan = 0 ; chan < 6 ; chan++)
3756
                        apu_set_register(s,chan,0,s->card->apu_map[s->apu[chan]][0] & 0xFF0F);
3757
        }
3758
 
3759
        /* now we flip on the music */
3760
 
3761
        if( card->dsps_open <= 0) {
3762
                /* this card's idle */
3763
                maestro_power(card,ACPI_D2);
3764
        } else {
3765
                /* ok, we're actually playing things on
3766
                        this card */
3767
                maestro_power(card,ACPI_D0);
3768
                start_bob(&card->channels[0]);
3769
                for(i=0;i<NR_DSPS;i++) {
3770
                        struct ess_state *s = &card->channels[i];
3771
 
3772
                        /* these use the apu_mode, and can handle
3773
                                spurious calls */
3774
                        start_dac(s);
3775
                        start_adc(s);
3776
                }
3777
        }
3778
 
3779
        restore_flags(flags);
3780
 
3781
        /* all right, we think things are ready,
3782
                wake up people who were using the device
3783
                when we suspended */
3784
        wake_up(&(card->suspend_queue));
3785
 
3786
        return 0;
3787
}
3788
 
3789
int
3790
maestro_pm_callback(struct pm_dev *dev, pm_request_t rqst, void *data)
3791
{
3792
        struct ess_card *card = (struct ess_card*) dev->data;
3793
 
3794
        if ( ! card ) goto out;
3795
 
3796
        M_printk("maestro: pm event 0x%x received for card %p\n", rqst, card);
3797
 
3798
        switch (rqst) {
3799
                case PM_SUSPEND:
3800
                        maestro_suspend(card);
3801
                break;
3802
                case PM_RESUME:
3803
                        maestro_resume(card);
3804
                break;
3805
                /*
3806
                 * we'd also like to find out about
3807
                 * power level changes because some biosen
3808
                 * do mean things to the maestro when they
3809
                 * change their power state.
3810
                 */
3811
        }
3812
out:
3813
        return 0;
3814
}
3815
 
3816
module_init(init_maestro);
3817
module_exit(cleanup_maestro);

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