OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [drivers/] [sound/] [rme96xx.c] - Blame information for rev 1765

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 1275 phoenix
/* (C) 2000 Guenter Geiger <geiger@debian.org>
2
   with copy/pastes from the driver of Winfried Ritsch <ritsch@iem.kug.ac.at>
3
   based on es1370.c
4
 
5
   *  10 Jan 2001: 0.1 initial version
6
   *  19 Jan 2001: 0.2 fixed bug in select()
7
   *  27 Apr 2001: 0.3 more than one card usable
8
   *  11 May 2001: 0.4 fixed for SMP, included into kernel source tree
9
   *  17 May 2001: 0.5 draining code didn't work on new cards
10
   *  18 May 2001: 0.6 remove synchronize_irq() call
11
   *  17 Jul 2001: 0.7 updated xrmectrl to make it work for newer cards
12
   *   2 feb 2002: 0.8 fixed pci device handling, see below for patches from Heiko (Thanks!)
13
                       Marcus Meissner <Marcus.Meissner@caldera.de>
14
 
15
                       Modifications - Heiko Purnhagen <purnhage@tnt.uni-hannover.de>
16
                       HP20020108 fixed handling of "large" read()
17
                       HP20020116 towards REV 1.5 support, based on ALSA's card-rme9652.c
18
                       HP20020118 made mixer ioctl and handling of devices>1 more safe
19
                       HP20020201 fixed handling of "large" read() properly
20
                       added REV 1.5 S/P-DIF receiver support
21
                       SNDCTL_DSP_SPEED now returns the actual speed
22
 
23
TODO:
24
   - test more than one card --- done
25
   - check for pci IOREGION (see es1370) in rme96xx_probe ??
26
   - error detection
27
   - mmap interface
28
   - mixer mmap interface
29
   - mixer ioctl
30
   - get rid of noise upon first open (why ??)
31
   - allow multiple open (at least for read)
32
   - allow multiple open for non overlapping regions
33
   - recheck the multiple devices part (offsets of different devices, etc)
34
   - do decent draining in _release --- done
35
   - SMP support
36
   - what about using fragstotal>2 for small fragsize? (HP20020118)
37
   - add support for AFMT_S32_LE
38
*/
39
 
40
 
41
#ifndef RMEVERSION
42
#define RMEVERSION "0.8"
43
#endif
44
 
45
#include <linux/version.h>
46
#include <linux/module.h>
47
#include <linux/string.h>
48
#include <linux/sched.h>
49
#include <linux/sound.h>
50
#include <linux/soundcard.h>
51
#include <linux/pci.h>
52
#include <linux/smp_lock.h>
53
#include <linux/delay.h>
54
#include <linux/slab.h>
55
#include <asm/dma.h>
56
#include <linux/init.h>
57
#include <linux/poll.h>
58
#include "rme96xx.h"
59
 
60
#define NR_DEVICE 2
61
 
62
static int devices = 1;
63
MODULE_PARM(devices, "1-" __MODULE_STRING(NR_DEVICE) "i");
64
MODULE_PARM_DESC(devices, "number of dsp devices allocated by the driver");
65
 
66
 
67
MODULE_AUTHOR("Guenter Geiger, geiger@debian.org");
68
MODULE_DESCRIPTION("RME9652/36 \"Hammerfall\" Driver");
69
/*MODULE_LICENSE("GPL");*/
70
 
71
 
72
#ifdef DEBUG
73
#define DBG(x) printk("RME_DEBUG:");x
74
#define COMM(x) printk("RME_COMM: " x "\n");
75
#else
76
#define DBG(x) while (0) {}
77
#define COMM(x)
78
#endif
79
 
80
/*--------------------------------------------------------------------------
81
                        Preporcessor Macros and Definitions
82
 --------------------------------------------------------------------------*/
83
 
84
#define RME96xx_MAGIC 0x6473
85
 
86
/* Registers-Space in offsets from base address with 16MByte size */
87
 
88
#define RME96xx_IO_EXTENT     16l*1024l*1024l
89
#define RME96xx_CHANNELS_PER_CARD 26
90
 
91
/*                  Write - Register */
92
 
93
/* 0,4,8,12,16,20,24,28 ... hardware init (erasing fifo-pointer intern) */
94
#define RME96xx_num_of_init_regs   8
95
 
96
#define RME96xx_init_buffer       (0/4)
97
#define RME96xx_play_buffer       (32/4)  /* pointer to 26x64kBit RAM from mainboard */
98
#define RME96xx_rec_buffer        (36/4)  /* pointer to 26x64kBit RAM from mainboard */
99
#define RME96xx_control_register  (64/4)  /* exact meaning see below */
100
#define RME96xx_irq_clear         (96/4)  /* irq acknowledge */
101
#define RME96xx_time_code         (100/4) /* if used with alesis adat */
102
#define RME96xx_thru_base         (128/4) /* 132...228 Thru for 26 channels */
103
#define RME96xx_thru_channels     RME96xx_CHANNELS_PER_CARD
104
 
105
/*                     Read Register */
106
 
107
#define RME96xx_status_register    0     /* meaning see below */
108
 
109
 
110
 
111
/* Status Register: */
112
/* ------------------------------------------------------------------------ */
113
#define RME96xx_IRQ          0x0000001 /* IRQ is High if not reset by RMExx_irq_clear */
114
#define RME96xx_lock_2       0x0000002 /* ADAT 3-PLL: 1=locked, 0=unlocked */
115
#define RME96xx_lock_1       0x0000004 /* ADAT 2-PLL: 1=locked, 0=unlocked */
116
#define RME96xx_lock_0       0x0000008 /* ADAT 1-PLL: 1=locked, 0=unlocked */
117
 
118
#define RME96xx_fs48         0x0000010 /* sample rate 0 ...44.1/88.2,  1 ... 48/96 Khz */
119
#define RME96xx_wsel_rd      0x0000020 /* if Word-Clock is used and valid then 1 */
120
#define RME96xx_buf_pos1     0x0000040 /* Bit 6..15 : Position of buffer-pointer in 64Bytes-blocks */
121
#define RME96xx_buf_pos2     0x0000080 /* resolution +/- 1 64Byte/block (since 64Bytes bursts) */
122
 
123
#define RME96xx_buf_pos3     0x0000100 /* 10 bits = 1024 values */
124
#define RME96xx_buf_pos4     0x0000200 /* if we mask off the first 6 bits, we can take the status */
125
#define RME96xx_buf_pos5     0x0000400 /* register as sample counter in the hardware buffer */
126
#define RME96xx_buf_pos6     0x0000800 
127
 
128
#define RME96xx_buf_pos7     0x0001000 
129
#define RME96xx_buf_pos8     0x0002000 
130
#define RME96xx_buf_pos9     0x0004000
131
#define RME96xx_buf_pos10    0x0008000 
132
 
133
#define RME96xx_sync_2       0x0010000 /* if ADAT-IN3 synced to system clock */
134
#define RME96xx_sync_1       0x0020000 /* if ADAT-IN2 synced to system clock */
135
#define RME96xx_sync_0       0x0040000 /* if ADAT-IN1 synced to system clock */
136
#define RME96xx_DS_rd        0x0080000 /* 1=Double Speed, 0=Normal Speed */
137
 
138
#define RME96xx_tc_busy      0x0100000 /* 1=time-code copy in progress (960ms) */
139
#define RME96xx_tc_out       0x0200000 /* time-code out bit */
140
#define RME96xx_F_0          0x0400000 /*  000=64kHz, 100=88.2kHz, 011=96kHz */
141
#define RME96xx_F_1          0x0800000 /*  111=32kHz, 110=44.1kHz, 101=48kHz */
142
 
143
#define RME96xx_F_2          0x1000000 /*  001=Rev 1.5+ external Crystal Chip */
144
#define RME96xx_ERF          0x2000000 /* Error-Flag of SDPIF Receiver (1=No Lock)*/
145
#define RME96xx_buffer_id    0x4000000 /* toggles by each interrupt on rec/play */
146
#define RME96xx_tc_valid     0x8000000 /* 1 = a signal is detected on time-code input */
147
#define RME96xx_SPDIF_READ  0x10000000 /* byte available from Rev 1.5+ SPDIF interface */
148
 
149
/* Status Register Fields */
150
 
151
#define RME96xx_lock            (RME96xx_lock_0|RME96xx_lock_1|RME96xx_lock_2)
152
#define RME96xx_sync            (RME96xx_sync_0|RME96xx_sync_1|RME96xx_sync_2)
153
#define RME96xx_F               (RME96xx_F_0|RME96xx_F_1|RME96xx_F_2)
154
#define rme96xx_decode_spdif_rate(x) ((x)>>22)
155
 
156
/* Bit 6..15 : h/w buffer pointer */
157
#define RME96xx_buf_pos          0x000FFC0 
158
/* Bits 31,30,29 are bits 5,4,3 of h/w pointer position on later
159
   Rev G EEPROMS and Rev 1.5 cards or later.
160
*/
161
#define RME96xx_REV15_buf_pos(x) ((((x)&0xE0000000)>>26)|((x)&RME96xx_buf_pos))
162
 
163
 
164
/* Control-Register: */
165
/*--------------------------------------------------------------------------------*/
166
 
167
#define RME96xx_start_bit       0x0001 /* start record/play */
168
#define RME96xx_latency0        0x0002 /* Buffer size / latency */
169
#define RME96xx_latency1        0x0004 /*   buffersize = 512Bytes * 2^n */
170
#define RME96xx_latency2        0x0008 /*   0=64samples ... 7=8192samples */
171
 
172
#define RME96xx_Master          0x0010 /* Clock Mode 1=Master, 0=Slave/Auto */
173
#define RME96xx_IE              0x0020 /* Interupt Enable */
174
#define RME96xx_freq            0x0040 /* samplerate 0=44.1/88.2, 1=48/96 kHz*/
175
#define RME96xx_freq1           0x0080 /* samplerate 0=32 kHz, 1=other rates ??? (from ALSA, but may be wrong) */
176
#define RME96xx_DS              0x0100 /* double speed 0=44.1/48, 1=88.2/96 Khz */
177
#define RME96xx_PRO             0x0200 /* SPDIF-OUT 0=consumer, 1=professional */
178
#define RME96xx_EMP             0x0400 /* SPDIF-OUT emphasis 0=off, 1=on */
179
#define RME96xx_Dolby           0x0800 /* SPDIF-OUT non-audio bit 1=set, 0=unset */
180
 
181
#define RME96xx_opt_out         0x1000 /* use 1st optical OUT as SPDIF: 1=yes, 0=no */
182
#define RME96xx_wsel            0x2000 /* use Wordclock as sync (overwrites master) */
183
#define RME96xx_inp_0           0x4000 /* SPDIF-IN 00=optical (ADAT1), */
184
#define RME96xx_inp_1           0x8000 /* 01=coaxial (Cinch), 10=internal CDROM */
185
 
186
#define RME96xx_SyncRef0       0x10000 /* preferred sync-source in autosync */
187
#define RME96xx_SyncRef1       0x20000 /* 00=ADAT1, 01=ADAT2, 10=ADAT3, 11=SPDIF */
188
 
189
#define RME96xx_SPDIF_RESET    (1<<18) /* Rev 1.5+: h/w SPDIF receiver */
190
#define RME96xx_SPDIF_SELECT   (1<<19)
191
#define RME96xx_SPDIF_CLOCK    (1<<20)
192
#define RME96xx_SPDIF_WRITE    (1<<21)
193
#define RME96xx_ADAT1_INTERNAL (1<<22) /* Rev 1.5+: if set, internal CD connector carries ADAT */
194
 
195
 
196
#define RME96xx_ctrl_init            (RME96xx_latency0 |\
197
                                     RME96xx_Master |\
198
                                     RME96xx_inp_1)
199
 
200
 
201
/* Control register fields and shortcuts */
202
 
203
#define RME96xx_latency (RME96xx_latency0|RME96xx_latency1|RME96xx_latency2)
204
#define RME96xx_inp         (RME96xx_inp_0|RME96xx_inp_1)
205
#define RME96xx_SyncRef    (RME96xx_SyncRef0|RME96xx_SyncRef1)
206
#define RME96xx_mixer_allowed (RME96xx_Master|RME96xx_PRO|RME96xx_EMP|RME96xx_Dolby|RME96xx_opt_out|RME96xx_wsel|RME96xx_inp|RME96xx_SyncRef|RME96xx_ADAT1_INTERNAL)
207
 
208
/* latency = 512Bytes * 2^n, where n is made from Bit3 ... Bit1  (??? HP20020201) */
209
 
210
#define RME96xx_SET_LATENCY(x)   (((x)&0x7)<<1)
211
#define RME96xx_GET_LATENCY(x)   (((x)>>1)&0x7)
212
#define RME96xx_SET_inp(x) (((x)&0x3)<<14)
213
#define RME96xx_GET_inp(x)   (((x)>>14)&0x3)
214
#define RME96xx_SET_SyncRef(x) (((x)&0x3)<<17)
215
#define RME96xx_GET_SyncRef(x)   (((x)>>17)&0x3)
216
 
217
 
218
/* buffer sizes */
219
#define RME96xx_BYTES_PER_SAMPLE  4 /* sizeof(u32) */
220
#define RME_16K 16*1024
221
 
222
#define RME96xx_DMA_MAX_SAMPLES  (RME_16K)
223
#define RME96xx_DMA_MAX_SIZE     (RME_16K * RME96xx_BYTES_PER_SAMPLE)
224
#define RME96xx_DMA_MAX_SIZE_ALL (RME96xx_DMA_MAX_SIZE * RME96xx_CHANNELS_PER_CARD)
225
 
226
#define RME96xx_NUM_OF_FRAGMENTS     2
227
#define RME96xx_FRAGMENT_MAX_SIZE    (RME96xx_DMA_MAX_SIZE/2)
228
#define RME96xx_FRAGMENT_MAX_SAMPLES (RME96xx_DMA_MAX_SAMPLES/2)
229
#define RME96xx_MAX_LATENCY       7   /* 16k samples */
230
 
231
 
232
#define RME96xx_MAX_DEVS 4 /* we provide some OSS stereodevs */
233
#define RME96xx_MASK_DEVS 0x3 /* RME96xx_MAX_DEVS-1 */
234
 
235
#define RME_MESS "rme96xx:"
236
 
237
/*------------------------------------------------------------------------
238
                  Types, struct and function declarations
239
 ------------------------------------------------------------------------*/
240
 
241
 
242
/* --------------------------------------------------------------------- */
243
 
244
static const char invalid_magic[] = KERN_CRIT RME_MESS" invalid magic value\n";
245
 
246
#define VALIDATE_STATE(s)                         \
247
({                                                \
248
        if (!(s) || (s)->magic != RME96xx_MAGIC) { \
249
                printk(invalid_magic);            \
250
                return -ENXIO;                    \
251
        }                                         \
252
})
253
 
254
/* --------------------------------------------------------------------- */
255
 
256
 
257
static struct file_operations rme96xx_audio_fops;
258
static struct file_operations rme96xx_mixer_fops;
259
static int numcards;
260
 
261
typedef int32_t raw_sample_t;
262
 
263
typedef struct _rme96xx_info {
264
 
265
        /* hardware settings */
266
        int magic;
267
        struct pci_dev * pcidev; /* pci_dev structure */
268
        unsigned long *iobase;
269
        unsigned int irq;
270
 
271
        /* list of rme96xx devices */
272
        struct list_head devs;
273
 
274
        spinlock_t lock;
275
 
276
        u32 *recbuf;             /* memory for rec buffer */
277
        u32 *playbuf;            /* memory for play buffer */
278
 
279
        u32 control_register;
280
 
281
        u32 thru_bits; /* thru 1=on, 0=off channel 1=Bit1... channel 26= Bit26 */
282
 
283
        int hw_rev;             /* h/w rev * 10 (i.e. 1.5 has hw_rev = 15) */
284
        char *card_name;        /* hammerfall or hammerfall light names */
285
 
286
        int open_count;         /* unused ???   HP20020201 */
287
 
288
        int rate;
289
        int latency;
290
        unsigned int fragsize;
291
        int started;
292
 
293
        int hwptr; /* can be negativ because of pci burst offset  */
294
        unsigned int hwbufid;  /* set by interrupt, buffer which is written/read now */
295
 
296
        struct dmabuf {
297
 
298
                unsigned int format;
299
                int formatshift;
300
                int inchannels;       /* number of channels for device */
301
                int outchannels;       /* number of channels for device */
302
                int mono; /* if true, we play mono on 2 channels */
303
                int inoffset; /* which channel is considered the first one */
304
                int outoffset;
305
 
306
                /* state */
307
                int opened;               /* open() made */
308
                int started;              /* first write/read */
309
                int mmapped;              /* mmap */
310
                int open_mode;
311
 
312
                struct _rme96xx_info *s;
313
 
314
                /* pointer to read/write position in buffer */
315
                unsigned readptr;
316
                unsigned writeptr;
317
 
318
                unsigned error; /* over/underruns cleared on sync again */
319
 
320
                /* waiting and locking */
321
                wait_queue_head_t wait;
322
                struct semaphore  open_sem;
323
                wait_queue_head_t open_wait;
324
 
325
        } dma[RME96xx_MAX_DEVS];
326
 
327
        int dspnum[RME96xx_MAX_DEVS];  /* register with sound subsystem */
328
        int mixer;  /* register with sound subsystem */
329
} rme96xx_info;
330
 
331
 
332
/* fiddling with the card (first level hardware control) */
333
 
334
inline void rme96xx_set_ctrl(rme96xx_info* s,int mask)
335
{
336
 
337
        s->control_register|=mask;
338
        writel(s->control_register,s->iobase + RME96xx_control_register);
339
 
340
}
341
 
342
inline void rme96xx_unset_ctrl(rme96xx_info* s,int mask)
343
{
344
 
345
        s->control_register&=(~mask);
346
        writel(s->control_register,s->iobase + RME96xx_control_register);
347
 
348
}
349
 
350
inline int rme96xx_get_sample_rate_status(rme96xx_info* s)
351
{
352
        int val;
353
        u32 status;
354
        status = readl(s->iobase + RME96xx_status_register);
355
        val = (status & RME96xx_fs48) ? 48000 : 44100;
356
        if (status & RME96xx_DS_rd)
357
                val *= 2;
358
        return val;
359
}
360
 
361
inline int rme96xx_get_sample_rate_ctrl(rme96xx_info* s)
362
{
363
        int val;
364
        val = (s->control_register & RME96xx_freq) ? 48000 : 44100;
365
        if (s->control_register & RME96xx_DS)
366
                val *= 2;
367
        return val;
368
}
369
 
370
 
371
/* code from ALSA card-rme9652.c for rev 1.5 SPDIF receiver   HP 20020201 */
372
 
373
static void rme96xx_spdif_set_bit (rme96xx_info* s, int mask, int onoff)
374
{
375
        if (onoff)
376
                s->control_register |= mask;
377
        else
378
                s->control_register &= ~mask;
379
 
380
        writel(s->control_register,s->iobase + RME96xx_control_register);
381
}
382
 
383
static void rme96xx_spdif_write_byte (rme96xx_info* s, const int val)
384
{
385
        long mask;
386
        long i;
387
 
388
        for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) {
389
                if (val & mask)
390
                        rme96xx_spdif_set_bit (s, RME96xx_SPDIF_WRITE, 1);
391
                else
392
                        rme96xx_spdif_set_bit (s, RME96xx_SPDIF_WRITE, 0);
393
 
394
                rme96xx_spdif_set_bit (s, RME96xx_SPDIF_CLOCK, 1);
395
                rme96xx_spdif_set_bit (s, RME96xx_SPDIF_CLOCK, 0);
396
        }
397
}
398
 
399
static int rme96xx_spdif_read_byte (rme96xx_info* s)
400
{
401
        long mask;
402
        long val;
403
        long i;
404
 
405
        val = 0;
406
 
407
        for (i = 0, mask = 0x80;  i < 8; i++, mask >>= 1) {
408
                rme96xx_spdif_set_bit (s, RME96xx_SPDIF_CLOCK, 1);
409
                if (readl(s->iobase + RME96xx_status_register) & RME96xx_SPDIF_READ)
410
                        val |= mask;
411
                rme96xx_spdif_set_bit (s, RME96xx_SPDIF_CLOCK, 0);
412
        }
413
 
414
        return val;
415
}
416
 
417
static void rme96xx_write_spdif_codec (rme96xx_info* s, const int address, const int data)
418
{
419
        rme96xx_spdif_set_bit (s, RME96xx_SPDIF_SELECT, 1);
420
        rme96xx_spdif_write_byte (s, 0x20);
421
        rme96xx_spdif_write_byte (s, address);
422
        rme96xx_spdif_write_byte (s, data);
423
        rme96xx_spdif_set_bit (s, RME96xx_SPDIF_SELECT, 0);
424
}
425
 
426
 
427
static int rme96xx_spdif_read_codec (rme96xx_info* s, const int address)
428
{
429
        int ret;
430
 
431
        rme96xx_spdif_set_bit (s, RME96xx_SPDIF_SELECT, 1);
432
        rme96xx_spdif_write_byte (s, 0x20);
433
        rme96xx_spdif_write_byte (s, address);
434
        rme96xx_spdif_set_bit (s, RME96xx_SPDIF_SELECT, 0);
435
        rme96xx_spdif_set_bit (s, RME96xx_SPDIF_SELECT, 1);
436
 
437
        rme96xx_spdif_write_byte (s, 0x21);
438
        ret = rme96xx_spdif_read_byte (s);
439
        rme96xx_spdif_set_bit (s, RME96xx_SPDIF_SELECT, 0);
440
 
441
        return ret;
442
}
443
 
444
static void rme96xx_initialize_spdif_receiver (rme96xx_info* s)
445
{
446
        /* XXX what unsets this ? */
447
        /* no idea ???   HP 20020201 */
448
 
449
        s->control_register |= RME96xx_SPDIF_RESET;
450
 
451
        rme96xx_write_spdif_codec (s, 4, 0x40);
452
        rme96xx_write_spdif_codec (s, 17, 0x13);
453
        rme96xx_write_spdif_codec (s, 6, 0x02);
454
}
455
 
456
static inline int rme96xx_spdif_sample_rate (rme96xx_info *s, int *spdifrate)
457
{
458
        unsigned int rate_bits;
459
 
460
        *spdifrate = 0x1;
461
        if (readl(s->iobase + RME96xx_status_register) & RME96xx_ERF) {
462
                return -1;      /* error condition */
463
        }
464
 
465
        if (s->hw_rev == 15) {
466
 
467
                int x, y, ret;
468
 
469
                x = rme96xx_spdif_read_codec (s, 30);
470
 
471
                if (x != 0)
472
                        y = 48000 * 64 / x;
473
                else
474
                        y = 0;
475
 
476
                if      (y > 30400 && y < 33600)  {ret = 32000; *spdifrate = 0x7;}
477
                else if (y > 41900 && y < 46000)  {ret = 44100; *spdifrate = 0x6;}
478
                else if (y > 46000 && y < 50400)  {ret = 48000; *spdifrate = 0x5;}
479
                else if (y > 60800 && y < 67200)  {ret = 64000; *spdifrate = 0x0;}
480
                else if (y > 83700 && y < 92000)  {ret = 88200; *spdifrate = 0x4;}
481
                else if (y > 92000 && y < 100000) {ret = 96000; *spdifrate = 0x3;}
482
                else                              {ret = 0; *spdifrate = 0x1;}
483
                return ret;
484
        }
485
 
486
        rate_bits = readl(s->iobase + RME96xx_status_register) & RME96xx_F;
487
 
488
        switch (*spdifrate = rme96xx_decode_spdif_rate(rate_bits)) {
489
        case 0x7:
490
                return 32000;
491
                break;
492
 
493
        case 0x6:
494
                return 44100;
495
                break;
496
 
497
        case 0x5:
498
                return 48000;
499
                break;
500
 
501
        case 0x4:
502
                return 88200;
503
                break;
504
 
505
        case 0x3:
506
                return 96000;
507
                break;
508
 
509
        case 0x0:
510
                return 64000;
511
                break;
512
 
513
        default:
514
                /* was an ALSA warning ...
515
                  snd_printk("%s: unknown S/PDIF input rate (bits = 0x%x)\n",
516
                  s->card_name, rate_bits);
517
                */
518
                return 0;
519
                break;
520
        }
521
}
522
 
523
/* end of code from ALSA card-rme9652.c */
524
 
525
 
526
 
527
/* the hwbuf in the status register seems to have some jitter, to get rid of
528
   it, we first only let the numbers grow, to be on the secure side we
529
   subtract a certain amount RME96xx_BURSTBYTES from the resulting number */
530
 
531
/* the function returns the hardware pointer in bytes */
532
#define RME96xx_BURSTBYTES -64  /* bytes by which hwptr could be off */
533
 
534
inline int rme96xx_gethwptr(rme96xx_info* s,int exact)
535
{
536
        long flags;
537
        if (exact) {
538
                unsigned int hwp;
539
/* the hwptr seems to be rather unreliable :(, so we don't use it */
540
                spin_lock_irqsave(&s->lock,flags);
541
 
542
                hwp  = readl(s->iobase + RME96xx_status_register) & 0xffc0;
543
                s->hwptr = (hwp < s->hwptr) ? s->hwptr : hwp;
544
//              s->hwptr = hwp;
545
 
546
                spin_unlock_irqrestore(&s->lock,flags);
547
                return (s->hwptr+RME96xx_BURSTBYTES) & ((s->fragsize<<1)-1);
548
        }
549
        return (s->hwbufid ? s->fragsize : 0);
550
}
551
 
552
inline void rme96xx_setlatency(rme96xx_info* s,int l)
553
{
554
        s->latency = l;
555
        s->fragsize = 1<<(8+l);
556
        rme96xx_unset_ctrl(s,RME96xx_latency);
557
        rme96xx_set_ctrl(s,RME96xx_SET_LATENCY(l));
558
}
559
 
560
 
561
static void rme96xx_clearbufs(struct dmabuf* dma)
562
{
563
        int i,j;
564
        unsigned long flags;
565
 
566
        /* clear dmabufs */
567
        for(i=0;i<devices;i++) {
568
                for (j=0;j<dma->outchannels + dma->mono;j++)
569
                        memset(&dma->s->playbuf[(dma->outoffset + j)*RME96xx_DMA_MAX_SAMPLES],
570
                               0, RME96xx_DMA_MAX_SIZE);
571
        }
572
        spin_lock_irqsave(&dma->s->lock,flags);
573
        dma->writeptr = 0;
574
        dma->readptr = 0;
575
        spin_unlock_irqrestore(&dma->s->lock,flags);
576
}
577
 
578
static int rme96xx_startcard(rme96xx_info *s,int stop)
579
{
580
        int i;
581
        long flags;
582
 
583
        COMM       ("startcard");
584
        if(s->control_register & RME96xx_IE){
585
                /* disable interrupt first */
586
 
587
                rme96xx_unset_ctrl( s,RME96xx_start_bit );
588
                udelay(10);
589
                rme96xx_unset_ctrl( s,RME96xx_IE);
590
                spin_lock_irqsave(&s->lock,flags); /* timing is critical */
591
                s->started = 0;
592
                spin_unlock_irqrestore(&s->lock,flags);
593
                if (stop) {
594
                     COMM("Sound card stopped");
595
                     return 1;
596
                }
597
        }
598
        COMM       ("interupt disabled");
599
        /* first initialize all pointers on card */
600
        for(i=0;i<RME96xx_num_of_init_regs;i++){
601
                writel(0,s->iobase + i);
602
                udelay(10); /* ?? */
603
        }
604
        COMM       ("regs cleaned");
605
 
606
        spin_lock_irqsave(&s->lock,flags); /* timing is critical */
607
        udelay(10);
608
        s->started = 1;
609
        s->hwptr = 0;
610
        spin_unlock_irqrestore(&s->lock,flags);
611
 
612
        rme96xx_set_ctrl( s, RME96xx_IE | RME96xx_start_bit);
613
 
614
 
615
        COMM("Sound card started");
616
 
617
        return 1;
618
}
619
 
620
 
621
inline int rme96xx_getospace(struct dmabuf * dma, unsigned int hwp)
622
{
623
        int cnt;
624
        int  swptr;
625
        unsigned long flags;
626
 
627
        spin_lock_irqsave(&dma->s->lock,flags);
628
        swptr = dma->writeptr;
629
        cnt = (hwp - swptr);
630
 
631
        if (cnt < 0) {
632
             cnt = ((dma->s->fragsize<<1) - swptr);
633
        }
634
        spin_unlock_irqrestore(&dma->s->lock,flags);
635
        return cnt;
636
}
637
 
638
inline int rme96xx_getispace(struct dmabuf * dma, unsigned int hwp)
639
{
640
        int cnt;
641
        int  swptr;
642
        unsigned long flags;
643
 
644
        spin_lock_irqsave(&dma->s->lock,flags);
645
        swptr = dma->readptr;
646
        cnt = (hwp - swptr);
647
 
648
        if (cnt < 0) {
649
                cnt = ((dma->s->fragsize<<1) - swptr);
650
        }
651
        spin_unlock_irqrestore(&dma->s->lock,flags);
652
        return cnt;
653
}
654
 
655
 
656
inline int rme96xx_copyfromuser(struct dmabuf* dma,const char* buffer,int count,int hop)
657
{
658
        int swptr = dma->writeptr;
659
        switch (dma->format) {
660
        case AFMT_S32_BLOCKED:
661
        {
662
             char* buf = (char*)buffer;
663
             int cnt = count/dma->outchannels;
664
             int i;
665
             for (i=0;i < dma->outchannels;i++) {
666
                  char* hwbuf =(char*) &dma->s->playbuf[(dma->outoffset + i)*RME96xx_DMA_MAX_SAMPLES];
667
                  hwbuf+=swptr;
668
 
669
                  if (copy_from_user(hwbuf,buf, cnt))
670
                       return -1;
671
                  buf+=hop;
672
             }
673
             swptr+=cnt;
674
             break;
675
        }
676
        case AFMT_S16_LE:
677
        {
678
             int i,j;
679
             int cnt = count/dma->outchannels;
680
             for (i=0;i < dma->outchannels + dma->mono;i++) {
681
                     short* sbuf = (short*)buffer + i*(!dma->mono);
682
                     short* hwbuf =(short*) &dma->s->playbuf[(dma->outoffset + i)*RME96xx_DMA_MAX_SAMPLES];
683
                     hwbuf+=(swptr>>1);
684
                     for (j=0;j<(cnt>>1);j++) {
685
                             hwbuf++; /* skip the low 16 bits */
686
                             __get_user(*hwbuf++,sbuf++);
687
                             sbuf+=(dma->outchannels-1);
688
                     }
689
             }
690
             swptr += (cnt<<1);
691
             break;
692
        }
693
        default:
694
             printk(RME_MESS" unsupported format\n");
695
             return -1;
696
        } /* switch */
697
 
698
        swptr&=((dma->s->fragsize<<1) -1);
699
        dma->writeptr = swptr;
700
 
701
        return 0;
702
}
703
 
704
/* The count argument is the number of bytes */
705
inline int rme96xx_copytouser(struct dmabuf* dma,const char* buffer,int count,int hop)
706
{
707
        int swptr = dma->readptr;
708
        switch (dma->format) {
709
        case AFMT_S32_BLOCKED:
710
        {
711
             char* buf = (char*)buffer;
712
             int cnt = count/dma->inchannels;
713
             int i;
714
 
715
             for (i=0;i < dma->inchannels;i++) {
716
                  char* hwbuf =(char*) &dma->s->recbuf[(dma->inoffset + i)*RME96xx_DMA_MAX_SAMPLES];
717
                  hwbuf+=swptr;
718
 
719
                  if (copy_to_user(buf,hwbuf,cnt))
720
                       return -1;
721
                  buf+=hop;
722
             }
723
             swptr+=cnt;
724
             break;
725
        }
726
        case AFMT_S16_LE:
727
        {
728
             int i,j;
729
             int cnt = count/dma->inchannels;
730
             for (i=0;i < dma->inchannels;i++) {
731
                  short* sbuf = (short*)buffer + i;
732
                  short* hwbuf =(short*) &dma->s->recbuf[(dma->inoffset + i)*RME96xx_DMA_MAX_SAMPLES];
733
                  hwbuf+=(swptr>>1);
734
                  for (j=0;j<(cnt>>1);j++) {
735
                       hwbuf++;
736
                       __put_user(*hwbuf++,sbuf++);
737
                       sbuf+=(dma->inchannels-1);
738
                  }
739
             }
740
             swptr += (cnt<<1);
741
             break;
742
        }
743
        default:
744
             printk(RME_MESS" unsupported format\n");
745
             return -1;
746
        } /* switch */
747
 
748
        swptr&=((dma->s->fragsize<<1) -1);
749
        dma->readptr = swptr;
750
        return 0;
751
}
752
 
753
 
754
static void rme96xx_interrupt(int irq, void *dev_id, struct pt_regs *regs)
755
{
756
        int i;
757
        rme96xx_info *s = (rme96xx_info *)dev_id;
758
        struct dmabuf *db;
759
        u32 status;
760
        unsigned long flags;
761
 
762
        status = readl(s->iobase + RME96xx_status_register);
763
        if (!(status & RME96xx_IRQ)) {
764
                return;
765
        }
766
 
767
        spin_lock_irqsave(&s->lock,flags);
768
        writel(0,s->iobase + RME96xx_irq_clear);
769
 
770
        s->hwbufid = (status & RME96xx_buffer_id)>>26;
771
        if ((status & 0xffc0) <= 256) s->hwptr = 0;
772
        for(i=0;i<devices;i++)
773
        {
774
                db = &(s->dma[i]);
775
                if(db->started > 0)
776
                        wake_up(&(db->wait));
777
        }
778
        spin_unlock_irqrestore(&s->lock,flags);
779
}
780
 
781
 
782
 
783
/*----------------------------------------------------------------------------
784
 PCI detection and module initialization stuff
785
 ----------------------------------------------------------------------------*/
786
 
787
void* busmaster_malloc(int size) {
788
     int pg; /* 2 s exponent of memory size */
789
        char *buf;
790
 
791
        DBG(printk("kernel malloc pages ..\n"));
792
 
793
        for (pg = 0; PAGE_SIZE * (1 << pg) < size; pg++);
794
 
795
        buf = (char *) __get_free_pages(GFP_KERNEL | GFP_DMA, pg);
796
 
797
        if (buf) {
798
                struct page* page, *last_page;
799
 
800
                page = virt_to_page(buf);
801
                last_page = virt_to_page(buf + (1 << pg));
802
                DBG(printk("setting reserved bit\n"));
803
                while (page < last_page) {
804
                        SetPageReserved(page);
805
                        page++;
806
                }
807
                return buf;
808
        }
809
        DBG(printk("allocated %ld",(long)buf));
810
        return NULL;
811
}
812
 
813
void busmaster_free(void* ptr,int size) {
814
        int pg;
815
        struct page* page, *last_page;
816
 
817
        if (ptr == NULL)
818
                return;
819
 
820
        for (pg = 0; PAGE_SIZE * (1 << pg) < size; pg++);
821
 
822
        page = virt_to_page(ptr);
823
        last_page = page + (1 << pg);
824
        while (page < last_page) {
825
                ClearPageReserved(page);
826
                page++;
827
        }
828
        DBG(printk("freeing pages\n"));
829
        free_pages((unsigned long) ptr, pg);
830
        DBG(printk("done\n"));
831
}
832
 
833
/* initialize those parts of the info structure which are not pci detectable resources */
834
 
835
static int rme96xx_dmabuf_init(rme96xx_info * s,struct dmabuf* dma,int ioffset,int ooffset) {
836
 
837
        init_MUTEX(&dma->open_sem);
838
        init_waitqueue_head(&dma->open_wait);
839
        init_waitqueue_head(&dma->wait);
840
        dma->s = s;
841
        dma->error = 0;
842
 
843
        dma->format = AFMT_S32_BLOCKED;
844
        dma->formatshift = 0;
845
        dma->inchannels = dma->outchannels = 1;
846
        dma->inoffset = ioffset;
847
        dma->outoffset = ooffset;
848
 
849
        dma->opened=0;
850
        dma->started=0;
851
        dma->mmapped=0;
852
        dma->open_mode=0;
853
        dma->mono=0;
854
 
855
        rme96xx_clearbufs(dma);
856
        return 0;
857
}
858
 
859
 
860
int rme96xx_init(rme96xx_info* s)
861
{
862
        int i;
863
        int status;
864
        unsigned short rev;
865
 
866
        DBG(printk(__FUNCTION__"\n"));
867
        numcards++;
868
 
869
        s->magic = RME96xx_MAGIC;
870
 
871
        spin_lock_init(&s->lock);
872
 
873
        COMM            ("setup busmaster memory")
874
        s->recbuf = busmaster_malloc(RME96xx_DMA_MAX_SIZE_ALL);
875
        s->playbuf = busmaster_malloc(RME96xx_DMA_MAX_SIZE_ALL);
876
 
877
        if (!s->recbuf || !s->playbuf) {
878
                printk(KERN_ERR RME_MESS" Unable to allocate busmaster memory\n");
879
                return -ENODEV;
880
        }
881
 
882
        COMM            ("setting rec and playbuffers")
883
 
884
        writel((u32) virt_to_bus(s->recbuf),s->iobase + RME96xx_rec_buffer);
885
        writel((u32) virt_to_bus(s->playbuf),s->iobase + RME96xx_play_buffer);
886
 
887
        COMM             ("initializing control register")
888
        rme96xx_unset_ctrl(s,0xffffffff);
889
        rme96xx_set_ctrl(s,RME96xx_ctrl_init);
890
 
891
 
892
        COMM              ("setup devices")
893
        for (i=0;i < devices;i++) {
894
                struct dmabuf * dma = &s->dma[i];
895
                rme96xx_dmabuf_init(s,dma,2*i,2*i);
896
        }
897
 
898
        /* code from ALSA card-rme9652.c   HP 20020201 */
899
        /* Determine the h/w rev level of the card. This seems like
900
           a particularly kludgy way to encode it, but its what RME
901
           chose to do, so we follow them ...
902
        */
903
 
904
        status = readl(s->iobase + RME96xx_status_register);
905
        if (rme96xx_decode_spdif_rate(status&RME96xx_F) == 1) {
906
                s->hw_rev = 15;
907
        } else {
908
                s->hw_rev = 11;
909
        }
910
 
911
        /* Differentiate between the standard Hammerfall, and the
912
           "Light", which does not have the expansion board. This
913
           method comes from information received from Mathhias
914
           Clausen at RME. Display the EEPROM and h/w revID where
915
           relevant.
916
        */
917
 
918
        pci_read_config_word(s->pcidev, PCI_CLASS_REVISION, &rev);
919
        switch (rev & 0xff) {
920
        case 8: /* original eprom */
921
                if (s->hw_rev == 15) {
922
                        s->card_name = "RME Digi9636 (Rev 1.5)";
923
                } else {
924
                        s->card_name = "RME Digi9636";
925
                }
926
                break;
927
        case 9: /* W36_G EPROM */
928
                s->card_name = "RME Digi9636 (Rev G)";
929
                break;
930
        case 4: /* W52_G EPROM */
931
                s->card_name = "RME Digi9652 (Rev G)";
932
                break;
933
        default:
934
        case 3: /* original eprom */
935
                if (s->hw_rev == 15) {
936
                        s->card_name = "RME Digi9652 (Rev 1.5)";
937
                } else {
938
                        s->card_name = "RME Digi9652";
939
                }
940
                break;
941
        }
942
 
943
        printk(KERN_INFO RME_MESS" detected %s (hw_rev %d)\n",s->card_name,s->hw_rev);
944
 
945
        if (s->hw_rev == 15)
946
                rme96xx_initialize_spdif_receiver (s);
947
 
948
        s->started = 0;
949
        rme96xx_setlatency(s,7);
950
 
951
        printk(KERN_INFO RME_MESS" card %d initialized\n",numcards);
952
        return 0;
953
}
954
 
955
 
956
/* open uses this to figure out which device was opened .. this seems to be
957
   unnecessary complex */
958
 
959
static LIST_HEAD(devs);
960
 
961
static int __devinit rme96xx_probe(struct pci_dev *pcidev, const struct pci_device_id *pciid)
962
{
963
        int i;
964
        rme96xx_info *s;
965
 
966
        DBG(printk(__FUNCTION__"\n"));
967
 
968
        if (pcidev->irq == 0)
969
                return -1;
970
        if (!pci_dma_supported(pcidev, 0xffffffff)) {
971
                printk(KERN_WARNING RME_MESS" architecture does not support 32bit PCI busmaster DMA\n");
972
                return -1;
973
        }
974
        if (!(s = kmalloc(sizeof(rme96xx_info), GFP_KERNEL))) {
975
                printk(KERN_WARNING RME_MESS" out of memory\n");
976
                return -1;
977
        }
978
        memset(s, 0, sizeof(rme96xx_info));
979
 
980
        s->pcidev = pcidev;
981
        s->iobase = ioremap(pci_resource_start(pcidev, 0),RME96xx_IO_EXTENT);
982
        s->irq = pcidev->irq;
983
 
984
        DBG(printk("remapped iobase: %lx irq %d\n",(long)s->iobase,s->irq));
985
 
986
        if (pci_enable_device(pcidev))
987
                goto err_irq;
988
        if (request_irq(s->irq, rme96xx_interrupt, SA_SHIRQ, "rme96xx", s)) {
989
                printk(KERN_ERR RME_MESS" irq %u in use\n", s->irq);
990
                goto err_irq;
991
        }
992
 
993
        /* initialize the card */
994
 
995
        i = 0;
996
        if (rme96xx_init(s) < 0) {
997
                printk(KERN_ERR RME_MESS" initialization failed\n");
998
                goto err_devices;
999
        }
1000
        for (i=0;i<devices;i++) {
1001
                if ((s->dspnum[i] = register_sound_dsp(&rme96xx_audio_fops, -1)) < 0)
1002
                        goto err_devices;
1003
        }
1004
 
1005
        if ((s->mixer = register_sound_mixer(&rme96xx_mixer_fops, -1)) < 0)
1006
                goto err_devices;
1007
 
1008
        pci_set_drvdata(pcidev, s);
1009
        pcidev->dma_mask = 0xffffffff; /* ????? */
1010
        /* put it into driver list */
1011
        list_add_tail(&s->devs, &devs);
1012
 
1013
        DBG(printk("initialization successful\n"));
1014
        return 0;
1015
 
1016
        /* error handler */
1017
 err_devices:
1018
        while (i--)
1019
                unregister_sound_dsp(s->dspnum[i]);
1020
        free_irq(s->irq,s);
1021
 err_irq:
1022
        kfree(s);
1023
        return -1;
1024
}
1025
 
1026
 
1027
static void __devinit rme96xx_remove(struct pci_dev *dev)
1028
{
1029
        int i;
1030
        rme96xx_info *s = pci_get_drvdata(dev);
1031
 
1032
        if (!s) {
1033
                printk(KERN_ERR"device structure not valid\n");
1034
                return ;
1035
        }
1036
 
1037
        if (s->started) rme96xx_startcard(s,0);
1038
 
1039
        i = devices;
1040
        while (i) {
1041
                i--;
1042
                unregister_sound_dsp(s->dspnum[i]);
1043
        }
1044
 
1045
        unregister_sound_mixer(s->mixer);
1046
/*      synchronize_irq(); This call got lost somehow ? */
1047
        free_irq(s->irq,s);
1048
        busmaster_free(s->recbuf,RME96xx_DMA_MAX_SIZE_ALL);
1049
        busmaster_free(s->playbuf,RME96xx_DMA_MAX_SIZE_ALL);
1050
        kfree(s);
1051
        pci_set_drvdata(dev, NULL);
1052
}
1053
 
1054
 
1055
#ifndef PCI_VENDOR_ID_RME 
1056
#define PCI_VENDOR_ID_RME 0x10ee
1057
#endif
1058
#ifndef PCI_DEVICE_ID_RME9652
1059
#define PCI_DEVICE_ID_RME9652 0x3fc4
1060
#endif
1061
#ifndef PCI_ANY_ID
1062
#define PCI_ANY_ID 0
1063
#endif
1064
 
1065
static struct pci_device_id id_table[] __devinitdata = {
1066
        { PCI_VENDOR_ID_RME, PCI_DEVICE_ID_RME9652, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
1067
        { 0, }
1068
};
1069
 
1070
MODULE_DEVICE_TABLE(pci, id_table);
1071
 
1072
static struct pci_driver rme96xx_driver = {
1073
        name: "rme96xx",
1074
        id_table: id_table,
1075
        probe: rme96xx_probe,
1076
        remove: rme96xx_remove
1077
};
1078
 
1079
static int __init init_rme96xx(void)
1080
{
1081
 
1082
        if (!pci_present())   /* No PCI bus in this machine! */
1083
                return -ENODEV;
1084
        printk(KERN_INFO RME_MESS" version "RMEVERSION" time " __TIME__ " " __DATE__ "\n");
1085
        devices = ((devices-1) & RME96xx_MASK_DEVS) + 1;
1086
        printk(KERN_INFO RME_MESS" reserving %d dsp device(s)\n",devices);
1087
        numcards = 0;
1088
        return pci_module_init(&rme96xx_driver);
1089
}
1090
 
1091
static void __exit cleanup_rme96xx(void)
1092
{
1093
        printk(KERN_INFO RME_MESS" unloading\n");
1094
        pci_unregister_driver(&rme96xx_driver);
1095
}
1096
 
1097
module_init(init_rme96xx);
1098
module_exit(cleanup_rme96xx);
1099
 
1100
 
1101
 
1102
 
1103
 
1104
/*--------------------------------------------------------------------------
1105
   Implementation of file operations
1106
---------------------------------------------------------------------------*/
1107
 
1108
#define RME96xx_FMT (AFMT_S16_LE|AFMT_U8|AFMT_S32_BLOCKED)
1109
/* AFTM_U8 is not (yet?) supported ...  HP20020201 */
1110
 
1111
static int rme96xx_ioctl(struct inode *in, struct file *file, unsigned int cmd, unsigned long arg)
1112
{
1113
 
1114
        struct dmabuf * dma = (struct dmabuf *)file->private_data;
1115
        rme96xx_info *s = dma->s;
1116
        unsigned long flags;
1117
        audio_buf_info abinfo;
1118
        count_info cinfo;
1119
        int count;
1120
        int val = 0;
1121
 
1122
        VALIDATE_STATE(s);
1123
 
1124
        DBG(printk("ioctl %ud\n",cmd));
1125
 
1126
        switch (cmd) {
1127
        case OSS_GETVERSION:
1128
                return put_user(SOUND_VERSION, (int *)arg);
1129
 
1130
        case SNDCTL_DSP_SYNC:
1131
#if 0
1132
                if (file->f_mode & FMODE_WRITE)
1133
                        return drain_dac2(s, 0/*file->f_flags & O_NONBLOCK*/);
1134
#endif
1135
                return 0;
1136
 
1137
        case SNDCTL_DSP_SETDUPLEX:
1138
                return 0;
1139
 
1140
        case SNDCTL_DSP_GETCAPS:
1141
                return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, (int *)arg);
1142
 
1143
        case SNDCTL_DSP_RESET:
1144
//              rme96xx_clearbufs(dma);
1145
                return 0;
1146
 
1147
        case SNDCTL_DSP_SPEED:
1148
                if (get_user(val, (int *)arg))
1149
                        return -EFAULT;
1150
                if (val >= 0) {
1151
/* generally it's not a problem if we change the speed
1152
                        if (dma->open_mode & (~file->f_mode) & (FMODE_READ|FMODE_WRITE))
1153
                                return -EINVAL;
1154
*/
1155
                        spin_lock_irqsave(&s->lock, flags);
1156
 
1157
                        switch (val) {
1158
                        case 44100:
1159
                        case 88200:
1160
                                rme96xx_unset_ctrl(s,RME96xx_freq);
1161
                                break;
1162
                        case 48000:
1163
                        case 96000:
1164
                                rme96xx_set_ctrl(s,RME96xx_freq);
1165
                                break;
1166
                        /* just report current rate as default
1167
                           e.g. use 0 to "select" current digital input rate
1168
                        default:
1169
                                rme96xx_unset_ctrl(s,RME96xx_freq);
1170
                                val = 44100;
1171
                        */
1172
                        }
1173
                        if (val > 50000)
1174
                                rme96xx_set_ctrl(s,RME96xx_DS);
1175
                        else
1176
                                rme96xx_unset_ctrl(s,RME96xx_DS);
1177
                        /* set val to actual value  HP 20020201 */
1178
                        /* NOTE: if not "Sync Master", reported rate might be not yet "updated" ... but I don't want to insert a long udelay() here */
1179
                        if ((s->control_register & RME96xx_Master) && !(s->control_register & RME96xx_wsel))
1180
                                val = rme96xx_get_sample_rate_ctrl(s);
1181
                        else
1182
                                val = rme96xx_get_sample_rate_status(s);
1183
                        s->rate = val;
1184
                        spin_unlock_irqrestore(&s->lock, flags);
1185
                }
1186
                DBG(printk("speed set to %d\n",val));
1187
                return put_user(val, (int *)arg);
1188
 
1189
        case SNDCTL_DSP_STEREO: /* this plays a mono file on two channels */
1190
                if (get_user(val, (int *)arg))
1191
                        return -EFAULT;
1192
 
1193
                if (!val) {
1194
                        DBG(printk("setting to mono\n"));
1195
                        dma->mono=1;
1196
                        dma->inchannels = 1;
1197
                        dma->outchannels = 1;
1198
                }
1199
                else {
1200
                        DBG(printk("setting to stereo\n"));
1201
                        dma->mono = 0;
1202
                        dma->inchannels = 2;
1203
                        dma->outchannels = 2;
1204
                }
1205
                return 0;
1206
        case SNDCTL_DSP_CHANNELS:
1207
                /* remember to check for resonable offset/channel pairs here */
1208
                if (get_user(val, (int *)arg))
1209
                        return -EFAULT;
1210
 
1211
                if (file->f_mode & FMODE_WRITE) {
1212
                        if (val > 0 && (dma->outoffset + val) <= RME96xx_CHANNELS_PER_CARD)
1213
                                dma->outchannels = val;
1214
                        else
1215
                                dma->outchannels = val = 2;
1216
                        DBG(printk("setting to outchannels %d\n",val));
1217
                }
1218
                if (file->f_mode & FMODE_READ) {
1219
                        if (val > 0 && (dma->inoffset + val) <= RME96xx_CHANNELS_PER_CARD)
1220
                                dma->inchannels = val;
1221
                        else
1222
                                dma->inchannels = val = 2;
1223
                        DBG(printk("setting to inchannels %d\n",val));
1224
                }
1225
 
1226
                dma->mono=0;
1227
 
1228
                return put_user(val, (int *)arg);
1229
 
1230
        case SNDCTL_DSP_GETFMTS: /* Returns a mask */
1231
                return put_user(RME96xx_FMT, (int *)arg);
1232
 
1233
        case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
1234
                DBG(printk("setting to format %x\n",val));
1235
                if (get_user(val, (int *)arg))
1236
                        return -EFAULT;
1237
                if (val != AFMT_QUERY) {
1238
                        if (val & RME96xx_FMT)
1239
                                dma->format = val;
1240
                        switch (dma->format) {
1241
                        case AFMT_S16_LE:
1242
                                dma->formatshift=1;
1243
                                break;
1244
                        case AFMT_S32_BLOCKED:
1245
                                dma->formatshift=0;
1246
                                break;
1247
                        }
1248
                }
1249
                return put_user(dma->format, (int *)arg);
1250
 
1251
        case SNDCTL_DSP_POST:
1252
                return 0;
1253
 
1254
        case SNDCTL_DSP_GETTRIGGER:
1255
                val = 0;
1256
#if 0
1257
                if (file->f_mode & FMODE_READ && s->ctrl & CTRL_ADC_EN)
1258
                        val |= PCM_ENABLE_INPUT;
1259
                if (file->f_mode & FMODE_WRITE && s->ctrl & CTRL_DAC2_EN)
1260
                        val |= PCM_ENABLE_OUTPUT;
1261
#endif
1262
                return put_user(val, (int *)arg);
1263
 
1264
        case SNDCTL_DSP_SETTRIGGER:
1265
                if (get_user(val, (int *)arg))
1266
                        return -EFAULT;
1267
#if 0
1268
                if (file->f_mode & FMODE_READ) {
1269
                        if (val & PCM_ENABLE_INPUT) {
1270
                                if (!s->dma_adc.ready && (ret = prog_dmabuf_adc(s)))
1271
                                        return ret;
1272
                                start_adc(s);
1273
                        } else
1274
                                stop_adc(s);
1275
                }
1276
                if (file->f_mode & FMODE_WRITE) {
1277
                        if (val & PCM_ENABLE_OUTPUT) {
1278
                                if (!s->dma_dac2.ready && (ret = prog_dmabuf_dac2(s)))
1279
                                        return ret;
1280
                                start_dac2(s);
1281
                        } else
1282
                                stop_dac2(s);
1283
                }
1284
#endif
1285
                return 0;
1286
 
1287
        case SNDCTL_DSP_GETOSPACE:
1288
                if (!(file->f_mode & FMODE_WRITE))
1289
                        return -EINVAL;
1290
 
1291
                val = rme96xx_gethwptr(dma->s,0);
1292
 
1293
 
1294
                count = rme96xx_getospace(dma,val);
1295
                if (!s->started) count = s->fragsize*2;
1296
                abinfo.fragsize =(s->fragsize*dma->outchannels)>>dma->formatshift;
1297
                abinfo.bytes = (count*dma->outchannels)>>dma->formatshift;
1298
                abinfo.fragstotal = 2;
1299
                abinfo.fragments = (count > s->fragsize);
1300
 
1301
                return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1302
 
1303
        case SNDCTL_DSP_GETISPACE:
1304
                if (!(file->f_mode & FMODE_READ))
1305
                        return -EINVAL;
1306
 
1307
                val = rme96xx_gethwptr(dma->s,0);
1308
 
1309
                count = rme96xx_getispace(dma,val);
1310
 
1311
                abinfo.fragsize = (s->fragsize*dma->inchannels)>>dma->formatshift;
1312
                abinfo.bytes = (count*dma->inchannels)>>dma->formatshift;;
1313
                abinfo.fragstotal = 2;
1314
                abinfo.fragments = count > s->fragsize;
1315
                return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1316
 
1317
        case SNDCTL_DSP_NONBLOCK:
1318
                file->f_flags |= O_NONBLOCK;
1319
                return 0;
1320
 
1321
        case SNDCTL_DSP_GETODELAY: /* What shold this exactly do ? ,
1322
                                      ATM it is just abinfo.bytes */
1323
                if (!(file->f_mode & FMODE_WRITE))
1324
                        return -EINVAL;
1325
 
1326
                val = rme96xx_gethwptr(dma->s,0);
1327
                count = val - dma->readptr;
1328
                if (count < 0)
1329
                        count += s->fragsize<<1;
1330
 
1331
                return put_user(count, (int *)arg);
1332
 
1333
 
1334
/* check out how to use mmaped mode (can only be blocked !!!) */
1335
        case SNDCTL_DSP_GETIPTR:
1336
                if (!(file->f_mode & FMODE_READ))
1337
                        return -EINVAL;
1338
                val = rme96xx_gethwptr(dma->s,0);
1339
                spin_lock_irqsave(&s->lock,flags);
1340
                cinfo.bytes = s->fragsize<<1;;
1341
                count = val - dma->readptr;
1342
                if (count < 0)
1343
                        count += s->fragsize<<1;
1344
 
1345
                cinfo.blocks = (count > s->fragsize);
1346
                cinfo.ptr = val;
1347
                if (dma->mmapped)
1348
                        dma->readptr &= s->fragsize<<1;
1349
                spin_unlock_irqrestore(&s->lock,flags);
1350
 
1351
                return copy_to_user((void *)arg, &cinfo, sizeof(cinfo)) ? -EFAULT : 0;
1352
 
1353
        case SNDCTL_DSP_GETOPTR:
1354
                if (!(file->f_mode & FMODE_READ))
1355
                        return -EINVAL;
1356
                val = rme96xx_gethwptr(dma->s,0);
1357
                spin_lock_irqsave(&s->lock,flags);
1358
                cinfo.bytes = s->fragsize<<1;;
1359
                count = val - dma->writeptr;
1360
                if (count < 0)
1361
                        count += s->fragsize<<1;
1362
 
1363
                cinfo.blocks = (count > s->fragsize);
1364
                cinfo.ptr = val;
1365
                if (dma->mmapped)
1366
                        dma->writeptr &= s->fragsize<<1;
1367
                spin_unlock_irqrestore(&s->lock,flags);
1368
                return copy_to_user((void *)arg, &cinfo, sizeof(cinfo)) ? -EFAULT : 0;
1369
        case SNDCTL_DSP_GETBLKSIZE:
1370
             return put_user(s->fragsize, (int *)arg);
1371
 
1372
        case SNDCTL_DSP_SETFRAGMENT:
1373
                if (get_user(val, (int *)arg))
1374
                        return -EFAULT;
1375
                val&=0xffff;
1376
                val -= 7;
1377
                if (val < 0) val = 0;
1378
                if (val > 7) val = 7;
1379
                rme96xx_setlatency(s,val);
1380
                return 0;
1381
 
1382
        case SNDCTL_DSP_SUBDIVIDE:
1383
#if 0
1384
                if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
1385
                    (file->f_mode & FMODE_WRITE && s->dma_dac2.subdivision))
1386
                        return -EINVAL;
1387
                if (get_user(val, (int *)arg))
1388
                        return -EFAULT;
1389
                if (val != 1 && val != 2 && val != 4)
1390
                        return -EINVAL;
1391
                if (file->f_mode & FMODE_READ)
1392
                        s->dma_adc.subdivision = val;
1393
                if (file->f_mode & FMODE_WRITE)
1394
                        s->dma_dac2.subdivision = val;
1395
#endif          
1396
                return 0;
1397
 
1398
        case SOUND_PCM_READ_RATE:
1399
                /* HP20020201 */
1400
                s->rate = rme96xx_get_sample_rate_status(s);
1401
                return put_user(s->rate, (int *)arg);
1402
 
1403
        case SOUND_PCM_READ_CHANNELS:
1404
                return put_user(dma->outchannels, (int *)arg);
1405
 
1406
        case SOUND_PCM_READ_BITS:
1407
                switch (dma->format) {
1408
                        case AFMT_S32_BLOCKED:
1409
                                val = 32;
1410
                                break;
1411
                        case AFMT_S16_LE:
1412
                                val = 16;
1413
                                break;
1414
                }
1415
                return put_user(val, (int *)arg);
1416
 
1417
        case SOUND_PCM_WRITE_FILTER:
1418
        case SNDCTL_DSP_SETSYNCRO:
1419
        case SOUND_PCM_READ_FILTER:
1420
                return -EINVAL;
1421
 
1422
        }
1423
 
1424
 
1425
        return -ENODEV;
1426
}
1427
 
1428
 
1429
 
1430
static int rme96xx_open(struct inode *in, struct file *f)
1431
{
1432
        int minor = MINOR(in->i_rdev);
1433
        struct list_head *list;
1434
        int devnum;
1435
        rme96xx_info *s;
1436
        struct dmabuf* dma;
1437
        DECLARE_WAITQUEUE(wait, current);
1438
 
1439
        DBG(printk("device num %d open\n",devnum));
1440
 
1441
        for (list = devs.next; ; list = list->next) {
1442
                if (list == &devs)
1443
                        return -ENODEV;
1444
                s = list_entry(list, rme96xx_info, devs);
1445
                for (devnum=0; devnum<devices; devnum++)
1446
                        if (!((s->dspnum[devnum] ^ minor) & ~0xf))
1447
                                break;
1448
                if (devnum<devices)
1449
                        break;
1450
        }
1451
        VALIDATE_STATE(s);
1452
 
1453
        dma = &s->dma[devnum];
1454
        f->private_data = dma;
1455
        /* wait for device to become free */
1456
        down(&dma->open_sem);
1457
        while (dma->open_mode & f->f_mode) {
1458
                if (f->f_flags & O_NONBLOCK) {
1459
                        up(&dma->open_sem);
1460
                        return -EBUSY;
1461
                }
1462
                add_wait_queue(&dma->open_wait, &wait);
1463
                __set_current_state(TASK_INTERRUPTIBLE);
1464
                up(&dma->open_sem);
1465
                schedule();
1466
                remove_wait_queue(&dma->open_wait, &wait);
1467
                set_current_state(TASK_RUNNING);
1468
                if (signal_pending(current))
1469
                        return -ERESTARTSYS;
1470
                down(&dma->open_sem);
1471
        }
1472
 
1473
        COMM                ("hardware open")
1474
 
1475
        if (!dma->opened) rme96xx_dmabuf_init(dma->s,dma,dma->inoffset,dma->outoffset);
1476
 
1477
        dma->open_mode |= (f->f_mode & (FMODE_READ | FMODE_WRITE));
1478
        dma->opened = 1;
1479
        up(&dma->open_sem);
1480
 
1481
        DBG(printk("device num %d open finished\n",devnum));
1482
        return 0;
1483
}
1484
 
1485
static int rme96xx_release(struct inode *in, struct file *file)
1486
{
1487
        struct dmabuf * dma = (struct dmabuf*) file->private_data;
1488
        /* int hwp;  ... was unused   HP20020201 */
1489
        DBG(printk(__FUNCTION__"\n"));
1490
 
1491
        COMM          ("draining")
1492
        if (dma->open_mode & FMODE_WRITE) {
1493
#if 0 /* Why doesn't this work with some cards ?? */
1494
             hwp = rme96xx_gethwptr(dma->s,0);
1495
             while (rme96xx_getospace(dma,hwp)) {
1496
                  interruptible_sleep_on(&(dma->wait));
1497
                  hwp = rme96xx_gethwptr(dma->s,0);
1498
             }
1499
#endif
1500
             rme96xx_clearbufs(dma);
1501
        }
1502
 
1503
        dma->open_mode &= (~file->f_mode) & (FMODE_READ|FMODE_WRITE);
1504
 
1505
        if (!(dma->open_mode & (FMODE_READ|FMODE_WRITE))) {
1506
             dma->opened = 0;
1507
             if (dma->s->started) rme96xx_startcard(dma->s,1);
1508
        }
1509
 
1510
        wake_up(&dma->open_wait);
1511
        up(&dma->open_sem);
1512
 
1513
        return 0;
1514
}
1515
 
1516
 
1517
static ssize_t rme96xx_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
1518
{
1519
        struct dmabuf *dma = (struct dmabuf *)file->private_data;
1520
        ssize_t ret = 0;
1521
        int cnt; /* number of bytes from "buffer" that will/can be used */
1522
        int hop = count/dma->outchannels;
1523
        int hwp;
1524
        int exact = (file->f_flags & O_NONBLOCK);
1525
 
1526
 
1527
        if(dma == NULL || (dma->s) == NULL)
1528
                return -ENXIO;
1529
 
1530
        if (ppos != &file->f_pos)
1531
                return -ESPIPE;
1532
 
1533
        if (dma->mmapped || !dma->opened)
1534
                return -ENXIO;
1535
 
1536
        if (!access_ok(VERIFY_READ, buffer, count))
1537
                return -EFAULT;
1538
 
1539
        if (! (dma->open_mode & FMODE_WRITE))
1540
                return -ENXIO;
1541
 
1542
        if (!dma->s->started) rme96xx_startcard(dma->s,exact);
1543
        hwp = rme96xx_gethwptr(dma->s,0);
1544
 
1545
        if(!(dma->started)){
1546
                COMM          ("first write")
1547
 
1548
                dma->readptr = hwp;
1549
                dma->writeptr = hwp;
1550
                dma->started = 1;
1551
        }
1552
 
1553
        while (count > 0) {
1554
                cnt = rme96xx_getospace(dma,hwp);
1555
                cnt>>=dma->formatshift;
1556
                cnt*=dma->outchannels;
1557
                if (cnt > count)
1558
                        cnt = count;
1559
 
1560
                if (cnt != 0) {
1561
                        if (rme96xx_copyfromuser(dma,buffer,cnt,hop))
1562
                                return ret ? ret : -EFAULT;
1563
                        count -= cnt;
1564
                        buffer += cnt;
1565
                        ret += cnt;
1566
                        if (count == 0) return ret;
1567
                }
1568
                if (file->f_flags & O_NONBLOCK)
1569
                        return ret ? ret : -EAGAIN;
1570
 
1571
                if ((hwp - dma->writeptr) <= 0) {
1572
                        interruptible_sleep_on(&(dma->wait));
1573
 
1574
                        if (signal_pending(current))
1575
                                return ret ? ret : -ERESTARTSYS;
1576
                }
1577
 
1578
                hwp = rme96xx_gethwptr(dma->s,exact);
1579
 
1580
        }; /* count > 0 */
1581
 
1582
        return ret;
1583
}
1584
 
1585
static ssize_t rme96xx_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
1586
{
1587
        struct dmabuf *dma = (struct dmabuf *)file->private_data;
1588
        ssize_t ret = 0;
1589
        int cnt; /* number of bytes from "buffer" that will/can be used */
1590
        int hop = count/dma->inchannels;
1591
        int hwp;
1592
        int exact = (file->f_flags & O_NONBLOCK);
1593
 
1594
 
1595
        if(dma == NULL || (dma->s) == NULL)
1596
                return -ENXIO;
1597
 
1598
        if (ppos != &file->f_pos)
1599
                return -ESPIPE;
1600
 
1601
        if (dma->mmapped || !dma->opened)
1602
                return -ENXIO;
1603
 
1604
        if (!access_ok(VERIFY_WRITE, buffer, count))
1605
                return -EFAULT;
1606
 
1607
        if (! (dma->open_mode  & FMODE_READ))
1608
                return -ENXIO;
1609
 
1610
        if (!dma->s->started) rme96xx_startcard(dma->s,exact);
1611
        hwp = rme96xx_gethwptr(dma->s,0);
1612
 
1613
        if(!(dma->started)){
1614
                COMM          ("first read")
1615
 
1616
                dma->writeptr = hwp;
1617
                dma->readptr = hwp;
1618
                dma->started = 1;
1619
        }
1620
 
1621
        while (count > 0) {
1622
                cnt = rme96xx_getispace(dma,hwp);
1623
                cnt>>=dma->formatshift;
1624
                cnt*=dma->inchannels;
1625
                if (cnt > count)
1626
                        cnt = count;
1627
 
1628
                if (cnt != 0) {
1629
                        if (rme96xx_copytouser(dma,buffer,cnt,hop))
1630
                                return ret ? ret : -EFAULT;
1631
                        count -= cnt;
1632
                        buffer += cnt;
1633
                        ret += cnt;
1634
                        if (count == 0) return ret;
1635
                }
1636
                if (file->f_flags & O_NONBLOCK)
1637
                        return ret ? ret : -EAGAIN;
1638
 
1639
                if ((hwp - dma->readptr) <= 0) {
1640
                        interruptible_sleep_on(&(dma->wait));
1641
 
1642
                        if (signal_pending(current))
1643
                                return ret ? ret : -ERESTARTSYS;
1644
                }
1645
 
1646
                hwp = rme96xx_gethwptr(dma->s,exact);
1647
 
1648
        }; /* count > 0 */
1649
 
1650
        return ret;
1651
}
1652
 
1653
static int rm96xx_mmap(struct file *file, struct vm_area_struct *vma) {
1654
        struct dmabuf *dma = (struct dmabuf *)file->private_data;
1655
        rme96xx_info* s = dma->s;
1656
        unsigned long size;
1657
 
1658
        VALIDATE_STATE(s);
1659
        lock_kernel();
1660
 
1661
        if (vma->vm_pgoff != 0) {
1662
                unlock_kernel();
1663
                return -EINVAL;
1664
        }
1665
        size = vma->vm_end - vma->vm_start;
1666
        if (size > RME96xx_DMA_MAX_SIZE) {
1667
                unlock_kernel();
1668
                return -EINVAL;
1669
        }
1670
 
1671
 
1672
        if (vma->vm_flags & VM_WRITE) {
1673
                if (!s->started) rme96xx_startcard(s,1);
1674
 
1675
                if (remap_page_range(vma->vm_start, virt_to_phys(s->playbuf + dma->outoffset*RME96xx_DMA_MAX_SIZE), size, vma->vm_page_prot)) {
1676
                        unlock_kernel();
1677
                        return -EAGAIN;
1678
                }
1679
        }
1680
        else if (vma->vm_flags & VM_READ) {
1681
                if (!s->started) rme96xx_startcard(s,1);
1682
                if (remap_page_range(vma->vm_start, virt_to_phys(s->playbuf + dma->inoffset*RME96xx_DMA_MAX_SIZE), size, vma->vm_page_prot)) {
1683
                        unlock_kernel();
1684
                        return -EAGAIN;
1685
                }
1686
        } else  {
1687
                unlock_kernel();
1688
                return -EINVAL;
1689
        }
1690
 
1691
 
1692
/* this is the mapping */
1693
 
1694
        dma->mmapped = 1;
1695
        unlock_kernel();
1696
        return 0;
1697
}
1698
 
1699
static unsigned int rme96xx_poll(struct file *file, struct poll_table_struct *wait)
1700
{
1701
        struct dmabuf *dma = (struct dmabuf *)file->private_data;
1702
        rme96xx_info* s = dma->s;
1703
        unsigned int mask = 0;
1704
        unsigned int hwp,cnt;
1705
 
1706
        DBG(printk("rme96xx poll_wait ...\n"));
1707
        VALIDATE_STATE(s);
1708
 
1709
        if (!s->started) {
1710
                  mask |= POLLOUT | POLLWRNORM;
1711
        }
1712
        poll_wait(file, &dma->wait, wait);
1713
 
1714
        hwp = rme96xx_gethwptr(dma->s,0);
1715
 
1716
        DBG(printk("rme96xx poll: ..cnt %d > %d\n",cnt,s->fragsize));
1717
 
1718
        cnt = rme96xx_getispace(dma,hwp);
1719
 
1720
        if (file->f_mode & FMODE_READ)
1721
             if (cnt > 0)
1722
                  mask |= POLLIN | POLLRDNORM;
1723
 
1724
 
1725
 
1726
        cnt = rme96xx_getospace(dma,hwp);
1727
 
1728
        if (file->f_mode & FMODE_WRITE)
1729
             if (cnt > 0)
1730
                  mask |= POLLOUT | POLLWRNORM;
1731
 
1732
 
1733
//        printk("rme96xx poll_wait ...%d > %d\n",rme96xx_getospace(dma,hwp),rme96xx_getispace(dma,hwp));
1734
 
1735
        return mask;
1736
}
1737
 
1738
 
1739
static struct file_operations rme96xx_audio_fops = {
1740
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0)
1741
        owner: THIS_MODULE,
1742
#endif
1743
        read: rme96xx_read,
1744
        write: rme96xx_write,
1745
        poll: rme96xx_poll,
1746
        ioctl: rme96xx_ioctl,
1747
        mmap: rm96xx_mmap,
1748
        open: rme96xx_open,
1749
        release: rme96xx_release
1750
};
1751
 
1752
static int rme96xx_mixer_open(struct inode *inode, struct file *file)
1753
{
1754
        int minor = MINOR(inode->i_rdev);
1755
        struct list_head *list;
1756
        rme96xx_info *s;
1757
 
1758
        COMM  ("mixer open");
1759
 
1760
        for (list = devs.next; ; list = list->next) {
1761
                if (list == &devs)
1762
                        return -ENODEV;
1763
                s = list_entry(list, rme96xx_info, devs);
1764
                if (s->mixer == minor)
1765
                        break;
1766
        }
1767
        VALIDATE_STATE(s);
1768
        file->private_data = s;
1769
 
1770
        COMM                       ("mixer opened")
1771
        return 0;
1772
}
1773
 
1774
static int rme96xx_mixer_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1775
{
1776
        rme96xx_info *s = (rme96xx_info *)file->private_data;
1777
        u32 status;
1778
        int spdifrate;
1779
 
1780
        status = readl(s->iobase + RME96xx_status_register);
1781
        /* hack to convert rev 1.5 SPDIF rate to "crystalrate" format   HP 20020201 */
1782
        rme96xx_spdif_sample_rate(s,&spdifrate);
1783
        status = (status & ~RME96xx_F) | ((spdifrate<<22) & RME96xx_F);
1784
 
1785
        VALIDATE_STATE(s);
1786
        if (cmd == SOUND_MIXER_PRIVATE1) {
1787
                rme_mixer mixer;
1788
                copy_from_user(&mixer,(void*)arg,sizeof(mixer));
1789
 
1790
                mixer.devnr &= RME96xx_MASK_DEVS;
1791
                if (mixer.devnr >= devices)
1792
                        mixer.devnr = devices-1;
1793
                if (file->f_mode & FMODE_WRITE && !s->dma[mixer.devnr].opened) {
1794
                        /* modify only if device not open */
1795
                        if (mixer.o_offset < 0)
1796
                                mixer.o_offset = 0;
1797
                        if (mixer.o_offset >= RME96xx_CHANNELS_PER_CARD)
1798
                                mixer.o_offset = RME96xx_CHANNELS_PER_CARD-1;
1799
                        if (mixer.i_offset < 0)
1800
                                mixer.i_offset = 0;
1801
                        if (mixer.i_offset >= RME96xx_CHANNELS_PER_CARD)
1802
                                mixer.i_offset = RME96xx_CHANNELS_PER_CARD-1;
1803
                        s->dma[mixer.devnr].outoffset = mixer.o_offset;
1804
                        s->dma[mixer.devnr].inoffset = mixer.i_offset;
1805
                }
1806
                mixer.o_offset = s->dma[mixer.devnr].outoffset;
1807
                mixer.i_offset = s->dma[mixer.devnr].inoffset;
1808
 
1809
                return copy_to_user((void *)arg, &mixer, sizeof(mixer)) ? -EFAULT : 0;
1810
        }
1811
        if (cmd == SOUND_MIXER_PRIVATE2) {
1812
                return put_user(status, (int *)arg);
1813
        }
1814
        if (cmd == SOUND_MIXER_PRIVATE3) {
1815
                u32 control;
1816
                copy_from_user(&control,(void*)arg,sizeof(control));
1817
                if (file->f_mode & FMODE_WRITE) {
1818
                        s->control_register &= ~RME96xx_mixer_allowed;
1819
                        s->control_register |= control & RME96xx_mixer_allowed;
1820
                        writel(control,s->iobase + RME96xx_control_register);
1821
                }
1822
 
1823
                return put_user(s->control_register, (int *)arg);
1824
        }
1825
        return -1;
1826
}
1827
 
1828
 
1829
 
1830
static int rme96xx_mixer_release(struct inode *inode, struct file *file)
1831
{
1832
        return 0;
1833
}
1834
 
1835
static /*const*/ struct file_operations rme96xx_mixer_fops = {
1836
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0)
1837
        owner: THIS_MODULE,
1838
#endif
1839
        ioctl:          rme96xx_mixer_ioctl,
1840
        open:           rme96xx_mixer_open,
1841
        release:        rme96xx_mixer_release,
1842
};

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.