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phoenix |
/*******************************************************************************
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*
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* "swarm_cs4297a.c" -- Cirrus Logic-Crystal CS4297a linux audio driver.
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*
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* Copyright (C) 2001 Broadcom Corporation.
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* Copyright (C) 2000,2001 Cirrus Logic Corp.
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* -- adapted from drivers by Thomas Sailer,
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* -- but don't bug him; Problems should go to:
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* -- tom woller (twoller@crystal.cirrus.com) or
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* (audio@crystal.cirrus.com).
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* -- adapted from cs4281 PCI driver for cs4297a on
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* BCM1250 Synchronous Serial interface
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* (Kip Walker, Broadcom Corp.)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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* Module command line parameters:
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* none
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*
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* Supported devices:
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* /dev/dsp standard /dev/dsp device, (mostly) OSS compatible
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* /dev/mixer standard /dev/mixer device, (mostly) OSS compatible
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* /dev/midi simple MIDI UART interface, no ioctl
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*
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* Modification History
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* 08/20/00 trw - silence and no stopping DAC until release
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* 08/23/00 trw - added CS_DBG statements, fix interrupt hang issue on DAC stop.
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* 09/18/00 trw - added 16bit only record with conversion
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* 09/24/00 trw - added Enhanced Full duplex (separate simultaneous
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* capture/playback rates)
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* 10/03/00 trw - fixed mmap (fixed GRECORD and the XMMS mmap test plugin
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* libOSSm.so)
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* 10/11/00 trw - modified for 2.4.0-test9 kernel enhancements (NR_MAP removal)
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* 11/03/00 trw - fixed interrupt loss/stutter, added debug.
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* 11/10/00 bkz - added __devinit to cs4297a_hw_init()
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* 11/10/00 trw - fixed SMP and capture spinlock hang.
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* 12/04/00 trw - cleaned up CSDEBUG flags and added "defaultorder" moduleparm.
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* 12/05/00 trw - fixed polling (myth2), and added underrun swptr fix.
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* 12/08/00 trw - added PM support.
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* 12/14/00 trw - added wrapper code, builds under 2.4.0, 2.2.17-20, 2.2.17-8
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* (RH/Dell base), 2.2.18, 2.2.12. cleaned up code mods by ident.
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* 12/19/00 trw - added PM support for 2.2 base (apm_callback). other PM cleanup.
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* 12/21/00 trw - added fractional "defaultorder" inputs. if >100 then use
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* defaultorder-100 as power of 2 for the buffer size. example:
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* 106 = 2^(106-100) = 2^6 = 64 bytes for the buffer size.
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*
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*******************************************************************************/
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#include <linux/list.h>
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#include <linux/version.h>
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#include <linux/module.h>
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#include <linux/string.h>
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#include <linux/ioport.h>
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#include <linux/sched.h>
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#include <linux/delay.h>
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#include <linux/sound.h>
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#include <linux/slab.h>
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#include <linux/soundcard.h>
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#include <linux/ac97_codec.h>
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#include <linux/pci.h>
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#include <linux/bitops.h>
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#include <asm/io.h>
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#include <asm/dma.h>
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#include <linux/init.h>
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#include <linux/poll.h>
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#include <linux/smp_lock.h>
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#include <linux/wrapper.h>
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#include <asm/uaccess.h>
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#include <asm/hardirq.h>
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#include <asm/sibyte/sb1250_regs.h>
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#include <asm/sibyte/sb1250_int.h>
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#include <asm/sibyte/sb1250_dma.h>
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#include <asm/sibyte/sb1250_scd.h>
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#include <asm/sibyte/sb1250_syncser.h>
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#include <asm/sibyte/sb1250_mac.h>
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#include <asm/sibyte/sb1250.h>
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#include <asm/sibyte/64bit.h>
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struct cs4297a_state;
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EXPORT_NO_SYMBOLS;
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static void stop_dac(struct cs4297a_state *s);
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static void stop_adc(struct cs4297a_state *s);
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static void start_dac(struct cs4297a_state *s);
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static void start_adc(struct cs4297a_state *s);
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#undef OSS_DOCUMENTED_MIXER_SEMANTICS
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// ---------------------------------------------------------------------
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#define CS4297a_MAGIC 0xf00beef1
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// buffer order determines the size of the dma buffer for the driver.
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// under Linux, a smaller buffer allows more responsiveness from many of the
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// applications (e.g. games). A larger buffer allows some of the apps (esound)
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// to not underrun the dma buffer as easily. As default, use 32k (order=3)
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// rather than 64k as some of the games work more responsively.
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// log base 2( buff sz = 32k).
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//static unsigned long defaultorder = 3;
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//MODULE_PARM(defaultorder, "i");
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//
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// Turn on/off debugging compilation by commenting out "#define CSDEBUG"
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//
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#define CSDEBUG 0
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#if CSDEBUG
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#define CSDEBUG_INTERFACE 1
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#else
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#undef CSDEBUG_INTERFACE
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#endif
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//
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// cs_debugmask areas
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//
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#define CS_INIT 0x00000001 // initialization and probe functions
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#define CS_ERROR 0x00000002 // tmp debugging bit placeholder
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#define CS_INTERRUPT 0x00000004 // interrupt handler (separate from all other)
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#define CS_FUNCTION 0x00000008 // enter/leave functions
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#define CS_WAVE_WRITE 0x00000010 // write information for wave
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#define CS_WAVE_READ 0x00000020 // read information for wave
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#define CS_AC97 0x00000040 // AC97 register access
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#define CS_DESCR 0x00000080 // descriptor management
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#define CS_OPEN 0x00000400 // all open functions in the driver
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#define CS_RELEASE 0x00000800 // all release functions in the driver
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#define CS_PARMS 0x00001000 // functional and operational parameters
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#define CS_IOCTL 0x00002000 // ioctl (non-mixer)
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#define CS_TMP 0x10000000 // tmp debug mask bit
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//
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// CSDEBUG is usual mode is set to 1, then use the
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// cs_debuglevel and cs_debugmask to turn on or off debugging.
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// Debug level of 1 has been defined to be kernel errors and info
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// that should be printed on any released driver.
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//
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#if CSDEBUG
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#define CS_DBGOUT(mask,level,x) if((cs_debuglevel >= (level)) && ((mask) & cs_debugmask) ) {x;}
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#else
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#define CS_DBGOUT(mask,level,x)
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#endif
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#if CSDEBUG
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static unsigned long cs_debuglevel = 4; // levels range from 1-9
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static unsigned long cs_debugmask = CS_INIT /*| CS_IOCTL*/;
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MODULE_PARM(cs_debuglevel, "i");
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MODULE_PARM(cs_debugmask, "i");
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#endif
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#define CS_TRUE 1
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#define CS_FALSE 0
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#define CS_TYPE_ADC 0
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#define CS_TYPE_DAC 1
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#define SER_BASE (A_SER_BASE_1 + KSEG1)
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#define SS_CSR(t) (SER_BASE+t)
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#define SS_TXTBL(t) (SER_BASE+R_SER_TX_TABLE_BASE+(t*8))
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#define SS_RXTBL(t) (SER_BASE+R_SER_RX_TABLE_BASE+(t*8))
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#define FRAME_BYTES 32
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#define FRAME_SAMPLE_BYTES 4
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/* Should this be variable? */
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#define SAMPLE_BUF_SIZE (16*1024)
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#define SAMPLE_FRAME_COUNT (SAMPLE_BUF_SIZE / FRAME_SAMPLE_BYTES)
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/* The driver can explode/shrink the frames to/from a smaller sample
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buffer */
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#define DMA_BLOAT_FACTOR 1
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#define DMA_DESCR (SAMPLE_FRAME_COUNT / DMA_BLOAT_FACTOR)
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#define DMA_BUF_SIZE (DMA_DESCR * FRAME_BYTES)
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/* Use the maxmium count (255 == 5.1 ms between interrupts) */
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#define DMA_INT_CNT ((1 << S_DMA_INT_PKTCNT) - 1)
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/* Figure this out: how many TX DMAs ahead to schedule a reg access */
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#define REG_LATENCY 150
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#define FRAME_TX_US 20
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#define SERDMA_NEXTBUF(d,f) (((d)->f+1) % (d)->ringsz)
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#ifdef CONFIG_SIBYTE_SB1250_DUART
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extern char sb1250_duart_present[];
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#endif
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static const char invalid_magic[] =
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KERN_CRIT "cs4297a: invalid magic value\n";
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#define VALIDATE_STATE(s) \
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({ \
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if (!(s) || (s)->magic != CS4297a_MAGIC) { \
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printk(invalid_magic); \
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return -ENXIO; \
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} \
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})
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struct list_head cs4297a_devs = { &cs4297a_devs, &cs4297a_devs };
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typedef struct serdma_descr_s {
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u64 descr_a;
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u64 descr_b;
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} serdma_descr_t;
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typedef unsigned long paddr_t;
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typedef struct serdma_s {
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unsigned ringsz;
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serdma_descr_t *descrtab;
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serdma_descr_t *descrtab_end;
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paddr_t descrtab_phys;
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serdma_descr_t *descr_add;
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serdma_descr_t *descr_rem;
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u64 *dma_buf; // buffer for DMA contents (frames)
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paddr_t dma_buf_phys;
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u16 *sample_buf; // tmp buffer for sample conversions
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u16 *sb_swptr;
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u16 *sb_hwptr;
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u16 *sb_end;
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dma_addr_t dmaaddr;
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// unsigned buforder; // Log base 2 of 'dma_buf' size in bytes..
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unsigned numfrag; // # of 'fragments' in the buffer.
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unsigned fragshift; // Log base 2 of fragment size.
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unsigned hwptr, swptr;
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unsigned total_bytes; // # bytes process since open.
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unsigned blocks; // last returned blocks value GETOPTR
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unsigned wakeup; // interrupt occurred on block
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int count;
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unsigned underrun; // underrun flag
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unsigned error; // over/underrun
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wait_queue_head_t wait;
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wait_queue_head_t reg_wait;
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// redundant, but makes calculations easier
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unsigned fragsize; // 2**fragshift..
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unsigned sbufsz; // 2**buforder.
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unsigned fragsamples;
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// OSS stuff
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unsigned mapped:1; // Buffer mapped in cs4297a_mmap()?
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unsigned ready:1; // prog_dmabuf_dac()/adc() successful?
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unsigned endcleared:1;
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unsigned type:1; // adc or dac buffer (CS_TYPE_XXX)
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unsigned ossfragshift;
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int ossmaxfrags;
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unsigned subdivision;
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} serdma_t;
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struct cs4297a_state {
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// magic
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unsigned int magic;
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struct list_head list;
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// soundcore stuff
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int dev_audio;
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int dev_mixer;
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// hardware resources
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unsigned int irq;
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struct {
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unsigned int rx_ovrrn; /* FIFO */
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unsigned int rx_overflow; /* staging buffer */
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unsigned int tx_underrun;
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unsigned int rx_bad;
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unsigned int rx_good;
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} stats;
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// mixer registers
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struct {
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unsigned short vol[10];
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unsigned int recsrc;
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unsigned int modcnt;
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unsigned short micpreamp;
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} mix;
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// wave stuff
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struct properties {
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unsigned fmt;
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unsigned fmt_original; // original requested format
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unsigned channels;
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unsigned rate;
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} prop_dac, prop_adc;
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unsigned conversion:1; // conversion from 16 to 8 bit in progress
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unsigned ena;
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spinlock_t lock;
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struct semaphore open_sem;
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struct semaphore open_sem_adc;
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struct semaphore open_sem_dac;
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mode_t open_mode;
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wait_queue_head_t open_wait;
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wait_queue_head_t open_wait_adc;
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wait_queue_head_t open_wait_dac;
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dma_addr_t dmaaddr_sample_buf;
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unsigned buforder_sample_buf; // Log base 2 of 'dma_buf' size in bytes..
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serdma_t dma_dac, dma_adc;
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volatile u16 read_value;
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volatile u16 read_reg;
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volatile u64 reg_request;
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};
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#if 1
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#define prog_codec(a,b)
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#define dealloc_dmabuf(a,b);
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#endif
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static int prog_dmabuf_adc(struct cs4297a_state *s)
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{
|
| 323 |
|
|
s->dma_adc.ready = 1;
|
| 324 |
|
|
return 0;
|
| 325 |
|
|
}
|
| 326 |
|
|
|
| 327 |
|
|
|
| 328 |
|
|
static int prog_dmabuf_dac(struct cs4297a_state *s)
|
| 329 |
|
|
{
|
| 330 |
|
|
s->dma_dac.ready = 1;
|
| 331 |
|
|
return 0;
|
| 332 |
|
|
}
|
| 333 |
|
|
|
| 334 |
|
|
static void clear_advance(void *buf, unsigned bsize, unsigned bptr,
|
| 335 |
|
|
unsigned len, unsigned char c)
|
| 336 |
|
|
{
|
| 337 |
|
|
if (bptr + len > bsize) {
|
| 338 |
|
|
unsigned x = bsize - bptr;
|
| 339 |
|
|
memset(((char *) buf) + bptr, c, x);
|
| 340 |
|
|
bptr = 0;
|
| 341 |
|
|
len -= x;
|
| 342 |
|
|
}
|
| 343 |
|
|
CS_DBGOUT(CS_WAVE_WRITE, 4, printk(KERN_INFO
|
| 344 |
|
|
"cs4297a: clear_advance(): memset %d at 0x%.8x for %d size \n",
|
| 345 |
|
|
(unsigned)c, (unsigned)((char *) buf) + bptr, len));
|
| 346 |
|
|
memset(((char *) buf) + bptr, c, len);
|
| 347 |
|
|
}
|
| 348 |
|
|
|
| 349 |
|
|
#if CSDEBUG
|
| 350 |
|
|
|
| 351 |
|
|
// DEBUG ROUTINES
|
| 352 |
|
|
|
| 353 |
|
|
#define SOUND_MIXER_CS_GETDBGLEVEL _SIOWR('M',120, int)
|
| 354 |
|
|
#define SOUND_MIXER_CS_SETDBGLEVEL _SIOWR('M',121, int)
|
| 355 |
|
|
#define SOUND_MIXER_CS_GETDBGMASK _SIOWR('M',122, int)
|
| 356 |
|
|
#define SOUND_MIXER_CS_SETDBGMASK _SIOWR('M',123, int)
|
| 357 |
|
|
|
| 358 |
|
|
static void cs_printioctl(unsigned int x)
|
| 359 |
|
|
{
|
| 360 |
|
|
unsigned int i;
|
| 361 |
|
|
unsigned char vidx;
|
| 362 |
|
|
// Index of mixtable1[] member is Device ID
|
| 363 |
|
|
// and must be <= SOUND_MIXER_NRDEVICES.
|
| 364 |
|
|
// Value of array member is index into s->mix.vol[]
|
| 365 |
|
|
static const unsigned char mixtable1[SOUND_MIXER_NRDEVICES] = {
|
| 366 |
|
|
[SOUND_MIXER_PCM] = 1, // voice
|
| 367 |
|
|
[SOUND_MIXER_LINE1] = 2, // AUX
|
| 368 |
|
|
[SOUND_MIXER_CD] = 3, // CD
|
| 369 |
|
|
[SOUND_MIXER_LINE] = 4, // Line
|
| 370 |
|
|
[SOUND_MIXER_SYNTH] = 5, // FM
|
| 371 |
|
|
[SOUND_MIXER_MIC] = 6, // Mic
|
| 372 |
|
|
[SOUND_MIXER_SPEAKER] = 7, // Speaker
|
| 373 |
|
|
[SOUND_MIXER_RECLEV] = 8, // Recording level
|
| 374 |
|
|
[SOUND_MIXER_VOLUME] = 9 // Master Volume
|
| 375 |
|
|
};
|
| 376 |
|
|
|
| 377 |
|
|
switch (x) {
|
| 378 |
|
|
case SOUND_MIXER_CS_GETDBGMASK:
|
| 379 |
|
|
CS_DBGOUT(CS_IOCTL, 4,
|
| 380 |
|
|
printk("SOUND_MIXER_CS_GETDBGMASK:\n"));
|
| 381 |
|
|
break;
|
| 382 |
|
|
case SOUND_MIXER_CS_GETDBGLEVEL:
|
| 383 |
|
|
CS_DBGOUT(CS_IOCTL, 4,
|
| 384 |
|
|
printk("SOUND_MIXER_CS_GETDBGLEVEL:\n"));
|
| 385 |
|
|
break;
|
| 386 |
|
|
case SOUND_MIXER_CS_SETDBGMASK:
|
| 387 |
|
|
CS_DBGOUT(CS_IOCTL, 4,
|
| 388 |
|
|
printk("SOUND_MIXER_CS_SETDBGMASK:\n"));
|
| 389 |
|
|
break;
|
| 390 |
|
|
case SOUND_MIXER_CS_SETDBGLEVEL:
|
| 391 |
|
|
CS_DBGOUT(CS_IOCTL, 4,
|
| 392 |
|
|
printk("SOUND_MIXER_CS_SETDBGLEVEL:\n"));
|
| 393 |
|
|
break;
|
| 394 |
|
|
case OSS_GETVERSION:
|
| 395 |
|
|
CS_DBGOUT(CS_IOCTL, 4, printk("OSS_GETVERSION:\n"));
|
| 396 |
|
|
break;
|
| 397 |
|
|
case SNDCTL_DSP_SYNC:
|
| 398 |
|
|
CS_DBGOUT(CS_IOCTL, 4, printk("SNDCTL_DSP_SYNC:\n"));
|
| 399 |
|
|
break;
|
| 400 |
|
|
case SNDCTL_DSP_SETDUPLEX:
|
| 401 |
|
|
CS_DBGOUT(CS_IOCTL, 4, printk("SNDCTL_DSP_SETDUPLEX:\n"));
|
| 402 |
|
|
break;
|
| 403 |
|
|
case SNDCTL_DSP_GETCAPS:
|
| 404 |
|
|
CS_DBGOUT(CS_IOCTL, 4, printk("SNDCTL_DSP_GETCAPS:\n"));
|
| 405 |
|
|
break;
|
| 406 |
|
|
case SNDCTL_DSP_RESET:
|
| 407 |
|
|
CS_DBGOUT(CS_IOCTL, 4, printk("SNDCTL_DSP_RESET:\n"));
|
| 408 |
|
|
break;
|
| 409 |
|
|
case SNDCTL_DSP_SPEED:
|
| 410 |
|
|
CS_DBGOUT(CS_IOCTL, 4, printk("SNDCTL_DSP_SPEED:\n"));
|
| 411 |
|
|
break;
|
| 412 |
|
|
case SNDCTL_DSP_STEREO:
|
| 413 |
|
|
CS_DBGOUT(CS_IOCTL, 4, printk("SNDCTL_DSP_STEREO:\n"));
|
| 414 |
|
|
break;
|
| 415 |
|
|
case SNDCTL_DSP_CHANNELS:
|
| 416 |
|
|
CS_DBGOUT(CS_IOCTL, 4, printk("SNDCTL_DSP_CHANNELS:\n"));
|
| 417 |
|
|
break;
|
| 418 |
|
|
case SNDCTL_DSP_GETFMTS:
|
| 419 |
|
|
CS_DBGOUT(CS_IOCTL, 4, printk("SNDCTL_DSP_GETFMTS:\n"));
|
| 420 |
|
|
break;
|
| 421 |
|
|
case SNDCTL_DSP_SETFMT:
|
| 422 |
|
|
CS_DBGOUT(CS_IOCTL, 4, printk("SNDCTL_DSP_SETFMT:\n"));
|
| 423 |
|
|
break;
|
| 424 |
|
|
case SNDCTL_DSP_POST:
|
| 425 |
|
|
CS_DBGOUT(CS_IOCTL, 4, printk("SNDCTL_DSP_POST:\n"));
|
| 426 |
|
|
break;
|
| 427 |
|
|
case SNDCTL_DSP_GETTRIGGER:
|
| 428 |
|
|
CS_DBGOUT(CS_IOCTL, 4, printk("SNDCTL_DSP_GETTRIGGER:\n"));
|
| 429 |
|
|
break;
|
| 430 |
|
|
case SNDCTL_DSP_SETTRIGGER:
|
| 431 |
|
|
CS_DBGOUT(CS_IOCTL, 4, printk("SNDCTL_DSP_SETTRIGGER:\n"));
|
| 432 |
|
|
break;
|
| 433 |
|
|
case SNDCTL_DSP_GETOSPACE:
|
| 434 |
|
|
CS_DBGOUT(CS_IOCTL, 4, printk("SNDCTL_DSP_GETOSPACE:\n"));
|
| 435 |
|
|
break;
|
| 436 |
|
|
case SNDCTL_DSP_GETISPACE:
|
| 437 |
|
|
CS_DBGOUT(CS_IOCTL, 4, printk("SNDCTL_DSP_GETISPACE:\n"));
|
| 438 |
|
|
break;
|
| 439 |
|
|
case SNDCTL_DSP_NONBLOCK:
|
| 440 |
|
|
CS_DBGOUT(CS_IOCTL, 4, printk("SNDCTL_DSP_NONBLOCK:\n"));
|
| 441 |
|
|
break;
|
| 442 |
|
|
case SNDCTL_DSP_GETODELAY:
|
| 443 |
|
|
CS_DBGOUT(CS_IOCTL, 4, printk("SNDCTL_DSP_GETODELAY:\n"));
|
| 444 |
|
|
break;
|
| 445 |
|
|
case SNDCTL_DSP_GETIPTR:
|
| 446 |
|
|
CS_DBGOUT(CS_IOCTL, 4, printk("SNDCTL_DSP_GETIPTR:\n"));
|
| 447 |
|
|
break;
|
| 448 |
|
|
case SNDCTL_DSP_GETOPTR:
|
| 449 |
|
|
CS_DBGOUT(CS_IOCTL, 4, printk("SNDCTL_DSP_GETOPTR:\n"));
|
| 450 |
|
|
break;
|
| 451 |
|
|
case SNDCTL_DSP_GETBLKSIZE:
|
| 452 |
|
|
CS_DBGOUT(CS_IOCTL, 4, printk("SNDCTL_DSP_GETBLKSIZE:\n"));
|
| 453 |
|
|
break;
|
| 454 |
|
|
case SNDCTL_DSP_SETFRAGMENT:
|
| 455 |
|
|
CS_DBGOUT(CS_IOCTL, 4,
|
| 456 |
|
|
printk("SNDCTL_DSP_SETFRAGMENT:\n"));
|
| 457 |
|
|
break;
|
| 458 |
|
|
case SNDCTL_DSP_SUBDIVIDE:
|
| 459 |
|
|
CS_DBGOUT(CS_IOCTL, 4, printk("SNDCTL_DSP_SUBDIVIDE:\n"));
|
| 460 |
|
|
break;
|
| 461 |
|
|
case SOUND_PCM_READ_RATE:
|
| 462 |
|
|
CS_DBGOUT(CS_IOCTL, 4, printk("SOUND_PCM_READ_RATE:\n"));
|
| 463 |
|
|
break;
|
| 464 |
|
|
case SOUND_PCM_READ_CHANNELS:
|
| 465 |
|
|
CS_DBGOUT(CS_IOCTL, 4,
|
| 466 |
|
|
printk("SOUND_PCM_READ_CHANNELS:\n"));
|
| 467 |
|
|
break;
|
| 468 |
|
|
case SOUND_PCM_READ_BITS:
|
| 469 |
|
|
CS_DBGOUT(CS_IOCTL, 4, printk("SOUND_PCM_READ_BITS:\n"));
|
| 470 |
|
|
break;
|
| 471 |
|
|
case SOUND_PCM_WRITE_FILTER:
|
| 472 |
|
|
CS_DBGOUT(CS_IOCTL, 4,
|
| 473 |
|
|
printk("SOUND_PCM_WRITE_FILTER:\n"));
|
| 474 |
|
|
break;
|
| 475 |
|
|
case SNDCTL_DSP_SETSYNCRO:
|
| 476 |
|
|
CS_DBGOUT(CS_IOCTL, 4, printk("SNDCTL_DSP_SETSYNCRO:\n"));
|
| 477 |
|
|
break;
|
| 478 |
|
|
case SOUND_PCM_READ_FILTER:
|
| 479 |
|
|
CS_DBGOUT(CS_IOCTL, 4, printk("SOUND_PCM_READ_FILTER:\n"));
|
| 480 |
|
|
break;
|
| 481 |
|
|
case SOUND_MIXER_PRIVATE1:
|
| 482 |
|
|
CS_DBGOUT(CS_IOCTL, 4, printk("SOUND_MIXER_PRIVATE1:\n"));
|
| 483 |
|
|
break;
|
| 484 |
|
|
case SOUND_MIXER_PRIVATE2:
|
| 485 |
|
|
CS_DBGOUT(CS_IOCTL, 4, printk("SOUND_MIXER_PRIVATE2:\n"));
|
| 486 |
|
|
break;
|
| 487 |
|
|
case SOUND_MIXER_PRIVATE3:
|
| 488 |
|
|
CS_DBGOUT(CS_IOCTL, 4, printk("SOUND_MIXER_PRIVATE3:\n"));
|
| 489 |
|
|
break;
|
| 490 |
|
|
case SOUND_MIXER_PRIVATE4:
|
| 491 |
|
|
CS_DBGOUT(CS_IOCTL, 4, printk("SOUND_MIXER_PRIVATE4:\n"));
|
| 492 |
|
|
break;
|
| 493 |
|
|
case SOUND_MIXER_PRIVATE5:
|
| 494 |
|
|
CS_DBGOUT(CS_IOCTL, 4, printk("SOUND_MIXER_PRIVATE5:\n"));
|
| 495 |
|
|
break;
|
| 496 |
|
|
case SOUND_MIXER_INFO:
|
| 497 |
|
|
CS_DBGOUT(CS_IOCTL, 4, printk("SOUND_MIXER_INFO:\n"));
|
| 498 |
|
|
break;
|
| 499 |
|
|
case SOUND_OLD_MIXER_INFO:
|
| 500 |
|
|
CS_DBGOUT(CS_IOCTL, 4, printk("SOUND_OLD_MIXER_INFO:\n"));
|
| 501 |
|
|
break;
|
| 502 |
|
|
|
| 503 |
|
|
default:
|
| 504 |
|
|
switch (_IOC_NR(x)) {
|
| 505 |
|
|
case SOUND_MIXER_VOLUME:
|
| 506 |
|
|
CS_DBGOUT(CS_IOCTL, 4,
|
| 507 |
|
|
printk("SOUND_MIXER_VOLUME:\n"));
|
| 508 |
|
|
break;
|
| 509 |
|
|
case SOUND_MIXER_SPEAKER:
|
| 510 |
|
|
CS_DBGOUT(CS_IOCTL, 4,
|
| 511 |
|
|
printk("SOUND_MIXER_SPEAKER:\n"));
|
| 512 |
|
|
break;
|
| 513 |
|
|
case SOUND_MIXER_RECLEV:
|
| 514 |
|
|
CS_DBGOUT(CS_IOCTL, 4,
|
| 515 |
|
|
printk("SOUND_MIXER_RECLEV:\n"));
|
| 516 |
|
|
break;
|
| 517 |
|
|
case SOUND_MIXER_MIC:
|
| 518 |
|
|
CS_DBGOUT(CS_IOCTL, 4,
|
| 519 |
|
|
printk("SOUND_MIXER_MIC:\n"));
|
| 520 |
|
|
break;
|
| 521 |
|
|
case SOUND_MIXER_SYNTH:
|
| 522 |
|
|
CS_DBGOUT(CS_IOCTL, 4,
|
| 523 |
|
|
printk("SOUND_MIXER_SYNTH:\n"));
|
| 524 |
|
|
break;
|
| 525 |
|
|
case SOUND_MIXER_RECSRC:
|
| 526 |
|
|
CS_DBGOUT(CS_IOCTL, 4,
|
| 527 |
|
|
printk("SOUND_MIXER_RECSRC:\n"));
|
| 528 |
|
|
break;
|
| 529 |
|
|
case SOUND_MIXER_DEVMASK:
|
| 530 |
|
|
CS_DBGOUT(CS_IOCTL, 4,
|
| 531 |
|
|
printk("SOUND_MIXER_DEVMASK:\n"));
|
| 532 |
|
|
break;
|
| 533 |
|
|
case SOUND_MIXER_RECMASK:
|
| 534 |
|
|
CS_DBGOUT(CS_IOCTL, 4,
|
| 535 |
|
|
printk("SOUND_MIXER_RECMASK:\n"));
|
| 536 |
|
|
break;
|
| 537 |
|
|
case SOUND_MIXER_STEREODEVS:
|
| 538 |
|
|
CS_DBGOUT(CS_IOCTL, 4,
|
| 539 |
|
|
printk("SOUND_MIXER_STEREODEVS:\n"));
|
| 540 |
|
|
break;
|
| 541 |
|
|
case SOUND_MIXER_CAPS:
|
| 542 |
|
|
CS_DBGOUT(CS_IOCTL, 4, printk("SOUND_MIXER_CAPS:\n"));
|
| 543 |
|
|
break;
|
| 544 |
|
|
default:
|
| 545 |
|
|
i = _IOC_NR(x);
|
| 546 |
|
|
if (i >= SOUND_MIXER_NRDEVICES
|
| 547 |
|
|
|| !(vidx = mixtable1[i])) {
|
| 548 |
|
|
CS_DBGOUT(CS_IOCTL, 4, printk
|
| 549 |
|
|
("UNKNOWN IOCTL: 0x%.8x NR=%d\n",
|
| 550 |
|
|
x, i));
|
| 551 |
|
|
} else {
|
| 552 |
|
|
CS_DBGOUT(CS_IOCTL, 4, printk
|
| 553 |
|
|
("SOUND_MIXER_IOCTL AC9x: 0x%.8x NR=%d\n",
|
| 554 |
|
|
x, i));
|
| 555 |
|
|
}
|
| 556 |
|
|
break;
|
| 557 |
|
|
}
|
| 558 |
|
|
}
|
| 559 |
|
|
}
|
| 560 |
|
|
#endif
|
| 561 |
|
|
|
| 562 |
|
|
|
| 563 |
|
|
static int ser_init(struct cs4297a_state *s)
|
| 564 |
|
|
{
|
| 565 |
|
|
int i;
|
| 566 |
|
|
|
| 567 |
|
|
CS_DBGOUT(CS_INIT, 2,
|
| 568 |
|
|
printk(KERN_INFO "cs4297a: Setting up serial parameters\n"));
|
| 569 |
|
|
|
| 570 |
|
|
out64(M_SYNCSER_CMD_RX_RESET | M_SYNCSER_CMD_TX_RESET, SS_CSR(R_SER_CMD));
|
| 571 |
|
|
|
| 572 |
|
|
out64(M_SYNCSER_MSB_FIRST, SS_CSR(R_SER_MODE));
|
| 573 |
|
|
out64(32, SS_CSR(R_SER_MINFRM_SZ));
|
| 574 |
|
|
out64(32, SS_CSR(R_SER_MAXFRM_SZ));
|
| 575 |
|
|
|
| 576 |
|
|
out64(1, SS_CSR(R_SER_TX_RD_THRSH));
|
| 577 |
|
|
out64(4, SS_CSR(R_SER_TX_WR_THRSH));
|
| 578 |
|
|
out64(8, SS_CSR(R_SER_RX_RD_THRSH));
|
| 579 |
|
|
|
| 580 |
|
|
/* This looks good from experimentation */
|
| 581 |
|
|
out64((M_SYNCSER_TXSYNC_INT | V_SYNCSER_TXSYNC_DLY(0) | M_SYNCSER_TXCLK_EXT |
|
| 582 |
|
|
M_SYNCSER_RXSYNC_INT | V_SYNCSER_RXSYNC_DLY(1) | M_SYNCSER_RXCLK_EXT | M_SYNCSER_RXSYNC_EDGE),
|
| 583 |
|
|
SS_CSR(R_SER_LINE_MODE));
|
| 584 |
|
|
|
| 585 |
|
|
/* This looks good from experimentation */
|
| 586 |
|
|
out64(V_SYNCSER_SEQ_COUNT(14) | M_SYNCSER_SEQ_ENABLE | M_SYNCSER_SEQ_STROBE,
|
| 587 |
|
|
SS_TXTBL(0));
|
| 588 |
|
|
out64(V_SYNCSER_SEQ_COUNT(15) | M_SYNCSER_SEQ_ENABLE | M_SYNCSER_SEQ_BYTE,
|
| 589 |
|
|
SS_TXTBL(1));
|
| 590 |
|
|
out64(V_SYNCSER_SEQ_COUNT(13) | M_SYNCSER_SEQ_ENABLE | M_SYNCSER_SEQ_BYTE,
|
| 591 |
|
|
SS_TXTBL(2));
|
| 592 |
|
|
out64(V_SYNCSER_SEQ_COUNT( 0) | M_SYNCSER_SEQ_ENABLE |
|
| 593 |
|
|
M_SYNCSER_SEQ_STROBE | M_SYNCSER_SEQ_LAST, SS_TXTBL(3));
|
| 594 |
|
|
|
| 595 |
|
|
out64(V_SYNCSER_SEQ_COUNT(14) | M_SYNCSER_SEQ_ENABLE | M_SYNCSER_SEQ_STROBE,
|
| 596 |
|
|
SS_RXTBL(0));
|
| 597 |
|
|
out64(V_SYNCSER_SEQ_COUNT(15) | M_SYNCSER_SEQ_ENABLE | M_SYNCSER_SEQ_BYTE,
|
| 598 |
|
|
SS_RXTBL(1));
|
| 599 |
|
|
out64(V_SYNCSER_SEQ_COUNT(13) | M_SYNCSER_SEQ_ENABLE | M_SYNCSER_SEQ_BYTE,
|
| 600 |
|
|
SS_RXTBL(2));
|
| 601 |
|
|
out64(V_SYNCSER_SEQ_COUNT( 0) | M_SYNCSER_SEQ_ENABLE | M_SYNCSER_SEQ_STROBE |
|
| 602 |
|
|
M_SYNCSER_SEQ_LAST, SS_RXTBL(3));
|
| 603 |
|
|
|
| 604 |
|
|
for (i=4; i<16; i++) {
|
| 605 |
|
|
/* Just in case... */
|
| 606 |
|
|
out64(M_SYNCSER_SEQ_LAST, SS_TXTBL(i));
|
| 607 |
|
|
out64(M_SYNCSER_SEQ_LAST, SS_RXTBL(i));
|
| 608 |
|
|
}
|
| 609 |
|
|
|
| 610 |
|
|
return 0;
|
| 611 |
|
|
}
|
| 612 |
|
|
|
| 613 |
|
|
static int init_serdma(serdma_t *dma)
|
| 614 |
|
|
{
|
| 615 |
|
|
CS_DBGOUT(CS_INIT, 2,
|
| 616 |
|
|
printk(KERN_ERR "cs4297a: desc - %d sbufsize - %d dbufsize - %d\n",
|
| 617 |
|
|
DMA_DESCR, SAMPLE_BUF_SIZE, DMA_BUF_SIZE));
|
| 618 |
|
|
|
| 619 |
|
|
/* Descriptors */
|
| 620 |
|
|
dma->ringsz = DMA_DESCR;
|
| 621 |
|
|
dma->descrtab = kmalloc(dma->ringsz * sizeof(serdma_descr_t), GFP_KERNEL);
|
| 622 |
|
|
if (!dma->descrtab) {
|
| 623 |
|
|
printk(KERN_ERR "cs4297a: kmalloc descrtab failed\n");
|
| 624 |
|
|
return -1;
|
| 625 |
|
|
}
|
| 626 |
|
|
memset(dma->descrtab, 0, dma->ringsz * sizeof(serdma_descr_t));
|
| 627 |
|
|
dma->descrtab_end = dma->descrtab + dma->ringsz;
|
| 628 |
|
|
/* XXX bloddy mess, use proper DMA API here ... */
|
| 629 |
|
|
dma->descrtab_phys = PHYSADDR((long)dma->descrtab);
|
| 630 |
|
|
dma->descr_add = dma->descr_rem = dma->descrtab;
|
| 631 |
|
|
|
| 632 |
|
|
/* Frame buffer area */
|
| 633 |
|
|
dma->dma_buf = kmalloc(DMA_BUF_SIZE, GFP_KERNEL);
|
| 634 |
|
|
if (!dma->dma_buf) {
|
| 635 |
|
|
printk(KERN_ERR "cs4297a: kmalloc dma_buf failed\n");
|
| 636 |
|
|
kfree(dma->descrtab);
|
| 637 |
|
|
return -1;
|
| 638 |
|
|
}
|
| 639 |
|
|
memset(dma->dma_buf, 0, DMA_BUF_SIZE);
|
| 640 |
|
|
dma->dma_buf_phys = PHYSADDR((long)dma->dma_buf);
|
| 641 |
|
|
|
| 642 |
|
|
/* Samples buffer area */
|
| 643 |
|
|
dma->sbufsz = SAMPLE_BUF_SIZE;
|
| 644 |
|
|
dma->sample_buf = kmalloc(dma->sbufsz, GFP_KERNEL);
|
| 645 |
|
|
if (!dma->sample_buf) {
|
| 646 |
|
|
printk(KERN_ERR "cs4297a: kmalloc sample_buf failed\n");
|
| 647 |
|
|
kfree(dma->descrtab);
|
| 648 |
|
|
kfree(dma->dma_buf);
|
| 649 |
|
|
return -1;
|
| 650 |
|
|
}
|
| 651 |
|
|
dma->sb_swptr = dma->sb_hwptr = dma->sample_buf;
|
| 652 |
|
|
dma->sb_end = (u16 *)((void *)dma->sample_buf + dma->sbufsz);
|
| 653 |
|
|
dma->fragsize = dma->sbufsz >> 1;
|
| 654 |
|
|
|
| 655 |
|
|
CS_DBGOUT(CS_INIT, 4,
|
| 656 |
|
|
printk(KERN_ERR "cs4297a: descrtab - %08x dma_buf - %x sample_buf - %x\n",
|
| 657 |
|
|
(int)dma->descrtab, (int)dma->dma_buf,
|
| 658 |
|
|
(int)dma->sample_buf));
|
| 659 |
|
|
|
| 660 |
|
|
return 0;
|
| 661 |
|
|
}
|
| 662 |
|
|
|
| 663 |
|
|
static int dma_init(struct cs4297a_state *s)
|
| 664 |
|
|
{
|
| 665 |
|
|
int i;
|
| 666 |
|
|
|
| 667 |
|
|
CS_DBGOUT(CS_INIT, 2,
|
| 668 |
|
|
printk(KERN_INFO "cs4297a: Setting up DMA\n"));
|
| 669 |
|
|
|
| 670 |
|
|
if (init_serdma(&s->dma_adc) ||
|
| 671 |
|
|
init_serdma(&s->dma_dac))
|
| 672 |
|
|
return -1;
|
| 673 |
|
|
|
| 674 |
|
|
if (in64(SS_CSR(R_SER_DMA_DSCR_COUNT_RX))||
|
| 675 |
|
|
in64(SS_CSR(R_SER_DMA_DSCR_COUNT_TX))) {
|
| 676 |
|
|
panic("DMA state corrupted?!");
|
| 677 |
|
|
}
|
| 678 |
|
|
|
| 679 |
|
|
/* Initialize now - the descr/buffer pairings will never
|
| 680 |
|
|
change... */
|
| 681 |
|
|
for (i=0; i<DMA_DESCR; i++) {
|
| 682 |
|
|
s->dma_dac.descrtab[i].descr_a = M_DMA_SERRX_SOP | V_DMA_DSCRA_A_SIZE(1) |
|
| 683 |
|
|
(s->dma_dac.dma_buf_phys + i*FRAME_BYTES);
|
| 684 |
|
|
s->dma_dac.descrtab[i].descr_b = V_DMA_DSCRB_PKT_SIZE(FRAME_BYTES);
|
| 685 |
|
|
s->dma_adc.descrtab[i].descr_a = V_DMA_DSCRA_A_SIZE(1) |
|
| 686 |
|
|
(s->dma_adc.dma_buf_phys + i*FRAME_BYTES);
|
| 687 |
|
|
s->dma_adc.descrtab[i].descr_b = 0;
|
| 688 |
|
|
}
|
| 689 |
|
|
|
| 690 |
|
|
out64((M_DMA_EOP_INT_EN | V_DMA_INT_PKTCNT(DMA_INT_CNT) |
|
| 691 |
|
|
V_DMA_RINGSZ(DMA_DESCR) | M_DMA_TDX_EN),
|
| 692 |
|
|
SS_CSR(R_SER_DMA_CONFIG0_RX));
|
| 693 |
|
|
out64(M_DMA_L2CA, SS_CSR(R_SER_DMA_CONFIG1_RX));
|
| 694 |
|
|
out64(s->dma_adc.descrtab_phys, SS_CSR(R_SER_DMA_DSCR_BASE_RX));
|
| 695 |
|
|
|
| 696 |
|
|
out64(V_DMA_RINGSZ(DMA_DESCR), SS_CSR(R_SER_DMA_CONFIG0_TX));
|
| 697 |
|
|
out64(M_DMA_L2CA | M_DMA_NO_DSCR_UPDT, SS_CSR(R_SER_DMA_CONFIG1_TX));
|
| 698 |
|
|
out64(s->dma_dac.descrtab_phys, SS_CSR(R_SER_DMA_DSCR_BASE_TX));
|
| 699 |
|
|
|
| 700 |
|
|
/* Prep the receive DMA descriptor ring */
|
| 701 |
|
|
out64(DMA_DESCR, SS_CSR(R_SER_DMA_DSCR_COUNT_RX));
|
| 702 |
|
|
|
| 703 |
|
|
out64(M_SYNCSER_DMA_RX_EN | M_SYNCSER_DMA_TX_EN, SS_CSR(R_SER_DMA_ENABLE));
|
| 704 |
|
|
|
| 705 |
|
|
out64((M_SYNCSER_RX_SYNC_ERR | M_SYNCSER_RX_OVERRUN | M_SYNCSER_RX_EOP_COUNT),
|
| 706 |
|
|
SS_CSR(R_SER_INT_MASK));
|
| 707 |
|
|
|
| 708 |
|
|
/* Enable the rx/tx; let the codec warm up to the sync and
|
| 709 |
|
|
start sending good frames before the receive FIFO is
|
| 710 |
|
|
enabled */
|
| 711 |
|
|
out64(M_SYNCSER_CMD_TX_EN, SS_CSR(R_SER_CMD));
|
| 712 |
|
|
udelay(1000);
|
| 713 |
|
|
out64(M_SYNCSER_CMD_RX_EN | M_SYNCSER_CMD_TX_EN, SS_CSR(R_SER_CMD));
|
| 714 |
|
|
|
| 715 |
|
|
/* XXXKW is this magic? (the "1" part) */
|
| 716 |
|
|
while ((in64(SS_CSR(R_SER_STATUS)) & 0xf1) != 1)
|
| 717 |
|
|
;
|
| 718 |
|
|
|
| 719 |
|
|
CS_DBGOUT(CS_INIT, 4,
|
| 720 |
|
|
printk(KERN_INFO "cs4297a: status: %08x\n",
|
| 721 |
|
|
(unsigned int)(in64(SS_CSR(R_SER_STATUS)) & 0xffffffff)));
|
| 722 |
|
|
|
| 723 |
|
|
return 0;
|
| 724 |
|
|
}
|
| 725 |
|
|
|
| 726 |
|
|
static int serdma_reg_access(struct cs4297a_state *s, u64 data)
|
| 727 |
|
|
{
|
| 728 |
|
|
serdma_t *d = &s->dma_dac;
|
| 729 |
|
|
u64 *data_p;
|
| 730 |
|
|
unsigned swptr;
|
| 731 |
|
|
int flags;
|
| 732 |
|
|
serdma_descr_t *descr;
|
| 733 |
|
|
|
| 734 |
|
|
if (s->reg_request) {
|
| 735 |
|
|
printk(KERN_ERR "cs4297a: attempt to issue multiple reg_access\n");
|
| 736 |
|
|
return -1;
|
| 737 |
|
|
}
|
| 738 |
|
|
|
| 739 |
|
|
if (s->ena & FMODE_WRITE) {
|
| 740 |
|
|
/* Since a writer has the DSP open, we have to mux the
|
| 741 |
|
|
request in */
|
| 742 |
|
|
s->reg_request = data;
|
| 743 |
|
|
interruptible_sleep_on(&s->dma_dac.reg_wait);
|
| 744 |
|
|
/* XXXKW how can I deal with the starvation case where
|
| 745 |
|
|
the opener isn't writing? */
|
| 746 |
|
|
} else {
|
| 747 |
|
|
/* Be safe when changing ring pointers */
|
| 748 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
| 749 |
|
|
if (d->hwptr != d->swptr) {
|
| 750 |
|
|
printk(KERN_ERR "cs4297a: reg access found bookkeeping error (hw/sw = %d/%d\n",
|
| 751 |
|
|
d->hwptr, d->swptr);
|
| 752 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
| 753 |
|
|
return -1;
|
| 754 |
|
|
}
|
| 755 |
|
|
swptr = d->swptr;
|
| 756 |
|
|
d->hwptr = d->swptr = (d->swptr + 1) % d->ringsz;
|
| 757 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
| 758 |
|
|
|
| 759 |
|
|
descr = &d->descrtab[swptr];
|
| 760 |
|
|
data_p = &d->dma_buf[swptr * 4];
|
| 761 |
|
|
*data_p = data;
|
| 762 |
|
|
out64(1, SS_CSR(R_SER_DMA_DSCR_COUNT_TX));
|
| 763 |
|
|
CS_DBGOUT(CS_DESCR, 4,
|
| 764 |
|
|
printk(KERN_INFO "cs4297a: add_tx %p (%x -> %x)\n",
|
| 765 |
|
|
data_p, swptr, d->hwptr));
|
| 766 |
|
|
}
|
| 767 |
|
|
|
| 768 |
|
|
CS_DBGOUT(CS_FUNCTION, 6,
|
| 769 |
|
|
printk(KERN_INFO "cs4297a: serdma_reg_access()-\n"));
|
| 770 |
|
|
|
| 771 |
|
|
return 0;
|
| 772 |
|
|
}
|
| 773 |
|
|
|
| 774 |
|
|
//****************************************************************************
|
| 775 |
|
|
// "cs4297a_read_ac97" -- Reads an AC97 register
|
| 776 |
|
|
//****************************************************************************
|
| 777 |
|
|
static int cs4297a_read_ac97(struct cs4297a_state *s, u32 offset,
|
| 778 |
|
|
u32 * value)
|
| 779 |
|
|
{
|
| 780 |
|
|
CS_DBGOUT(CS_AC97, 1,
|
| 781 |
|
|
printk(KERN_INFO "cs4297a: read reg %2x\n", offset));
|
| 782 |
|
|
if (serdma_reg_access(s, (0xCLL << 60) | (1LL << 47) | ((u64)(offset & 0x7F) << 40)))
|
| 783 |
|
|
return -1;
|
| 784 |
|
|
|
| 785 |
|
|
interruptible_sleep_on(&s->dma_adc.reg_wait);
|
| 786 |
|
|
*value = s->read_value;
|
| 787 |
|
|
CS_DBGOUT(CS_AC97, 2,
|
| 788 |
|
|
printk(KERN_INFO "cs4297a: rdr reg %x -> %x\n", s->read_reg, s->read_value));
|
| 789 |
|
|
|
| 790 |
|
|
return 0;
|
| 791 |
|
|
}
|
| 792 |
|
|
|
| 793 |
|
|
|
| 794 |
|
|
//****************************************************************************
|
| 795 |
|
|
// "cs4297a_write_ac97()"-- writes an AC97 register
|
| 796 |
|
|
//****************************************************************************
|
| 797 |
|
|
static int cs4297a_write_ac97(struct cs4297a_state *s, u32 offset,
|
| 798 |
|
|
u32 value)
|
| 799 |
|
|
{
|
| 800 |
|
|
CS_DBGOUT(CS_AC97, 1,
|
| 801 |
|
|
printk(KERN_INFO "cs4297a: write reg %2x -> %04x\n", offset, value));
|
| 802 |
|
|
return (serdma_reg_access(s, (0xELL << 60) | ((u64)(offset & 0x7F) << 40) | ((value & 0xffff) << 12)));
|
| 803 |
|
|
}
|
| 804 |
|
|
|
| 805 |
|
|
static void stop_dac(struct cs4297a_state *s)
|
| 806 |
|
|
{
|
| 807 |
|
|
unsigned long flags;
|
| 808 |
|
|
|
| 809 |
|
|
CS_DBGOUT(CS_WAVE_WRITE, 3, printk(KERN_INFO "cs4297a: stop_dac():\n"));
|
| 810 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
| 811 |
|
|
s->ena &= ~FMODE_WRITE;
|
| 812 |
|
|
#if 0
|
| 813 |
|
|
/* XXXKW what do I really want here? My theory for now is
|
| 814 |
|
|
that I just flip the "ena" bit, and the interrupt handler
|
| 815 |
|
|
will stop processing the xmit channel */
|
| 816 |
|
|
out64((s->ena & FMODE_READ) ? M_SYNCSER_DMA_RX_EN : 0,
|
| 817 |
|
|
SS_CSR(R_SER_DMA_ENABLE));
|
| 818 |
|
|
#endif
|
| 819 |
|
|
|
| 820 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
| 821 |
|
|
}
|
| 822 |
|
|
|
| 823 |
|
|
|
| 824 |
|
|
static void start_dac(struct cs4297a_state *s)
|
| 825 |
|
|
{
|
| 826 |
|
|
unsigned long flags;
|
| 827 |
|
|
|
| 828 |
|
|
CS_DBGOUT(CS_FUNCTION, 3, printk(KERN_INFO "cs4297a: start_dac()+\n"));
|
| 829 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
| 830 |
|
|
if (!(s->ena & FMODE_WRITE) && (s->dma_dac.mapped ||
|
| 831 |
|
|
(s->dma_dac.count > 0
|
| 832 |
|
|
&& s->dma_dac.ready))) {
|
| 833 |
|
|
s->ena |= FMODE_WRITE;
|
| 834 |
|
|
/* XXXKW what do I really want here? My theory for
|
| 835 |
|
|
now is that I just flip the "ena" bit, and the
|
| 836 |
|
|
interrupt handler will start processing the xmit
|
| 837 |
|
|
channel */
|
| 838 |
|
|
|
| 839 |
|
|
CS_DBGOUT(CS_WAVE_WRITE | CS_PARMS, 8, printk(KERN_INFO
|
| 840 |
|
|
"cs4297a: start_dac(): start dma\n"));
|
| 841 |
|
|
|
| 842 |
|
|
}
|
| 843 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
| 844 |
|
|
CS_DBGOUT(CS_FUNCTION, 3,
|
| 845 |
|
|
printk(KERN_INFO "cs4297a: start_dac()-\n"));
|
| 846 |
|
|
}
|
| 847 |
|
|
|
| 848 |
|
|
|
| 849 |
|
|
static void stop_adc(struct cs4297a_state *s)
|
| 850 |
|
|
{
|
| 851 |
|
|
unsigned long flags;
|
| 852 |
|
|
|
| 853 |
|
|
CS_DBGOUT(CS_FUNCTION, 3,
|
| 854 |
|
|
printk(KERN_INFO "cs4297a: stop_adc()+\n"));
|
| 855 |
|
|
|
| 856 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
| 857 |
|
|
s->ena &= ~FMODE_READ;
|
| 858 |
|
|
|
| 859 |
|
|
if (s->conversion == 1) {
|
| 860 |
|
|
s->conversion = 0;
|
| 861 |
|
|
s->prop_adc.fmt = s->prop_adc.fmt_original;
|
| 862 |
|
|
}
|
| 863 |
|
|
/* Nothing to do really, I need to keep the DMA going
|
| 864 |
|
|
XXXKW when do I get here, and is there more I should do? */
|
| 865 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
| 866 |
|
|
CS_DBGOUT(CS_FUNCTION, 3,
|
| 867 |
|
|
printk(KERN_INFO "cs4297a: stop_adc()-\n"));
|
| 868 |
|
|
}
|
| 869 |
|
|
|
| 870 |
|
|
|
| 871 |
|
|
static void start_adc(struct cs4297a_state *s)
|
| 872 |
|
|
{
|
| 873 |
|
|
unsigned long flags;
|
| 874 |
|
|
|
| 875 |
|
|
CS_DBGOUT(CS_FUNCTION, 2,
|
| 876 |
|
|
printk(KERN_INFO "cs4297a: start_adc()+\n"));
|
| 877 |
|
|
|
| 878 |
|
|
if (!(s->ena & FMODE_READ) &&
|
| 879 |
|
|
(s->dma_adc.mapped || s->dma_adc.count <=
|
| 880 |
|
|
(signed) (s->dma_adc.sbufsz - 2 * s->dma_adc.fragsize))
|
| 881 |
|
|
&& s->dma_adc.ready) {
|
| 882 |
|
|
if (s->prop_adc.fmt & AFMT_S8 || s->prop_adc.fmt & AFMT_U8) {
|
| 883 |
|
|
//
|
| 884 |
|
|
// now only use 16 bit capture, due to truncation issue
|
| 885 |
|
|
// in the chip, noticable distortion occurs.
|
| 886 |
|
|
// allocate buffer and then convert from 16 bit to
|
| 887 |
|
|
// 8 bit for the user buffer.
|
| 888 |
|
|
//
|
| 889 |
|
|
s->prop_adc.fmt_original = s->prop_adc.fmt;
|
| 890 |
|
|
if (s->prop_adc.fmt & AFMT_S8) {
|
| 891 |
|
|
s->prop_adc.fmt &= ~AFMT_S8;
|
| 892 |
|
|
s->prop_adc.fmt |= AFMT_S16_LE;
|
| 893 |
|
|
}
|
| 894 |
|
|
if (s->prop_adc.fmt & AFMT_U8) {
|
| 895 |
|
|
s->prop_adc.fmt &= ~AFMT_U8;
|
| 896 |
|
|
s->prop_adc.fmt |= AFMT_U16_LE;
|
| 897 |
|
|
}
|
| 898 |
|
|
//
|
| 899 |
|
|
// prog_dmabuf_adc performs a stop_adc() but that is
|
| 900 |
|
|
// ok since we really haven't started the DMA yet.
|
| 901 |
|
|
//
|
| 902 |
|
|
prog_codec(s, CS_TYPE_ADC);
|
| 903 |
|
|
|
| 904 |
|
|
prog_dmabuf_adc(s);
|
| 905 |
|
|
s->conversion = 1;
|
| 906 |
|
|
}
|
| 907 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
| 908 |
|
|
s->ena |= FMODE_READ;
|
| 909 |
|
|
/* Nothing to do really, I am probably already
|
| 910 |
|
|
DMAing... XXXKW when do I get here, and is there
|
| 911 |
|
|
more I should do? */
|
| 912 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
| 913 |
|
|
|
| 914 |
|
|
CS_DBGOUT(CS_PARMS, 6, printk(KERN_INFO
|
| 915 |
|
|
"cs4297a: start_adc(): start adc\n"));
|
| 916 |
|
|
}
|
| 917 |
|
|
CS_DBGOUT(CS_FUNCTION, 2,
|
| 918 |
|
|
printk(KERN_INFO "cs4297a: start_adc()-\n"));
|
| 919 |
|
|
|
| 920 |
|
|
}
|
| 921 |
|
|
|
| 922 |
|
|
|
| 923 |
|
|
// call with spinlock held!
|
| 924 |
|
|
static void cs4297a_update_ptr(struct cs4297a_state *s, int intflag)
|
| 925 |
|
|
{
|
| 926 |
|
|
int good_diff, diff, diff2;
|
| 927 |
|
|
u64 *data_p, data;
|
| 928 |
|
|
u32 *s_ptr;
|
| 929 |
|
|
unsigned hwptr;
|
| 930 |
|
|
u32 status;
|
| 931 |
|
|
serdma_t *d;
|
| 932 |
|
|
serdma_descr_t *descr;
|
| 933 |
|
|
|
| 934 |
|
|
// update ADC pointer
|
| 935 |
|
|
status = intflag ? in64(SS_CSR(R_SER_STATUS)) : 0;
|
| 936 |
|
|
|
| 937 |
|
|
if ((s->ena & FMODE_READ) || (status & (M_SYNCSER_RX_EOP_COUNT))) {
|
| 938 |
|
|
d = &s->dma_adc;
|
| 939 |
|
|
hwptr = (unsigned) (((in64(SS_CSR(R_SER_DMA_CUR_DSCR_ADDR_RX)) & M_DMA_CURDSCR_ADDR) -
|
| 940 |
|
|
d->descrtab_phys) / sizeof(serdma_descr_t));
|
| 941 |
|
|
|
| 942 |
|
|
if (s->ena & FMODE_READ) {
|
| 943 |
|
|
CS_DBGOUT(CS_FUNCTION, 2,
|
| 944 |
|
|
printk(KERN_INFO "cs4297a: upd_rcv sw->hw->hw %x/%x/%x (int-%d)n",
|
| 945 |
|
|
d->swptr, d->hwptr, hwptr, intflag));
|
| 946 |
|
|
/* Number of DMA buffers available for software: */
|
| 947 |
|
|
diff2 = diff = (d->ringsz + hwptr - d->hwptr) % d->ringsz;
|
| 948 |
|
|
d->hwptr = hwptr;
|
| 949 |
|
|
good_diff = 0;
|
| 950 |
|
|
s_ptr = (u32 *)&(d->dma_buf[d->swptr*4]);
|
| 951 |
|
|
descr = &d->descrtab[d->swptr];
|
| 952 |
|
|
while (diff2--) {
|
| 953 |
|
|
u64 data = *(u64 *)s_ptr;
|
| 954 |
|
|
u64 descr_a;
|
| 955 |
|
|
u16 left, right;
|
| 956 |
|
|
descr_a = descr->descr_a;
|
| 957 |
|
|
descr->descr_a &= ~M_DMA_SERRX_SOP;
|
| 958 |
|
|
if ((descr_a & M_DMA_DSCRA_A_ADDR) != PHYSADDR((long)s_ptr)) {
|
| 959 |
|
|
printk(KERN_ERR "cs4297a: RX Bad address (read)\n");
|
| 960 |
|
|
}
|
| 961 |
|
|
if (((data & 0x9800000000000000) != 0x9800000000000000) ||
|
| 962 |
|
|
(!(descr_a & M_DMA_SERRX_SOP)) ||
|
| 963 |
|
|
(G_DMA_DSCRB_PKT_SIZE(descr->descr_b) != FRAME_BYTES)) {
|
| 964 |
|
|
s->stats.rx_bad++;
|
| 965 |
|
|
printk(KERN_DEBUG "cs4297a: RX Bad attributes (read)\n");
|
| 966 |
|
|
continue;
|
| 967 |
|
|
}
|
| 968 |
|
|
s->stats.rx_good++;
|
| 969 |
|
|
if ((data >> 61) == 7) {
|
| 970 |
|
|
s->read_value = (data >> 12) & 0xffff;
|
| 971 |
|
|
s->read_reg = (data >> 40) & 0x7f;
|
| 972 |
|
|
wake_up(&d->reg_wait);
|
| 973 |
|
|
}
|
| 974 |
|
|
if (d->count && (d->sb_hwptr == d->sb_swptr)) {
|
| 975 |
|
|
s->stats.rx_overflow++;
|
| 976 |
|
|
printk(KERN_DEBUG "cs4297a: RX overflow\n");
|
| 977 |
|
|
continue;
|
| 978 |
|
|
}
|
| 979 |
|
|
good_diff++;
|
| 980 |
|
|
left = ((s_ptr[1] & 0xff) << 8) | ((s_ptr[2] >> 24) & 0xff);
|
| 981 |
|
|
right = (s_ptr[2] >> 4) & 0xffff;
|
| 982 |
|
|
*d->sb_hwptr++ = left;
|
| 983 |
|
|
*d->sb_hwptr++ = right;
|
| 984 |
|
|
if (d->sb_hwptr == d->sb_end)
|
| 985 |
|
|
d->sb_hwptr = d->sample_buf;
|
| 986 |
|
|
descr++;
|
| 987 |
|
|
if (descr == d->descrtab_end) {
|
| 988 |
|
|
descr = d->descrtab;
|
| 989 |
|
|
s_ptr = (u32 *)s->dma_adc.dma_buf;
|
| 990 |
|
|
} else {
|
| 991 |
|
|
s_ptr += 8;
|
| 992 |
|
|
}
|
| 993 |
|
|
}
|
| 994 |
|
|
d->total_bytes += good_diff * FRAME_SAMPLE_BYTES;
|
| 995 |
|
|
d->count += good_diff * FRAME_SAMPLE_BYTES;
|
| 996 |
|
|
if (d->count > d->sbufsz) {
|
| 997 |
|
|
printk(KERN_ERR "cs4297a: bogus receive overflow!!\n");
|
| 998 |
|
|
}
|
| 999 |
|
|
d->swptr = (d->swptr + diff) % d->ringsz;
|
| 1000 |
|
|
out64(diff, SS_CSR(R_SER_DMA_DSCR_COUNT_RX));
|
| 1001 |
|
|
if (d->mapped) {
|
| 1002 |
|
|
if (d->count >= (signed) d->fragsize)
|
| 1003 |
|
|
wake_up(&d->wait);
|
| 1004 |
|
|
} else {
|
| 1005 |
|
|
if (d->count > 0) {
|
| 1006 |
|
|
CS_DBGOUT(CS_WAVE_READ, 4,
|
| 1007 |
|
|
printk(KERN_INFO
|
| 1008 |
|
|
"cs4297a: update count -> %d\n", d->count));
|
| 1009 |
|
|
wake_up(&d->wait);
|
| 1010 |
|
|
}
|
| 1011 |
|
|
}
|
| 1012 |
|
|
} else {
|
| 1013 |
|
|
/* Receive is going even if no one is
|
| 1014 |
|
|
listening (for register accesses and to
|
| 1015 |
|
|
avoid FIFO overrun) */
|
| 1016 |
|
|
diff2 = diff = (hwptr + d->ringsz - d->hwptr) % d->ringsz;
|
| 1017 |
|
|
if (!diff) {
|
| 1018 |
|
|
printk(KERN_ERR "cs4297a: RX full or empty?\n");
|
| 1019 |
|
|
}
|
| 1020 |
|
|
|
| 1021 |
|
|
descr = &d->descrtab[d->swptr];
|
| 1022 |
|
|
data_p = &d->dma_buf[d->swptr*4];
|
| 1023 |
|
|
|
| 1024 |
|
|
/* Force this to happen at least once; I got
|
| 1025 |
|
|
here because of an interrupt, so there must
|
| 1026 |
|
|
be a buffer to process. */
|
| 1027 |
|
|
do {
|
| 1028 |
|
|
data = *data_p;
|
| 1029 |
|
|
if ((descr->descr_a & M_DMA_DSCRA_A_ADDR) != PHYSADDR((long)data_p)) {
|
| 1030 |
|
|
printk(KERN_ERR "cs4297a: RX Bad address %d (%llx %lx)\n", d->swptr,
|
| 1031 |
|
|
(long long)(descr->descr_a & M_DMA_DSCRA_A_ADDR),
|
| 1032 |
|
|
(long)PHYSADDR((long)data_p));
|
| 1033 |
|
|
}
|
| 1034 |
|
|
if (!(data & (1LL << 63)) ||
|
| 1035 |
|
|
!(descr->descr_a & M_DMA_SERRX_SOP) ||
|
| 1036 |
|
|
(G_DMA_DSCRB_PKT_SIZE(descr->descr_b) != FRAME_BYTES)) {
|
| 1037 |
|
|
s->stats.rx_bad++;
|
| 1038 |
|
|
printk(KERN_DEBUG "cs4297a: RX Bad attributes\n");
|
| 1039 |
|
|
} else {
|
| 1040 |
|
|
s->stats.rx_good++;
|
| 1041 |
|
|
if ((data >> 61) == 7) {
|
| 1042 |
|
|
s->read_value = (data >> 12) & 0xffff;
|
| 1043 |
|
|
s->read_reg = (data >> 40) & 0x7f;
|
| 1044 |
|
|
wake_up(&d->reg_wait);
|
| 1045 |
|
|
}
|
| 1046 |
|
|
}
|
| 1047 |
|
|
descr->descr_a &= ~M_DMA_SERRX_SOP;
|
| 1048 |
|
|
descr++;
|
| 1049 |
|
|
d->swptr++;
|
| 1050 |
|
|
data_p += 4;
|
| 1051 |
|
|
if (descr == d->descrtab_end) {
|
| 1052 |
|
|
descr = d->descrtab;
|
| 1053 |
|
|
d->swptr = 0;
|
| 1054 |
|
|
data_p = d->dma_buf;
|
| 1055 |
|
|
}
|
| 1056 |
|
|
out64(1, SS_CSR(R_SER_DMA_DSCR_COUNT_RX));
|
| 1057 |
|
|
} while (--diff);
|
| 1058 |
|
|
d->hwptr = hwptr;
|
| 1059 |
|
|
|
| 1060 |
|
|
CS_DBGOUT(CS_DESCR, 6,
|
| 1061 |
|
|
printk(KERN_INFO "cs4297a: hw/sw %x/%x\n", d->hwptr, d->swptr));
|
| 1062 |
|
|
}
|
| 1063 |
|
|
|
| 1064 |
|
|
CS_DBGOUT(CS_PARMS, 8, printk(KERN_INFO
|
| 1065 |
|
|
"cs4297a: cs4297a_update_ptr(): s=0x%.8x hwptr=%d total_bytes=%d count=%d \n",
|
| 1066 |
|
|
(unsigned)s, d->hwptr,
|
| 1067 |
|
|
d->total_bytes, d->count));
|
| 1068 |
|
|
}
|
| 1069 |
|
|
|
| 1070 |
|
|
/* XXXKW worry about s->reg_request -- there is a starvation
|
| 1071 |
|
|
case if s->ena has FMODE_WRITE on, but the client isn't
|
| 1072 |
|
|
doing writes */
|
| 1073 |
|
|
|
| 1074 |
|
|
// update DAC pointer
|
| 1075 |
|
|
//
|
| 1076 |
|
|
// check for end of buffer, means that we are going to wait for another interrupt
|
| 1077 |
|
|
// to allow silence to fill the fifos on the part, to keep pops down to a minimum.
|
| 1078 |
|
|
//
|
| 1079 |
|
|
if (s->ena & FMODE_WRITE) {
|
| 1080 |
|
|
serdma_t *d = &s->dma_dac;
|
| 1081 |
|
|
hwptr = (unsigned) (((in64(SS_CSR(R_SER_DMA_CUR_DSCR_ADDR_TX)) & M_DMA_CURDSCR_ADDR) -
|
| 1082 |
|
|
d->descrtab_phys) / sizeof(serdma_descr_t));
|
| 1083 |
|
|
diff = (d->ringsz + hwptr - d->hwptr) % d->ringsz;
|
| 1084 |
|
|
CS_DBGOUT(CS_WAVE_WRITE, 4, printk(KERN_INFO
|
| 1085 |
|
|
"cs4297a: cs4297a_update_ptr(): hw/hw/sw %x/%x/%x diff %d count %d\n",
|
| 1086 |
|
|
d->hwptr, hwptr, d->swptr, diff, d->count));
|
| 1087 |
|
|
d->hwptr = hwptr;
|
| 1088 |
|
|
/* XXXKW stereo? conversion? Just assume 2 16-bit samples for now */
|
| 1089 |
|
|
d->total_bytes += diff * FRAME_SAMPLE_BYTES;
|
| 1090 |
|
|
if (d->mapped) {
|
| 1091 |
|
|
d->count += diff * FRAME_SAMPLE_BYTES;
|
| 1092 |
|
|
if (d->count >= d->fragsize) {
|
| 1093 |
|
|
d->wakeup = 1;
|
| 1094 |
|
|
wake_up(&d->wait);
|
| 1095 |
|
|
if (d->count > d->sbufsz)
|
| 1096 |
|
|
d->count &= d->sbufsz - 1;
|
| 1097 |
|
|
}
|
| 1098 |
|
|
} else {
|
| 1099 |
|
|
d->count -= diff * FRAME_SAMPLE_BYTES;
|
| 1100 |
|
|
if (d->count <= 0) {
|
| 1101 |
|
|
//
|
| 1102 |
|
|
// fill with silence, and do not shut down the DAC.
|
| 1103 |
|
|
// Continue to play silence until the _release.
|
| 1104 |
|
|
//
|
| 1105 |
|
|
CS_DBGOUT(CS_WAVE_WRITE, 6, printk(KERN_INFO
|
| 1106 |
|
|
"cs4297a: cs4297a_update_ptr(): memset %d at 0x%.8x for %d size \n",
|
| 1107 |
|
|
(unsigned)(s->prop_dac.fmt &
|
| 1108 |
|
|
(AFMT_U8 | AFMT_U16_LE)) ? 0x80 : 0,
|
| 1109 |
|
|
(unsigned)d->dma_buf,
|
| 1110 |
|
|
d->ringsz));
|
| 1111 |
|
|
memset(d->dma_buf, 0, d->ringsz * FRAME_BYTES);
|
| 1112 |
|
|
if (d->count < 0) {
|
| 1113 |
|
|
d->underrun = 1;
|
| 1114 |
|
|
s->stats.tx_underrun++;
|
| 1115 |
|
|
d->count = 0;
|
| 1116 |
|
|
CS_DBGOUT(CS_ERROR, 9, printk(KERN_INFO
|
| 1117 |
|
|
"cs4297a: cs4297a_update_ptr(): underrun\n"));
|
| 1118 |
|
|
}
|
| 1119 |
|
|
} else if (d->count <=
|
| 1120 |
|
|
(signed) d->fragsize
|
| 1121 |
|
|
&& !d->endcleared) {
|
| 1122 |
|
|
/* XXXKW what is this for? */
|
| 1123 |
|
|
clear_advance(d->dma_buf,
|
| 1124 |
|
|
d->sbufsz,
|
| 1125 |
|
|
d->swptr,
|
| 1126 |
|
|
d->fragsize,
|
| 1127 |
|
|
0);
|
| 1128 |
|
|
d->endcleared = 1;
|
| 1129 |
|
|
}
|
| 1130 |
|
|
if ( (d->count <= (signed) d->sbufsz/2) || intflag)
|
| 1131 |
|
|
{
|
| 1132 |
|
|
CS_DBGOUT(CS_WAVE_WRITE, 4,
|
| 1133 |
|
|
printk(KERN_INFO
|
| 1134 |
|
|
"cs4297a: update count -> %d\n", d->count));
|
| 1135 |
|
|
wake_up(&d->wait);
|
| 1136 |
|
|
}
|
| 1137 |
|
|
}
|
| 1138 |
|
|
CS_DBGOUT(CS_PARMS, 8, printk(KERN_INFO
|
| 1139 |
|
|
"cs4297a: cs4297a_update_ptr(): s=0x%.8x hwptr=%d total_bytes=%d count=%d \n",
|
| 1140 |
|
|
(unsigned) s, d->hwptr,
|
| 1141 |
|
|
d->total_bytes, d->count));
|
| 1142 |
|
|
}
|
| 1143 |
|
|
}
|
| 1144 |
|
|
|
| 1145 |
|
|
static int mixer_ioctl(struct cs4297a_state *s, unsigned int cmd,
|
| 1146 |
|
|
unsigned long arg)
|
| 1147 |
|
|
{
|
| 1148 |
|
|
// Index to mixer_src[] is value of AC97 Input Mux Select Reg.
|
| 1149 |
|
|
// Value of array member is recording source Device ID Mask.
|
| 1150 |
|
|
static const unsigned int mixer_src[8] = {
|
| 1151 |
|
|
SOUND_MASK_MIC, SOUND_MASK_CD, 0, SOUND_MASK_LINE1,
|
| 1152 |
|
|
SOUND_MASK_LINE, SOUND_MASK_VOLUME, 0, 0
|
| 1153 |
|
|
};
|
| 1154 |
|
|
|
| 1155 |
|
|
// Index of mixtable1[] member is Device ID
|
| 1156 |
|
|
// and must be <= SOUND_MIXER_NRDEVICES.
|
| 1157 |
|
|
// Value of array member is index into s->mix.vol[]
|
| 1158 |
|
|
static const unsigned char mixtable1[SOUND_MIXER_NRDEVICES] = {
|
| 1159 |
|
|
[SOUND_MIXER_PCM] = 1, // voice
|
| 1160 |
|
|
[SOUND_MIXER_LINE1] = 2, // AUX
|
| 1161 |
|
|
[SOUND_MIXER_CD] = 3, // CD
|
| 1162 |
|
|
[SOUND_MIXER_LINE] = 4, // Line
|
| 1163 |
|
|
[SOUND_MIXER_SYNTH] = 5, // FM
|
| 1164 |
|
|
[SOUND_MIXER_MIC] = 6, // Mic
|
| 1165 |
|
|
[SOUND_MIXER_SPEAKER] = 7, // Speaker
|
| 1166 |
|
|
[SOUND_MIXER_RECLEV] = 8, // Recording level
|
| 1167 |
|
|
[SOUND_MIXER_VOLUME] = 9 // Master Volume
|
| 1168 |
|
|
};
|
| 1169 |
|
|
|
| 1170 |
|
|
static const unsigned mixreg[] = {
|
| 1171 |
|
|
AC97_PCMOUT_VOL,
|
| 1172 |
|
|
AC97_AUX_VOL,
|
| 1173 |
|
|
AC97_CD_VOL,
|
| 1174 |
|
|
AC97_LINEIN_VOL
|
| 1175 |
|
|
};
|
| 1176 |
|
|
unsigned char l, r, rl, rr, vidx;
|
| 1177 |
|
|
unsigned char attentbl[11] =
|
| 1178 |
|
|
{ 63, 42, 26, 17, 14, 11, 8, 6, 4, 2, 0 };
|
| 1179 |
|
|
unsigned temp1;
|
| 1180 |
|
|
int i, val;
|
| 1181 |
|
|
|
| 1182 |
|
|
VALIDATE_STATE(s);
|
| 1183 |
|
|
CS_DBGOUT(CS_FUNCTION, 4, printk(KERN_INFO
|
| 1184 |
|
|
"cs4297a: mixer_ioctl(): s=0x%.8x cmd=0x%.8x\n",
|
| 1185 |
|
|
(unsigned) s, cmd));
|
| 1186 |
|
|
#if CSDEBUG
|
| 1187 |
|
|
cs_printioctl(cmd);
|
| 1188 |
|
|
#endif
|
| 1189 |
|
|
#if CSDEBUG_INTERFACE
|
| 1190 |
|
|
|
| 1191 |
|
|
if ((cmd == SOUND_MIXER_CS_GETDBGMASK) ||
|
| 1192 |
|
|
(cmd == SOUND_MIXER_CS_SETDBGMASK) ||
|
| 1193 |
|
|
(cmd == SOUND_MIXER_CS_GETDBGLEVEL) ||
|
| 1194 |
|
|
(cmd == SOUND_MIXER_CS_SETDBGLEVEL))
|
| 1195 |
|
|
{
|
| 1196 |
|
|
switch (cmd) {
|
| 1197 |
|
|
|
| 1198 |
|
|
case SOUND_MIXER_CS_GETDBGMASK:
|
| 1199 |
|
|
return put_user(cs_debugmask,
|
| 1200 |
|
|
(unsigned long *) arg);
|
| 1201 |
|
|
|
| 1202 |
|
|
case SOUND_MIXER_CS_GETDBGLEVEL:
|
| 1203 |
|
|
return put_user(cs_debuglevel,
|
| 1204 |
|
|
(unsigned long *) arg);
|
| 1205 |
|
|
|
| 1206 |
|
|
case SOUND_MIXER_CS_SETDBGMASK:
|
| 1207 |
|
|
if (get_user(val, (unsigned long *) arg))
|
| 1208 |
|
|
return -EFAULT;
|
| 1209 |
|
|
cs_debugmask = val;
|
| 1210 |
|
|
return 0;
|
| 1211 |
|
|
|
| 1212 |
|
|
case SOUND_MIXER_CS_SETDBGLEVEL:
|
| 1213 |
|
|
if (get_user(val, (unsigned long *) arg))
|
| 1214 |
|
|
return -EFAULT;
|
| 1215 |
|
|
cs_debuglevel = val;
|
| 1216 |
|
|
return 0;
|
| 1217 |
|
|
default:
|
| 1218 |
|
|
CS_DBGOUT(CS_ERROR, 1, printk(KERN_INFO
|
| 1219 |
|
|
"cs4297a: mixer_ioctl(): ERROR unknown debug cmd\n"));
|
| 1220 |
|
|
return 0;
|
| 1221 |
|
|
}
|
| 1222 |
|
|
}
|
| 1223 |
|
|
#endif
|
| 1224 |
|
|
|
| 1225 |
|
|
if (cmd == SOUND_MIXER_PRIVATE1) {
|
| 1226 |
|
|
return -EINVAL;
|
| 1227 |
|
|
}
|
| 1228 |
|
|
if (cmd == SOUND_MIXER_PRIVATE2) {
|
| 1229 |
|
|
// enable/disable/query spatializer
|
| 1230 |
|
|
if (get_user(val, (int *) arg))
|
| 1231 |
|
|
return -EFAULT;
|
| 1232 |
|
|
if (val != -1) {
|
| 1233 |
|
|
temp1 = (val & 0x3f) >> 2;
|
| 1234 |
|
|
cs4297a_write_ac97(s, AC97_3D_CONTROL, temp1);
|
| 1235 |
|
|
cs4297a_read_ac97(s, AC97_GENERAL_PURPOSE,
|
| 1236 |
|
|
&temp1);
|
| 1237 |
|
|
cs4297a_write_ac97(s, AC97_GENERAL_PURPOSE,
|
| 1238 |
|
|
temp1 | 0x2000);
|
| 1239 |
|
|
}
|
| 1240 |
|
|
cs4297a_read_ac97(s, AC97_3D_CONTROL, &temp1);
|
| 1241 |
|
|
return put_user((temp1 << 2) | 3, (int *) arg);
|
| 1242 |
|
|
}
|
| 1243 |
|
|
if (cmd == SOUND_MIXER_INFO) {
|
| 1244 |
|
|
mixer_info info;
|
| 1245 |
|
|
strncpy(info.id, "CS4297a", sizeof(info.id));
|
| 1246 |
|
|
strncpy(info.name, "Crystal CS4297a", sizeof(info.name));
|
| 1247 |
|
|
info.modify_counter = s->mix.modcnt;
|
| 1248 |
|
|
if (copy_to_user((void *) arg, &info, sizeof(info)))
|
| 1249 |
|
|
return -EFAULT;
|
| 1250 |
|
|
return 0;
|
| 1251 |
|
|
}
|
| 1252 |
|
|
if (cmd == SOUND_OLD_MIXER_INFO) {
|
| 1253 |
|
|
_old_mixer_info info;
|
| 1254 |
|
|
strncpy(info.id, "CS4297a", sizeof(info.id));
|
| 1255 |
|
|
strncpy(info.name, "Crystal CS4297a", sizeof(info.name));
|
| 1256 |
|
|
if (copy_to_user((void *) arg, &info, sizeof(info)))
|
| 1257 |
|
|
return -EFAULT;
|
| 1258 |
|
|
return 0;
|
| 1259 |
|
|
}
|
| 1260 |
|
|
if (cmd == OSS_GETVERSION)
|
| 1261 |
|
|
return put_user(SOUND_VERSION, (int *) arg);
|
| 1262 |
|
|
|
| 1263 |
|
|
if (_IOC_TYPE(cmd) != 'M' || _SIOC_SIZE(cmd) != sizeof(int))
|
| 1264 |
|
|
return -EINVAL;
|
| 1265 |
|
|
|
| 1266 |
|
|
// If ioctl has only the SIOC_READ bit(bit 31)
|
| 1267 |
|
|
// on, process the only-read commands.
|
| 1268 |
|
|
if (_SIOC_DIR(cmd) == _SIOC_READ) {
|
| 1269 |
|
|
switch (_IOC_NR(cmd)) {
|
| 1270 |
|
|
case SOUND_MIXER_RECSRC: // Arg contains a bit for each recording source
|
| 1271 |
|
|
cs4297a_read_ac97(s, AC97_RECORD_SELECT,
|
| 1272 |
|
|
&temp1);
|
| 1273 |
|
|
return put_user(mixer_src[temp1 & 7], (int *) arg);
|
| 1274 |
|
|
|
| 1275 |
|
|
case SOUND_MIXER_DEVMASK: // Arg contains a bit for each supported device
|
| 1276 |
|
|
return put_user(SOUND_MASK_PCM | SOUND_MASK_LINE |
|
| 1277 |
|
|
SOUND_MASK_VOLUME | SOUND_MASK_RECLEV,
|
| 1278 |
|
|
(int *) arg);
|
| 1279 |
|
|
|
| 1280 |
|
|
case SOUND_MIXER_RECMASK: // Arg contains a bit for each supported recording source
|
| 1281 |
|
|
return put_user(SOUND_MASK_LINE | SOUND_MASK_VOLUME,
|
| 1282 |
|
|
(int *) arg);
|
| 1283 |
|
|
|
| 1284 |
|
|
case SOUND_MIXER_STEREODEVS: // Mixer channels supporting stereo
|
| 1285 |
|
|
return put_user(SOUND_MASK_PCM | SOUND_MASK_LINE |
|
| 1286 |
|
|
SOUND_MASK_VOLUME | SOUND_MASK_RECLEV,
|
| 1287 |
|
|
(int *) arg);
|
| 1288 |
|
|
|
| 1289 |
|
|
case SOUND_MIXER_CAPS:
|
| 1290 |
|
|
return put_user(SOUND_CAP_EXCL_INPUT, (int *) arg);
|
| 1291 |
|
|
|
| 1292 |
|
|
default:
|
| 1293 |
|
|
i = _IOC_NR(cmd);
|
| 1294 |
|
|
if (i >= SOUND_MIXER_NRDEVICES
|
| 1295 |
|
|
|| !(vidx = mixtable1[i]))
|
| 1296 |
|
|
return -EINVAL;
|
| 1297 |
|
|
return put_user(s->mix.vol[vidx - 1], (int *) arg);
|
| 1298 |
|
|
}
|
| 1299 |
|
|
}
|
| 1300 |
|
|
// If ioctl doesn't have both the SIOC_READ and
|
| 1301 |
|
|
// the SIOC_WRITE bit set, return invalid.
|
| 1302 |
|
|
if (_SIOC_DIR(cmd) != (_SIOC_READ | _SIOC_WRITE))
|
| 1303 |
|
|
return -EINVAL;
|
| 1304 |
|
|
|
| 1305 |
|
|
// Increment the count of volume writes.
|
| 1306 |
|
|
s->mix.modcnt++;
|
| 1307 |
|
|
|
| 1308 |
|
|
// Isolate the command; it must be a write.
|
| 1309 |
|
|
switch (_IOC_NR(cmd)) {
|
| 1310 |
|
|
|
| 1311 |
|
|
case SOUND_MIXER_RECSRC: // Arg contains a bit for each recording source
|
| 1312 |
|
|
if (get_user(val, (int *) arg))
|
| 1313 |
|
|
return -EFAULT;
|
| 1314 |
|
|
i = hweight32(val); // i = # bits on in val.
|
| 1315 |
|
|
if (i != 1) // One & only 1 bit must be on.
|
| 1316 |
|
|
return 0;
|
| 1317 |
|
|
for (i = 0; i < sizeof(mixer_src) / sizeof(int); i++) {
|
| 1318 |
|
|
if (val == mixer_src[i]) {
|
| 1319 |
|
|
temp1 = (i << 8) | i;
|
| 1320 |
|
|
cs4297a_write_ac97(s,
|
| 1321 |
|
|
AC97_RECORD_SELECT,
|
| 1322 |
|
|
temp1);
|
| 1323 |
|
|
return 0;
|
| 1324 |
|
|
}
|
| 1325 |
|
|
}
|
| 1326 |
|
|
return 0;
|
| 1327 |
|
|
|
| 1328 |
|
|
case SOUND_MIXER_VOLUME:
|
| 1329 |
|
|
if (get_user(val, (int *) arg))
|
| 1330 |
|
|
return -EFAULT;
|
| 1331 |
|
|
l = val & 0xff;
|
| 1332 |
|
|
if (l > 100)
|
| 1333 |
|
|
l = 100; // Max soundcard.h vol is 100.
|
| 1334 |
|
|
if (l < 6) {
|
| 1335 |
|
|
rl = 63;
|
| 1336 |
|
|
l = 0;
|
| 1337 |
|
|
} else
|
| 1338 |
|
|
rl = attentbl[(10 * l) / 100]; // Convert 0-100 vol to 63-0 atten.
|
| 1339 |
|
|
|
| 1340 |
|
|
r = (val >> 8) & 0xff;
|
| 1341 |
|
|
if (r > 100)
|
| 1342 |
|
|
r = 100; // Max right volume is 100, too
|
| 1343 |
|
|
if (r < 6) {
|
| 1344 |
|
|
rr = 63;
|
| 1345 |
|
|
r = 0;
|
| 1346 |
|
|
} else
|
| 1347 |
|
|
rr = attentbl[(10 * r) / 100]; // Convert volume to attenuation.
|
| 1348 |
|
|
|
| 1349 |
|
|
if ((rl > 60) && (rr > 60)) // If both l & r are 'low',
|
| 1350 |
|
|
temp1 = 0x8000; // turn on the mute bit.
|
| 1351 |
|
|
else
|
| 1352 |
|
|
temp1 = 0;
|
| 1353 |
|
|
|
| 1354 |
|
|
temp1 |= (rl << 8) | rr;
|
| 1355 |
|
|
|
| 1356 |
|
|
cs4297a_write_ac97(s, AC97_MASTER_VOL_STEREO, temp1);
|
| 1357 |
|
|
cs4297a_write_ac97(s, AC97_PHONE_VOL, temp1);
|
| 1358 |
|
|
|
| 1359 |
|
|
#ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
|
| 1360 |
|
|
s->mix.vol[8] = ((unsigned int) r << 8) | l;
|
| 1361 |
|
|
#else
|
| 1362 |
|
|
s->mix.vol[8] = val;
|
| 1363 |
|
|
#endif
|
| 1364 |
|
|
return put_user(s->mix.vol[8], (int *) arg);
|
| 1365 |
|
|
|
| 1366 |
|
|
case SOUND_MIXER_SPEAKER:
|
| 1367 |
|
|
if (get_user(val, (int *) arg))
|
| 1368 |
|
|
return -EFAULT;
|
| 1369 |
|
|
l = val & 0xff;
|
| 1370 |
|
|
if (l > 100)
|
| 1371 |
|
|
l = 100;
|
| 1372 |
|
|
if (l < 3) {
|
| 1373 |
|
|
rl = 0;
|
| 1374 |
|
|
l = 0;
|
| 1375 |
|
|
} else {
|
| 1376 |
|
|
rl = (l * 2 - 5) / 13; // Convert 0-100 range to 0-15.
|
| 1377 |
|
|
l = (rl * 13 + 5) / 2;
|
| 1378 |
|
|
}
|
| 1379 |
|
|
|
| 1380 |
|
|
if (rl < 3) {
|
| 1381 |
|
|
temp1 = 0x8000;
|
| 1382 |
|
|
rl = 0;
|
| 1383 |
|
|
} else
|
| 1384 |
|
|
temp1 = 0;
|
| 1385 |
|
|
rl = 15 - rl; // Convert volume to attenuation.
|
| 1386 |
|
|
temp1 |= rl << 1;
|
| 1387 |
|
|
cs4297a_write_ac97(s, AC97_PCBEEP_VOL, temp1);
|
| 1388 |
|
|
|
| 1389 |
|
|
#ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
|
| 1390 |
|
|
s->mix.vol[6] = l << 8;
|
| 1391 |
|
|
#else
|
| 1392 |
|
|
s->mix.vol[6] = val;
|
| 1393 |
|
|
#endif
|
| 1394 |
|
|
return put_user(s->mix.vol[6], (int *) arg);
|
| 1395 |
|
|
|
| 1396 |
|
|
case SOUND_MIXER_RECLEV:
|
| 1397 |
|
|
if (get_user(val, (int *) arg))
|
| 1398 |
|
|
return -EFAULT;
|
| 1399 |
|
|
l = val & 0xff;
|
| 1400 |
|
|
if (l > 100)
|
| 1401 |
|
|
l = 100;
|
| 1402 |
|
|
r = (val >> 8) & 0xff;
|
| 1403 |
|
|
if (r > 100)
|
| 1404 |
|
|
r = 100;
|
| 1405 |
|
|
rl = (l * 2 - 5) / 13; // Convert 0-100 scale to 0-15.
|
| 1406 |
|
|
rr = (r * 2 - 5) / 13;
|
| 1407 |
|
|
if (rl < 3 && rr < 3)
|
| 1408 |
|
|
temp1 = 0x8000;
|
| 1409 |
|
|
else
|
| 1410 |
|
|
temp1 = 0;
|
| 1411 |
|
|
|
| 1412 |
|
|
temp1 = temp1 | (rl << 8) | rr;
|
| 1413 |
|
|
cs4297a_write_ac97(s, AC97_RECORD_GAIN, temp1);
|
| 1414 |
|
|
|
| 1415 |
|
|
#ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
|
| 1416 |
|
|
s->mix.vol[7] = ((unsigned int) r << 8) | l;
|
| 1417 |
|
|
#else
|
| 1418 |
|
|
s->mix.vol[7] = val;
|
| 1419 |
|
|
#endif
|
| 1420 |
|
|
return put_user(s->mix.vol[7], (int *) arg);
|
| 1421 |
|
|
|
| 1422 |
|
|
case SOUND_MIXER_MIC:
|
| 1423 |
|
|
if (get_user(val, (int *) arg))
|
| 1424 |
|
|
return -EFAULT;
|
| 1425 |
|
|
l = val & 0xff;
|
| 1426 |
|
|
if (l > 100)
|
| 1427 |
|
|
l = 100;
|
| 1428 |
|
|
if (l < 1) {
|
| 1429 |
|
|
l = 0;
|
| 1430 |
|
|
rl = 0;
|
| 1431 |
|
|
} else {
|
| 1432 |
|
|
rl = ((unsigned) l * 5 - 4) / 16; // Convert 0-100 range to 0-31.
|
| 1433 |
|
|
l = (rl * 16 + 4) / 5;
|
| 1434 |
|
|
}
|
| 1435 |
|
|
cs4297a_read_ac97(s, AC97_MIC_VOL, &temp1);
|
| 1436 |
|
|
temp1 &= 0x40; // Isolate 20db gain bit.
|
| 1437 |
|
|
if (rl < 3) {
|
| 1438 |
|
|
temp1 |= 0x8000;
|
| 1439 |
|
|
rl = 0;
|
| 1440 |
|
|
}
|
| 1441 |
|
|
rl = 31 - rl; // Convert volume to attenuation.
|
| 1442 |
|
|
temp1 |= rl;
|
| 1443 |
|
|
cs4297a_write_ac97(s, AC97_MIC_VOL, temp1);
|
| 1444 |
|
|
|
| 1445 |
|
|
#ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
|
| 1446 |
|
|
s->mix.vol[5] = val << 8;
|
| 1447 |
|
|
#else
|
| 1448 |
|
|
s->mix.vol[5] = val;
|
| 1449 |
|
|
#endif
|
| 1450 |
|
|
return put_user(s->mix.vol[5], (int *) arg);
|
| 1451 |
|
|
|
| 1452 |
|
|
|
| 1453 |
|
|
case SOUND_MIXER_SYNTH:
|
| 1454 |
|
|
if (get_user(val, (int *) arg))
|
| 1455 |
|
|
return -EFAULT;
|
| 1456 |
|
|
l = val & 0xff;
|
| 1457 |
|
|
if (l > 100)
|
| 1458 |
|
|
l = 100;
|
| 1459 |
|
|
if (get_user(val, (int *) arg))
|
| 1460 |
|
|
return -EFAULT;
|
| 1461 |
|
|
r = (val >> 8) & 0xff;
|
| 1462 |
|
|
if (r > 100)
|
| 1463 |
|
|
r = 100;
|
| 1464 |
|
|
rl = (l * 2 - 11) / 3; // Convert 0-100 range to 0-63.
|
| 1465 |
|
|
rr = (r * 2 - 11) / 3;
|
| 1466 |
|
|
if (rl < 3) // If l is low, turn on
|
| 1467 |
|
|
temp1 = 0x0080; // the mute bit.
|
| 1468 |
|
|
else
|
| 1469 |
|
|
temp1 = 0;
|
| 1470 |
|
|
|
| 1471 |
|
|
rl = 63 - rl; // Convert vol to attenuation.
|
| 1472 |
|
|
// writel(temp1 | rl, s->pBA0 + FMLVC);
|
| 1473 |
|
|
if (rr < 3) // If rr is low, turn on
|
| 1474 |
|
|
temp1 = 0x0080; // the mute bit.
|
| 1475 |
|
|
else
|
| 1476 |
|
|
temp1 = 0;
|
| 1477 |
|
|
rr = 63 - rr; // Convert vol to attenuation.
|
| 1478 |
|
|
// writel(temp1 | rr, s->pBA0 + FMRVC);
|
| 1479 |
|
|
|
| 1480 |
|
|
#ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
|
| 1481 |
|
|
s->mix.vol[4] = (r << 8) | l;
|
| 1482 |
|
|
#else
|
| 1483 |
|
|
s->mix.vol[4] = val;
|
| 1484 |
|
|
#endif
|
| 1485 |
|
|
return put_user(s->mix.vol[4], (int *) arg);
|
| 1486 |
|
|
|
| 1487 |
|
|
|
| 1488 |
|
|
default:
|
| 1489 |
|
|
CS_DBGOUT(CS_IOCTL, 4, printk(KERN_INFO
|
| 1490 |
|
|
"cs4297a: mixer_ioctl(): default\n"));
|
| 1491 |
|
|
|
| 1492 |
|
|
i = _IOC_NR(cmd);
|
| 1493 |
|
|
if (i >= SOUND_MIXER_NRDEVICES || !(vidx = mixtable1[i]))
|
| 1494 |
|
|
return -EINVAL;
|
| 1495 |
|
|
if (get_user(val, (int *) arg))
|
| 1496 |
|
|
return -EFAULT;
|
| 1497 |
|
|
l = val & 0xff;
|
| 1498 |
|
|
if (l > 100)
|
| 1499 |
|
|
l = 100;
|
| 1500 |
|
|
if (l < 1) {
|
| 1501 |
|
|
l = 0;
|
| 1502 |
|
|
rl = 31;
|
| 1503 |
|
|
} else
|
| 1504 |
|
|
rl = (attentbl[(l * 10) / 100]) >> 1;
|
| 1505 |
|
|
|
| 1506 |
|
|
r = (val >> 8) & 0xff;
|
| 1507 |
|
|
if (r > 100)
|
| 1508 |
|
|
r = 100;
|
| 1509 |
|
|
if (r < 1) {
|
| 1510 |
|
|
r = 0;
|
| 1511 |
|
|
rr = 31;
|
| 1512 |
|
|
} else
|
| 1513 |
|
|
rr = (attentbl[(r * 10) / 100]) >> 1;
|
| 1514 |
|
|
if ((rl > 30) && (rr > 30))
|
| 1515 |
|
|
temp1 = 0x8000;
|
| 1516 |
|
|
else
|
| 1517 |
|
|
temp1 = 0;
|
| 1518 |
|
|
temp1 = temp1 | (rl << 8) | rr;
|
| 1519 |
|
|
cs4297a_write_ac97(s, mixreg[vidx - 1], temp1);
|
| 1520 |
|
|
|
| 1521 |
|
|
#ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
|
| 1522 |
|
|
s->mix.vol[vidx - 1] = ((unsigned int) r << 8) | l;
|
| 1523 |
|
|
#else
|
| 1524 |
|
|
s->mix.vol[vidx - 1] = val;
|
| 1525 |
|
|
#endif
|
| 1526 |
|
|
return put_user(s->mix.vol[vidx - 1], (int *) arg);
|
| 1527 |
|
|
}
|
| 1528 |
|
|
}
|
| 1529 |
|
|
|
| 1530 |
|
|
|
| 1531 |
|
|
// ---------------------------------------------------------------------
|
| 1532 |
|
|
|
| 1533 |
|
|
static loff_t cs4297a_llseek(struct file *file, loff_t offset, int origin)
|
| 1534 |
|
|
{
|
| 1535 |
|
|
return -ESPIPE;
|
| 1536 |
|
|
}
|
| 1537 |
|
|
|
| 1538 |
|
|
|
| 1539 |
|
|
// ---------------------------------------------------------------------
|
| 1540 |
|
|
|
| 1541 |
|
|
static int cs4297a_open_mixdev(struct inode *inode, struct file *file)
|
| 1542 |
|
|
{
|
| 1543 |
|
|
int minor = MINOR(inode->i_rdev);
|
| 1544 |
|
|
struct cs4297a_state *s=NULL;
|
| 1545 |
|
|
struct list_head *entry;
|
| 1546 |
|
|
|
| 1547 |
|
|
CS_DBGOUT(CS_FUNCTION | CS_OPEN, 4,
|
| 1548 |
|
|
printk(KERN_INFO "cs4297a: cs4297a_open_mixdev()+\n"));
|
| 1549 |
|
|
|
| 1550 |
|
|
list_for_each(entry, &cs4297a_devs)
|
| 1551 |
|
|
{
|
| 1552 |
|
|
s = list_entry(entry, struct cs4297a_state, list);
|
| 1553 |
|
|
if(s->dev_mixer == minor)
|
| 1554 |
|
|
break;
|
| 1555 |
|
|
}
|
| 1556 |
|
|
if (!s)
|
| 1557 |
|
|
{
|
| 1558 |
|
|
CS_DBGOUT(CS_FUNCTION | CS_OPEN | CS_ERROR, 2,
|
| 1559 |
|
|
printk(KERN_INFO "cs4297a: cs4297a_open_mixdev()- -ENODEV\n"));
|
| 1560 |
|
|
return -ENODEV;
|
| 1561 |
|
|
}
|
| 1562 |
|
|
VALIDATE_STATE(s);
|
| 1563 |
|
|
file->private_data = s;
|
| 1564 |
|
|
MOD_INC_USE_COUNT;
|
| 1565 |
|
|
|
| 1566 |
|
|
CS_DBGOUT(CS_FUNCTION | CS_OPEN, 4,
|
| 1567 |
|
|
printk(KERN_INFO "cs4297a: cs4297a_open_mixdev()- 0\n"));
|
| 1568 |
|
|
|
| 1569 |
|
|
return 0;
|
| 1570 |
|
|
}
|
| 1571 |
|
|
|
| 1572 |
|
|
|
| 1573 |
|
|
static int cs4297a_release_mixdev(struct inode *inode, struct file *file)
|
| 1574 |
|
|
{
|
| 1575 |
|
|
struct cs4297a_state *s =
|
| 1576 |
|
|
(struct cs4297a_state *) file->private_data;
|
| 1577 |
|
|
|
| 1578 |
|
|
VALIDATE_STATE(s);
|
| 1579 |
|
|
MOD_DEC_USE_COUNT;
|
| 1580 |
|
|
return 0;
|
| 1581 |
|
|
}
|
| 1582 |
|
|
|
| 1583 |
|
|
|
| 1584 |
|
|
static int cs4297a_ioctl_mixdev(struct inode *inode, struct file *file,
|
| 1585 |
|
|
unsigned int cmd, unsigned long arg)
|
| 1586 |
|
|
{
|
| 1587 |
|
|
return mixer_ioctl((struct cs4297a_state *) file->private_data, cmd,
|
| 1588 |
|
|
arg);
|
| 1589 |
|
|
}
|
| 1590 |
|
|
|
| 1591 |
|
|
|
| 1592 |
|
|
// ******************************************************************************************
|
| 1593 |
|
|
// Mixer file operations struct.
|
| 1594 |
|
|
// ******************************************************************************************
|
| 1595 |
|
|
static /*const */ struct file_operations cs4297a_mixer_fops = {
|
| 1596 |
|
|
llseek:cs4297a_llseek,
|
| 1597 |
|
|
ioctl:cs4297a_ioctl_mixdev,
|
| 1598 |
|
|
open:cs4297a_open_mixdev,
|
| 1599 |
|
|
release:cs4297a_release_mixdev,
|
| 1600 |
|
|
};
|
| 1601 |
|
|
|
| 1602 |
|
|
// ---------------------------------------------------------------------
|
| 1603 |
|
|
|
| 1604 |
|
|
|
| 1605 |
|
|
static int drain_adc(struct cs4297a_state *s, int nonblock)
|
| 1606 |
|
|
{
|
| 1607 |
|
|
/* This routine serves no purpose currently - any samples
|
| 1608 |
|
|
sitting in the receive queue will just be processed by the
|
| 1609 |
|
|
background consumer. This would be different if DMA
|
| 1610 |
|
|
actually stopped when there were no clients. */
|
| 1611 |
|
|
return 0;
|
| 1612 |
|
|
}
|
| 1613 |
|
|
|
| 1614 |
|
|
static int drain_dac(struct cs4297a_state *s, int nonblock)
|
| 1615 |
|
|
{
|
| 1616 |
|
|
DECLARE_WAITQUEUE(wait, current);
|
| 1617 |
|
|
unsigned long flags;
|
| 1618 |
|
|
unsigned hwptr;
|
| 1619 |
|
|
unsigned tmo;
|
| 1620 |
|
|
int count;
|
| 1621 |
|
|
|
| 1622 |
|
|
if (s->dma_dac.mapped)
|
| 1623 |
|
|
return 0;
|
| 1624 |
|
|
if (nonblock)
|
| 1625 |
|
|
return -EBUSY;
|
| 1626 |
|
|
add_wait_queue(&s->dma_dac.wait, &wait);
|
| 1627 |
|
|
while ((count = in64(SS_CSR(R_SER_DMA_DSCR_COUNT_TX))) ||
|
| 1628 |
|
|
(s->dma_dac.count > 0)) {
|
| 1629 |
|
|
if (!signal_pending(current)) {
|
| 1630 |
|
|
set_current_state(TASK_INTERRUPTIBLE);
|
| 1631 |
|
|
/* XXXKW is this calculation working? */
|
| 1632 |
|
|
tmo = ((count * FRAME_TX_US) * HZ) / 1000000;
|
| 1633 |
|
|
schedule_timeout(tmo + 1);
|
| 1634 |
|
|
} else {
|
| 1635 |
|
|
/* XXXKW do I care if there is a signal pending? */
|
| 1636 |
|
|
}
|
| 1637 |
|
|
}
|
| 1638 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
| 1639 |
|
|
/* Reset the bookkeeping */
|
| 1640 |
|
|
hwptr = (int)(((in64(SS_CSR(R_SER_DMA_CUR_DSCR_ADDR_TX)) & M_DMA_CURDSCR_ADDR) -
|
| 1641 |
|
|
s->dma_dac.descrtab_phys) / sizeof(serdma_descr_t));
|
| 1642 |
|
|
s->dma_dac.hwptr = s->dma_dac.swptr = hwptr;
|
| 1643 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
| 1644 |
|
|
remove_wait_queue(&s->dma_dac.wait, &wait);
|
| 1645 |
|
|
current->state = TASK_RUNNING;
|
| 1646 |
|
|
return 0;
|
| 1647 |
|
|
}
|
| 1648 |
|
|
|
| 1649 |
|
|
|
| 1650 |
|
|
// ---------------------------------------------------------------------
|
| 1651 |
|
|
|
| 1652 |
|
|
static ssize_t cs4297a_read(struct file *file, char *buffer, size_t count,
|
| 1653 |
|
|
loff_t * ppos)
|
| 1654 |
|
|
{
|
| 1655 |
|
|
struct cs4297a_state *s =
|
| 1656 |
|
|
(struct cs4297a_state *) file->private_data;
|
| 1657 |
|
|
ssize_t ret;
|
| 1658 |
|
|
unsigned long flags;
|
| 1659 |
|
|
int cnt, count_fr, cnt_by;
|
| 1660 |
|
|
unsigned copied = 0;
|
| 1661 |
|
|
|
| 1662 |
|
|
CS_DBGOUT(CS_FUNCTION | CS_WAVE_READ, 2,
|
| 1663 |
|
|
printk(KERN_INFO "cs4297a: cs4297a_read()+ %d \n", count));
|
| 1664 |
|
|
|
| 1665 |
|
|
VALIDATE_STATE(s);
|
| 1666 |
|
|
if (ppos != &file->f_pos)
|
| 1667 |
|
|
return -ESPIPE;
|
| 1668 |
|
|
if (s->dma_adc.mapped)
|
| 1669 |
|
|
return -ENXIO;
|
| 1670 |
|
|
if (!s->dma_adc.ready && (ret = prog_dmabuf_adc(s)))
|
| 1671 |
|
|
return ret;
|
| 1672 |
|
|
if (!access_ok(VERIFY_WRITE, buffer, count))
|
| 1673 |
|
|
return -EFAULT;
|
| 1674 |
|
|
ret = 0;
|
| 1675 |
|
|
//
|
| 1676 |
|
|
// "count" is the amount of bytes to read (from app), is decremented each loop
|
| 1677 |
|
|
// by the amount of bytes that have been returned to the user buffer.
|
| 1678 |
|
|
// "cnt" is the running total of each read from the buffer (changes each loop)
|
| 1679 |
|
|
// "buffer" points to the app's buffer
|
| 1680 |
|
|
// "ret" keeps a running total of the amount of bytes that have been copied
|
| 1681 |
|
|
// to the user buffer.
|
| 1682 |
|
|
// "copied" is the total bytes copied into the user buffer for each loop.
|
| 1683 |
|
|
//
|
| 1684 |
|
|
while (count > 0) {
|
| 1685 |
|
|
CS_DBGOUT(CS_WAVE_READ, 8, printk(KERN_INFO
|
| 1686 |
|
|
"_read() count>0 count=%d .count=%d .swptr=%d .hwptr=%d \n",
|
| 1687 |
|
|
count, s->dma_adc.count,
|
| 1688 |
|
|
s->dma_adc.swptr, s->dma_adc.hwptr));
|
| 1689 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
| 1690 |
|
|
|
| 1691 |
|
|
/* cnt will be the number of available samples (16-bit
|
| 1692 |
|
|
stereo); it starts out as the maxmimum consequetive
|
| 1693 |
|
|
samples */
|
| 1694 |
|
|
cnt = (s->dma_adc.sb_end - s->dma_adc.sb_swptr) / 2;
|
| 1695 |
|
|
count_fr = s->dma_adc.count / FRAME_SAMPLE_BYTES;
|
| 1696 |
|
|
|
| 1697 |
|
|
// dma_adc.count is the current total bytes that have not been read.
|
| 1698 |
|
|
// if the amount of unread bytes from the current sw pointer to the
|
| 1699 |
|
|
// end of the buffer is greater than the current total bytes that
|
| 1700 |
|
|
// have not been read, then set the "cnt" (unread bytes) to the
|
| 1701 |
|
|
// amount of unread bytes.
|
| 1702 |
|
|
|
| 1703 |
|
|
if (count_fr < cnt)
|
| 1704 |
|
|
cnt = count_fr;
|
| 1705 |
|
|
cnt_by = cnt * FRAME_SAMPLE_BYTES;
|
| 1706 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
| 1707 |
|
|
//
|
| 1708 |
|
|
// if we are converting from 8/16 then we need to copy
|
| 1709 |
|
|
// twice the number of 16 bit bytes then 8 bit bytes.
|
| 1710 |
|
|
//
|
| 1711 |
|
|
if (s->conversion) {
|
| 1712 |
|
|
if (cnt_by > (count * 2)) {
|
| 1713 |
|
|
cnt = (count * 2) / FRAME_SAMPLE_BYTES;
|
| 1714 |
|
|
cnt_by = count * 2;
|
| 1715 |
|
|
}
|
| 1716 |
|
|
} else {
|
| 1717 |
|
|
if (cnt_by > count) {
|
| 1718 |
|
|
cnt = count / FRAME_SAMPLE_BYTES;
|
| 1719 |
|
|
cnt_by = count;
|
| 1720 |
|
|
}
|
| 1721 |
|
|
}
|
| 1722 |
|
|
//
|
| 1723 |
|
|
// "cnt" NOW is the smaller of the amount that will be read,
|
| 1724 |
|
|
// and the amount that is requested in this read (or partial).
|
| 1725 |
|
|
// if there are no bytes in the buffer to read, then start the
|
| 1726 |
|
|
// ADC and wait for the interrupt handler to wake us up.
|
| 1727 |
|
|
//
|
| 1728 |
|
|
if (cnt <= 0) {
|
| 1729 |
|
|
|
| 1730 |
|
|
// start up the dma engine and then continue back to the top of
|
| 1731 |
|
|
// the loop when wake up occurs.
|
| 1732 |
|
|
start_adc(s);
|
| 1733 |
|
|
if (file->f_flags & O_NONBLOCK)
|
| 1734 |
|
|
return ret ? ret : -EAGAIN;
|
| 1735 |
|
|
interruptible_sleep_on(&s->dma_adc.wait);
|
| 1736 |
|
|
if (signal_pending(current))
|
| 1737 |
|
|
return ret ? ret : -ERESTARTSYS;
|
| 1738 |
|
|
continue;
|
| 1739 |
|
|
}
|
| 1740 |
|
|
// there are bytes in the buffer to read.
|
| 1741 |
|
|
// copy from the hw buffer over to the user buffer.
|
| 1742 |
|
|
// user buffer is designated by "buffer"
|
| 1743 |
|
|
// virtual address to copy from is dma_buf+swptr
|
| 1744 |
|
|
// the "cnt" is the number of bytes to read.
|
| 1745 |
|
|
|
| 1746 |
|
|
CS_DBGOUT(CS_WAVE_READ, 2, printk(KERN_INFO
|
| 1747 |
|
|
"_read() copy_to cnt=%d count=%d ", cnt_by, count));
|
| 1748 |
|
|
CS_DBGOUT(CS_WAVE_READ, 8, printk(KERN_INFO
|
| 1749 |
|
|
" .sbufsz=%d .count=%d buffer=0x%.8x ret=%d\n",
|
| 1750 |
|
|
s->dma_adc.sbufsz, s->dma_adc.count,
|
| 1751 |
|
|
(unsigned) buffer, ret));
|
| 1752 |
|
|
|
| 1753 |
|
|
if (copy_to_user (buffer, ((void *)s->dma_adc.sb_swptr), cnt_by))
|
| 1754 |
|
|
return ret ? ret : -EFAULT;
|
| 1755 |
|
|
copied = cnt_by;
|
| 1756 |
|
|
|
| 1757 |
|
|
/* Return the descriptors */
|
| 1758 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
| 1759 |
|
|
CS_DBGOUT(CS_FUNCTION, 2,
|
| 1760 |
|
|
printk(KERN_INFO "cs4297a: upd_rcv sw->hw %x/%x\n", s->dma_adc.swptr, s->dma_adc.hwptr));
|
| 1761 |
|
|
s->dma_adc.count -= cnt_by;
|
| 1762 |
|
|
s->dma_adc.sb_swptr += cnt * 2;
|
| 1763 |
|
|
if (s->dma_adc.sb_swptr == s->dma_adc.sb_end)
|
| 1764 |
|
|
s->dma_adc.sb_swptr = s->dma_adc.sample_buf;
|
| 1765 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
| 1766 |
|
|
count -= copied;
|
| 1767 |
|
|
buffer += copied;
|
| 1768 |
|
|
ret += copied;
|
| 1769 |
|
|
start_adc(s);
|
| 1770 |
|
|
}
|
| 1771 |
|
|
CS_DBGOUT(CS_FUNCTION | CS_WAVE_READ, 2,
|
| 1772 |
|
|
printk(KERN_INFO "cs4297a: cs4297a_read()- %d\n", ret));
|
| 1773 |
|
|
return ret;
|
| 1774 |
|
|
}
|
| 1775 |
|
|
|
| 1776 |
|
|
|
| 1777 |
|
|
static ssize_t cs4297a_write(struct file *file, const char *buffer,
|
| 1778 |
|
|
size_t count, loff_t * ppos)
|
| 1779 |
|
|
{
|
| 1780 |
|
|
struct cs4297a_state *s =
|
| 1781 |
|
|
(struct cs4297a_state *) file->private_data;
|
| 1782 |
|
|
ssize_t ret;
|
| 1783 |
|
|
unsigned long flags;
|
| 1784 |
|
|
unsigned swptr, hwptr;
|
| 1785 |
|
|
int cnt;
|
| 1786 |
|
|
|
| 1787 |
|
|
CS_DBGOUT(CS_FUNCTION | CS_WAVE_WRITE, 2,
|
| 1788 |
|
|
printk(KERN_INFO "cs4297a: cs4297a_write()+ count=%d\n",
|
| 1789 |
|
|
count));
|
| 1790 |
|
|
VALIDATE_STATE(s);
|
| 1791 |
|
|
|
| 1792 |
|
|
if (ppos != &file->f_pos)
|
| 1793 |
|
|
return -ESPIPE;
|
| 1794 |
|
|
if (s->dma_dac.mapped)
|
| 1795 |
|
|
return -ENXIO;
|
| 1796 |
|
|
if (!s->dma_dac.ready && (ret = prog_dmabuf_dac(s)))
|
| 1797 |
|
|
return ret;
|
| 1798 |
|
|
if (!access_ok(VERIFY_READ, buffer, count))
|
| 1799 |
|
|
return -EFAULT;
|
| 1800 |
|
|
ret = 0;
|
| 1801 |
|
|
while (count > 0) {
|
| 1802 |
|
|
serdma_t *d = &s->dma_dac;
|
| 1803 |
|
|
int copy_cnt;
|
| 1804 |
|
|
u32 *s_tmpl;
|
| 1805 |
|
|
u32 *t_tmpl;
|
| 1806 |
|
|
u32 left, right;
|
| 1807 |
|
|
/* XXXKW check system endian here ... */
|
| 1808 |
|
|
int swap = (s->prop_dac.fmt == AFMT_S16_LE) || (s->prop_dac.fmt == AFMT_U16_LE);
|
| 1809 |
|
|
|
| 1810 |
|
|
/* XXXXXX this is broken for BLOAT_FACTOR */
|
| 1811 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
| 1812 |
|
|
if (d->count < 0) {
|
| 1813 |
|
|
d->count = 0;
|
| 1814 |
|
|
d->swptr = d->hwptr;
|
| 1815 |
|
|
}
|
| 1816 |
|
|
if (d->underrun) {
|
| 1817 |
|
|
d->underrun = 0;
|
| 1818 |
|
|
hwptr = (unsigned) (((in64(SS_CSR(R_SER_DMA_CUR_DSCR_ADDR_TX)) & M_DMA_CURDSCR_ADDR) -
|
| 1819 |
|
|
d->descrtab_phys) / sizeof(serdma_descr_t));
|
| 1820 |
|
|
d->swptr = d->hwptr = hwptr;
|
| 1821 |
|
|
}
|
| 1822 |
|
|
swptr = d->swptr;
|
| 1823 |
|
|
cnt = d->sbufsz - (swptr * FRAME_SAMPLE_BYTES);
|
| 1824 |
|
|
/* Will this write fill up the buffer? */
|
| 1825 |
|
|
if (d->count + cnt > d->sbufsz)
|
| 1826 |
|
|
cnt = d->sbufsz - d->count;
|
| 1827 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
| 1828 |
|
|
if (cnt > count)
|
| 1829 |
|
|
cnt = count;
|
| 1830 |
|
|
if (cnt <= 0) {
|
| 1831 |
|
|
start_dac(s);
|
| 1832 |
|
|
if (file->f_flags & O_NONBLOCK)
|
| 1833 |
|
|
return ret ? ret : -EAGAIN;
|
| 1834 |
|
|
interruptible_sleep_on(&d->wait);
|
| 1835 |
|
|
if (signal_pending(current))
|
| 1836 |
|
|
return ret ? ret : -ERESTARTSYS;
|
| 1837 |
|
|
continue;
|
| 1838 |
|
|
}
|
| 1839 |
|
|
if (copy_from_user(d->sample_buf, buffer, cnt))
|
| 1840 |
|
|
return ret ? ret : -EFAULT;
|
| 1841 |
|
|
|
| 1842 |
|
|
copy_cnt = cnt;
|
| 1843 |
|
|
s_tmpl = (u32 *)d->sample_buf;
|
| 1844 |
|
|
t_tmpl = (u32 *)(d->dma_buf + (swptr * 4));
|
| 1845 |
|
|
|
| 1846 |
|
|
/* XXXKW assuming 16-bit stereo! */
|
| 1847 |
|
|
do {
|
| 1848 |
|
|
t_tmpl[0] = 0x98000000;
|
| 1849 |
|
|
left = s_tmpl[0] >> 16;
|
| 1850 |
|
|
if (left & 0x8000)
|
| 1851 |
|
|
left |= 0xf0000;
|
| 1852 |
|
|
right = s_tmpl[0] & 0xffff;
|
| 1853 |
|
|
if (right & 0x8000)
|
| 1854 |
|
|
right |= 0xf0000;
|
| 1855 |
|
|
if (swap) {
|
| 1856 |
|
|
t_tmpl[1] = left & 0xff;
|
| 1857 |
|
|
t_tmpl[2] = ((left & 0xff00) << 16) | ((right & 0xff) << 12) |
|
| 1858 |
|
|
((right & 0xff00) >> 4);
|
| 1859 |
|
|
} else {
|
| 1860 |
|
|
t_tmpl[1] = left >> 8;
|
| 1861 |
|
|
t_tmpl[2] = ((left & 0xff) << 24) | (right << 4);
|
| 1862 |
|
|
}
|
| 1863 |
|
|
s_tmpl++;
|
| 1864 |
|
|
t_tmpl += 8;
|
| 1865 |
|
|
copy_cnt -= 4;
|
| 1866 |
|
|
} while (copy_cnt);
|
| 1867 |
|
|
|
| 1868 |
|
|
/* Mux in any pending read/write accesses */
|
| 1869 |
|
|
if (s->reg_request) {
|
| 1870 |
|
|
*(u64 *)(d->dma_buf + (swptr * 4)) |= s->reg_request;
|
| 1871 |
|
|
s->reg_request = 0;
|
| 1872 |
|
|
wake_up(&s->dma_dac.reg_wait);
|
| 1873 |
|
|
}
|
| 1874 |
|
|
|
| 1875 |
|
|
CS_DBGOUT(CS_WAVE_WRITE, 4,
|
| 1876 |
|
|
printk(KERN_INFO
|
| 1877 |
|
|
"cs4297a: copy in %d to swptr %x\n", cnt, swptr));
|
| 1878 |
|
|
|
| 1879 |
|
|
swptr = (swptr + (cnt/FRAME_SAMPLE_BYTES)) % d->ringsz;
|
| 1880 |
|
|
out64(cnt/FRAME_SAMPLE_BYTES, SS_CSR(R_SER_DMA_DSCR_COUNT_TX));
|
| 1881 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
| 1882 |
|
|
d->swptr = swptr;
|
| 1883 |
|
|
d->count += cnt;
|
| 1884 |
|
|
d->endcleared = 0;
|
| 1885 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
| 1886 |
|
|
count -= cnt;
|
| 1887 |
|
|
buffer += cnt;
|
| 1888 |
|
|
ret += cnt;
|
| 1889 |
|
|
start_dac(s);
|
| 1890 |
|
|
}
|
| 1891 |
|
|
CS_DBGOUT(CS_FUNCTION | CS_WAVE_WRITE, 2,
|
| 1892 |
|
|
printk(KERN_INFO "cs4297a: cs4297a_write()- %d\n", ret));
|
| 1893 |
|
|
return ret;
|
| 1894 |
|
|
}
|
| 1895 |
|
|
|
| 1896 |
|
|
|
| 1897 |
|
|
static unsigned int cs4297a_poll(struct file *file,
|
| 1898 |
|
|
struct poll_table_struct *wait)
|
| 1899 |
|
|
{
|
| 1900 |
|
|
struct cs4297a_state *s =
|
| 1901 |
|
|
(struct cs4297a_state *) file->private_data;
|
| 1902 |
|
|
unsigned long flags;
|
| 1903 |
|
|
unsigned int mask = 0;
|
| 1904 |
|
|
|
| 1905 |
|
|
CS_DBGOUT(CS_FUNCTION | CS_WAVE_WRITE | CS_WAVE_READ, 4,
|
| 1906 |
|
|
printk(KERN_INFO "cs4297a: cs4297a_poll()+\n"));
|
| 1907 |
|
|
VALIDATE_STATE(s);
|
| 1908 |
|
|
if (file->f_mode & FMODE_WRITE) {
|
| 1909 |
|
|
CS_DBGOUT(CS_FUNCTION | CS_WAVE_WRITE | CS_WAVE_READ, 4,
|
| 1910 |
|
|
printk(KERN_INFO
|
| 1911 |
|
|
"cs4297a: cs4297a_poll() wait on FMODE_WRITE\n"));
|
| 1912 |
|
|
if(!s->dma_dac.ready && prog_dmabuf_dac(s))
|
| 1913 |
|
|
return 0;
|
| 1914 |
|
|
poll_wait(file, &s->dma_dac.wait, wait);
|
| 1915 |
|
|
}
|
| 1916 |
|
|
if (file->f_mode & FMODE_READ) {
|
| 1917 |
|
|
CS_DBGOUT(CS_FUNCTION | CS_WAVE_WRITE | CS_WAVE_READ, 4,
|
| 1918 |
|
|
printk(KERN_INFO
|
| 1919 |
|
|
"cs4297a: cs4297a_poll() wait on FMODE_READ\n"));
|
| 1920 |
|
|
if(!s->dma_dac.ready && prog_dmabuf_adc(s))
|
| 1921 |
|
|
return 0;
|
| 1922 |
|
|
poll_wait(file, &s->dma_adc.wait, wait);
|
| 1923 |
|
|
}
|
| 1924 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
| 1925 |
|
|
cs4297a_update_ptr(s,CS_FALSE);
|
| 1926 |
|
|
if (file->f_mode & FMODE_WRITE) {
|
| 1927 |
|
|
if (s->dma_dac.mapped) {
|
| 1928 |
|
|
if (s->dma_dac.count >=
|
| 1929 |
|
|
(signed) s->dma_dac.fragsize) {
|
| 1930 |
|
|
if (s->dma_dac.wakeup)
|
| 1931 |
|
|
mask |= POLLOUT | POLLWRNORM;
|
| 1932 |
|
|
else
|
| 1933 |
|
|
mask = 0;
|
| 1934 |
|
|
s->dma_dac.wakeup = 0;
|
| 1935 |
|
|
}
|
| 1936 |
|
|
} else {
|
| 1937 |
|
|
if ((signed) (s->dma_dac.sbufsz/2) >= s->dma_dac.count)
|
| 1938 |
|
|
mask |= POLLOUT | POLLWRNORM;
|
| 1939 |
|
|
}
|
| 1940 |
|
|
} else if (file->f_mode & FMODE_READ) {
|
| 1941 |
|
|
if (s->dma_adc.mapped) {
|
| 1942 |
|
|
if (s->dma_adc.count >= (signed) s->dma_adc.fragsize)
|
| 1943 |
|
|
mask |= POLLIN | POLLRDNORM;
|
| 1944 |
|
|
} else {
|
| 1945 |
|
|
if (s->dma_adc.count > 0)
|
| 1946 |
|
|
mask |= POLLIN | POLLRDNORM;
|
| 1947 |
|
|
}
|
| 1948 |
|
|
}
|
| 1949 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
| 1950 |
|
|
CS_DBGOUT(CS_FUNCTION | CS_WAVE_WRITE | CS_WAVE_READ, 4,
|
| 1951 |
|
|
printk(KERN_INFO "cs4297a: cs4297a_poll()- 0x%.8x\n",
|
| 1952 |
|
|
mask));
|
| 1953 |
|
|
return mask;
|
| 1954 |
|
|
}
|
| 1955 |
|
|
|
| 1956 |
|
|
|
| 1957 |
|
|
static int cs4297a_mmap(struct file *file, struct vm_area_struct *vma)
|
| 1958 |
|
|
{
|
| 1959 |
|
|
/* XXXKW currently no mmap support */
|
| 1960 |
|
|
return -EINVAL;
|
| 1961 |
|
|
return 0;
|
| 1962 |
|
|
}
|
| 1963 |
|
|
|
| 1964 |
|
|
|
| 1965 |
|
|
static int cs4297a_ioctl(struct inode *inode, struct file *file,
|
| 1966 |
|
|
unsigned int cmd, unsigned long arg)
|
| 1967 |
|
|
{
|
| 1968 |
|
|
struct cs4297a_state *s =
|
| 1969 |
|
|
(struct cs4297a_state *) file->private_data;
|
| 1970 |
|
|
unsigned long flags;
|
| 1971 |
|
|
audio_buf_info abinfo;
|
| 1972 |
|
|
count_info cinfo;
|
| 1973 |
|
|
int val, mapped, ret;
|
| 1974 |
|
|
|
| 1975 |
|
|
CS_DBGOUT(CS_FUNCTION|CS_IOCTL, 4, printk(KERN_INFO
|
| 1976 |
|
|
"cs4297a: cs4297a_ioctl(): file=0x%.8x cmd=0x%.8x\n",
|
| 1977 |
|
|
(unsigned) file, cmd));
|
| 1978 |
|
|
#if CSDEBUG
|
| 1979 |
|
|
cs_printioctl(cmd);
|
| 1980 |
|
|
#endif
|
| 1981 |
|
|
VALIDATE_STATE(s);
|
| 1982 |
|
|
mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac.mapped) ||
|
| 1983 |
|
|
((file->f_mode & FMODE_READ) && s->dma_adc.mapped);
|
| 1984 |
|
|
switch (cmd) {
|
| 1985 |
|
|
case OSS_GETVERSION:
|
| 1986 |
|
|
CS_DBGOUT(CS_IOCTL | CS_PARMS, 4, printk(KERN_INFO
|
| 1987 |
|
|
"cs4297a: cs4297a_ioctl(): SOUND_VERSION=0x%.8x\n",
|
| 1988 |
|
|
SOUND_VERSION));
|
| 1989 |
|
|
return put_user(SOUND_VERSION, (int *) arg);
|
| 1990 |
|
|
|
| 1991 |
|
|
case SNDCTL_DSP_SYNC:
|
| 1992 |
|
|
CS_DBGOUT(CS_IOCTL, 4, printk(KERN_INFO
|
| 1993 |
|
|
"cs4297a: cs4297a_ioctl(): DSP_SYNC\n"));
|
| 1994 |
|
|
if (file->f_mode & FMODE_WRITE)
|
| 1995 |
|
|
return drain_dac(s,
|
| 1996 |
|
|
|
| 1997 |
|
|
);
|
| 1998 |
|
|
return 0;
|
| 1999 |
|
|
|
| 2000 |
|
|
case SNDCTL_DSP_SETDUPLEX:
|
| 2001 |
|
|
return 0;
|
| 2002 |
|
|
|
| 2003 |
|
|
case SNDCTL_DSP_GETCAPS:
|
| 2004 |
|
|
return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME |
|
| 2005 |
|
|
DSP_CAP_TRIGGER | DSP_CAP_MMAP,
|
| 2006 |
|
|
(int *) arg);
|
| 2007 |
|
|
|
| 2008 |
|
|
case SNDCTL_DSP_RESET:
|
| 2009 |
|
|
CS_DBGOUT(CS_IOCTL, 4, printk(KERN_INFO
|
| 2010 |
|
|
"cs4297a: cs4297a_ioctl(): DSP_RESET\n"));
|
| 2011 |
|
|
if (file->f_mode & FMODE_WRITE) {
|
| 2012 |
|
|
stop_dac(s);
|
| 2013 |
|
|
synchronize_irq();
|
| 2014 |
|
|
s->dma_dac.count = s->dma_dac.total_bytes =
|
| 2015 |
|
|
s->dma_dac.blocks = s->dma_dac.wakeup = 0;
|
| 2016 |
|
|
s->dma_dac.swptr = s->dma_dac.hwptr =
|
| 2017 |
|
|
(int)(((in64(SS_CSR(R_SER_DMA_CUR_DSCR_ADDR_TX)) & M_DMA_CURDSCR_ADDR) -
|
| 2018 |
|
|
s->dma_dac.descrtab_phys) / sizeof(serdma_descr_t));
|
| 2019 |
|
|
}
|
| 2020 |
|
|
if (file->f_mode & FMODE_READ) {
|
| 2021 |
|
|
stop_adc(s);
|
| 2022 |
|
|
synchronize_irq();
|
| 2023 |
|
|
s->dma_adc.count = s->dma_adc.total_bytes =
|
| 2024 |
|
|
s->dma_adc.blocks = s->dma_dac.wakeup = 0;
|
| 2025 |
|
|
s->dma_adc.swptr = s->dma_adc.hwptr =
|
| 2026 |
|
|
(int)(((in64(SS_CSR(R_SER_DMA_CUR_DSCR_ADDR_RX)) & M_DMA_CURDSCR_ADDR) -
|
| 2027 |
|
|
s->dma_adc.descrtab_phys) / sizeof(serdma_descr_t));
|
| 2028 |
|
|
}
|
| 2029 |
|
|
return 0;
|
| 2030 |
|
|
|
| 2031 |
|
|
case SNDCTL_DSP_SPEED:
|
| 2032 |
|
|
if (get_user(val, (int *) arg))
|
| 2033 |
|
|
return -EFAULT;
|
| 2034 |
|
|
CS_DBGOUT(CS_IOCTL | CS_PARMS, 4, printk(KERN_INFO
|
| 2035 |
|
|
"cs4297a: cs4297a_ioctl(): DSP_SPEED val=%d -> 48000\n", val));
|
| 2036 |
|
|
val = 48000;
|
| 2037 |
|
|
return put_user(val, (int *) arg);
|
| 2038 |
|
|
|
| 2039 |
|
|
case SNDCTL_DSP_STEREO:
|
| 2040 |
|
|
if (get_user(val, (int *) arg))
|
| 2041 |
|
|
return -EFAULT;
|
| 2042 |
|
|
CS_DBGOUT(CS_IOCTL | CS_PARMS, 4, printk(KERN_INFO
|
| 2043 |
|
|
"cs4297a: cs4297a_ioctl(): DSP_STEREO val=%d\n", val));
|
| 2044 |
|
|
if (file->f_mode & FMODE_READ) {
|
| 2045 |
|
|
stop_adc(s);
|
| 2046 |
|
|
s->dma_adc.ready = 0;
|
| 2047 |
|
|
s->prop_adc.channels = val ? 2 : 1;
|
| 2048 |
|
|
}
|
| 2049 |
|
|
if (file->f_mode & FMODE_WRITE) {
|
| 2050 |
|
|
stop_dac(s);
|
| 2051 |
|
|
s->dma_dac.ready = 0;
|
| 2052 |
|
|
s->prop_dac.channels = val ? 2 : 1;
|
| 2053 |
|
|
}
|
| 2054 |
|
|
return 0;
|
| 2055 |
|
|
|
| 2056 |
|
|
case SNDCTL_DSP_CHANNELS:
|
| 2057 |
|
|
if (get_user(val, (int *) arg))
|
| 2058 |
|
|
return -EFAULT;
|
| 2059 |
|
|
CS_DBGOUT(CS_IOCTL | CS_PARMS, 4, printk(KERN_INFO
|
| 2060 |
|
|
"cs4297a: cs4297a_ioctl(): DSP_CHANNELS val=%d\n",
|
| 2061 |
|
|
val));
|
| 2062 |
|
|
if (val != 0) {
|
| 2063 |
|
|
if (file->f_mode & FMODE_READ) {
|
| 2064 |
|
|
stop_adc(s);
|
| 2065 |
|
|
s->dma_adc.ready = 0;
|
| 2066 |
|
|
if (val >= 2)
|
| 2067 |
|
|
s->prop_adc.channels = 2;
|
| 2068 |
|
|
else
|
| 2069 |
|
|
s->prop_adc.channels = 1;
|
| 2070 |
|
|
}
|
| 2071 |
|
|
if (file->f_mode & FMODE_WRITE) {
|
| 2072 |
|
|
stop_dac(s);
|
| 2073 |
|
|
s->dma_dac.ready = 0;
|
| 2074 |
|
|
if (val >= 2)
|
| 2075 |
|
|
s->prop_dac.channels = 2;
|
| 2076 |
|
|
else
|
| 2077 |
|
|
s->prop_dac.channels = 1;
|
| 2078 |
|
|
}
|
| 2079 |
|
|
}
|
| 2080 |
|
|
|
| 2081 |
|
|
if (file->f_mode & FMODE_WRITE)
|
| 2082 |
|
|
val = s->prop_dac.channels;
|
| 2083 |
|
|
else if (file->f_mode & FMODE_READ)
|
| 2084 |
|
|
val = s->prop_adc.channels;
|
| 2085 |
|
|
|
| 2086 |
|
|
return put_user(val, (int *) arg);
|
| 2087 |
|
|
|
| 2088 |
|
|
case SNDCTL_DSP_GETFMTS: // Returns a mask
|
| 2089 |
|
|
CS_DBGOUT(CS_IOCTL | CS_PARMS, 4, printk(KERN_INFO
|
| 2090 |
|
|
"cs4297a: cs4297a_ioctl(): DSP_GETFMT val=0x%.8x\n",
|
| 2091 |
|
|
AFMT_S16_LE | AFMT_U16_LE | AFMT_S8 |
|
| 2092 |
|
|
AFMT_U8));
|
| 2093 |
|
|
return put_user(AFMT_S16_LE | AFMT_U16_LE | AFMT_S8 |
|
| 2094 |
|
|
AFMT_U8, (int *) arg);
|
| 2095 |
|
|
|
| 2096 |
|
|
case SNDCTL_DSP_SETFMT:
|
| 2097 |
|
|
if (get_user(val, (int *) arg))
|
| 2098 |
|
|
return -EFAULT;
|
| 2099 |
|
|
CS_DBGOUT(CS_IOCTL | CS_PARMS, 4, printk(KERN_INFO
|
| 2100 |
|
|
"cs4297a: cs4297a_ioctl(): DSP_SETFMT val=0x%.8x\n",
|
| 2101 |
|
|
val));
|
| 2102 |
|
|
if (val != AFMT_QUERY) {
|
| 2103 |
|
|
if (file->f_mode & FMODE_READ) {
|
| 2104 |
|
|
stop_adc(s);
|
| 2105 |
|
|
s->dma_adc.ready = 0;
|
| 2106 |
|
|
if (val != AFMT_S16_LE
|
| 2107 |
|
|
&& val != AFMT_U16_LE && val != AFMT_S8
|
| 2108 |
|
|
&& val != AFMT_U8)
|
| 2109 |
|
|
val = AFMT_U8;
|
| 2110 |
|
|
s->prop_adc.fmt = val;
|
| 2111 |
|
|
s->prop_adc.fmt_original = s->prop_adc.fmt;
|
| 2112 |
|
|
}
|
| 2113 |
|
|
if (file->f_mode & FMODE_WRITE) {
|
| 2114 |
|
|
stop_dac(s);
|
| 2115 |
|
|
s->dma_dac.ready = 0;
|
| 2116 |
|
|
if (val != AFMT_S16_LE
|
| 2117 |
|
|
&& val != AFMT_U16_LE && val != AFMT_S8
|
| 2118 |
|
|
&& val != AFMT_U8)
|
| 2119 |
|
|
val = AFMT_U8;
|
| 2120 |
|
|
s->prop_dac.fmt = val;
|
| 2121 |
|
|
s->prop_dac.fmt_original = s->prop_dac.fmt;
|
| 2122 |
|
|
}
|
| 2123 |
|
|
} else {
|
| 2124 |
|
|
if (file->f_mode & FMODE_WRITE)
|
| 2125 |
|
|
val = s->prop_dac.fmt_original;
|
| 2126 |
|
|
else if (file->f_mode & FMODE_READ)
|
| 2127 |
|
|
val = s->prop_adc.fmt_original;
|
| 2128 |
|
|
}
|
| 2129 |
|
|
CS_DBGOUT(CS_IOCTL | CS_PARMS, 4, printk(KERN_INFO
|
| 2130 |
|
|
"cs4297a: cs4297a_ioctl(): DSP_SETFMT return val=0x%.8x\n",
|
| 2131 |
|
|
val));
|
| 2132 |
|
|
return put_user(val, (int *) arg);
|
| 2133 |
|
|
|
| 2134 |
|
|
case SNDCTL_DSP_POST:
|
| 2135 |
|
|
CS_DBGOUT(CS_IOCTL, 4, printk(KERN_INFO
|
| 2136 |
|
|
"cs4297a: cs4297a_ioctl(): DSP_POST\n"));
|
| 2137 |
|
|
return 0;
|
| 2138 |
|
|
|
| 2139 |
|
|
case SNDCTL_DSP_GETTRIGGER:
|
| 2140 |
|
|
val = 0;
|
| 2141 |
|
|
if (file->f_mode & s->ena & FMODE_READ)
|
| 2142 |
|
|
val |= PCM_ENABLE_INPUT;
|
| 2143 |
|
|
if (file->f_mode & s->ena & FMODE_WRITE)
|
| 2144 |
|
|
val |= PCM_ENABLE_OUTPUT;
|
| 2145 |
|
|
return put_user(val, (int *) arg);
|
| 2146 |
|
|
|
| 2147 |
|
|
case SNDCTL_DSP_SETTRIGGER:
|
| 2148 |
|
|
if (get_user(val, (int *) arg))
|
| 2149 |
|
|
return -EFAULT;
|
| 2150 |
|
|
if (file->f_mode & FMODE_READ) {
|
| 2151 |
|
|
if (val & PCM_ENABLE_INPUT) {
|
| 2152 |
|
|
if (!s->dma_adc.ready
|
| 2153 |
|
|
&& (ret = prog_dmabuf_adc(s)))
|
| 2154 |
|
|
return ret;
|
| 2155 |
|
|
start_adc(s);
|
| 2156 |
|
|
} else
|
| 2157 |
|
|
stop_adc(s);
|
| 2158 |
|
|
}
|
| 2159 |
|
|
if (file->f_mode & FMODE_WRITE) {
|
| 2160 |
|
|
if (val & PCM_ENABLE_OUTPUT) {
|
| 2161 |
|
|
if (!s->dma_dac.ready
|
| 2162 |
|
|
&& (ret = prog_dmabuf_dac(s)))
|
| 2163 |
|
|
return ret;
|
| 2164 |
|
|
start_dac(s);
|
| 2165 |
|
|
} else
|
| 2166 |
|
|
stop_dac(s);
|
| 2167 |
|
|
}
|
| 2168 |
|
|
return 0;
|
| 2169 |
|
|
|
| 2170 |
|
|
case SNDCTL_DSP_GETOSPACE:
|
| 2171 |
|
|
if (!(file->f_mode & FMODE_WRITE))
|
| 2172 |
|
|
return -EINVAL;
|
| 2173 |
|
|
if (!s->dma_dac.ready && (val = prog_dmabuf_dac(s)))
|
| 2174 |
|
|
return val;
|
| 2175 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
| 2176 |
|
|
cs4297a_update_ptr(s,CS_FALSE);
|
| 2177 |
|
|
abinfo.fragsize = s->dma_dac.fragsize;
|
| 2178 |
|
|
if (s->dma_dac.mapped)
|
| 2179 |
|
|
abinfo.bytes = s->dma_dac.sbufsz;
|
| 2180 |
|
|
else
|
| 2181 |
|
|
abinfo.bytes =
|
| 2182 |
|
|
s->dma_dac.sbufsz - s->dma_dac.count;
|
| 2183 |
|
|
abinfo.fragstotal = s->dma_dac.numfrag;
|
| 2184 |
|
|
abinfo.fragments = abinfo.bytes >> s->dma_dac.fragshift;
|
| 2185 |
|
|
CS_DBGOUT(CS_FUNCTION | CS_PARMS, 4, printk(KERN_INFO
|
| 2186 |
|
|
"cs4297a: cs4297a_ioctl(): GETOSPACE .fragsize=%d .bytes=%d .fragstotal=%d .fragments=%d\n",
|
| 2187 |
|
|
abinfo.fragsize,abinfo.bytes,abinfo.fragstotal,
|
| 2188 |
|
|
abinfo.fragments));
|
| 2189 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
| 2190 |
|
|
return copy_to_user((void *) arg, &abinfo,
|
| 2191 |
|
|
sizeof(abinfo)) ? -EFAULT : 0;
|
| 2192 |
|
|
|
| 2193 |
|
|
case SNDCTL_DSP_GETISPACE:
|
| 2194 |
|
|
if (!(file->f_mode & FMODE_READ))
|
| 2195 |
|
|
return -EINVAL;
|
| 2196 |
|
|
if (!s->dma_adc.ready && (val = prog_dmabuf_adc(s)))
|
| 2197 |
|
|
return val;
|
| 2198 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
| 2199 |
|
|
cs4297a_update_ptr(s,CS_FALSE);
|
| 2200 |
|
|
if (s->conversion) {
|
| 2201 |
|
|
abinfo.fragsize = s->dma_adc.fragsize / 2;
|
| 2202 |
|
|
abinfo.bytes = s->dma_adc.count / 2;
|
| 2203 |
|
|
abinfo.fragstotal = s->dma_adc.numfrag;
|
| 2204 |
|
|
abinfo.fragments =
|
| 2205 |
|
|
abinfo.bytes >> (s->dma_adc.fragshift - 1);
|
| 2206 |
|
|
} else {
|
| 2207 |
|
|
abinfo.fragsize = s->dma_adc.fragsize;
|
| 2208 |
|
|
abinfo.bytes = s->dma_adc.count;
|
| 2209 |
|
|
abinfo.fragstotal = s->dma_adc.numfrag;
|
| 2210 |
|
|
abinfo.fragments =
|
| 2211 |
|
|
abinfo.bytes >> s->dma_adc.fragshift;
|
| 2212 |
|
|
}
|
| 2213 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
| 2214 |
|
|
return copy_to_user((void *) arg, &abinfo,
|
| 2215 |
|
|
sizeof(abinfo)) ? -EFAULT : 0;
|
| 2216 |
|
|
|
| 2217 |
|
|
case SNDCTL_DSP_NONBLOCK:
|
| 2218 |
|
|
file->f_flags |= O_NONBLOCK;
|
| 2219 |
|
|
return 0;
|
| 2220 |
|
|
|
| 2221 |
|
|
case SNDCTL_DSP_GETODELAY:
|
| 2222 |
|
|
if (!(file->f_mode & FMODE_WRITE))
|
| 2223 |
|
|
return -EINVAL;
|
| 2224 |
|
|
if(!s->dma_dac.ready && prog_dmabuf_dac(s))
|
| 2225 |
|
|
return 0;
|
| 2226 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
| 2227 |
|
|
cs4297a_update_ptr(s,CS_FALSE);
|
| 2228 |
|
|
val = s->dma_dac.count;
|
| 2229 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
| 2230 |
|
|
return put_user(val, (int *) arg);
|
| 2231 |
|
|
|
| 2232 |
|
|
case SNDCTL_DSP_GETIPTR:
|
| 2233 |
|
|
if (!(file->f_mode & FMODE_READ))
|
| 2234 |
|
|
return -EINVAL;
|
| 2235 |
|
|
if(!s->dma_adc.ready && prog_dmabuf_adc(s))
|
| 2236 |
|
|
return 0;
|
| 2237 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
| 2238 |
|
|
cs4297a_update_ptr(s,CS_FALSE);
|
| 2239 |
|
|
cinfo.bytes = s->dma_adc.total_bytes;
|
| 2240 |
|
|
if (s->dma_adc.mapped) {
|
| 2241 |
|
|
cinfo.blocks =
|
| 2242 |
|
|
(cinfo.bytes >> s->dma_adc.fragshift) -
|
| 2243 |
|
|
s->dma_adc.blocks;
|
| 2244 |
|
|
s->dma_adc.blocks =
|
| 2245 |
|
|
cinfo.bytes >> s->dma_adc.fragshift;
|
| 2246 |
|
|
} else {
|
| 2247 |
|
|
if (s->conversion) {
|
| 2248 |
|
|
cinfo.blocks =
|
| 2249 |
|
|
s->dma_adc.count /
|
| 2250 |
|
|
2 >> (s->dma_adc.fragshift - 1);
|
| 2251 |
|
|
} else
|
| 2252 |
|
|
cinfo.blocks =
|
| 2253 |
|
|
s->dma_adc.count >> s->dma_adc.
|
| 2254 |
|
|
fragshift;
|
| 2255 |
|
|
}
|
| 2256 |
|
|
if (s->conversion)
|
| 2257 |
|
|
cinfo.ptr = s->dma_adc.hwptr / 2;
|
| 2258 |
|
|
else
|
| 2259 |
|
|
cinfo.ptr = s->dma_adc.hwptr;
|
| 2260 |
|
|
if (s->dma_adc.mapped)
|
| 2261 |
|
|
s->dma_adc.count &= s->dma_adc.fragsize - 1;
|
| 2262 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
| 2263 |
|
|
return copy_to_user((void *) arg, &cinfo, sizeof(cinfo));
|
| 2264 |
|
|
|
| 2265 |
|
|
case SNDCTL_DSP_GETOPTR:
|
| 2266 |
|
|
if (!(file->f_mode & FMODE_WRITE))
|
| 2267 |
|
|
return -EINVAL;
|
| 2268 |
|
|
if(!s->dma_dac.ready && prog_dmabuf_dac(s))
|
| 2269 |
|
|
return 0;
|
| 2270 |
|
|
spin_lock_irqsave(&s->lock, flags);
|
| 2271 |
|
|
cs4297a_update_ptr(s,CS_FALSE);
|
| 2272 |
|
|
cinfo.bytes = s->dma_dac.total_bytes;
|
| 2273 |
|
|
if (s->dma_dac.mapped) {
|
| 2274 |
|
|
cinfo.blocks =
|
| 2275 |
|
|
(cinfo.bytes >> s->dma_dac.fragshift) -
|
| 2276 |
|
|
s->dma_dac.blocks;
|
| 2277 |
|
|
s->dma_dac.blocks =
|
| 2278 |
|
|
cinfo.bytes >> s->dma_dac.fragshift;
|
| 2279 |
|
|
} else {
|
| 2280 |
|
|
cinfo.blocks =
|
| 2281 |
|
|
s->dma_dac.count >> s->dma_dac.fragshift;
|
| 2282 |
|
|
}
|
| 2283 |
|
|
cinfo.ptr = s->dma_dac.hwptr;
|
| 2284 |
|
|
if (s->dma_dac.mapped)
|
| 2285 |
|
|
s->dma_dac.count &= s->dma_dac.fragsize - 1;
|
| 2286 |
|
|
spin_unlock_irqrestore(&s->lock, flags);
|
| 2287 |
|
|
return copy_to_user((void *) arg, &cinfo, sizeof(cinfo));
|
| 2288 |
|
|
|
| 2289 |
|
|
case SNDCTL_DSP_GETBLKSIZE:
|
| 2290 |
|
|
if (file->f_mode & FMODE_WRITE) {
|
| 2291 |
|
|
if ((val = prog_dmabuf_dac(s)))
|
| 2292 |
|
|
return val;
|
| 2293 |
|
|
return put_user(s->dma_dac.fragsize, (int *) arg);
|
| 2294 |
|
|
}
|
| 2295 |
|
|
if ((val = prog_dmabuf_adc(s)))
|
| 2296 |
|
|
return val;
|
| 2297 |
|
|
if (s->conversion)
|
| 2298 |
|
|
return put_user(s->dma_adc.fragsize / 2,
|
| 2299 |
|
|
(int *) arg);
|
| 2300 |
|
|
else
|
| 2301 |
|
|
return put_user(s->dma_adc.fragsize, (int *) arg);
|
| 2302 |
|
|
|
| 2303 |
|
|
case SNDCTL_DSP_SETFRAGMENT:
|
| 2304 |
|
|
if (get_user(val, (int *) arg))
|
| 2305 |
|
|
return -EFAULT;
|
| 2306 |
|
|
return 0; // Say OK, but do nothing.
|
| 2307 |
|
|
|
| 2308 |
|
|
case SNDCTL_DSP_SUBDIVIDE:
|
| 2309 |
|
|
if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision)
|
| 2310 |
|
|
|| (file->f_mode & FMODE_WRITE
|
| 2311 |
|
|
&& s->dma_dac.subdivision)) return -EINVAL;
|
| 2312 |
|
|
if (get_user(val, (int *) arg))
|
| 2313 |
|
|
return -EFAULT;
|
| 2314 |
|
|
if (val != 1 && val != 2 && val != 4)
|
| 2315 |
|
|
return -EINVAL;
|
| 2316 |
|
|
if (file->f_mode & FMODE_READ)
|
| 2317 |
|
|
s->dma_adc.subdivision = val;
|
| 2318 |
|
|
else if (file->f_mode & FMODE_WRITE)
|
| 2319 |
|
|
s->dma_dac.subdivision = val;
|
| 2320 |
|
|
return 0;
|
| 2321 |
|
|
|
| 2322 |
|
|
case SOUND_PCM_READ_RATE:
|
| 2323 |
|
|
if (file->f_mode & FMODE_READ)
|
| 2324 |
|
|
return put_user(s->prop_adc.rate, (int *) arg);
|
| 2325 |
|
|
else if (file->f_mode & FMODE_WRITE)
|
| 2326 |
|
|
return put_user(s->prop_dac.rate, (int *) arg);
|
| 2327 |
|
|
|
| 2328 |
|
|
case SOUND_PCM_READ_CHANNELS:
|
| 2329 |
|
|
if (file->f_mode & FMODE_READ)
|
| 2330 |
|
|
return put_user(s->prop_adc.channels, (int *) arg);
|
| 2331 |
|
|
else if (file->f_mode & FMODE_WRITE)
|
| 2332 |
|
|
return put_user(s->prop_dac.channels, (int *) arg);
|
| 2333 |
|
|
|
| 2334 |
|
|
case SOUND_PCM_READ_BITS:
|
| 2335 |
|
|
if (file->f_mode & FMODE_READ)
|
| 2336 |
|
|
return
|
| 2337 |
|
|
put_user(
|
| 2338 |
|
|
(s->prop_adc.
|
| 2339 |
|
|
fmt & (AFMT_S8 | AFMT_U8)) ? 8 : 16,
|
| 2340 |
|
|
(int *) arg);
|
| 2341 |
|
|
else if (file->f_mode & FMODE_WRITE)
|
| 2342 |
|
|
return
|
| 2343 |
|
|
put_user(
|
| 2344 |
|
|
(s->prop_dac.
|
| 2345 |
|
|
fmt & (AFMT_S8 | AFMT_U8)) ? 8 : 16,
|
| 2346 |
|
|
(int *) arg);
|
| 2347 |
|
|
|
| 2348 |
|
|
case SOUND_PCM_WRITE_FILTER:
|
| 2349 |
|
|
case SNDCTL_DSP_SETSYNCRO:
|
| 2350 |
|
|
case SOUND_PCM_READ_FILTER:
|
| 2351 |
|
|
return -EINVAL;
|
| 2352 |
|
|
}
|
| 2353 |
|
|
return mixer_ioctl(s, cmd, arg);
|
| 2354 |
|
|
}
|
| 2355 |
|
|
|
| 2356 |
|
|
|
| 2357 |
|
|
static int cs4297a_release(struct inode *inode, struct file *file)
|
| 2358 |
|
|
{
|
| 2359 |
|
|
struct cs4297a_state *s =
|
| 2360 |
|
|
(struct cs4297a_state *) file->private_data;
|
| 2361 |
|
|
|
| 2362 |
|
|
CS_DBGOUT(CS_FUNCTION | CS_RELEASE, 2, printk(KERN_INFO
|
| 2363 |
|
|
"cs4297a: cs4297a_release(): inode=0x%.8x file=0x%.8x f_mode=0x%x\n",
|
| 2364 |
|
|
(unsigned) inode, (unsigned) file, file->f_mode));
|
| 2365 |
|
|
VALIDATE_STATE(s);
|
| 2366 |
|
|
|
| 2367 |
|
|
if (file->f_mode & FMODE_WRITE) {
|
| 2368 |
|
|
drain_dac(s, file->f_flags & O_NONBLOCK);
|
| 2369 |
|
|
down(&s->open_sem_dac);
|
| 2370 |
|
|
stop_dac(s);
|
| 2371 |
|
|
dealloc_dmabuf(s, &s->dma_dac);
|
| 2372 |
|
|
s->open_mode &= ~FMODE_WRITE;
|
| 2373 |
|
|
up(&s->open_sem_dac);
|
| 2374 |
|
|
wake_up(&s->open_wait_dac);
|
| 2375 |
|
|
MOD_DEC_USE_COUNT;
|
| 2376 |
|
|
}
|
| 2377 |
|
|
if (file->f_mode & FMODE_READ) {
|
| 2378 |
|
|
drain_adc(s, file->f_flags & O_NONBLOCK);
|
| 2379 |
|
|
down(&s->open_sem_adc);
|
| 2380 |
|
|
stop_adc(s);
|
| 2381 |
|
|
dealloc_dmabuf(s, &s->dma_adc);
|
| 2382 |
|
|
s->open_mode &= ~FMODE_READ;
|
| 2383 |
|
|
up(&s->open_sem_adc);
|
| 2384 |
|
|
wake_up(&s->open_wait_adc);
|
| 2385 |
|
|
MOD_DEC_USE_COUNT;
|
| 2386 |
|
|
}
|
| 2387 |
|
|
return 0;
|
| 2388 |
|
|
}
|
| 2389 |
|
|
|
| 2390 |
|
|
static int cs4297a_open(struct inode *inode, struct file *file)
|
| 2391 |
|
|
{
|
| 2392 |
|
|
int minor = MINOR(inode->i_rdev);
|
| 2393 |
|
|
struct cs4297a_state *s=NULL;
|
| 2394 |
|
|
struct list_head *entry;
|
| 2395 |
|
|
|
| 2396 |
|
|
CS_DBGOUT(CS_FUNCTION | CS_OPEN, 2, printk(KERN_INFO
|
| 2397 |
|
|
"cs4297a: cs4297a_open(): inode=0x%.8x file=0x%.8x f_mode=0x%x\n",
|
| 2398 |
|
|
(unsigned) inode, (unsigned) file, file->f_mode));
|
| 2399 |
|
|
CS_DBGOUT(CS_FUNCTION | CS_OPEN, 2, printk(KERN_INFO
|
| 2400 |
|
|
"cs4297a: status = %08x\n", (int)in64(SS_CSR(R_SER_STATUS_DEBUG))));
|
| 2401 |
|
|
|
| 2402 |
|
|
list_for_each(entry, &cs4297a_devs)
|
| 2403 |
|
|
{
|
| 2404 |
|
|
s = list_entry(entry, struct cs4297a_state, list);
|
| 2405 |
|
|
|
| 2406 |
|
|
if (!((s->dev_audio ^ minor) & ~0xf))
|
| 2407 |
|
|
break;
|
| 2408 |
|
|
}
|
| 2409 |
|
|
if (entry == &cs4297a_devs)
|
| 2410 |
|
|
return -ENODEV;
|
| 2411 |
|
|
if (!s) {
|
| 2412 |
|
|
CS_DBGOUT(CS_FUNCTION | CS_OPEN, 2, printk(KERN_INFO
|
| 2413 |
|
|
"cs4297a: cs4297a_open(): Error - unable to find audio state struct\n"));
|
| 2414 |
|
|
return -ENODEV;
|
| 2415 |
|
|
}
|
| 2416 |
|
|
VALIDATE_STATE(s);
|
| 2417 |
|
|
file->private_data = s;
|
| 2418 |
|
|
|
| 2419 |
|
|
// wait for device to become free
|
| 2420 |
|
|
if (!(file->f_mode & (FMODE_WRITE | FMODE_READ))) {
|
| 2421 |
|
|
CS_DBGOUT(CS_FUNCTION | CS_OPEN | CS_ERROR, 2, printk(KERN_INFO
|
| 2422 |
|
|
"cs4297a: cs4297a_open(): Error - must open READ and/or WRITE\n"));
|
| 2423 |
|
|
return -ENODEV;
|
| 2424 |
|
|
}
|
| 2425 |
|
|
if (file->f_mode & FMODE_WRITE) {
|
| 2426 |
|
|
if (in64(SS_CSR(R_SER_DMA_DSCR_COUNT_TX)) != 0) {
|
| 2427 |
|
|
printk(KERN_ERR "cs4297a: TX pipe needs to drain\n");
|
| 2428 |
|
|
while (in64(SS_CSR(R_SER_DMA_DSCR_COUNT_TX)))
|
| 2429 |
|
|
;
|
| 2430 |
|
|
}
|
| 2431 |
|
|
|
| 2432 |
|
|
down(&s->open_sem_dac);
|
| 2433 |
|
|
while (s->open_mode & FMODE_WRITE) {
|
| 2434 |
|
|
if (file->f_flags & O_NONBLOCK) {
|
| 2435 |
|
|
up(&s->open_sem_dac);
|
| 2436 |
|
|
return -EBUSY;
|
| 2437 |
|
|
}
|
| 2438 |
|
|
up(&s->open_sem_dac);
|
| 2439 |
|
|
interruptible_sleep_on(&s->open_wait_dac);
|
| 2440 |
|
|
|
| 2441 |
|
|
if (signal_pending(current)) {
|
| 2442 |
|
|
printk("open - sig pending\n");
|
| 2443 |
|
|
return -ERESTARTSYS;
|
| 2444 |
|
|
}
|
| 2445 |
|
|
down(&s->open_sem_dac);
|
| 2446 |
|
|
}
|
| 2447 |
|
|
}
|
| 2448 |
|
|
if (file->f_mode & FMODE_READ) {
|
| 2449 |
|
|
down(&s->open_sem_adc);
|
| 2450 |
|
|
while (s->open_mode & FMODE_READ) {
|
| 2451 |
|
|
if (file->f_flags & O_NONBLOCK) {
|
| 2452 |
|
|
up(&s->open_sem_adc);
|
| 2453 |
|
|
return -EBUSY;
|
| 2454 |
|
|
}
|
| 2455 |
|
|
up(&s->open_sem_adc);
|
| 2456 |
|
|
interruptible_sleep_on(&s->open_wait_adc);
|
| 2457 |
|
|
|
| 2458 |
|
|
if (signal_pending(current)) {
|
| 2459 |
|
|
printk("open - sig pending\n");
|
| 2460 |
|
|
return -ERESTARTSYS;
|
| 2461 |
|
|
}
|
| 2462 |
|
|
down(&s->open_sem_adc);
|
| 2463 |
|
|
}
|
| 2464 |
|
|
}
|
| 2465 |
|
|
s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
|
| 2466 |
|
|
if (file->f_mode & FMODE_READ) {
|
| 2467 |
|
|
s->prop_adc.fmt = AFMT_S16_BE;
|
| 2468 |
|
|
s->prop_adc.fmt_original = s->prop_adc.fmt;
|
| 2469 |
|
|
s->prop_adc.channels = 2;
|
| 2470 |
|
|
s->prop_adc.rate = 48000;
|
| 2471 |
|
|
s->conversion = 0;
|
| 2472 |
|
|
s->ena &= ~FMODE_READ;
|
| 2473 |
|
|
s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags =
|
| 2474 |
|
|
s->dma_adc.subdivision = 0;
|
| 2475 |
|
|
up(&s->open_sem_adc);
|
| 2476 |
|
|
MOD_INC_USE_COUNT;
|
| 2477 |
|
|
|
| 2478 |
|
|
if (prog_dmabuf_adc(s)) {
|
| 2479 |
|
|
CS_DBGOUT(CS_OPEN | CS_ERROR, 2, printk(KERN_ERR
|
| 2480 |
|
|
"cs4297a: adc Program dmabufs failed.\n"));
|
| 2481 |
|
|
cs4297a_release(inode, file);
|
| 2482 |
|
|
return -ENOMEM;
|
| 2483 |
|
|
}
|
| 2484 |
|
|
}
|
| 2485 |
|
|
if (file->f_mode & FMODE_WRITE) {
|
| 2486 |
|
|
s->prop_dac.fmt = AFMT_S16_BE;
|
| 2487 |
|
|
s->prop_dac.fmt_original = s->prop_dac.fmt;
|
| 2488 |
|
|
s->prop_dac.channels = 2;
|
| 2489 |
|
|
s->prop_dac.rate = 48000;
|
| 2490 |
|
|
s->conversion = 0;
|
| 2491 |
|
|
s->ena &= ~FMODE_WRITE;
|
| 2492 |
|
|
s->dma_dac.ossfragshift = s->dma_dac.ossmaxfrags =
|
| 2493 |
|
|
s->dma_dac.subdivision = 0;
|
| 2494 |
|
|
up(&s->open_sem_dac);
|
| 2495 |
|
|
MOD_INC_USE_COUNT;
|
| 2496 |
|
|
|
| 2497 |
|
|
if (prog_dmabuf_dac(s)) {
|
| 2498 |
|
|
CS_DBGOUT(CS_OPEN | CS_ERROR, 2, printk(KERN_ERR
|
| 2499 |
|
|
"cs4297a: dac Program dmabufs failed.\n"));
|
| 2500 |
|
|
cs4297a_release(inode, file);
|
| 2501 |
|
|
return -ENOMEM;
|
| 2502 |
|
|
}
|
| 2503 |
|
|
}
|
| 2504 |
|
|
CS_DBGOUT(CS_FUNCTION | CS_OPEN, 2,
|
| 2505 |
|
|
printk(KERN_INFO "cs4297a: cs4297a_open()- 0\n"));
|
| 2506 |
|
|
return 0;
|
| 2507 |
|
|
}
|
| 2508 |
|
|
|
| 2509 |
|
|
|
| 2510 |
|
|
// ******************************************************************************************
|
| 2511 |
|
|
// Wave (audio) file operations struct.
|
| 2512 |
|
|
// ******************************************************************************************
|
| 2513 |
|
|
static /*const */ struct file_operations cs4297a_audio_fops = {
|
| 2514 |
|
|
llseek:cs4297a_llseek,
|
| 2515 |
|
|
read:cs4297a_read,
|
| 2516 |
|
|
write:cs4297a_write,
|
| 2517 |
|
|
poll:cs4297a_poll,
|
| 2518 |
|
|
ioctl:cs4297a_ioctl,
|
| 2519 |
|
|
mmap:cs4297a_mmap,
|
| 2520 |
|
|
open:cs4297a_open,
|
| 2521 |
|
|
release:cs4297a_release,
|
| 2522 |
|
|
};
|
| 2523 |
|
|
|
| 2524 |
|
|
static void cs4297a_interrupt(int irq, void *dev_id, struct pt_regs *regs)
|
| 2525 |
|
|
{
|
| 2526 |
|
|
struct cs4297a_state *s = (struct cs4297a_state *) dev_id;
|
| 2527 |
|
|
u32 status;
|
| 2528 |
|
|
|
| 2529 |
|
|
status = in64(SS_CSR(R_SER_STATUS_DEBUG));
|
| 2530 |
|
|
|
| 2531 |
|
|
CS_DBGOUT(CS_INTERRUPT, 6, printk(KERN_INFO
|
| 2532 |
|
|
"cs4297a: cs4297a_interrupt() HISR=0x%.8x\n", status));
|
| 2533 |
|
|
|
| 2534 |
|
|
#if 0
|
| 2535 |
|
|
/* XXXKW what check *should* be done here? */
|
| 2536 |
|
|
if (!(status & (M_SYNCSER_RX_EOP_COUNT | M_SYNCSER_RX_OVERRUN | M_SYNCSER_RX_SYNC_ERR))) {
|
| 2537 |
|
|
status = in64(SS_CSR(R_SER_STATUS));
|
| 2538 |
|
|
printk(KERN_ERR "cs4297a: unexpected interrupt (status %08x)\n", status);
|
| 2539 |
|
|
return;
|
| 2540 |
|
|
}
|
| 2541 |
|
|
#endif
|
| 2542 |
|
|
|
| 2543 |
|
|
if (status & M_SYNCSER_RX_SYNC_ERR) {
|
| 2544 |
|
|
status = in64(SS_CSR(R_SER_STATUS));
|
| 2545 |
|
|
printk(KERN_ERR "cs4297a: rx sync error (status %08x)\n", status);
|
| 2546 |
|
|
return;
|
| 2547 |
|
|
}
|
| 2548 |
|
|
|
| 2549 |
|
|
if (status & M_SYNCSER_RX_OVERRUN) {
|
| 2550 |
|
|
int newptr, i;
|
| 2551 |
|
|
s->stats.rx_ovrrn++;
|
| 2552 |
|
|
printk(KERN_ERR "cs4297a: receive FIFO overrun\n");
|
| 2553 |
|
|
|
| 2554 |
|
|
/* Fix things up: get the receive descriptor pool
|
| 2555 |
|
|
clean and give them back to the hardware */
|
| 2556 |
|
|
while (in64(SS_CSR(R_SER_DMA_DSCR_COUNT_RX)))
|
| 2557 |
|
|
;
|
| 2558 |
|
|
newptr = (unsigned) (((in64(SS_CSR(R_SER_DMA_CUR_DSCR_ADDR_RX)) & M_DMA_CURDSCR_ADDR) -
|
| 2559 |
|
|
s->dma_adc.descrtab_phys) / sizeof(serdma_descr_t));
|
| 2560 |
|
|
for (i=0; i<DMA_DESCR; i++) {
|
| 2561 |
|
|
s->dma_adc.descrtab[i].descr_a &= ~M_DMA_SERRX_SOP;
|
| 2562 |
|
|
}
|
| 2563 |
|
|
s->dma_adc.swptr = s->dma_adc.hwptr = newptr;
|
| 2564 |
|
|
s->dma_adc.count = 0;
|
| 2565 |
|
|
s->dma_adc.sb_swptr = s->dma_adc.sb_hwptr = s->dma_adc.sample_buf;
|
| 2566 |
|
|
out64(DMA_DESCR, SS_CSR(R_SER_DMA_DSCR_COUNT_RX));
|
| 2567 |
|
|
}
|
| 2568 |
|
|
|
| 2569 |
|
|
spin_lock(&s->lock);
|
| 2570 |
|
|
cs4297a_update_ptr(s,CS_TRUE);
|
| 2571 |
|
|
spin_unlock(&s->lock);
|
| 2572 |
|
|
|
| 2573 |
|
|
CS_DBGOUT(CS_INTERRUPT, 6, printk(KERN_INFO
|
| 2574 |
|
|
"cs4297a: cs4297a_interrupt()-\n"));
|
| 2575 |
|
|
}
|
| 2576 |
|
|
|
| 2577 |
|
|
#if 0
|
| 2578 |
|
|
static struct initvol {
|
| 2579 |
|
|
int mixch;
|
| 2580 |
|
|
int vol;
|
| 2581 |
|
|
} initvol[] __initdata = {
|
| 2582 |
|
|
|
| 2583 |
|
|
{SOUND_MIXER_WRITE_VOLUME, 0x4040},
|
| 2584 |
|
|
{SOUND_MIXER_WRITE_PCM, 0x4040},
|
| 2585 |
|
|
{SOUND_MIXER_WRITE_SYNTH, 0x4040},
|
| 2586 |
|
|
{SOUND_MIXER_WRITE_CD, 0x4040},
|
| 2587 |
|
|
{SOUND_MIXER_WRITE_LINE, 0x4040},
|
| 2588 |
|
|
{SOUND_MIXER_WRITE_LINE1, 0x4040},
|
| 2589 |
|
|
{SOUND_MIXER_WRITE_RECLEV, 0x0000},
|
| 2590 |
|
|
{SOUND_MIXER_WRITE_SPEAKER, 0x4040},
|
| 2591 |
|
|
{SOUND_MIXER_WRITE_MIC, 0x0000}
|
| 2592 |
|
|
};
|
| 2593 |
|
|
#endif
|
| 2594 |
|
|
|
| 2595 |
|
|
static int __init cs4297a_init(void)
|
| 2596 |
|
|
{
|
| 2597 |
|
|
struct cs4297a_state *s;
|
| 2598 |
|
|
u32 pwr, id;
|
| 2599 |
|
|
mm_segment_t fs;
|
| 2600 |
|
|
int rval;
|
| 2601 |
|
|
#ifndef CONFIG_BCM_CS4297A_CSWARM
|
| 2602 |
|
|
u64 cfg;
|
| 2603 |
|
|
int mdio_val;
|
| 2604 |
|
|
#endif
|
| 2605 |
|
|
|
| 2606 |
|
|
CS_DBGOUT(CS_INIT | CS_FUNCTION, 2, printk(KERN_INFO
|
| 2607 |
|
|
"cs4297a: cs4297a_init_module()+ \n"));
|
| 2608 |
|
|
|
| 2609 |
|
|
#ifndef CONFIG_BCM_CS4297A_CSWARM
|
| 2610 |
|
|
mdio_val = in64(KSEG1 + A_MAC_REGISTER(2, R_MAC_MDIO)) &
|
| 2611 |
|
|
(M_MAC_MDIO_DIR|M_MAC_MDIO_OUT);
|
| 2612 |
|
|
|
| 2613 |
|
|
/* Check syscfg for synchronous serial on port 1 */
|
| 2614 |
|
|
cfg = in64(KSEG1 + A_SCD_SYSTEM_CFG);
|
| 2615 |
|
|
if (!(cfg & M_SYS_SER1_ENABLE)) {
|
| 2616 |
|
|
out64(cfg | M_SYS_SER1_ENABLE, KSEG1+A_SCD_SYSTEM_CFG);
|
| 2617 |
|
|
cfg = in64(KSEG1 + A_SCD_SYSTEM_CFG);
|
| 2618 |
|
|
if (!(cfg & M_SYS_SER1_ENABLE)) {
|
| 2619 |
|
|
printk(KERN_INFO "cs4297a: serial port 1 not configured for synchronous operation\n");
|
| 2620 |
|
|
return -1;
|
| 2621 |
|
|
}
|
| 2622 |
|
|
|
| 2623 |
|
|
printk(KERN_INFO "cs4297a: serial port 1 switching to synchronous operation\n");
|
| 2624 |
|
|
|
| 2625 |
|
|
/* Force the codec (on SWARM) to reset by clearing
|
| 2626 |
|
|
GENO, preserving MDIO (no effect on CSWARM) */
|
| 2627 |
|
|
out64(mdio_val, KSEG1+A_MAC_REGISTER(2, R_MAC_MDIO));
|
| 2628 |
|
|
udelay(10);
|
| 2629 |
|
|
}
|
| 2630 |
|
|
|
| 2631 |
|
|
/* Now set GENO */
|
| 2632 |
|
|
out64(mdio_val | M_MAC_GENC, KSEG1+A_MAC_REGISTER(2, R_MAC_MDIO));
|
| 2633 |
|
|
/* Give the codec some time to finish resetting (start the bit clock) */
|
| 2634 |
|
|
udelay(100);
|
| 2635 |
|
|
#endif
|
| 2636 |
|
|
|
| 2637 |
|
|
if (!(s = kmalloc(sizeof(struct cs4297a_state), GFP_KERNEL))) {
|
| 2638 |
|
|
CS_DBGOUT(CS_ERROR, 1, printk(KERN_ERR
|
| 2639 |
|
|
"cs4297a: probe() no memory for state struct.\n"));
|
| 2640 |
|
|
return -1;
|
| 2641 |
|
|
}
|
| 2642 |
|
|
memset(s, 0, sizeof(struct cs4297a_state));
|
| 2643 |
|
|
s->magic = CS4297a_MAGIC;
|
| 2644 |
|
|
init_waitqueue_head(&s->dma_adc.wait);
|
| 2645 |
|
|
init_waitqueue_head(&s->dma_dac.wait);
|
| 2646 |
|
|
init_waitqueue_head(&s->dma_adc.reg_wait);
|
| 2647 |
|
|
init_waitqueue_head(&s->dma_dac.reg_wait);
|
| 2648 |
|
|
init_waitqueue_head(&s->open_wait);
|
| 2649 |
|
|
init_waitqueue_head(&s->open_wait_adc);
|
| 2650 |
|
|
init_waitqueue_head(&s->open_wait_dac);
|
| 2651 |
|
|
init_MUTEX(&s->open_sem_adc);
|
| 2652 |
|
|
init_MUTEX(&s->open_sem_dac);
|
| 2653 |
|
|
spin_lock_init(&s->lock);
|
| 2654 |
|
|
|
| 2655 |
|
|
s->irq = K_INT_SER_1;
|
| 2656 |
|
|
|
| 2657 |
|
|
if (request_irq
|
| 2658 |
|
|
(s->irq, cs4297a_interrupt, 0, "Crystal CS4297a", s)) {
|
| 2659 |
|
|
CS_DBGOUT(CS_INIT | CS_ERROR, 1,
|
| 2660 |
|
|
printk(KERN_ERR "cs4297a: irq %u in use\n", s->irq));
|
| 2661 |
|
|
goto err_irq;
|
| 2662 |
|
|
}
|
| 2663 |
|
|
if ((s->dev_audio = register_sound_dsp(&cs4297a_audio_fops, -1)) <
|
| 2664 |
|
|
0) {
|
| 2665 |
|
|
CS_DBGOUT(CS_INIT | CS_ERROR, 1, printk(KERN_ERR
|
| 2666 |
|
|
"cs4297a: probe() register_sound_dsp() failed.\n"));
|
| 2667 |
|
|
goto err_dev1;
|
| 2668 |
|
|
}
|
| 2669 |
|
|
if ((s->dev_mixer = register_sound_mixer(&cs4297a_mixer_fops, -1)) <
|
| 2670 |
|
|
0) {
|
| 2671 |
|
|
CS_DBGOUT(CS_INIT | CS_ERROR, 1, printk(KERN_ERR
|
| 2672 |
|
|
"cs4297a: probe() register_sound_mixer() failed.\n"));
|
| 2673 |
|
|
goto err_dev2;
|
| 2674 |
|
|
}
|
| 2675 |
|
|
|
| 2676 |
|
|
if (ser_init(s) || dma_init(s)) {
|
| 2677 |
|
|
CS_DBGOUT(CS_INIT | CS_ERROR, 1, printk(KERN_ERR
|
| 2678 |
|
|
"cs4297a: ser_init failed.\n"));
|
| 2679 |
|
|
goto err_dev3;
|
| 2680 |
|
|
}
|
| 2681 |
|
|
|
| 2682 |
|
|
do {
|
| 2683 |
|
|
udelay(4000);
|
| 2684 |
|
|
rval = cs4297a_read_ac97(s, AC97_POWER_CONTROL, &pwr);
|
| 2685 |
|
|
} while (!rval && (pwr != 0xf));
|
| 2686 |
|
|
|
| 2687 |
|
|
if (!rval) {
|
| 2688 |
|
|
fs = get_fs();
|
| 2689 |
|
|
set_fs(KERNEL_DS);
|
| 2690 |
|
|
#if 0
|
| 2691 |
|
|
val = SOUND_MASK_LINE;
|
| 2692 |
|
|
mixer_ioctl(s, SOUND_MIXER_WRITE_RECSRC, (unsigned long) &val);
|
| 2693 |
|
|
for (i = 0; i < sizeof(initvol) / sizeof(initvol[0]); i++) {
|
| 2694 |
|
|
val = initvol[i].vol;
|
| 2695 |
|
|
mixer_ioctl(s, initvol[i].mixch, (unsigned long) &val);
|
| 2696 |
|
|
}
|
| 2697 |
|
|
// cs4297a_write_ac97(s, 0x18, 0x0808);
|
| 2698 |
|
|
#else
|
| 2699 |
|
|
// cs4297a_write_ac97(s, 0x5e, 0x180);
|
| 2700 |
|
|
cs4297a_write_ac97(s, 0x02, 0x0808);
|
| 2701 |
|
|
cs4297a_write_ac97(s, 0x18, 0x0808);
|
| 2702 |
|
|
#endif
|
| 2703 |
|
|
set_fs(fs);
|
| 2704 |
|
|
|
| 2705 |
|
|
list_add(&s->list, &cs4297a_devs);
|
| 2706 |
|
|
|
| 2707 |
|
|
cs4297a_read_ac97(s, AC97_VENDOR_ID1, &id);
|
| 2708 |
|
|
|
| 2709 |
|
|
#ifdef CONFIG_SIBYTE_SB1250_DUART
|
| 2710 |
|
|
sb1250_duart_present[1] = 0;
|
| 2711 |
|
|
#endif
|
| 2712 |
|
|
|
| 2713 |
|
|
printk(KERN_INFO "cs4297a: initialized (vendor id = %x)\n", id);
|
| 2714 |
|
|
|
| 2715 |
|
|
CS_DBGOUT(CS_INIT | CS_FUNCTION, 2,
|
| 2716 |
|
|
printk(KERN_INFO "cs4297a: cs4297a_init_module()-\n"));
|
| 2717 |
|
|
|
| 2718 |
|
|
return 0;
|
| 2719 |
|
|
}
|
| 2720 |
|
|
|
| 2721 |
|
|
err_dev3:
|
| 2722 |
|
|
unregister_sound_mixer(s->dev_mixer);
|
| 2723 |
|
|
err_dev2:
|
| 2724 |
|
|
unregister_sound_dsp(s->dev_audio);
|
| 2725 |
|
|
err_dev1:
|
| 2726 |
|
|
free_irq(s->irq, s);
|
| 2727 |
|
|
err_irq:
|
| 2728 |
|
|
kfree(s);
|
| 2729 |
|
|
|
| 2730 |
|
|
printk(KERN_INFO "cs4297a: initialization failed\n");
|
| 2731 |
|
|
|
| 2732 |
|
|
return -1;
|
| 2733 |
|
|
}
|
| 2734 |
|
|
|
| 2735 |
|
|
static void __exit cs4297a_cleanup(void)
|
| 2736 |
|
|
{
|
| 2737 |
|
|
/*
|
| 2738 |
|
|
XXXKW
|
| 2739 |
|
|
disable_irq, free_irq
|
| 2740 |
|
|
drain DMA queue
|
| 2741 |
|
|
disable DMA
|
| 2742 |
|
|
disable TX/RX
|
| 2743 |
|
|
free memory
|
| 2744 |
|
|
*/
|
| 2745 |
|
|
CS_DBGOUT(CS_INIT | CS_FUNCTION, 2,
|
| 2746 |
|
|
printk(KERN_INFO "cs4297a: cleanup_cs4297a() finished\n"));
|
| 2747 |
|
|
}
|
| 2748 |
|
|
|
| 2749 |
|
|
// ---------------------------------------------------------------------
|
| 2750 |
|
|
|
| 2751 |
|
|
EXPORT_NO_SYMBOLS;
|
| 2752 |
|
|
|
| 2753 |
|
|
MODULE_AUTHOR("Kip Walker, Broadcom Corp.");
|
| 2754 |
|
|
MODULE_DESCRIPTION("Cirrus Logic CS4297a Driver for Broadcom SWARM board");
|
| 2755 |
|
|
|
| 2756 |
|
|
// ---------------------------------------------------------------------
|
| 2757 |
|
|
|
| 2758 |
|
|
module_init(cs4297a_init);
|
| 2759 |
|
|
module_exit(cs4297a_cleanup);
|
