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[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [include/] [asm-alpha/] [rwsem.h] - Blame information for rev 1774

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1 1275 phoenix 
#ifndef _ALPHA_RWSEM_H
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#define _ALPHA_RWSEM_H
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/*
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 * Written by Ivan Kokshaysky <ink@jurassic.park.msu.ru>, 2001.
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 * Based on asm-alpha/semaphore.h and asm-i386/rwsem.h
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 */
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#ifndef _LINUX_RWSEM_H
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#error please dont include asm/rwsem.h directly, use linux/rwsem.h instead
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#endif
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#ifdef __KERNEL__
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#include <linux/compiler.h>
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#include <linux/list.h>
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#include <linux/spinlock.h>
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struct rwsem_waiter;
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extern struct rw_semaphore *rwsem_down_read_failed(struct rw_semaphore *sem);
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extern struct rw_semaphore *rwsem_down_write_failed(struct rw_semaphore *sem);
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extern struct rw_semaphore *rwsem_wake(struct rw_semaphore *);
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/*
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 * the semaphore definition
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 */
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struct rw_semaphore {
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        long                    count;
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#define RWSEM_UNLOCKED_VALUE            0x0000000000000000L
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#define RWSEM_ACTIVE_BIAS               0x0000000000000001L
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#define RWSEM_ACTIVE_MASK               0x00000000ffffffffL
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#define RWSEM_WAITING_BIAS              (-0x0000000100000000L)
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#define RWSEM_ACTIVE_READ_BIAS          RWSEM_ACTIVE_BIAS
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#define RWSEM_ACTIVE_WRITE_BIAS         (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
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        spinlock_t              wait_lock;
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        struct list_head        wait_list;
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#if RWSEM_DEBUG
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        int                     debug;
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#endif
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};
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#if RWSEM_DEBUG
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#define __RWSEM_DEBUG_INIT      , 0
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#else
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#define __RWSEM_DEBUG_INIT      /* */
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#endif
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#define __RWSEM_INITIALIZER(name) \
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        { RWSEM_UNLOCKED_VALUE, SPIN_LOCK_UNLOCKED, \
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        LIST_HEAD_INIT((name).wait_list) __RWSEM_DEBUG_INIT }
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#define DECLARE_RWSEM(name) \
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        struct rw_semaphore name = __RWSEM_INITIALIZER(name)
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static inline void init_rwsem(struct rw_semaphore *sem)
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{
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        sem->count = RWSEM_UNLOCKED_VALUE;
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        spin_lock_init(&sem->wait_lock);
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        INIT_LIST_HEAD(&sem->wait_list);
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#if RWSEM_DEBUG
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        sem->debug = 0;
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#endif
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}
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static inline void __down_read(struct rw_semaphore *sem)
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{
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        long oldcount;
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#ifndef CONFIG_SMP
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        oldcount = sem->count;
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        sem->count += RWSEM_ACTIVE_READ_BIAS;
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#else
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        long temp;
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        __asm__ __volatile__(
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        "1:     ldq_l   %0,%1\n"
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        "       addq    %0,%3,%2\n"
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        "       stq_c   %2,%1\n"
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        "       beq     %2,2f\n"
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        "       mb\n"
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        ".subsection 2\n"
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        "2:     br      1b\n"
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        ".previous"
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        :"=&r" (oldcount), "=m" (sem->count), "=&r" (temp)
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        :"Ir" (RWSEM_ACTIVE_READ_BIAS), "m" (sem->count) : "memory");
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#endif
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        if (__builtin_expect(oldcount < 0, 0))
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                rwsem_down_read_failed(sem);
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}
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/*
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 * trylock for reading -- returns 1 if successful, 0 if contention
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 */
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static inline int __down_read_trylock(struct rw_semaphore *sem)
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{
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        long old, new, res;
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        res = sem->count;
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        do {
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                new = res + RWSEM_ACTIVE_READ_BIAS;
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                if (new <= 0)
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                        break;
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                old = res;
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                res = cmpxchg(&sem->count, old, new);
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        } while (res != old);
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        return res >= 0 ? 1 : 0;
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}
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static inline void __down_write(struct rw_semaphore *sem)
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{
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        long oldcount;
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#ifndef CONFIG_SMP
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        oldcount = sem->count;
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        sem->count += RWSEM_ACTIVE_WRITE_BIAS;
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#else
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        long temp;
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        __asm__ __volatile__(
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        "1:     ldq_l   %0,%1\n"
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        "       addq    %0,%3,%2\n"
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        "       stq_c   %2,%1\n"
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        "       beq     %2,2f\n"
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        "       mb\n"
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        ".subsection 2\n"
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        "2:     br      1b\n"
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        ".previous"
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        :"=&r" (oldcount), "=m" (sem->count), "=&r" (temp)
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        :"Ir" (RWSEM_ACTIVE_WRITE_BIAS), "m" (sem->count) : "memory");
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#endif
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        if (__builtin_expect(oldcount, 0))
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                rwsem_down_write_failed(sem);
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}
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/*
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 * trylock for writing -- returns 1 if successful, 0 if contention
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 */
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static inline int __down_write_trylock(struct rw_semaphore *sem)
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{
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        long ret = cmpxchg(&sem->count, RWSEM_UNLOCKED_VALUE,
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                           RWSEM_ACTIVE_WRITE_BIAS);
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        if (ret == RWSEM_UNLOCKED_VALUE)
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                return 1;
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        return 0;
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}
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static inline void __up_read(struct rw_semaphore *sem)
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{
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        long oldcount;
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#ifndef CONFIG_SMP
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        oldcount = sem->count;
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        sem->count -= RWSEM_ACTIVE_READ_BIAS;
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#else
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        long temp;
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        __asm__ __volatile__(
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        "       mb\n"
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        "1:     ldq_l   %0,%1\n"
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        "       subq    %0,%3,%2\n"
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        "       stq_c   %2,%1\n"
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        "       beq     %2,2f\n"
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        ".subsection 2\n"
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        "2:     br      1b\n"
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        ".previous"
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        :"=&r" (oldcount), "=m" (sem->count), "=&r" (temp)
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        :"Ir" (RWSEM_ACTIVE_READ_BIAS), "m" (sem->count) : "memory");
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#endif
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        if (__builtin_expect(oldcount < 0, 0))
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                if ((int)oldcount - RWSEM_ACTIVE_READ_BIAS == 0)
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                        rwsem_wake(sem);
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}
168 
 
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static inline void __up_write(struct rw_semaphore *sem)
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{
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        long count;
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#ifndef CONFIG_SMP
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        sem->count -= RWSEM_ACTIVE_WRITE_BIAS;
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        count = sem->count;
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#else
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        long temp;
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        __asm__ __volatile__(
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        "       mb\n"
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        "1:     ldq_l   %0,%1\n"
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        "       subq    %0,%3,%2\n"
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        "       stq_c   %2,%1\n"
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        "       beq     %2,2f\n"
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        "       subq    %0,%3,%0\n"
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        ".subsection 2\n"
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        "2:     br      1b\n"
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        ".previous"
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        :"=&r" (count), "=m" (sem->count), "=&r" (temp)
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        :"Ir" (RWSEM_ACTIVE_WRITE_BIAS), "m" (sem->count) : "memory");
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#endif
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        if (__builtin_expect(count, 0))
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                if ((int)count == 0)
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                        rwsem_wake(sem);
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}
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static inline void rwsem_atomic_add(long val, struct rw_semaphore *sem)
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{
197 
#ifndef CONFIG_SMP
198 
        sem->count += val;
199 
#else
200 
        long temp;
201 
        __asm__ __volatile__(
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        "1:     ldq_l   %0,%1\n"
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        "       addq    %0,%2,%0\n"
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        "       stq_c   %0,%1\n"
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        "       beq     %0,2f\n"
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        ".subsection 2\n"
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        "2:     br      1b\n"
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        ".previous"
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        :"=&r" (temp), "=m" (sem->count)
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        :"Ir" (val), "m" (sem->count));
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#endif
212 
}
213 
 
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static inline long rwsem_atomic_update(long val, struct rw_semaphore *sem)
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{
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#ifndef CONFIG_SMP
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        sem->count += val;
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        return sem->count;
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#else
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        long ret, temp;
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        __asm__ __volatile__(
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        "1:     ldq_l   %0,%1\n"
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        "       addq    %0,%3,%2\n"
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        "       addq    %0,%3,%0\n"
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        "       stq_c   %2,%1\n"
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        "       beq     %2,2f\n"
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        ".subsection 2\n"
228 
        "2:     br      1b\n"
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        ".previous"
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        :"=&r" (ret), "=m" (sem->count), "=&r" (temp)
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        :"Ir" (val), "m" (sem->count));
232 
 
233 
        return ret;
234 
#endif
235 
}
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#endif /* __KERNEL__ */
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#endif /* _ALPHA_RWSEM_H */

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