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1275 |
phoenix |
#ifndef __ALPHA_UACCESS_H
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#define __ALPHA_UACCESS_H
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#include <linux/errno.h>
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#include <linux/sched.h>
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/*
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* The fs value determines whether argument validity checking should be
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* performed or not. If get_fs() == USER_DS, checking is performed, with
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* get_fs() == KERNEL_DS, checking is bypassed.
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*
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* Or at least it did once upon a time. Nowadays it is a mask that
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* defines which bits of the address space are off limits. This is a
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* wee bit faster than the above.
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*
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* For historical reasons, these macros are grossly misnamed.
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*/
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#define KERNEL_DS ((mm_segment_t) { 0UL })
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#define USER_DS ((mm_segment_t) { -0x40000000000UL })
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#define VERIFY_READ 0
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#define VERIFY_WRITE 1
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#define get_fs() (current->thread.fs)
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#define get_ds() (KERNEL_DS)
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#define set_fs(x) (current->thread.fs = (x))
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#define segment_eq(a,b) ((a).seg == (b).seg)
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/*
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* Is a address valid? This does a straighforward calculation rather
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* than tests.
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*
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* Address valid if:
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* - "addr" doesn't have any high-bits set
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* - AND "size" doesn't have any high-bits set
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* - AND "addr+size" doesn't have any high-bits set
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* - OR we are in kernel mode.
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*/
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#define __access_ok(addr,size,segment) \
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(((segment).seg & (addr | size | (addr+size))) == 0)
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#define access_ok(type,addr,size) \
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__access_ok(((unsigned long)(addr)),(size),get_fs())
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extern inline int verify_area(int type, const void * addr, unsigned long size)
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{
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return access_ok(type,addr,size) ? 0 : -EFAULT;
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}
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/*
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* These are the main single-value transfer routines. They automatically
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* use the right size if we just have the right pointer type.
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*
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* As the alpha uses the same address space for kernel and user
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* data, we can just do these as direct assignments. (Of course, the
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* exception handling means that it's no longer "just"...)
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*
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* Careful to not
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* (a) re-use the arguments for side effects (sizeof/typeof is ok)
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* (b) require any knowledge of processes at this stage
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*/
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#define put_user(x,ptr) \
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__put_user_check((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr)),get_fs())
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#define get_user(x,ptr) \
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__get_user_check((x),(ptr),sizeof(*(ptr)),get_fs())
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/*
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* The "__xxx" versions do not do address space checking, useful when
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* doing multiple accesses to the same area (the programmer has to do the
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* checks by hand with "access_ok()")
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*/
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#define __put_user(x,ptr) \
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__put_user_nocheck((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr)))
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#define __get_user(x,ptr) \
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__get_user_nocheck((x),(ptr),sizeof(*(ptr)))
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/*
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* The "lda %1, 2b-1b(%0)" bits are magic to get the assembler to
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* encode the bits we need for resolving the exception. See the
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* more extensive comments with fixup_inline_exception below for
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* more information.
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*/
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extern void __get_user_unknown(void);
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#define __get_user_nocheck(x,ptr,size) \
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({ \
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long __gu_err = 0, __gu_val; \
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switch (size) { \
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case 1: __get_user_8(ptr); break; \
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case 2: __get_user_16(ptr); break; \
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case 4: __get_user_32(ptr); break; \
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case 8: __get_user_64(ptr); break; \
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default: __get_user_unknown(); break; \
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} \
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(x) = (__typeof__(*(ptr))) __gu_val; \
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__gu_err; \
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})
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#define __get_user_check(x,ptr,size,segment) \
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({ \
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long __gu_err = -EFAULT, __gu_val = 0; \
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const __typeof__(*(ptr)) *__gu_addr = (ptr); \
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if (__access_ok((long)__gu_addr,size,segment)) { \
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__gu_err = 0; \
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switch (size) { \
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case 1: __get_user_8(__gu_addr); break; \
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case 2: __get_user_16(__gu_addr); break; \
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case 4: __get_user_32(__gu_addr); break; \
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case 8: __get_user_64(__gu_addr); break; \
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default: __get_user_unknown(); break; \
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} \
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} \
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(x) = (__typeof__(*(ptr))) __gu_val; \
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__gu_err; \
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})
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struct __large_struct { unsigned long buf[100]; };
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#define __m(x) (*(struct __large_struct *)(x))
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#define __get_user_64(addr) \
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__asm__("1: ldq %0,%2\n" \
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"2:\n" \
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".section __ex_table,\"a\"\n" \
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" .gprel32 1b\n" \
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" lda %0, 2b-1b(%1)\n" \
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".previous" \
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: "=r"(__gu_val), "=r"(__gu_err) \
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: "m"(__m(addr)), "1"(__gu_err))
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#define __get_user_32(addr) \
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__asm__("1: ldl %0,%2\n" \
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"2:\n" \
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".section __ex_table,\"a\"\n" \
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" .gprel32 1b\n" \
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" lda %0, 2b-1b(%1)\n" \
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".previous" \
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: "=r"(__gu_val), "=r"(__gu_err) \
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: "m"(__m(addr)), "1"(__gu_err))
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#ifdef __alpha_bwx__
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/* Those lucky bastards with ev56 and later CPUs can do byte/word moves. */
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#define __get_user_16(addr) \
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__asm__("1: ldwu %0,%2\n" \
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"2:\n" \
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".section __ex_table,\"a\"\n" \
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" .gprel32 1b\n" \
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" lda %0, 2b-1b(%1)\n" \
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".previous" \
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: "=r"(__gu_val), "=r"(__gu_err) \
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: "m"(__m(addr)), "1"(__gu_err))
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#define __get_user_8(addr) \
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__asm__("1: ldbu %0,%2\n" \
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"2:\n" \
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".section __ex_table,\"a\"\n" \
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" .gprel32 1b\n" \
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" lda %0, 2b-1b(%1)\n" \
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".previous" \
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: "=r"(__gu_val), "=r"(__gu_err) \
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: "m"(__m(addr)), "1"(__gu_err))
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#else
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/* Unfortunately, we can't get an unaligned access trap for the sub-word
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load, so we have to do a general unaligned operation. */
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#define __get_user_16(addr) \
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{ \
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long __gu_tmp; \
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__asm__("1: ldq_u %0,0(%3)\n" \
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"2: ldq_u %1,1(%3)\n" \
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" extwl %0,%3,%0\n" \
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" extwh %1,%3,%1\n" \
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" or %0,%1,%0\n" \
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"3:\n" \
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".section __ex_table,\"a\"\n" \
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" .gprel32 1b\n" \
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" lda %0, 3b-1b(%2)\n" \
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" .gprel32 2b\n" \
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" lda %0, 2b-1b(%2)\n" \
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".previous" \
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: "=&r"(__gu_val), "=&r"(__gu_tmp), "=r"(__gu_err) \
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: "r"(addr), "2"(__gu_err)); \
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}
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#define __get_user_8(addr) \
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__asm__("1: ldq_u %0,0(%2)\n" \
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" extbl %0,%2,%0\n" \
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"2:\n" \
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".section __ex_table,\"a\"\n" \
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" .gprel32 1b\n" \
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" lda %0, 2b-1b(%1)\n" \
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".previous" \
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: "=&r"(__gu_val), "=r"(__gu_err) \
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: "r"(addr), "1"(__gu_err))
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#endif
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extern void __put_user_unknown(void);
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#define __put_user_nocheck(x,ptr,size) \
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({ \
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long __pu_err = 0; \
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switch (size) { \
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case 1: __put_user_8(x,ptr); break; \
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case 2: __put_user_16(x,ptr); break; \
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case 4: __put_user_32(x,ptr); break; \
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case 8: __put_user_64(x,ptr); break; \
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default: __put_user_unknown(); break; \
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} \
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__pu_err; \
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})
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#define __put_user_check(x,ptr,size,segment) \
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({ \
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long __pu_err = -EFAULT; \
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__typeof__(*(ptr)) *__pu_addr = (ptr); \
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if (__access_ok((long)__pu_addr,size,segment)) { \
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__pu_err = 0; \
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switch (size) { \
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case 1: __put_user_8(x,__pu_addr); break; \
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case 2: __put_user_16(x,__pu_addr); break; \
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case 4: __put_user_32(x,__pu_addr); break; \
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case 8: __put_user_64(x,__pu_addr); break; \
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default: __put_user_unknown(); break; \
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} \
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} \
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__pu_err; \
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})
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/*
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* The "__put_user_xx()" macros tell gcc they read from memory
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* instead of writing: this is because they do not write to
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* any memory gcc knows about, so there are no aliasing issues
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*/
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#define __put_user_64(x,addr) \
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__asm__ __volatile__("1: stq %r2,%1\n" \
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"2:\n" \
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".section __ex_table,\"a\"\n" \
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" .gprel32 1b\n" \
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" lda $31,2b-1b(%0)\n" \
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".previous" \
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: "=r"(__pu_err) \
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: "m" (__m(addr)), "rJ" (x), "0"(__pu_err))
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#define __put_user_32(x,addr) \
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__asm__ __volatile__("1: stl %r2,%1\n" \
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"2:\n" \
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".section __ex_table,\"a\"\n" \
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" .gprel32 1b\n" \
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" lda $31,2b-1b(%0)\n" \
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".previous" \
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: "=r"(__pu_err) \
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: "m"(__m(addr)), "rJ"(x), "0"(__pu_err))
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#ifdef __alpha_bwx__
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/* Those lucky bastards with ev56 and later CPUs can do byte/word moves. */
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#define __put_user_16(x,addr) \
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__asm__ __volatile__("1: stw %r2,%1\n" \
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"2:\n" \
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".section __ex_table,\"a\"\n" \
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" .gprel32 1b\n" \
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" lda $31,2b-1b(%0)\n" \
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".previous" \
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: "=r"(__pu_err) \
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: "m"(__m(addr)), "rJ"(x), "0"(__pu_err))
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#define __put_user_8(x,addr) \
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__asm__ __volatile__("1: stb %r2,%1\n" \
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"2:\n" \
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".section __ex_table,\"a\"\n" \
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" .gprel32 1b\n" \
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" lda $31,2b-1b(%0)\n" \
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".previous" \
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: "=r"(__pu_err) \
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: "m"(__m(addr)), "rJ"(x), "0"(__pu_err))
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#else
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/* Unfortunately, we can't get an unaligned access trap for the sub-word
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write, so we have to do a general unaligned operation. */
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#define __put_user_16(x,addr) \
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{ \
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long __pu_tmp1, __pu_tmp2, __pu_tmp3, __pu_tmp4; \
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__asm__ __volatile__( \
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"1: ldq_u %2,1(%5)\n" \
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"2: ldq_u %1,0(%5)\n" \
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" inswh %6,%5,%4\n" \
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" inswl %6,%5,%3\n" \
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" mskwh %2,%5,%2\n" \
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" mskwl %1,%5,%1\n" \
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" or %2,%4,%2\n" \
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" or %1,%3,%1\n" \
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"3: stq_u %2,1(%5)\n" \
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"4: stq_u %1,0(%5)\n" \
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"5:\n" \
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".section __ex_table,\"a\"\n" \
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" .gprel32 1b\n" \
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" lda $31, 5b-1b(%0)\n" \
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" .gprel32 2b\n" \
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" lda $31, 5b-2b(%0)\n" \
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" .gprel32 3b\n" \
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" lda $31, 5b-3b(%0)\n" \
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" .gprel32 4b\n" \
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" lda $31, 5b-4b(%0)\n" \
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".previous" \
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: "=r"(__pu_err), "=&r"(__pu_tmp1), \
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"=&r"(__pu_tmp2), "=&r"(__pu_tmp3), \
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"=&r"(__pu_tmp4) \
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: "r"(addr), "r"((unsigned long)(x)), "0"(__pu_err)); \
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}
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#define __put_user_8(x,addr) \
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{ \
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long __pu_tmp1, __pu_tmp2; \
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__asm__ __volatile__( \
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"1: ldq_u %1,0(%4)\n" \
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" insbl %3,%4,%2\n" \
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" mskbl %1,%4,%1\n" \
|
323 |
|
|
" or %1,%2,%1\n" \
|
324 |
|
|
"2: stq_u %1,0(%4)\n" \
|
325 |
|
|
"3:\n" \
|
326 |
|
|
".section __ex_table,\"a\"\n" \
|
327 |
|
|
" .gprel32 1b\n" \
|
328 |
|
|
" lda $31, 3b-1b(%0)\n" \
|
329 |
|
|
" .gprel32 2b\n" \
|
330 |
|
|
" lda $31, 3b-2b(%0)\n" \
|
331 |
|
|
".previous" \
|
332 |
|
|
: "=r"(__pu_err), \
|
333 |
|
|
"=&r"(__pu_tmp1), "=&r"(__pu_tmp2) \
|
334 |
|
|
: "r"((unsigned long)(x)), "r"(addr), "0"(__pu_err)); \
|
335 |
|
|
}
|
336 |
|
|
#endif
|
337 |
|
|
|
338 |
|
|
|
339 |
|
|
/*
|
340 |
|
|
* Complex access routines
|
341 |
|
|
*/
|
342 |
|
|
|
343 |
|
|
extern void __copy_user(void);
|
344 |
|
|
|
345 |
|
|
extern inline long
|
346 |
|
|
__copy_tofrom_user_nocheck(void *to, const void *from, long len)
|
347 |
|
|
{
|
348 |
|
|
/* This little bit of silliness is to get the GP loaded for
|
349 |
|
|
a function that ordinarily wouldn't. Otherwise we could
|
350 |
|
|
have it done by the macro directly, which can be optimized
|
351 |
|
|
the linker. */
|
352 |
|
|
register void * pv __asm__("$27") = __copy_user;
|
353 |
|
|
|
354 |
|
|
register void * __cu_to __asm__("$6") = to;
|
355 |
|
|
register const void * __cu_from __asm__("$7") = from;
|
356 |
|
|
register long __cu_len __asm__("$0") = len;
|
357 |
|
|
|
358 |
|
|
__asm__ __volatile__(
|
359 |
|
|
"jsr $28,(%3),__copy_user\n\tldgp $29,0($28)"
|
360 |
|
|
: "=r" (__cu_len), "=r" (__cu_from), "=r" (__cu_to), "=r"(pv)
|
361 |
|
|
: "0" (__cu_len), "1" (__cu_from), "2" (__cu_to), "3"(pv)
|
362 |
|
|
: "$1","$2","$3","$4","$5","$28","memory");
|
363 |
|
|
|
364 |
|
|
return __cu_len;
|
365 |
|
|
}
|
366 |
|
|
|
367 |
|
|
extern inline long
|
368 |
|
|
__copy_tofrom_user(void *to, const void *from, long len, const void *validate)
|
369 |
|
|
{
|
370 |
|
|
if (__access_ok((long)validate, len, get_fs())) {
|
371 |
|
|
register void * pv __asm__("$27") = __copy_user;
|
372 |
|
|
register void * __cu_to __asm__("$6") = to;
|
373 |
|
|
register const void * __cu_from __asm__("$7") = from;
|
374 |
|
|
register long __cu_len __asm__("$0") = len;
|
375 |
|
|
__asm__ __volatile__(
|
376 |
|
|
"jsr $28,(%3),__copy_user\n\tldgp $29,0($28)"
|
377 |
|
|
: "=r"(__cu_len), "=r"(__cu_from), "=r"(__cu_to),
|
378 |
|
|
"=r" (pv)
|
379 |
|
|
: "0" (__cu_len), "1" (__cu_from), "2" (__cu_to),
|
380 |
|
|
"3" (pv)
|
381 |
|
|
: "$1","$2","$3","$4","$5","$28","memory");
|
382 |
|
|
len = __cu_len;
|
383 |
|
|
}
|
384 |
|
|
return len;
|
385 |
|
|
}
|
386 |
|
|
|
387 |
|
|
#define __copy_to_user(to,from,n) __copy_tofrom_user_nocheck((to),(from),(n))
|
388 |
|
|
#define __copy_from_user(to,from,n) __copy_tofrom_user_nocheck((to),(from),(n))
|
389 |
|
|
|
390 |
|
|
extern inline long
|
391 |
|
|
copy_to_user(void *to, const void *from, long n)
|
392 |
|
|
{
|
393 |
|
|
return __copy_tofrom_user(to, from, n, to);
|
394 |
|
|
}
|
395 |
|
|
|
396 |
|
|
extern inline long
|
397 |
|
|
copy_from_user(void *to, const void *from, long n)
|
398 |
|
|
{
|
399 |
|
|
return __copy_tofrom_user(to, from, n, from);
|
400 |
|
|
}
|
401 |
|
|
|
402 |
|
|
extern void __do_clear_user(void);
|
403 |
|
|
|
404 |
|
|
extern inline long
|
405 |
|
|
__clear_user(void *to, long len)
|
406 |
|
|
{
|
407 |
|
|
/* This little bit of silliness is to get the GP loaded for
|
408 |
|
|
a function that ordinarily wouldn't. Otherwise we could
|
409 |
|
|
have it done by the macro directly, which can be optimized
|
410 |
|
|
the linker. */
|
411 |
|
|
register void * pv __asm__("$27") = __do_clear_user;
|
412 |
|
|
|
413 |
|
|
register void * __cl_to __asm__("$6") = to;
|
414 |
|
|
register long __cl_len __asm__("$0") = len;
|
415 |
|
|
__asm__ __volatile__(
|
416 |
|
|
"jsr $28,(%2),__do_clear_user\n\tldgp $29,0($28)"
|
417 |
|
|
: "=r"(__cl_len), "=r"(__cl_to), "=r"(pv)
|
418 |
|
|
: "0"(__cl_len), "1"(__cl_to), "2"(pv)
|
419 |
|
|
: "$1","$2","$3","$4","$5","$28","memory");
|
420 |
|
|
return __cl_len;
|
421 |
|
|
}
|
422 |
|
|
|
423 |
|
|
extern inline long
|
424 |
|
|
clear_user(void *to, long len)
|
425 |
|
|
{
|
426 |
|
|
if (__access_ok((long)to, len, get_fs())) {
|
427 |
|
|
register void * pv __asm__("$27") = __do_clear_user;
|
428 |
|
|
register void * __cl_to __asm__("$6") = to;
|
429 |
|
|
register long __cl_len __asm__("$0") = len;
|
430 |
|
|
__asm__ __volatile__(
|
431 |
|
|
"jsr $28,(%2),__do_clear_user\n\tldgp $29,0($28)"
|
432 |
|
|
: "=r"(__cl_len), "=r"(__cl_to), "=r"(pv)
|
433 |
|
|
: "0"(__cl_len), "1"(__cl_to), "2"(pv)
|
434 |
|
|
: "$1","$2","$3","$4","$5","$28","memory");
|
435 |
|
|
len = __cl_len;
|
436 |
|
|
}
|
437 |
|
|
return len;
|
438 |
|
|
}
|
439 |
|
|
|
440 |
|
|
/* Returns: -EFAULT if exception before terminator, N if the entire
|
441 |
|
|
buffer filled, else strlen. */
|
442 |
|
|
|
443 |
|
|
extern long __strncpy_from_user(char *__to, const char *__from, long __to_len);
|
444 |
|
|
|
445 |
|
|
extern inline long
|
446 |
|
|
strncpy_from_user(char *to, const char *from, long n)
|
447 |
|
|
{
|
448 |
|
|
long ret = -EFAULT;
|
449 |
|
|
if (__access_ok((long)from, 0, get_fs()))
|
450 |
|
|
ret = __strncpy_from_user(to, from, n);
|
451 |
|
|
return ret;
|
452 |
|
|
}
|
453 |
|
|
|
454 |
|
|
/* Returns: 0 if bad, string length+1 (memory size) of string if ok */
|
455 |
|
|
extern long __strlen_user(const char *);
|
456 |
|
|
|
457 |
|
|
extern inline long strlen_user(const char *str)
|
458 |
|
|
{
|
459 |
|
|
return access_ok(VERIFY_READ,str,0) ? __strlen_user(str) : 0;
|
460 |
|
|
}
|
461 |
|
|
|
462 |
|
|
/* Returns: 0 if exception before NUL or reaching the supplied limit (N),
|
463 |
|
|
* a value greater than N if the limit would be exceeded, else strlen. */
|
464 |
|
|
extern long __strnlen_user(const char *, long);
|
465 |
|
|
|
466 |
|
|
extern inline long strnlen_user(const char *str, long n)
|
467 |
|
|
{
|
468 |
|
|
return access_ok(VERIFY_READ,str,0) ? __strnlen_user(str, n) : 0;
|
469 |
|
|
}
|
470 |
|
|
|
471 |
|
|
/*
|
472 |
|
|
* About the exception table:
|
473 |
|
|
*
|
474 |
|
|
* - insn is a 32-bit offset off of the kernel's or module's gp.
|
475 |
|
|
* - nextinsn is a 16-bit offset off of the faulting instruction
|
476 |
|
|
* (not off of the *next* instruction as branches are).
|
477 |
|
|
* - errreg is the register in which to place -EFAULT.
|
478 |
|
|
* - valreg is the final target register for the load sequence
|
479 |
|
|
* and will be zeroed.
|
480 |
|
|
*
|
481 |
|
|
* Either errreg or valreg may be $31, in which case nothing happens.
|
482 |
|
|
*
|
483 |
|
|
* The exception fixup information "just so happens" to be arranged
|
484 |
|
|
* as in a MEM format instruction. This lets us emit our three
|
485 |
|
|
* values like so:
|
486 |
|
|
*
|
487 |
|
|
* lda valreg, nextinsn(errreg)
|
488 |
|
|
*
|
489 |
|
|
*/
|
490 |
|
|
|
491 |
|
|
struct exception_table_entry
|
492 |
|
|
{
|
493 |
|
|
signed int insn;
|
494 |
|
|
union exception_fixup {
|
495 |
|
|
unsigned unit;
|
496 |
|
|
struct {
|
497 |
|
|
signed int nextinsn : 16;
|
498 |
|
|
unsigned int errreg : 5;
|
499 |
|
|
unsigned int valreg : 5;
|
500 |
|
|
} bits;
|
501 |
|
|
} fixup;
|
502 |
|
|
};
|
503 |
|
|
|
504 |
|
|
/* Returns 0 if exception not found and fixup.unit otherwise. */
|
505 |
|
|
extern unsigned search_exception_table(unsigned long, unsigned long);
|
506 |
|
|
|
507 |
|
|
/* Returns the new pc */
|
508 |
|
|
#define fixup_exception(map_reg, fixup_unit, pc) \
|
509 |
|
|
({ \
|
510 |
|
|
union exception_fixup __fie_fixup; \
|
511 |
|
|
__fie_fixup.unit = fixup_unit; \
|
512 |
|
|
if (__fie_fixup.bits.valreg != 31) \
|
513 |
|
|
map_reg(__fie_fixup.bits.valreg) = 0; \
|
514 |
|
|
if (__fie_fixup.bits.errreg != 31) \
|
515 |
|
|
map_reg(__fie_fixup.bits.errreg) = -EFAULT; \
|
516 |
|
|
(pc) + __fie_fixup.bits.nextinsn; \
|
517 |
|
|
})
|
518 |
|
|
|
519 |
|
|
|
520 |
|
|
#endif /* __ALPHA_UACCESS_H */
|