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phoenix |
/*
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* linux/include/asm-arm/arch-at91rm9200/hardware.h
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*
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* Copyright (c) 2003 SAN People
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* Copyright (c) 2003 ATMEL
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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*/
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#ifndef __ASM_ARCH_HARDWARE_H
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#define __ASM_ARCH_HARDWARE_H
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#include <asm/sizes.h>
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#include <asm/arch/AT91RM9200.h>
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#include <asm/arch/AT91RM9200_SYS.h>
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#ifndef __ASSEMBLY__
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/*
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* The following variable is defined in arch/arm/mach-at91rm9200/core.c
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* It is a pointer to the AT91RM9200 system peripherals.
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*/
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extern AT91PS_SYS AT91_SYS;
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#endif
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/*
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* Remap the peripherals from address 0xFFFA0000 .. 0xFFFFFFFF
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* to 0xFEFA0000 .. 0xFF000000. (384Kb)
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*/
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#define AT91C_IO_PHYS_BASE 0xFFFA0000
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#define AT91C_IO_SIZE (0xFFFFFFFF - AT91C_IO_PHYS_BASE + 1)
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#define AT91C_IO_VIRT_BASE (0xFF000000 - AT91C_IO_SIZE)
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/* Convert a physical IO address to virtual IO address */
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#define AT91_IO_P2V(x) ((x) - AT91C_IO_PHYS_BASE + AT91C_IO_VIRT_BASE)
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/*
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* Virtual to Physical Address mapping for IO devices.
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*/
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#define AT91C_VA_BASE_SYS AT91_IO_P2V(AT91C_BASE_SYS)
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#define AT91C_VA_BASE_SPI AT91_IO_P2V(AT91C_BASE_SPI)
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#define AT91C_VA_BASE_SSC2 AT91_IO_P2V(AT91C_BASE_SSC2)
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#define AT91C_VA_BASE_SSC1 AT91_IO_P2V(AT91C_BASE_SSC1)
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#define AT91C_VA_BASE_SSC0 AT91_IO_P2V(AT91C_BASE_SSC0)
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#define AT91C_VA_BASE_US3 AT91_IO_P2V(AT91C_BASE_US3)
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#define AT91C_VA_BASE_US2 AT91_IO_P2V(AT91C_BASE_US2)
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#define AT91C_VA_BASE_US1 AT91_IO_P2V(AT91C_BASE_US1)
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#define AT91C_VA_BASE_US0 AT91_IO_P2V(AT91C_BASE_US0)
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#define AT91C_VA_BASE_EMAC AT91_IO_P2V(AT91C_BASE_EMAC)
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#define AT91C_VA_BASE_TWI AT91_IO_P2V(AT91C_BASE_TWI)
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#define AT91C_VA_BASE_MCI AT91_IO_P2V(AT91C_BASE_MCI)
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#define AT91C_VA_BASE_UDP AT91_IO_P2V(AT91C_BASE_UDP)
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#define AT91C_VA_BASE_TCB1 AT91_IO_P2V(AT91C_BASE_TCB1)
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#define AT91C_VA_BASE_TCB0 AT91_IO_P2V(AT91C_BASE_TCB0)
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#define AT91C_BASE_SRAM 0x00200000 /* Internal SRAM base address */
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#define AT91C_NR_UART 5 /* 4 USART3's and one DBGU port */
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/* Definition of interrupt priority levels */
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#define AT91C_AIC_PRIOR_0 AT91C_AIC_PRIOR_LOWEST
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#define AT91C_AIC_PRIOR_1 ((unsigned int) 0x1)
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#define AT91C_AIC_PRIOR_2 ((unsigned int) 0x2)
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#define AT91C_AIC_PRIOR_3 ((unsigned int) 0x3)
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#define AT91C_AIC_PRIOR_4 ((unsigned int) 0x4)
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#define AT91C_AIC_PRIOR_5 ((unsigned int) 0x5)
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#define AT91C_AIC_PRIOR_6 ((unsigned int) 0x6)
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#define AT91C_AIC_PRIOR_7 AT91C_AIC_PRIOR_HIGEST
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/*
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* Implementation specific hardware definitions.
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*/
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#ifdef CONFIG_ARCH_AT91RM9200DK
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#include <asm/arch/at91rm9200dk.h>
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#endif
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#endif
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