OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [include/] [asm-arm/] [arch-clps711x/] [io.h] - Blame information for rev 1765

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 1276 phoenix
/*
2
 *  linux/include/asm-arm/arch-clps711x/io.h
3
 *
4
 *  Copyright (C) 1999 ARM Limited
5
 *
6
 * This program is free software; you can redistribute it and/or modify
7
 * it under the terms of the GNU General Public License as published by
8
 * the Free Software Foundation; either version 2 of the License, or
9
 * (at your option) any later version.
10
 *
11
 * This program is distributed in the hope that it will be useful,
12
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14
 * GNU General Public License for more details.
15
 *
16
 * You should have received a copy of the GNU General Public License
17
 * along with this program; if not, write to the Free Software
18
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
19
 */
20
#ifndef __ASM_ARM_ARCH_IO_H
21
#define __ASM_ARM_ARCH_IO_H
22
 
23
#define IO_SPACE_LIMIT 0xffffffff
24
 
25
#define __io(a)                 ((a))
26
#define __mem_pci(a)            ((unsigned long)(a))
27
#define __mem_isa(a)            ((unsigned long)(a))
28
 
29
/*
30
 * Generic virtual read/write
31
 */
32
#define __arch_getw(a)          (*(volatile unsigned short *)(a))
33
#define __arch_putw(v,a)        (*(volatile unsigned short *)(a) = (v))
34
 
35
/*
36
 * ioremap support - validate a PCI memory address, and convert it
37
 * to a physical address for the page tables.
38
 */
39
#define iomem_valid_addr(iomem,size)    (1)
40
#define iomem_to_phys(iomem)            (iomem)
41
 
42
/*
43
 * We don't support ins[lb]/outs[lb].  Make them fault.
44
 */
45
#define __raw_readsb(p,d,l)     do { *(int *)0 = 0; } while (0)
46
#define __raw_readsl(p,d,l)     do { *(int *)0 = 0; } while (0)
47
#define __raw_writesb(p,d,l)    do { *(int *)0 = 0; } while (0)
48
#define __raw_writesl(p,d,l)    do { *(int *)0 = 0; } while (0)
49
 
50
#endif

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.