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[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [include/] [asm-arm/] [arch-epxa/] [hardware.h] - Blame information for rev 1774

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1 1276 phoenix
/*
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 *  linux/include/asm-arm/arch-epxa10/hardware.h
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 *
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 *  This file contains the hardware definitions of the Integrator.
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 *
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 *  Copyright (C) 1999 ARM Limited.
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 *  Copyright (C) 2001 Altera Corporation
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License as published by
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 * the Free Software Foundation; either version 2 of the License, or
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 * (at your option) any later version.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 *
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 * You should have received a copy of the GNU General Public License
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 * along with this program; if not, write to the Free Software
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 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
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 */
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#ifndef __ASM_ARCH_HARDWARE_H
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#define __ASM_ARCH_HARDWARE_H
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#include <asm/arch/platform.h>
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/*
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 * Where in virtual memory the IO devices (timers, system controllers
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 * and so on)
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 */
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#define IO_BASE                 0xf0000000                 // VA of IO 
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#define IO_SIZE                 0x10000000                 // How much?
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#define IO_START                EXC_REGISTERS_BASE              // PA of IO
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/* macro to get at IO space when running virtually */
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#define IO_ADDRESS(x) ((x) | 0xf0000000) 
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#define FLASH_VBASE             0xFE000000
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#ifdef  CONFIG_EPXA10DB
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#define FLASH_SIZE              0x01000000
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#else
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#define FLASH_SIZE              0x00800000
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#endif
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#define FLASH_START             EXC_EBI_BLOCK0_BASE
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#define FLASH_VADDR(x) ((x)|0xFE000000)
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/*
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 * Similar to above, but for PCI addresses (memory, IO, Config and the
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 * V3 chip itself).  WARNING: this has to mirror definitions in platform.h
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 */
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#if 0
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#define PCI_MEMORY_VADDR        0xe8000000
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#define PCI_CONFIG_VADDR        0xec000000
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#define PCI_V3_VADDR            0xed000000
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#define PCI_IO_VADDR            0xee000000
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#define PCIO_BASE               PCI_IO_VADDR
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#define PCIMEM_BASE             PCI_MEMORY_VADDR
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#define pcibios_assign_all_busses()     1
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#define PCIBIOS_MIN_IO          0x6000
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#define PCIBIOS_MIN_MEM         0x00100000
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#endif
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#endif
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