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[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [include/] [asm-arm/] [arch-l7200/] [hardware.h] - Blame information for rev 1774

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1 1276 phoenix
/*
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 * linux/include/asm-arm/arch-l7200/hardware.h
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 *
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 * Copyright (C) 2000 Rob Scott (rscott@mtrob.fdns.net)
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 *                    Steve Hill (sjhill@cotw.com)
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 *
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 * This file contains the hardware definitions for the
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 * LinkUp Systems L7200 SOC development board.
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 *
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 * Changelog:
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 *   02-01-2000  RS     Created L7200 version, derived from rpc code
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 *   03-21-2000 SJH     Cleaned up file
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 *   04-21-2000  RS     Changed mapping of I/O in virtual space
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 *   04-25-2000 SJH     Removed unused symbols and such
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 *   05-05-2000 SJH     Complete rewrite
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 *   07-31-2000 SJH     Added undocumented debug auxillary port to
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 *                      get at last two columns for keyboard driver
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 */
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#ifndef __ASM_ARCH_HARDWARE_H
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#define __ASM_ARCH_HARDWARE_H
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/* Hardware addresses of major areas.
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 *  *_START is the physical address
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 *  *_SIZE  is the size of the region
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 *  *_BASE  is the virtual address
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 */
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#define RAM_START               0xf0000000
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#define RAM_SIZE                0x02000000
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#define RAM_BASE                0xc0000000
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#define IO_START                0x80000000      /* I/O */
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#define IO_SIZE                 0x01000000
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#define IO_BASE                 0xd0000000
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#define IO_START_2              0x90000000      /* I/O */
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#define IO_SIZE_2               0x01000000
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#define IO_BASE_2               0xd1000000
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#define AUX_START               0x1a000000      /* AUX PORT */
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#define AUX_SIZE                0x01000000
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#define AUX_BASE                0xd2000000
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#define FLASH1_START            0x00000000      /* FLASH BANK 1 */
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#define FLASH1_SIZE             0x01000000
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#define FLASH1_BASE             0xd3000000
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#define FLASH2_START            0x10000000      /* FLASH BANK 2 */
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#define FLASH2_SIZE             0x01000000
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#define FLASH2_BASE             0xd4000000
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#define ISA_START               0x20000000      /* ISA */
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#define ISA_SIZE                0x20000000
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#define ISA_BASE                0xe0000000
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#define FLUSH_BASE_PHYS         0x40000000      /* ROM */
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#define FLUSH_BASE              0xdf000000
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#define PCIO_BASE               IO_BASE
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#endif

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