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[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [include/] [asm-arm/] [arch-omaha/] [system.h] - Blame information for rev 1765

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1 1276 phoenix
/*
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 *  linux/include/asm-arm/arch-omaha/system.h
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 *
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 *  Copyright (C) 1999-2002 ARM Limited
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 *  Copyright (C) 2000 Deep Blue Solutions Ltd
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License as published by
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 * the Free Software Foundation; either version 2 of the License, or
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 * (at your option) any later version.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 *
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 * You should have received a copy of the GNU General Public License
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 * along with this program; if not, write to the Free Software
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 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
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 */
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#ifndef __ASM_ARCH_SYSTEM_H
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#define __ASM_ARCH_SYSTEM_H
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#include <asm/io.h>
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#include <asm/arch/hardware.h>
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static void arch_idle(void)
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{
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        /*
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         * This should do all the clock switching
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         * and wait for interrupt tricks
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         */
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        cpu_do_idle(0);
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}
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static inline void arch_reset(char mode)
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{
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        volatile unsigned int wtcon = IO_ADDRESS(PLAT_PERIPHERAL_BASE+OMAHA_WTCON);
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        volatile unsigned int wtdat = IO_ADDRESS(PLAT_PERIPHERAL_BASE+OMAHA_WTDAT);
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        volatile unsigned int wtcnt = IO_ADDRESS(PLAT_PERIPHERAL_BASE+OMAHA_WTCNT);
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        // Let the watchdog bite. It will timeout and reset the CPU!
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        // Minimum count until the end
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        __raw_writel(1,wtdat);
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        __raw_writel(1,wtcnt);
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        // Enable wathdog in reset mode
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        __raw_writel(0x21,wtcon);
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        while(1);
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}
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#endif

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