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1276 |
phoenix |
/*
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* linux/include/asm-arm/arch-omaha/time.h
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <asm/system.h>
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#include <asm/leds.h>
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#define TIMER_INTERVAL mSEC_10
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extern unsigned long (*gettimeoffset)(void);
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/*
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* Returns number of ms since last clock interrupt. Note that interrupts
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* will have been disabled by do_gettimeoffset()
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*/
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static unsigned long omaha_gettimeoffset(void)
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{
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volatile unsigned int *p;
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unsigned long ticks1, ticks2;
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/*
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* Get the current number of ticks. Note that there is a race
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* condition between us reading the timer and checking for
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* an interrupt. We get around this by ensuring that the
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* counter has not reloaded between our two reads.
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*/
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p = (unsigned int *)(IO_ADDRESS(PLAT_PERIPHERAL_BASE+OMAHA_TCNTB0));
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// Its only 16-bits
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ticks2 = __raw_readl(p);
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do {
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ticks1 = ticks2;
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ticks2 = __raw_readl(p);
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} while (ticks2 > ticks1);
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/*
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* Number of ticks since last interrupt.
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*/
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ticks1 = TIMER_INTERVAL - ticks2;
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// Return number of usecs since last interrupt
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return ticks1;
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}
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/*
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* IRQ handler for the timer
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*/
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static void omaha_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
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{
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volatile unsigned int *p;
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int tmp;
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// Clear the interrupt pending register
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p = (unsigned int *)(IO_ADDRESS(PLAT_PERIPHERAL_BASE+OMAHA_SRCPND));
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tmp = __raw_readl(p);
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tmp = tmp & ~OMAHA_INT_TIMER0;
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__raw_writel(tmp, p);
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do_leds();
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do_timer(regs);
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do_profile(regs);
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}
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/*
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* Set up timer interrupt, and return the current time in seconds.
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*
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* The bootloader ensures that the timer always counts at 1MHz.
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*/
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static inline void setup_timer(void)
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{
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volatile unsigned int *p;
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int tmp;
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timer_irq.handler = omaha_timer_interrupt;
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/*
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* Program reload count.
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*/
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p = (unsigned int *)(IO_ADDRESS(PLAT_PERIPHERAL_BASE+OMAHA_TCNTB0));
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__raw_writel(TIMER_INTERVAL, p);
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// Set manual update bit, clear start bit
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p = (unsigned int *)(IO_ADDRESS(PLAT_PERIPHERAL_BASE+OMAHA_TCON));
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tmp = __raw_readl(p);
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tmp = tmp | 0x2;
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tmp = tmp & ~0x1;
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__raw_writel(tmp, p);
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// Clear manual update bit and set start bit
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p = (unsigned int *)(IO_ADDRESS(PLAT_PERIPHERAL_BASE+OMAHA_TCON));
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tmp = __raw_readl(p);
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tmp = tmp & ~0x2;
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tmp = tmp | 0x1;
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__raw_writel(tmp, p);
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/*
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* Make irqs happen for the system timer
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*/
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setup_arm_irq(OMAHA_INT_TIMER0, &timer_irq);
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gettimeoffset = omaha_gettimeoffset;
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}
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