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[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [include/] [asm-arm/] [arch-riscstation/] [irq.h] - Blame information for rev 1276

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1 1276 phoenix 
/*
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 *  linux/include/asm-arm/arch-rpc/irq.h
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 *
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 *  Copyright (C) 1996 Russell King
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License version 2 as
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 * published by the Free Software Foundation.
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 *
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 *  Changelog:
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 *   10-10-1996 RMK     Brought up to date with arch-sa110eval
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 *   22-08-1998 RMK     Restructured IRQ routines
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 */
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#include <asm/hardware/iomd.h>
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#include <asm/io.h>
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#define fixup_irq(x) (x)
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static void rpc_mask_irq_ack_a(unsigned int irq)
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{
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        unsigned int val, mask;
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        mask = 1 << irq;
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        val = iomd_readb(IOMD_IRQMASKA);
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        iomd_writeb(val & ~mask, IOMD_IRQMASKA);
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        iomd_writeb(mask, IOMD_IRQCLRA);
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}
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static void rpc_mask_irq_a(unsigned int irq)
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{
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        unsigned int val, mask;
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        mask = 1 << irq;
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        val = iomd_readb(IOMD_IRQMASKA);
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        iomd_writeb(val & ~mask, IOMD_IRQMASKA);
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}
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static void rpc_unmask_irq_a(unsigned int irq)
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{
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        unsigned int val, mask;
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        mask = 1 << irq;
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        val = iomd_readb(IOMD_IRQMASKA);
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        iomd_writeb(val | mask, IOMD_IRQMASKA);
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}
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static void rpc_mask_irq_b(unsigned int irq)
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{
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        unsigned int val, mask;
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        mask = 1 << (irq & 7);
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        val = iomd_readb(IOMD_IRQMASKB);
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        iomd_writeb(val & ~mask, IOMD_IRQMASKB);
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}
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static void rpc_unmask_irq_b(unsigned int irq)
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{
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        unsigned int val, mask;
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        mask = 1 << (irq & 7);
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        val = iomd_readb(IOMD_IRQMASKB);
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        iomd_writeb(val | mask, IOMD_IRQMASKB);
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}
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static void rpc_mask_irq_c(unsigned int irq)
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{
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        unsigned int val, mask;
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        mask = 1 << (irq & 7);
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        val = iomd_readb(IOMD_IRQMASKC);
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        iomd_writeb(val & ~mask, IOMD_IRQMASKC);
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}
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static void rpc_unmask_irq_c(unsigned int irq)
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{
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        unsigned int val, mask;
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        mask = 1 << (irq & 7);
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        val = iomd_readb(IOMD_IRQMASKC);
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        iomd_writeb(val | mask, IOMD_IRQMASKC);
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}
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static void rpc_mask_irq_d(unsigned int irq)
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{
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        unsigned int val, mask;
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        mask = 1 << (irq & 7);
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        val = iomd_readb(IOMD_IRQMASKD);
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        iomd_writeb(val & ~mask, IOMD_IRQMASKD);
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}
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static void rpc_unmask_irq_d(unsigned int irq)
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{
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        unsigned int val, mask;
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        mask = 1 << (irq & 7);
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        val = iomd_readb(IOMD_IRQMASKD);
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        iomd_writeb(val | mask, IOMD_IRQMASKD);
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}
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static void rpc_mask_irq_dma(unsigned int irq)
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{
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        unsigned int val, mask;
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        mask = 1 << (irq & 7);
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        val = iomd_readb(IOMD_DMAMASK);
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        iomd_writeb(val & ~mask, IOMD_DMAMASK);
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}
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static void rpc_unmask_irq_dma(unsigned int irq)
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{
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        unsigned int val, mask;
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        mask = 1 << (irq & 7);
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        val = iomd_readb(IOMD_DMAMASK);
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        iomd_writeb(val | mask, IOMD_DMAMASK);
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}
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static void rpc_mask_irq_fiq(unsigned int irq)
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{
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        unsigned int val, mask;
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        mask = 1 << (irq & 7);
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        val = iomd_readb(IOMD_FIQMASK);
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        iomd_writeb(val & ~mask, IOMD_FIQMASK);
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}
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static void rpc_unmask_irq_fiq(unsigned int irq)
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{
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        unsigned int val, mask;
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        mask = 1 << (irq & 7);
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        val = iomd_readb(IOMD_FIQMASK);
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        iomd_writeb(val | mask, IOMD_FIQMASK);
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}
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static __inline__ void irq_init_irq(void)
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{
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        int irq;
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        iomd_writeb(0, IOMD_IRQMASKA);
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        iomd_writeb(0, IOMD_IRQMASKB);
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        iomd_writeb(0, IOMD_IRQMASKC);
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        iomd_writeb(0, IOMD_IRQMASKD);
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        iomd_writeb(0xff, IOMD_IOLINES);
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        iomd_writeb(0, IOMD_FIQMASK);
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        iomd_writeb(0, IOMD_DMAMASK);
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        for (irq = 0; irq < NR_IRQS; irq++) {
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                switch (irq) {
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                case 0 ... 6:
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                        irq_desc[irq].probe_ok = 1;
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                case 7:
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                        irq_desc[irq].valid    = 1;
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                        irq_desc[irq].mask_ack = rpc_mask_irq_ack_a;
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                        irq_desc[irq].mask     = rpc_mask_irq_a;
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                        irq_desc[irq].unmask   = rpc_unmask_irq_a;
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                        break;
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                case 9 ... 15:
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                        irq_desc[irq].probe_ok = 1;
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                case 8:
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                        irq_desc[irq].valid    = 1;
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                        irq_desc[irq].mask_ack = rpc_mask_irq_b;
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                        irq_desc[irq].mask     = rpc_mask_irq_b;
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                        irq_desc[irq].unmask   = rpc_unmask_irq_b;
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                        break;
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                case 16 ... 19:
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                case 21:
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                        irq_desc[irq].noautoenable = 1;
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                case 20:
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                        irq_desc[irq].valid    = 1;
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                        irq_desc[irq].mask_ack = rpc_mask_irq_dma;
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                        irq_desc[irq].mask     = rpc_mask_irq_dma;
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                        irq_desc[irq].unmask   = rpc_unmask_irq_dma;
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                        break;
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                case 24 ... 31:
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                        irq_desc[irq].valid     = 1;
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                        irq_desc[irq].mask_ack  = rpc_mask_irq_c;
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                        irq_desc[irq].mask      = rpc_mask_irq_c;
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                        irq_desc[irq].unmask    = rpc_unmask_irq_c;
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                        break;
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                case 40 ... 47:
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                        irq_desc[irq].valid     = 1;
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                        irq_desc[irq].mask_ack  = rpc_mask_irq_d;
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                        irq_desc[irq].mask      = rpc_mask_irq_d;
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                        irq_desc[irq].unmask    = rpc_unmask_irq_d;
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                        break;
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                case 64 ... 71:
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                        irq_desc[irq].valid    = 1;
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                        irq_desc[irq].mask_ack = rpc_mask_irq_fiq;
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                        irq_desc[irq].mask     = rpc_mask_irq_fiq;
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                        irq_desc[irq].unmask   = rpc_unmask_irq_fiq;
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                        break;
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                }
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        }
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206 
        irq_desc[IRQ_KEYBOARDTX].noautoenable = 1;
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        init_FIQ();
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}

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