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phoenix |
/*
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* linux/include/asm-arm/hardware/amba_kmi.h
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*
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* Internal header file for AMBA KMI ports
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*
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* Copyright (C) 2000 Deep Blue Solutions Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*
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* ---------------------------------------------------------------------------
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* From ARM PrimeCell(tm) PS2 Keyboard/Mouse Interface (PL050) Technical
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* Reference Manual - ARM DDI 0143B - see http://www.arm.com/
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* ---------------------------------------------------------------------------
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*/
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#ifndef ASM_ARM_HARDWARE_AMBA_KMI_H
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#define ASM_ARM_HARDWARE_AMBA_KMI_H
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/*
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* KMI control register:
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* KMICR_TYPE 0 = PS2/AT mode, 1 = No line control bit mode
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* KMICR_RXINTREN 1 = enable RX interrupts
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* KMICR_TXINTREN 1 = enable TX interrupts
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* KMICR_EN 1 = enable KMI
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* KMICR_FD 1 = force KMI data low
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* KMICR_FC 1 = force KMI clock low
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*/
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#define KMICR (KMI_BASE + 0x00)
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#define KMICR_TYPE (1 << 5)
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#define KMICR_RXINTREN (1 << 4)
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#define KMICR_TXINTREN (1 << 3)
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#define KMICR_EN (1 << 2)
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#define KMICR_FD (1 << 1)
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#define KMICR_FC (1 << 0)
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/*
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* KMI status register:
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* KMISTAT_TXEMPTY 1 = transmitter register empty
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* KMISTAT_TXBUSY 1 = currently sending data
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* KMISTAT_RXFULL 1 = receiver register ready to be read
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* KMISTAT_RXBUSY 1 = currently receiving data
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* KMISTAT_RXPARITY parity of last databyte received
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* KMISTAT_IC current level of KMI clock input
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* KMISTAT_ID current level of KMI data input
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*/
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#define KMISTAT (KMI_BASE + 0x04)
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#define KMISTAT_TXEMPTY (1 << 6)
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#define KMISTAT_TXBUSY (1 << 5)
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#define KMISTAT_RXFULL (1 << 4)
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#define KMISTAT_RXBUSY (1 << 3)
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#define KMISTAT_RXPARITY (1 << 2)
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#define KMISTAT_IC (1 << 1)
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#define KMISTAT_ID (1 << 0)
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/*
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* KMI data register
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*/
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#define KMIDATA (KMI_BASE + 0x08)
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/*
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* KMI clock divisor: to generate 8MHz internal clock
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* div = (ref / 8MHz) - 1; 0 <= div <= 15
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*/
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#define KMICLKDIV (KMI_BASE + 0x0c)
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/*
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* KMI interrupt register:
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* KMIIR_TXINTR 1 = transmit interrupt asserted
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* KMIIR_RXINTR 1 = receive interrupt asserted
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*/
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#define KMIIR (KMI_BASE + 0x10)
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#define KMIIR_TXINTR (1 << 1)
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#define KMIIR_RXINTR (1 << 0)
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/*
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* The size of the KMI primecell
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*/
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#define KMI_SIZE (0x100)
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#endif
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