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[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [include/] [asm-arm/] [hardware/] [ep7212.h] - Blame information for rev 1765

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1 1276 phoenix
/*
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 *  linux/include/asm-arm/hardware/ep7212.h
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 *
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 *  This file contains the hardware definitions of the EP7212 internal
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 *  registers.
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 *
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 *  Copyright (C) 2000 Deep Blue Solutions Ltd.
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License as published by
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 * the Free Software Foundation; either version 2 of the License, or
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 * (at your option) any later version.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 *
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 * You should have received a copy of the GNU General Public License
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 * along with this program; if not, write to the Free Software
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 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
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 */
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#ifndef __ASM_HARDWARE_EP7212_H
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#define __ASM_HARDWARE_EP7212_H
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/*
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 * define EP7212_BASE to be the base address of the region
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 * you want to access.
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 */
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#define EP7212_PHYS_BASE        (0x80000000)
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#ifndef __ASSEMBLY__
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#define ep_readl(off)           __raw_readl(EP7212_BASE + (off))
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#define ep_writel(val,off)      __raw_writel(val, EP7212_BASE + (off))
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#endif
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/*
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 * These registers are specific to the EP7212 only
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 */
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#define DAIR                    0x2000
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#define DAIR0                   0x2040
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#define DAIDR1                  0x2080
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#define DAIDR2                  0x20c0
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#define DAISR                   0x2100
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#define SYSCON3                 0x2200
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#define INTSR3                  0x2240
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#define INTMR3                  0x2280
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#define LEDFLSH                 0x22c0
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#define DAIR_DAIEN              (1 << 16)
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#define DAIR_ECS                (1 << 17)
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#define DAIR_LCTM               (1 << 19)
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#define DAIR_LCRM               (1 << 20)
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#define DAIR_RCTM               (1 << 21)
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#define DAIR_RCRM               (1 << 22)
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#define DAIR_LBM                (1 << 23)
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#define DAIDR2_FIFOEN           (1 << 15)
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#define DAIDR2_FIFOLEFT         (0x0d << 16)
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#define DAIDR2_FIFORIGHT        (0x11 << 16)
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#define DAISR_RCTS              (1 << 0)
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#define DAISR_RCRS              (1 << 1)
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#define DAISR_LCTS              (1 << 2)
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#define DAISR_LCRS              (1 << 3)
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#define DAISR_RCTU              (1 << 4)
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#define DAISR_RCRO              (1 << 5)
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#define DAISR_LCTU              (1 << 6)
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#define DAISR_LCRO              (1 << 7)
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#define DAISR_RCNF              (1 << 8)
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#define DAISR_RCNE              (1 << 9)
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#define DAISR_LCNF              (1 << 10)
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#define DAISR_LCNE              (1 << 11)
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#define DAISR_FIFO              (1 << 12)
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#define SYSCON3_ADCCON          (1 << 0)
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#define SYSCON3_DAISEL          (1 << 3)
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#define SYSCON3_ADCCKNSEN       (1 << 4)
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#define SYSCON3_FASTWAKE        (1 << 8)
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#define SYSCON3_DAIEN           (1 << 9)
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#endif /* __ASM_HARDWARE_EP7212_H */

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