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[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [include/] [asm-arm/] [proc-armo/] [cache.h] - Blame information for rev 1774

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Line No. Rev Author Line
1 1276 phoenix
/*
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 *  linux/include/asm-arm/proc-armo/cache.h
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 *
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 *  Copyright (C) 1999-2001 Russell King
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License version 2 as
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 * published by the Free Software Foundation.
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 *
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 *  Cache handling for 26-bit ARM processors.
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 */
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#define flush_cache_all()                       do { } while (0)
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#define flush_cache_mm(mm)                      do { } while (0)
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#define flush_cache_range(mm,start,end)         do { } while (0)
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#define flush_cache_page(vma,vmaddr)            do { } while (0)
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#define flush_page_to_ram(page)                 do { } while (0)
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#define invalidate_dcache_range(start,end)      do { } while (0)
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#define clean_dcache_range(start,end)           do { } while (0)
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#define flush_dcache_range(start,end)           do { } while (0)
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#define flush_dcache_page(page)                 do { } while (0)
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#define clean_dcache_entry(_s)      do { } while (0)
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#define clean_cache_entry(_start)               do { } while (0)
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#define flush_icache_range(start,end)           do { } while (0)
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#define flush_icache_page(vma,page)             do { } while (0)
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/* DAG: ARM3 will flush cache on MEMC updates anyway? so don't bother */
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#define clean_cache_area(_start,_size) do { } while (0)
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/*
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 * TLB flushing:
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 *
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 *  - flush_tlb_all() flushes all processes TLBs
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 *  - flush_tlb_mm(mm) flushes the specified mm context TLB's
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 *  - flush_tlb_page(vma, vmaddr) flushes one page
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 *  - flush_tlb_range(mm, start, end) flushes a range of pages
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 */
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#define flush_tlb_all()                         memc_update_all()
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#define flush_tlb_mm(mm)                        memc_update_mm(mm)
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#define flush_tlb_range(mm,start,end)           \
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                do { memc_update_mm(mm); (void)(start); (void)(end); } while (0)
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#define flush_tlb_page(vma, vmaddr)             do { } while (0)
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/*
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 * The following handle the weird MEMC chip
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 */
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static inline void memc_update_all(void)
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{
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        struct task_struct *p;
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        cpu_memc_update_all(init_mm.pgd);
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        for_each_task(p) {
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                if (!p->mm)
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                        continue;
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                cpu_memc_update_all(p->mm->pgd);
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        }
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        processor._set_pgd(current->active_mm->pgd);
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}
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static inline void memc_update_mm(struct mm_struct *mm)
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{
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        cpu_memc_update_all(mm->pgd);
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        if (mm == current->active_mm)
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                processor._set_pgd(mm->pgd);
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}
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static inline void
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memc_clear(struct mm_struct *mm, struct page *page)
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{
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        cpu_memc_update_entry(mm->pgd, (unsigned long) page_address(page), 0);
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        if (mm == current->active_mm)
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                processor._set_pgd(mm->pgd);
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}
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static inline void
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memc_update_addr(struct mm_struct *mm, pte_t pte, unsigned long vaddr)
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{
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        cpu_memc_update_entry(mm->pgd, pte_val(pte), vaddr);
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        if (mm == current->active_mm)
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                processor._set_pgd(mm->pgd);
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}
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static inline void
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update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t pte)
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{
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        struct mm_struct *mm = vma->vm_mm;
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        memc_update_addr(mm, pte, addr);
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}

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