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[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [include/] [asm-i386/] [io.h] - Blame information for rev 1774

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1 1275 phoenix
#ifndef _ASM_IO_H
2
#define _ASM_IO_H
3
 
4
#include <linux/config.h>
5
 
6
/*
7
 * This file contains the definitions for the x86 IO instructions
8
 * inb/inw/inl/outb/outw/outl and the "string versions" of the same
9
 * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
10
 * versions of the single-IO instructions (inb_p/inw_p/..).
11
 *
12
 * This file is not meant to be obfuscating: it's just complicated
13
 * to (a) handle it all in a way that makes gcc able to optimize it
14
 * as well as possible and (b) trying to avoid writing the same thing
15
 * over and over again with slight variations and possibly making a
16
 * mistake somewhere.
17
 */
18
 
19
/*
20
 * Thanks to James van Artsdalen for a better timing-fix than
21
 * the two short jumps: using outb's to a nonexistent port seems
22
 * to guarantee better timings even on fast machines.
23
 *
24
 * On the other hand, I'd like to be sure of a non-existent port:
25
 * I feel a bit unsafe about using 0x80 (should be safe, though)
26
 *
27
 *              Linus
28
 */
29
 
30
 /*
31
  *  Bit simplified and optimized by Jan Hubicka
32
  *  Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999.
33
  *
34
  *  isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added,
35
  *  isa_read[wl] and isa_write[wl] fixed
36
  *  - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
37
  */
38
 
39
#define IO_SPACE_LIMIT 0xffff
40
 
41
#define XQUAD_PORTIO_BASE 0xfe400000
42
#define XQUAD_PORTIO_QUAD 0x40000  /* 256k per quad. */
43
#define XQUAD_PORTIO_LEN  0x80000  /* Only remapping first 2 quads */
44
 
45
#ifdef __KERNEL__
46
 
47
#include <linux/vmalloc.h>
48
 
49
/*
50
 * Temporary debugging check to catch old code using
51
 * unmapped ISA addresses. Will be removed in 2.4.
52
 */
53
#if CONFIG_DEBUG_IOVIRT
54
  extern void *__io_virt_debug(unsigned long x, const char *file, int line);
55
  extern unsigned long __io_phys_debug(unsigned long x, const char *file, int line);
56
  #define __io_virt(x) __io_virt_debug((unsigned long)(x), __FILE__, __LINE__)
57
//#define __io_phys(x) __io_phys_debug((unsigned long)(x), __FILE__, __LINE__)
58
#else
59
  #define __io_virt(x) ((void *)(x))
60
//#define __io_phys(x) __pa(x)
61
#endif
62
 
63
/**
64
 *      virt_to_phys    -       map virtual addresses to physical
65
 *      @address: address to remap
66
 *
67
 *      The returned physical address is the physical (CPU) mapping for
68
 *      the memory address given. It is only valid to use this function on
69
 *      addresses directly mapped or allocated via kmalloc.
70
 *
71
 *      This function does not give bus mappings for DMA transfers. In
72
 *      almost all conceivable cases a device driver should not be using
73
 *      this function
74
 */
75
 
76
static inline unsigned long virt_to_phys(volatile void * address)
77
{
78
        return __pa(address);
79
}
80
 
81
/**
82
 *      phys_to_virt    -       map physical address to virtual
83
 *      @address: address to remap
84
 *
85
 *      The returned virtual address is a current CPU mapping for
86
 *      the memory address given. It is only valid to use this function on
87
 *      addresses that have a kernel mapping
88
 *
89
 *      This function does not handle bus mappings for DMA transfers. In
90
 *      almost all conceivable cases a device driver should not be using
91
 *      this function
92
 */
93
 
94
static inline void * phys_to_virt(unsigned long address)
95
{
96
        return __va(address);
97
}
98
 
99
/*
100
 * Change "struct page" to physical address.
101
 */
102
#ifdef CONFIG_HIGHMEM64G
103
#define page_to_phys(page)      ((u64)(page - mem_map) << PAGE_SHIFT)
104
#else
105
#define page_to_phys(page)      ((page - mem_map) << PAGE_SHIFT)
106
#endif
107
 
108
extern void * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);
109
 
110
/**
111
 *      ioremap         -       map bus memory into CPU space
112
 *      @offset:        bus address of the memory
113
 *      @size:          size of the resource to map
114
 *
115
 *      ioremap performs a platform specific sequence of operations to
116
 *      make bus memory CPU accessible via the readb/readw/readl/writeb/
117
 *      writew/writel functions and the other mmio helpers. The returned
118
 *      address is not guaranteed to be usable directly as a virtual
119
 *      address.
120
 */
121
 
122
static inline void * ioremap (unsigned long offset, unsigned long size)
123
{
124
        return __ioremap(offset, size, 0);
125
}
126
 
127
/**
128
 *      ioremap_nocache         -       map bus memory into CPU space
129
 *      @offset:        bus address of the memory
130
 *      @size:          size of the resource to map
131
 *
132
 *      ioremap_nocache performs a platform specific sequence of operations to
133
 *      make bus memory CPU accessible via the readb/readw/readl/writeb/
134
 *      writew/writel functions and the other mmio helpers. The returned
135
 *      address is not guaranteed to be usable directly as a virtual
136
 *      address.
137
 *
138
 *      This version of ioremap ensures that the memory is marked uncachable
139
 *      on the CPU as well as honouring existing caching rules from things like
140
 *      the PCI bus. Note that there are other caches and buffers on many
141
 *      busses. In paticular driver authors should read up on PCI writes
142
 *
143
 *      It's useful if some control registers are in such an area and
144
 *      write combining or read caching is not desirable:
145
 */
146
 
147
static inline void * ioremap_nocache (unsigned long offset, unsigned long size)
148
{
149
        return __ioremap(offset, size, _PAGE_PCD);
150
}
151
 
152
extern void iounmap(void *addr);
153
 
154
/*
155
 * bt_ioremap() and bt_iounmap() are for temporary early boot-time
156
 * mappings, before the real ioremap() is functional.
157
 * A boot-time mapping is currently limited to at most 16 pages.
158
 */
159
extern void *bt_ioremap(unsigned long offset, unsigned long size);
160
extern void bt_iounmap(void *addr, unsigned long size);
161
 
162
/*
163
 * IO bus memory addresses are also 1:1 with the physical address
164
 */
165
#define virt_to_bus virt_to_phys
166
#define bus_to_virt phys_to_virt
167
#define page_to_bus page_to_phys
168
 
169
/*
170
 * readX/writeX() are used to access memory mapped devices. On some
171
 * architectures the memory mapped IO stuff needs to be accessed
172
 * differently. On the x86 architecture, we just read/write the
173
 * memory location directly.
174
 */
175
 
176
#define readb(addr) (*(volatile unsigned char *) __io_virt(addr))
177
#define readw(addr) (*(volatile unsigned short *) __io_virt(addr))
178
#define readl(addr) (*(volatile unsigned int *) __io_virt(addr))
179
#define __raw_readb readb
180
#define __raw_readw readw
181
#define __raw_readl readl
182
 
183
#define writeb(b,addr) (*(volatile unsigned char *) __io_virt(addr) = (b))
184
#define writew(b,addr) (*(volatile unsigned short *) __io_virt(addr) = (b))
185
#define writel(b,addr) (*(volatile unsigned int *) __io_virt(addr) = (b))
186
#define __raw_writeb writeb
187
#define __raw_writew writew
188
#define __raw_writel writel
189
 
190
#define memset_io(a,b,c)        __memset(__io_virt(a),(b),(c))
191
#define memcpy_fromio(a,b,c)    __memcpy((a),__io_virt(b),(c))
192
#define memcpy_toio(a,b,c)      __memcpy(__io_virt(a),(b),(c))
193
 
194
/*
195
 * ISA space is 'always mapped' on a typical x86 system, no need to
196
 * explicitly ioremap() it. The fact that the ISA IO space is mapped
197
 * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
198
 * are physical addresses. The following constant pointer can be
199
 * used as the IO-area pointer (it can be iounmapped as well, so the
200
 * analogy with PCI is quite large):
201
 */
202
#define __ISA_IO_base ((char *)(PAGE_OFFSET))
203
 
204
#define isa_readb(a) readb(__ISA_IO_base + (a))
205
#define isa_readw(a) readw(__ISA_IO_base + (a))
206
#define isa_readl(a) readl(__ISA_IO_base + (a))
207
#define isa_writeb(b,a) writeb(b,__ISA_IO_base + (a))
208
#define isa_writew(w,a) writew(w,__ISA_IO_base + (a))
209
#define isa_writel(l,a) writel(l,__ISA_IO_base + (a))
210
#define isa_memset_io(a,b,c)            memset_io(__ISA_IO_base + (a),(b),(c))
211
#define isa_memcpy_fromio(a,b,c)        memcpy_fromio((a),__ISA_IO_base + (b),(c))
212
#define isa_memcpy_toio(a,b,c)          memcpy_toio(__ISA_IO_base + (a),(b),(c))
213
 
214
 
215
/*
216
 * Again, i386 does not require mem IO specific function.
217
 */
218
 
219
#define eth_io_copy_and_sum(a,b,c,d)            eth_copy_and_sum((a),__io_virt(b),(c),(d))
220
#define isa_eth_io_copy_and_sum(a,b,c,d)        eth_copy_and_sum((a),__io_virt(__ISA_IO_base + (b)),(c),(d))
221
 
222
/**
223
 *      check_signature         -       find BIOS signatures
224
 *      @io_addr: mmio address to check
225
 *      @signature:  signature block
226
 *      @length: length of signature
227
 *
228
 *      Perform a signature comparison with the mmio address io_addr. This
229
 *      address should have been obtained by ioremap.
230
 *      Returns 1 on a match.
231
 */
232
 
233
static inline int check_signature(unsigned long io_addr,
234
        const unsigned char *signature, int length)
235
{
236
        int retval = 0;
237
        do {
238
                if (readb(io_addr) != *signature)
239
                        goto out;
240
                io_addr++;
241
                signature++;
242
                length--;
243
        } while (length);
244
        retval = 1;
245
out:
246
        return retval;
247
}
248
 
249
/**
250
 *      isa_check_signature             -       find BIOS signatures
251
 *      @io_addr: mmio address to check
252
 *      @signature:  signature block
253
 *      @length: length of signature
254
 *
255
 *      Perform a signature comparison with the ISA mmio address io_addr.
256
 *      Returns 1 on a match.
257
 *
258
 *      This function is deprecated. New drivers should use ioremap and
259
 *      check_signature.
260
 */
261
 
262
 
263
static inline int isa_check_signature(unsigned long io_addr,
264
        const unsigned char *signature, int length)
265
{
266
        int retval = 0;
267
        do {
268
                if (isa_readb(io_addr) != *signature)
269
                        goto out;
270
                io_addr++;
271
                signature++;
272
                length--;
273
        } while (length);
274
        retval = 1;
275
out:
276
        return retval;
277
}
278
 
279
/*
280
 *      Cache management
281
 *
282
 *      This needed for two cases
283
 *      1. Out of order aware processors
284
 *      2. Accidentally out of order processors (PPro errata #51)
285
 */
286
 
287
#if defined(CONFIG_X86_OOSTORE) || defined(CONFIG_X86_PPRO_FENCE)
288
 
289
static inline void flush_write_buffers(void)
290
{
291
        __asm__ __volatile__ ("lock; addl $0,0(%%esp)": : :"memory");
292
}
293
 
294
#define dma_cache_inv(_start,_size)             flush_write_buffers()
295
#define dma_cache_wback(_start,_size)           flush_write_buffers()
296
#define dma_cache_wback_inv(_start,_size)       flush_write_buffers()
297
 
298
#else
299
 
300
/* Nothing to do */
301
 
302
#define dma_cache_inv(_start,_size)             do { } while (0)
303
#define dma_cache_wback(_start,_size)           do { } while (0)
304
#define dma_cache_wback_inv(_start,_size)       do { } while (0)
305
#define flush_write_buffers()
306
 
307
#endif
308
 
309
#endif /* __KERNEL__ */
310
 
311
#ifdef SLOW_IO_BY_JUMPING
312
#define __SLOW_DOWN_IO "\njmp 1f\n1:\tjmp 1f\n1:"
313
#else
314
#define __SLOW_DOWN_IO "\noutb %%al,$0x80"
315
#endif
316
 
317
#ifdef REALLY_SLOW_IO
318
#define __FULL_SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO
319
#else
320
#define __FULL_SLOW_DOWN_IO __SLOW_DOWN_IO
321
#endif
322
 
323
#ifdef CONFIG_MULTIQUAD
324
extern void *xquad_portio;    /* Where the IO area was mapped */
325
#endif /* CONFIG_MULTIQUAD */
326
 
327
/*
328
 * Talk about misusing macros..
329
 */
330
#define __OUT1(s,x) \
331
static inline void out##s(unsigned x value, unsigned short port) {
332
 
333
#define __OUT2(s,s1,s2) \
334
__asm__ __volatile__ ("out" #s " %" s1 "0,%" s2 "1"
335
 
336
#if defined (CONFIG_MULTIQUAD) && !defined(STANDALONE)
337
#define __OUTQ(s,ss,x)    /* Do the equivalent of the portio op on quads */ \
338
static inline void out##ss(unsigned x value, unsigned short port) { \
339
        if (xquad_portio) \
340
                write##s(value, (unsigned long) xquad_portio + port); \
341
        else               /* We're still in early boot, running on quad 0 */ \
342
                out##ss##_local(value, port); \
343
} \
344
static inline void out##ss##_quad(unsigned x value, unsigned short port, int quad) { \
345
        if (xquad_portio) \
346
                write##s(value, (unsigned long) xquad_portio + (XQUAD_PORTIO_QUAD*quad)\
347
                        + port); \
348
}
349
 
350
#define __INQ(s,ss)       /* Do the equivalent of the portio op on quads */ \
351
static inline RETURN_TYPE in##ss(unsigned short port) { \
352
        if (xquad_portio) \
353
                return read##s((unsigned long) xquad_portio + port); \
354
        else               /* We're still in early boot, running on quad 0 */ \
355
                return in##ss##_local(port); \
356
} \
357
static inline RETURN_TYPE in##ss##_quad(unsigned short port, int quad) { \
358
        if (xquad_portio) \
359
                return read##s((unsigned long) xquad_portio + (XQUAD_PORTIO_QUAD*quad)\
360
                        + port); \
361
        else\
362
                return 0;\
363
}
364
#endif /* CONFIG_MULTIQUAD && !STANDALONE */
365
 
366
#if !defined(CONFIG_MULTIQUAD) || defined(STANDALONE)
367
#define __OUT(s,s1,x) \
368
__OUT1(s,x) __OUT2(s,s1,"w") : : "a" (value), "Nd" (port)); } \
369
__OUT1(s##_p,x) __OUT2(s,s1,"w") __FULL_SLOW_DOWN_IO : : "a" (value), "Nd" (port));} 
370
#else
371
/* Make the default portio routines operate on quad 0 */
372
#define __OUT(s,s1,x) \
373
__OUT1(s##_local,x) __OUT2(s,s1,"w") : : "a" (value), "Nd" (port)); } \
374
__OUT1(s##_p_local,x) __OUT2(s,s1,"w") __FULL_SLOW_DOWN_IO : : "a" (value), "Nd" (port));} \
375
__OUTQ(s,s,x) \
376
__OUTQ(s,s##_p,x) 
377
#endif /* !CONFIG_MULTIQUAD || STANDALONE */
378
 
379
#define __IN1(s) \
380
static inline RETURN_TYPE in##s(unsigned short port) { RETURN_TYPE _v;
381
 
382
#define __IN2(s,s1,s2) \
383
__asm__ __volatile__ ("in" #s " %" s2 "1,%" s1 "0"
384
 
385
#if !defined(CONFIG_MULTIQUAD) || defined(STANDALONE)
386
#define __IN(s,s1,i...) \
387
__IN1(s) __IN2(s,s1,"w") : "=a" (_v) : "Nd" (port) ,##i ); return _v; } \
388
__IN1(s##_p) __IN2(s,s1,"w") __FULL_SLOW_DOWN_IO : "=a" (_v) : "Nd" (port) ,##i ); return _v; } 
389
#else
390
/* Make the default portio routines operate on quad 0 */
391
#define __IN(s,s1,i...) \
392
__IN1(s##_local) __IN2(s,s1,"w") : "=a" (_v) : "Nd" (port) ,##i ); return _v; } \
393
__IN1(s##_p_local) __IN2(s,s1,"w") __FULL_SLOW_DOWN_IO : "=a" (_v) : "Nd" (port) ,##i ); return _v; } \
394
__INQ(s,s) \
395
__INQ(s,s##_p) 
396
#endif /* !CONFIG_MULTIQUAD || STANDALONE */
397
 
398
#define __INS(s) \
399
static inline void ins##s(unsigned short port, void * addr, unsigned long count) \
400
{ __asm__ __volatile__ ("rep ; ins" #s \
401
: "=D" (addr), "=c" (count) : "d" (port),"0" (addr),"1" (count)); }
402
 
403
#define __OUTS(s) \
404
static inline void outs##s(unsigned short port, const void * addr, unsigned long count) \
405
{ __asm__ __volatile__ ("rep ; outs" #s \
406
: "=S" (addr), "=c" (count) : "d" (port),"0" (addr),"1" (count)); }
407
 
408
#define RETURN_TYPE unsigned char
409
__IN(b,"")
410
#undef RETURN_TYPE
411
#define RETURN_TYPE unsigned short
412
__IN(w,"")
413
#undef RETURN_TYPE
414
#define RETURN_TYPE unsigned int
415
__IN(l,"")
416
#undef RETURN_TYPE
417
 
418
__OUT(b,"b",char)
419
__OUT(w,"w",short)
420
__OUT(l,,int)
421
 
422
__INS(b)
423
__INS(w)
424
__INS(l)
425
 
426
__OUTS(b)
427
__OUTS(w)
428
__OUTS(l)
429
 
430
#endif

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