1 |
1275 |
phoenix |
#ifndef _ASM_IO_H
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#define _ASM_IO_H
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#include <linux/config.h>
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/*
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* This file contains the definitions for the x86 IO instructions
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* inb/inw/inl/outb/outw/outl and the "string versions" of the same
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* (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
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* versions of the single-IO instructions (inb_p/inw_p/..).
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*
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* This file is not meant to be obfuscating: it's just complicated
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* to (a) handle it all in a way that makes gcc able to optimize it
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* as well as possible and (b) trying to avoid writing the same thing
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* over and over again with slight variations and possibly making a
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* mistake somewhere.
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*/
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/*
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* Thanks to James van Artsdalen for a better timing-fix than
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* the two short jumps: using outb's to a nonexistent port seems
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* to guarantee better timings even on fast machines.
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*
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* On the other hand, I'd like to be sure of a non-existent port:
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* I feel a bit unsafe about using 0x80 (should be safe, though)
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*
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* Linus
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*/
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/*
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* Bit simplified and optimized by Jan Hubicka
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* Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999.
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*
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* isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added,
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* isa_read[wl] and isa_write[wl] fixed
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* - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
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*/
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#define IO_SPACE_LIMIT 0xffff
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#define XQUAD_PORTIO_BASE 0xfe400000
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#define XQUAD_PORTIO_QUAD 0x40000 /* 256k per quad. */
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#define XQUAD_PORTIO_LEN 0x80000 /* Only remapping first 2 quads */
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#ifdef __KERNEL__
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#include <linux/vmalloc.h>
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/*
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* Temporary debugging check to catch old code using
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* unmapped ISA addresses. Will be removed in 2.4.
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*/
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#if CONFIG_DEBUG_IOVIRT
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extern void *__io_virt_debug(unsigned long x, const char *file, int line);
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extern unsigned long __io_phys_debug(unsigned long x, const char *file, int line);
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#define __io_virt(x) __io_virt_debug((unsigned long)(x), __FILE__, __LINE__)
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//#define __io_phys(x) __io_phys_debug((unsigned long)(x), __FILE__, __LINE__)
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#else
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#define __io_virt(x) ((void *)(x))
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//#define __io_phys(x) __pa(x)
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#endif
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/**
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* virt_to_phys - map virtual addresses to physical
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* @address: address to remap
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*
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* The returned physical address is the physical (CPU) mapping for
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* the memory address given. It is only valid to use this function on
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* addresses directly mapped or allocated via kmalloc.
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*
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* This function does not give bus mappings for DMA transfers. In
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* almost all conceivable cases a device driver should not be using
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* this function
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*/
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static inline unsigned long virt_to_phys(volatile void * address)
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{
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return __pa(address);
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}
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/**
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* phys_to_virt - map physical address to virtual
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* @address: address to remap
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*
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* The returned virtual address is a current CPU mapping for
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* the memory address given. It is only valid to use this function on
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* addresses that have a kernel mapping
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*
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* This function does not handle bus mappings for DMA transfers. In
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* almost all conceivable cases a device driver should not be using
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* this function
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*/
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static inline void * phys_to_virt(unsigned long address)
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{
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return __va(address);
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}
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/*
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* Change "struct page" to physical address.
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*/
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#ifdef CONFIG_HIGHMEM64G
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#define page_to_phys(page) ((u64)(page - mem_map) << PAGE_SHIFT)
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#else
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#define page_to_phys(page) ((page - mem_map) << PAGE_SHIFT)
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#endif
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extern void * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);
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/**
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* ioremap - map bus memory into CPU space
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* @offset: bus address of the memory
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* @size: size of the resource to map
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*
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* ioremap performs a platform specific sequence of operations to
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* make bus memory CPU accessible via the readb/readw/readl/writeb/
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* writew/writel functions and the other mmio helpers. The returned
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* address is not guaranteed to be usable directly as a virtual
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* address.
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*/
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static inline void * ioremap (unsigned long offset, unsigned long size)
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{
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return __ioremap(offset, size, 0);
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}
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/**
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* ioremap_nocache - map bus memory into CPU space
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* @offset: bus address of the memory
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* @size: size of the resource to map
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*
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* ioremap_nocache performs a platform specific sequence of operations to
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* make bus memory CPU accessible via the readb/readw/readl/writeb/
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* writew/writel functions and the other mmio helpers. The returned
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* address is not guaranteed to be usable directly as a virtual
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* address.
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*
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* This version of ioremap ensures that the memory is marked uncachable
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* on the CPU as well as honouring existing caching rules from things like
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* the PCI bus. Note that there are other caches and buffers on many
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* busses. In paticular driver authors should read up on PCI writes
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*
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* It's useful if some control registers are in such an area and
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* write combining or read caching is not desirable:
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*/
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static inline void * ioremap_nocache (unsigned long offset, unsigned long size)
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{
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return __ioremap(offset, size, _PAGE_PCD);
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}
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extern void iounmap(void *addr);
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/*
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* bt_ioremap() and bt_iounmap() are for temporary early boot-time
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* mappings, before the real ioremap() is functional.
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* A boot-time mapping is currently limited to at most 16 pages.
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*/
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extern void *bt_ioremap(unsigned long offset, unsigned long size);
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extern void bt_iounmap(void *addr, unsigned long size);
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/*
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* IO bus memory addresses are also 1:1 with the physical address
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*/
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#define virt_to_bus virt_to_phys
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#define bus_to_virt phys_to_virt
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#define page_to_bus page_to_phys
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/*
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* readX/writeX() are used to access memory mapped devices. On some
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* architectures the memory mapped IO stuff needs to be accessed
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* differently. On the x86 architecture, we just read/write the
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* memory location directly.
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*/
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#define readb(addr) (*(volatile unsigned char *) __io_virt(addr))
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#define readw(addr) (*(volatile unsigned short *) __io_virt(addr))
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#define readl(addr) (*(volatile unsigned int *) __io_virt(addr))
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#define __raw_readb readb
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#define __raw_readw readw
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#define __raw_readl readl
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#define writeb(b,addr) (*(volatile unsigned char *) __io_virt(addr) = (b))
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#define writew(b,addr) (*(volatile unsigned short *) __io_virt(addr) = (b))
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#define writel(b,addr) (*(volatile unsigned int *) __io_virt(addr) = (b))
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#define __raw_writeb writeb
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#define __raw_writew writew
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#define __raw_writel writel
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#define memset_io(a,b,c) __memset(__io_virt(a),(b),(c))
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#define memcpy_fromio(a,b,c) __memcpy((a),__io_virt(b),(c))
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#define memcpy_toio(a,b,c) __memcpy(__io_virt(a),(b),(c))
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193 |
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194 |
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/*
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195 |
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* ISA space is 'always mapped' on a typical x86 system, no need to
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196 |
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* explicitly ioremap() it. The fact that the ISA IO space is mapped
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197 |
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* to PAGE_OFFSET is pure coincidence - it does not mean ISA values
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198 |
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* are physical addresses. The following constant pointer can be
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* used as the IO-area pointer (it can be iounmapped as well, so the
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* analogy with PCI is quite large):
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*/
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202 |
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#define __ISA_IO_base ((char *)(PAGE_OFFSET))
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203 |
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204 |
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#define isa_readb(a) readb(__ISA_IO_base + (a))
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#define isa_readw(a) readw(__ISA_IO_base + (a))
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#define isa_readl(a) readl(__ISA_IO_base + (a))
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#define isa_writeb(b,a) writeb(b,__ISA_IO_base + (a))
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#define isa_writew(w,a) writew(w,__ISA_IO_base + (a))
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209 |
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#define isa_writel(l,a) writel(l,__ISA_IO_base + (a))
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210 |
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#define isa_memset_io(a,b,c) memset_io(__ISA_IO_base + (a),(b),(c))
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211 |
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#define isa_memcpy_fromio(a,b,c) memcpy_fromio((a),__ISA_IO_base + (b),(c))
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#define isa_memcpy_toio(a,b,c) memcpy_toio(__ISA_IO_base + (a),(b),(c))
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213 |
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214 |
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215 |
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/*
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216 |
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* Again, i386 does not require mem IO specific function.
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217 |
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*/
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218 |
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219 |
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#define eth_io_copy_and_sum(a,b,c,d) eth_copy_and_sum((a),__io_virt(b),(c),(d))
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220 |
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#define isa_eth_io_copy_and_sum(a,b,c,d) eth_copy_and_sum((a),__io_virt(__ISA_IO_base + (b)),(c),(d))
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221 |
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222 |
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/**
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223 |
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* check_signature - find BIOS signatures
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224 |
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* @io_addr: mmio address to check
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225 |
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* @signature: signature block
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226 |
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* @length: length of signature
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227 |
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*
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228 |
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* Perform a signature comparison with the mmio address io_addr. This
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229 |
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* address should have been obtained by ioremap.
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230 |
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* Returns 1 on a match.
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231 |
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*/
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232 |
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233 |
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static inline int check_signature(unsigned long io_addr,
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234 |
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const unsigned char *signature, int length)
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235 |
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{
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236 |
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int retval = 0;
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237 |
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do {
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238 |
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if (readb(io_addr) != *signature)
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239 |
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goto out;
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240 |
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io_addr++;
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241 |
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signature++;
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242 |
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length--;
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243 |
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} while (length);
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244 |
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retval = 1;
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245 |
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out:
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246 |
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return retval;
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247 |
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}
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248 |
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249 |
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/**
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250 |
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* isa_check_signature - find BIOS signatures
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251 |
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* @io_addr: mmio address to check
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252 |
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* @signature: signature block
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253 |
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* @length: length of signature
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254 |
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*
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255 |
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* Perform a signature comparison with the ISA mmio address io_addr.
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256 |
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* Returns 1 on a match.
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257 |
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*
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258 |
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* This function is deprecated. New drivers should use ioremap and
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259 |
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* check_signature.
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260 |
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*/
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261 |
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262 |
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263 |
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static inline int isa_check_signature(unsigned long io_addr,
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264 |
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const unsigned char *signature, int length)
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265 |
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{
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266 |
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int retval = 0;
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267 |
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do {
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268 |
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if (isa_readb(io_addr) != *signature)
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269 |
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goto out;
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270 |
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io_addr++;
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271 |
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signature++;
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272 |
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length--;
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273 |
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} while (length);
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274 |
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retval = 1;
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out:
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276 |
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return retval;
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277 |
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}
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278 |
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279 |
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/*
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280 |
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* Cache management
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281 |
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*
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282 |
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* This needed for two cases
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283 |
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* 1. Out of order aware processors
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284 |
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* 2. Accidentally out of order processors (PPro errata #51)
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285 |
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*/
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286 |
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|
287 |
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#if defined(CONFIG_X86_OOSTORE) || defined(CONFIG_X86_PPRO_FENCE)
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288 |
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|
289 |
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static inline void flush_write_buffers(void)
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290 |
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{
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291 |
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__asm__ __volatile__ ("lock; addl $0,0(%%esp)": : :"memory");
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292 |
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}
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293 |
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294 |
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#define dma_cache_inv(_start,_size) flush_write_buffers()
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295 |
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#define dma_cache_wback(_start,_size) flush_write_buffers()
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296 |
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#define dma_cache_wback_inv(_start,_size) flush_write_buffers()
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297 |
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298 |
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#else
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299 |
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|
300 |
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/* Nothing to do */
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301 |
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302 |
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#define dma_cache_inv(_start,_size) do { } while (0)
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303 |
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#define dma_cache_wback(_start,_size) do { } while (0)
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304 |
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#define dma_cache_wback_inv(_start,_size) do { } while (0)
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305 |
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#define flush_write_buffers()
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306 |
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307 |
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#endif
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308 |
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|
309 |
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#endif /* __KERNEL__ */
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310 |
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|
311 |
|
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#ifdef SLOW_IO_BY_JUMPING
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312 |
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#define __SLOW_DOWN_IO "\njmp 1f\n1:\tjmp 1f\n1:"
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313 |
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#else
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314 |
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#define __SLOW_DOWN_IO "\noutb %%al,$0x80"
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315 |
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#endif
|
316 |
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|
317 |
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#ifdef REALLY_SLOW_IO
|
318 |
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#define __FULL_SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO
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319 |
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#else
|
320 |
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#define __FULL_SLOW_DOWN_IO __SLOW_DOWN_IO
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321 |
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#endif
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322 |
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|
323 |
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#ifdef CONFIG_MULTIQUAD
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324 |
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extern void *xquad_portio; /* Where the IO area was mapped */
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325 |
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#endif /* CONFIG_MULTIQUAD */
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326 |
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|
327 |
|
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/*
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328 |
|
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* Talk about misusing macros..
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329 |
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*/
|
330 |
|
|
#define __OUT1(s,x) \
|
331 |
|
|
static inline void out##s(unsigned x value, unsigned short port) {
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332 |
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|
333 |
|
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#define __OUT2(s,s1,s2) \
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334 |
|
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__asm__ __volatile__ ("out" #s " %" s1 "0,%" s2 "1"
|
335 |
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|
336 |
|
|
#if defined (CONFIG_MULTIQUAD) && !defined(STANDALONE)
|
337 |
|
|
#define __OUTQ(s,ss,x) /* Do the equivalent of the portio op on quads */ \
|
338 |
|
|
static inline void out##ss(unsigned x value, unsigned short port) { \
|
339 |
|
|
if (xquad_portio) \
|
340 |
|
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write##s(value, (unsigned long) xquad_portio + port); \
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341 |
|
|
else /* We're still in early boot, running on quad 0 */ \
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342 |
|
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out##ss##_local(value, port); \
|
343 |
|
|
} \
|
344 |
|
|
static inline void out##ss##_quad(unsigned x value, unsigned short port, int quad) { \
|
345 |
|
|
if (xquad_portio) \
|
346 |
|
|
write##s(value, (unsigned long) xquad_portio + (XQUAD_PORTIO_QUAD*quad)\
|
347 |
|
|
+ port); \
|
348 |
|
|
}
|
349 |
|
|
|
350 |
|
|
#define __INQ(s,ss) /* Do the equivalent of the portio op on quads */ \
|
351 |
|
|
static inline RETURN_TYPE in##ss(unsigned short port) { \
|
352 |
|
|
if (xquad_portio) \
|
353 |
|
|
return read##s((unsigned long) xquad_portio + port); \
|
354 |
|
|
else /* We're still in early boot, running on quad 0 */ \
|
355 |
|
|
return in##ss##_local(port); \
|
356 |
|
|
} \
|
357 |
|
|
static inline RETURN_TYPE in##ss##_quad(unsigned short port, int quad) { \
|
358 |
|
|
if (xquad_portio) \
|
359 |
|
|
return read##s((unsigned long) xquad_portio + (XQUAD_PORTIO_QUAD*quad)\
|
360 |
|
|
+ port); \
|
361 |
|
|
else\
|
362 |
|
|
return 0;\
|
363 |
|
|
}
|
364 |
|
|
#endif /* CONFIG_MULTIQUAD && !STANDALONE */
|
365 |
|
|
|
366 |
|
|
#if !defined(CONFIG_MULTIQUAD) || defined(STANDALONE)
|
367 |
|
|
#define __OUT(s,s1,x) \
|
368 |
|
|
__OUT1(s,x) __OUT2(s,s1,"w") : : "a" (value), "Nd" (port)); } \
|
369 |
|
|
__OUT1(s##_p,x) __OUT2(s,s1,"w") __FULL_SLOW_DOWN_IO : : "a" (value), "Nd" (port));}
|
370 |
|
|
#else
|
371 |
|
|
/* Make the default portio routines operate on quad 0 */
|
372 |
|
|
#define __OUT(s,s1,x) \
|
373 |
|
|
__OUT1(s##_local,x) __OUT2(s,s1,"w") : : "a" (value), "Nd" (port)); } \
|
374 |
|
|
__OUT1(s##_p_local,x) __OUT2(s,s1,"w") __FULL_SLOW_DOWN_IO : : "a" (value), "Nd" (port));} \
|
375 |
|
|
__OUTQ(s,s,x) \
|
376 |
|
|
__OUTQ(s,s##_p,x)
|
377 |
|
|
#endif /* !CONFIG_MULTIQUAD || STANDALONE */
|
378 |
|
|
|
379 |
|
|
#define __IN1(s) \
|
380 |
|
|
static inline RETURN_TYPE in##s(unsigned short port) { RETURN_TYPE _v;
|
381 |
|
|
|
382 |
|
|
#define __IN2(s,s1,s2) \
|
383 |
|
|
__asm__ __volatile__ ("in" #s " %" s2 "1,%" s1 "0"
|
384 |
|
|
|
385 |
|
|
#if !defined(CONFIG_MULTIQUAD) || defined(STANDALONE)
|
386 |
|
|
#define __IN(s,s1,i...) \
|
387 |
|
|
__IN1(s) __IN2(s,s1,"w") : "=a" (_v) : "Nd" (port) ,##i ); return _v; } \
|
388 |
|
|
__IN1(s##_p) __IN2(s,s1,"w") __FULL_SLOW_DOWN_IO : "=a" (_v) : "Nd" (port) ,##i ); return _v; }
|
389 |
|
|
#else
|
390 |
|
|
/* Make the default portio routines operate on quad 0 */
|
391 |
|
|
#define __IN(s,s1,i...) \
|
392 |
|
|
__IN1(s##_local) __IN2(s,s1,"w") : "=a" (_v) : "Nd" (port) ,##i ); return _v; } \
|
393 |
|
|
__IN1(s##_p_local) __IN2(s,s1,"w") __FULL_SLOW_DOWN_IO : "=a" (_v) : "Nd" (port) ,##i ); return _v; } \
|
394 |
|
|
__INQ(s,s) \
|
395 |
|
|
__INQ(s,s##_p)
|
396 |
|
|
#endif /* !CONFIG_MULTIQUAD || STANDALONE */
|
397 |
|
|
|
398 |
|
|
#define __INS(s) \
|
399 |
|
|
static inline void ins##s(unsigned short port, void * addr, unsigned long count) \
|
400 |
|
|
{ __asm__ __volatile__ ("rep ; ins" #s \
|
401 |
|
|
: "=D" (addr), "=c" (count) : "d" (port),"0" (addr),"1" (count)); }
|
402 |
|
|
|
403 |
|
|
#define __OUTS(s) \
|
404 |
|
|
static inline void outs##s(unsigned short port, const void * addr, unsigned long count) \
|
405 |
|
|
{ __asm__ __volatile__ ("rep ; outs" #s \
|
406 |
|
|
: "=S" (addr), "=c" (count) : "d" (port),"0" (addr),"1" (count)); }
|
407 |
|
|
|
408 |
|
|
#define RETURN_TYPE unsigned char
|
409 |
|
|
__IN(b,"")
|
410 |
|
|
#undef RETURN_TYPE
|
411 |
|
|
#define RETURN_TYPE unsigned short
|
412 |
|
|
__IN(w,"")
|
413 |
|
|
#undef RETURN_TYPE
|
414 |
|
|
#define RETURN_TYPE unsigned int
|
415 |
|
|
__IN(l,"")
|
416 |
|
|
#undef RETURN_TYPE
|
417 |
|
|
|
418 |
|
|
__OUT(b,"b",char)
|
419 |
|
|
__OUT(w,"w",short)
|
420 |
|
|
__OUT(l,,int)
|
421 |
|
|
|
422 |
|
|
__INS(b)
|
423 |
|
|
__INS(w)
|
424 |
|
|
__INS(l)
|
425 |
|
|
|
426 |
|
|
__OUTS(b)
|
427 |
|
|
__OUTS(w)
|
428 |
|
|
__OUTS(l)
|
429 |
|
|
|
430 |
|
|
#endif
|