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#ifndef __ASM_MPSPEC_H

#define __ASM_MPSPEC_H

/*

 * Structure definitions for SMP machines following the

 * Intel Multiprocessing Specification 1.1 and 1.4.

 */

/*

 * This tag identifies where the SMP configuration

 * information is.

 */

#define SMP_MAGIC_IDENT (('_'<<24)|('P'<<16)|('M'<<8)|'_')

/*

 * a maximum of 16 APICs with the current APIC ID architecture.

 * xAPICs can have up to 256.  SAPICs have 16 ID bits.

 */

#ifdef CONFIG_X86_CLUSTERED_APIC

#define MAX_APICS 256

#else

#define MAX_APICS 16

#endif

#define MAX_MPC_ENTRY 1024

struct intel_mp_floating

{

        char mpf_signature[4];          /* "_MP_"                       */

        unsigned long mpf_physptr;      /* Configuration table address  */

        unsigned char mpf_length;       /* Our length (paragraphs)      */

        unsigned char mpf_specification;/* Specification version        */

        unsigned char mpf_checksum;     /* Checksum (makes sum 0)       */

        unsigned char mpf_feature1;     /* Standard or configuration ?  */

        unsigned char mpf_feature2;     /* Bit7 set for IMCR|PIC        */

        unsigned char mpf_feature3;     /* Unused (0)                   */

        unsigned char mpf_feature4;     /* Unused (0)                   */

        unsigned char mpf_feature5;     /* Unused (0)                   */

};

struct mp_config_table

{

        char mpc_signature[4];

#define MPC_SIGNATURE "PCMP"

        unsigned short mpc_length;      /* Size of table */

        char  mpc_spec;                 /* 0x01 */

        char  mpc_checksum;

        char  mpc_oem[8];

        char  mpc_productid[12];

        unsigned long mpc_oemptr;       /* 0 if not present */

        unsigned short mpc_oemsize;     /* 0 if not present */

        unsigned short mpc_oemcount;

        unsigned long mpc_lapic;        /* APIC address */

        unsigned long reserved;

};

/* Followed by entries */

#define MP_PROCESSOR    0

#define MP_BUS          1

#define MP_IOAPIC       2

#define MP_INTSRC       3

#define MP_LINTSRC      4

#define MP_TRANSLATION  192  /* Used by IBM NUMA-Q to describe node locality */

struct mpc_config_processor

{

        unsigned char mpc_type;

        unsigned char mpc_apicid;       /* Local APIC number */

        unsigned char mpc_apicver;      /* Its versions */

        unsigned char mpc_cpuflag;

#define CPU_ENABLED             1       /* Processor is available */

#define CPU_BOOTPROCESSOR       2       /* Processor is the BP */

        unsigned long mpc_cpufeature;

#define CPU_STEPPING_MASK 0x0F

#define CPU_MODEL_MASK  0xF0

#define CPU_FAMILY_MASK 0xF00

        unsigned long mpc_featureflag;  /* CPUID feature value */

        unsigned long mpc_reserved[2];

};

struct mpc_config_bus

{

        unsigned char mpc_type;

        unsigned char mpc_busid;

        unsigned char mpc_bustype[6] __attribute((packed));

};

/* List of Bus Type string values, Intel MP Spec. */

#define BUSTYPE_EISA    "EISA"

#define BUSTYPE_ISA     "ISA"

#define BUSTYPE_INTERN  "INTERN"        /* Internal BUS */

#define BUSTYPE_MCA     "MCA"

#define BUSTYPE_VL      "VL"            /* Local bus */

#define BUSTYPE_PCI     "PCI"

#define BUSTYPE_PCMCIA  "PCMCIA"

#define BUSTYPE_CBUS    "CBUS"

#define BUSTYPE_CBUSII  "CBUSII"

#define BUSTYPE_FUTURE  "FUTURE"

#define BUSTYPE_MBI     "MBI"

#define BUSTYPE_MBII    "MBII"

#define BUSTYPE_MPI     "MPI"

#define BUSTYPE_MPSA    "MPSA"

#define BUSTYPE_NUBUS   "NUBUS"

#define BUSTYPE_TC      "TC"

#define BUSTYPE_VME     "VME"

#define BUSTYPE_XPRESS  "XPRESS"

struct mpc_config_ioapic

{

        unsigned char mpc_type;

        unsigned char mpc_apicid;

        unsigned char mpc_apicver;

        unsigned char mpc_flags;

#define MPC_APIC_USABLE         0x01

        unsigned long mpc_apicaddr;

};

struct mpc_config_intsrc

{

        unsigned char mpc_type;

        unsigned char mpc_irqtype;

        unsigned short mpc_irqflag;

        unsigned char mpc_srcbus;

        unsigned char mpc_srcbusirq;

        unsigned char mpc_dstapic;

        unsigned char mpc_dstirq;

};

enum mp_irq_source_types {

        mp_INT = 0,

        mp_NMI = 1,

        mp_SMI = 2,

        mp_ExtINT = 3

};

#define MP_IRQDIR_DEFAULT       0

#define MP_IRQDIR_HIGH          1

#define MP_IRQDIR_LOW           3

struct mpc_config_lintsrc

{

        unsigned char mpc_type;

        unsigned char mpc_irqtype;

        unsigned short mpc_irqflag;

        unsigned char mpc_srcbusid;

        unsigned char mpc_srcbusirq;

        unsigned char mpc_destapic;

#define MP_APIC_ALL     0xFF

        unsigned char mpc_destapiclint;

};

struct mp_config_oemtable

{

        char oem_signature[4];

#define MPC_OEM_SIGNATURE "_OEM"

        unsigned short oem_length;      /* Size of table */

        char  oem_rev;                  /* 0x01 */

        char  oem_checksum;

        char  mpc_oem[8];

};

struct mpc_config_translation

{

        unsigned char mpc_type;

        unsigned char trans_len;

        unsigned char trans_type;

        unsigned char trans_quad;

        unsigned char trans_global;

        unsigned char trans_local;

        unsigned short trans_reserved;

};

/*

 *      Default configurations

 *

 *      1       2 CPU ISA 82489DX

 *      2       2 CPU EISA 82489DX neither IRQ 0 timer nor IRQ 13 DMA chaining

 *      3       2 CPU EISA 82489DX

 *      4       2 CPU MCA 82489DX

 *      5       2 CPU ISA+PCI

 *      6       2 CPU EISA+PCI

 *      7       2 CPU MCA+PCI

 */

#ifdef CONFIG_MULTIQUAD

#define MAX_IRQ_SOURCES 512

#else /* !CONFIG_MULTIQUAD */

#define MAX_IRQ_SOURCES 256

#endif /* CONFIG_MULTIQUAD */

#define MAX_MP_BUSSES 32

enum mp_bustype {

        MP_BUS_ISA = 1,

        MP_BUS_EISA,

        MP_BUS_PCI,

        MP_BUS_MCA

};

extern int *mp_bus_id_to_type;

extern int *mp_bus_id_to_node;

extern int *mp_bus_id_to_local;

extern int *mp_bus_id_to_pci_bus;

extern int quad_local_to_mp_bus_id [NR_CPUS/4][4];

extern unsigned int boot_cpu_physical_apicid;

extern unsigned long phys_cpu_present_map;

extern int smp_found_config;

extern void find_smp_config (void);

extern void get_smp_config (void);

extern int nr_ioapics;

extern int apic_version [MAX_APICS];

extern int mp_irq_entries;

extern struct mpc_config_intsrc *mp_irqs;

extern int mpc_default_type;

extern int mp_current_pci_id;

extern unsigned long mp_lapic_addr;

extern int pic_mode;

extern int using_apic_timer;

#ifdef CONFIG_ACPI_BOOT

extern void mp_register_lapic (u8 id, u8 enabled);

extern void mp_register_lapic_address (u64 address);

#ifdef CONFIG_X86_IO_APIC

extern void mp_register_ioapic (u8 id, u32 address, u32 irq_base);

extern void mp_override_legacy_irq (u8 bus_irq, u8 polarity, u8 trigger, u32 global_irq);

extern void mp_config_acpi_legacy_irqs (void);

extern void mp_parse_prt (void);

#endif /*!CONFIG_X86_IO_APIC*/

#endif /*CONFIG_ACPI_BOOT*/

#endif