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[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [include/] [asm-i386/] [smpboot.h] - Blame information for rev 1765

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1 1275 phoenix
#ifndef __ASM_SMPBOOT_H
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#define __ASM_SMPBOOT_H
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/*emum for clustered_apic_mode values*/
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enum{
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        CLUSTERED_APIC_NONE = 0,
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        CLUSTERED_APIC_XAPIC,
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        CLUSTERED_APIC_NUMAQ
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};
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#ifdef CONFIG_X86_CLUSTERED_APIC
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extern unsigned int apic_broadcast_id;
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extern unsigned char clustered_apic_mode;
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extern unsigned char esr_disable;
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extern unsigned char int_delivery_mode;
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extern unsigned int int_dest_addr_mode;
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extern int cyclone_setup(char*);
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static inline void detect_clustered_apic(char* oem, char* prod)
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{
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        /*
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         * Can't recognize Summit xAPICs at present, so use the OEM ID.
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         */
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        if (!strncmp(oem, "IBM ENSW", 8) && !strncmp(prod, "VIGIL SMP", 9)){
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                clustered_apic_mode = CLUSTERED_APIC_XAPIC;
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                apic_broadcast_id = APIC_BROADCAST_ID_XAPIC;
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                int_dest_addr_mode = APIC_DEST_PHYSICAL;
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                int_delivery_mode = dest_Fixed;
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                esr_disable = 1;
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                /*Start cyclone clock*/
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                cyclone_setup(0);
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        /* check for ACPI tables */
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        } else if (!strncmp(oem, "IBM", 3) &&
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            (!strncmp(prod, "SERVIGIL", 8) ||
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             !strncmp(prod, "EXA", 3) ||
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             !strncmp(prod, "RUTHLESS", 8))){
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                clustered_apic_mode = CLUSTERED_APIC_XAPIC;
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                apic_broadcast_id = APIC_BROADCAST_ID_XAPIC;
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                int_dest_addr_mode = APIC_DEST_PHYSICAL;
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                int_delivery_mode = dest_Fixed;
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                esr_disable = 1;
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                /*Start cyclone clock*/
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                cyclone_setup(0);
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        } else if (!strncmp(oem, "IBM NUMA", 8)){
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                clustered_apic_mode = CLUSTERED_APIC_NUMAQ;
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                apic_broadcast_id = APIC_BROADCAST_ID_APIC;
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                int_dest_addr_mode = APIC_DEST_LOGICAL;
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                int_delivery_mode = dest_LowestPrio;
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                esr_disable = 1;
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        }
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}
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#define INT_DEST_ADDR_MODE (int_dest_addr_mode)
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#define INT_DELIVERY_MODE (int_delivery_mode)
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#else /* CONFIG_X86_CLUSTERED_APIC */
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#define apic_broadcast_id (APIC_BROADCAST_ID_APIC)
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#define clustered_apic_mode (CLUSTERED_APIC_NONE)
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#define esr_disable (0)
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#define detect_clustered_apic(x,y)
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#define INT_DEST_ADDR_MODE (APIC_DEST_LOGICAL)  /* logical delivery */
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#define INT_DELIVERY_MODE (dest_LowestPrio)
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#endif /* CONFIG_X86_CLUSTERED_APIC */
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#define BAD_APICID 0xFFu
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#define TRAMPOLINE_LOW phys_to_virt((clustered_apic_mode == CLUSTERED_APIC_NUMAQ)?0x8:0x467)
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#define TRAMPOLINE_HIGH phys_to_virt((clustered_apic_mode == CLUSTERED_APIC_NUMAQ)?0xa:0x469)
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#define boot_cpu_apicid ((clustered_apic_mode == CLUSTERED_APIC_NUMAQ)?boot_cpu_logical_apicid:boot_cpu_physical_apicid)
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extern unsigned char raw_phys_apicid[NR_CPUS];
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/*
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 * How to map from the cpu_present_map
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 */
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static inline int cpu_present_to_apicid(int mps_cpu)
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{
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        if (clustered_apic_mode == CLUSTERED_APIC_XAPIC)
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                return raw_phys_apicid[mps_cpu];
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        if(clustered_apic_mode == CLUSTERED_APIC_NUMAQ)
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                return (mps_cpu/4)*16 + (1<<(mps_cpu%4));
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        return mps_cpu;
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}
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static inline unsigned long apicid_to_phys_cpu_present(int apicid)
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{
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        if(clustered_apic_mode)
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                return 1UL << (((apicid >> 4) << 2) + (apicid & 0x3));
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        return 1UL << apicid;
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}
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#define physical_to_logical_apicid(phys_apic) ( (1ul << (phys_apic & 0x3)) | (phys_apic & 0xF0u) )
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/*
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 * Mappings between logical cpu number and logical / physical apicid
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 * The first four macros are trivial, but it keeps the abstraction consistent
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 */
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extern volatile int logical_apicid_2_cpu[];
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extern volatile int cpu_2_logical_apicid[];
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extern volatile int physical_apicid_2_cpu[];
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extern volatile int cpu_2_physical_apicid[];
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#define logical_apicid_to_cpu(apicid) logical_apicid_2_cpu[apicid]
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#define cpu_to_logical_apicid(cpu) cpu_2_logical_apicid[cpu]
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#define physical_apicid_to_cpu(apicid) physical_apicid_2_cpu[apicid]
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#define cpu_to_physical_apicid(cpu) cpu_2_physical_apicid[cpu]
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#ifdef CONFIG_MULTIQUAD                 /* use logical IDs to bootstrap */
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#define boot_apicid_to_cpu(apicid) logical_apicid_2_cpu[apicid]
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#define cpu_to_boot_apicid(cpu) cpu_2_logical_apicid[cpu]
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#else /* !CONFIG_MULTIQUAD */           /* use physical IDs to bootstrap */
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#define boot_apicid_to_cpu(apicid) physical_apicid_2_cpu[apicid]
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#define cpu_to_boot_apicid(cpu) cpu_2_physical_apicid[cpu]
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#endif /* CONFIG_MULTIQUAD */
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#ifdef CONFIG_X86_CLUSTERED_APIC
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static inline int target_cpus(void)
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{
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        static int cpu;
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        switch(clustered_apic_mode){
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                case CLUSTERED_APIC_NUMAQ:
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                        /* Broadcast intrs to local quad only. */
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                        return APIC_BROADCAST_ID_APIC;
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                case CLUSTERED_APIC_XAPIC:
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                        /*round robin the interrupts*/
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                        cpu = (cpu+1)%smp_num_cpus;
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                        return cpu_to_physical_apicid(cpu);
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                default:
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        }
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        return cpu_online_map;
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}
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#else
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#define target_cpus() (cpu_online_map)
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#endif
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#endif

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