OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [include/] [asm-ia64/] [cache.h] - Blame information for rev 1774

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 1275 phoenix
#ifndef _ASM_IA64_CACHE_H
2
#define _ASM_IA64_CACHE_H
3
 
4
#include <linux/config.h>
5
 
6
/*
7
 * Copyright (C) 1998-2000 Hewlett-Packard Co
8
 *      David Mosberger-Tang <davidm@hpl.hp.com>
9
 */
10
 
11
/* Bytes per L1 (data) cache line.  */
12
#define L1_CACHE_SHIFT          CONFIG_IA64_L1_CACHE_SHIFT
13
#define L1_CACHE_BYTES          (1 << L1_CACHE_SHIFT)
14
 
15
#ifdef CONFIG_SMP
16
# define SMP_CACHE_SHIFT        L1_CACHE_SHIFT
17
# define SMP_CACHE_BYTES        L1_CACHE_BYTES
18
#else
19
  /*
20
   * The "aligned" directive can only _increase_ alignment, so this is
21
   * safe and provides an easy way to avoid wasting space on a
22
   * uni-processor:
23
   */
24
# define SMP_CACHE_SHIFT        3
25
# define SMP_CACHE_BYTES        (1 << 3)
26
#endif
27
 
28
#endif /* _ASM_IA64_CACHE_H */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.