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#ifndef _ASM_IA64_FPU_H
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#define _ASM_IA64_FPU_H
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/*
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* Copyright (C) 1998, 1999, 2002, 2003 Hewlett-Packard Co
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* David Mosberger-Tang <davidm@hpl.hp.com>
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*/
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#include <asm/types.h>
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/* floating point status register: */
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#define FPSR_TRAP_VD (1 << 0) /* invalid op trap disabled */
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#define FPSR_TRAP_DD (1 << 1) /* denormal trap disabled */
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#define FPSR_TRAP_ZD (1 << 2) /* zero-divide trap disabled */
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#define FPSR_TRAP_OD (1 << 3) /* overflow trap disabled */
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#define FPSR_TRAP_UD (1 << 4) /* underflow trap disabled */
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#define FPSR_TRAP_ID (1 << 5) /* inexact trap disabled */
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#define FPSR_S0(x) ((x) << 6)
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#define FPSR_S1(x) ((x) << 19)
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#define FPSR_S2(x) (__IA64_UL(x) << 32)
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#define FPSR_S3(x) (__IA64_UL(x) << 45)
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/* floating-point status field controls: */
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#define FPSF_FTZ (1 << 0) /* flush-to-zero */
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#define FPSF_WRE (1 << 1) /* widest-range exponent */
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#define FPSF_PC(x) (((x) & 0x3) << 2) /* precision control */
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#define FPSF_RC(x) (((x) & 0x3) << 4) /* rounding control */
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#define FPSF_TD (1 << 6) /* trap disabled */
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/* floating-point status field flags: */
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#define FPSF_V (1 << 7) /* invalid operation flag */
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#define FPSF_D (1 << 8) /* denormal/unnormal operand flag */
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#define FPSF_Z (1 << 9) /* zero divide (IEEE) flag */
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#define FPSF_O (1 << 10) /* overflow (IEEE) flag */
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#define FPSF_U (1 << 11) /* underflow (IEEE) flag */
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#define FPSF_I (1 << 12) /* inexact (IEEE) flag) */
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/* floating-point rounding control: */
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#define FPRC_NEAREST 0x0
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#define FPRC_NEGINF 0x1
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#define FPRC_POSINF 0x2
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#define FPRC_TRUNC 0x3
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#define FPSF_DEFAULT (FPSF_PC (0x3) | FPSF_RC (FPRC_NEAREST))
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/* This default value is the same as HP-UX uses. Don't change it
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without a very good reason. */
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#define FPSR_DEFAULT (FPSR_TRAP_VD | FPSR_TRAP_DD | FPSR_TRAP_ZD \
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| FPSR_TRAP_OD | FPSR_TRAP_UD | FPSR_TRAP_ID \
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| FPSR_S0 (FPSF_DEFAULT) \
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| FPSR_S1 (FPSF_DEFAULT | FPSF_TD | FPSF_WRE) \
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| FPSR_S2 (FPSF_DEFAULT | FPSF_TD) \
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| FPSR_S3 (FPSF_DEFAULT | FPSF_TD))
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# ifndef __ASSEMBLY__
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struct ia64_fpreg {
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union {
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unsigned long bits[2];
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long double __dummy; /* force 16-byte alignment */
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} u;
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};
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# endif /* __ASSEMBLY__ */
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#endif /* _ASM_IA64_FPU_H */
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