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1275 |
phoenix |
/*
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* File: mca.h
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* Purpose: Machine check handling specific defines
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*
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* Copyright (C) 1999, 2004 Silicon Graphics, Inc.
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* Copyright (C) Vijay Chander (vijay@engr.sgi.com)
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* Copyright (C) Srinivasa Thirumalachar (sprasad@engr.sgi.com)
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*/
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#ifndef _ASM_IA64_MCA_H
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#define _ASM_IA64_MCA_H
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#if !defined(__ASSEMBLY__)
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#include <linux/types.h>
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#include <asm/param.h>
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#include <asm/sal.h>
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#include <asm/processor.h>
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#include <asm/mca_asm.h>
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#define IA64_MCA_RENDEZ_TIMEOUT (20 * 1000) /* value in milliseconds - 20 seconds */
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typedef union cmcv_reg_u {
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u64 cmcv_regval;
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struct {
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u64 cmcr_vector : 8;
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u64 cmcr_reserved1 : 4;
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u64 cmcr_ignored1 : 1;
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u64 cmcr_reserved2 : 3;
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u64 cmcr_mask : 1;
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u64 cmcr_ignored2 : 47;
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} cmcv_reg_s;
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} cmcv_reg_t;
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#define cmcv_mask cmcv_reg_s.cmcr_mask
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#define cmcv_vector cmcv_reg_s.cmcr_vector
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enum {
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IA64_MCA_RENDEZ_CHECKIN_NOTDONE = 0x0,
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IA64_MCA_RENDEZ_CHECKIN_DONE = 0x1
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};
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/* the following data structure is used for TLB error recovery purposes */
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extern struct ia64_mca_tlb_info {
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u64 cr_lid;
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u64 percpu_paddr;
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u64 ptce_base;
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u32 ptce_count[2];
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u32 ptce_stride[2];
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u64 pal_paddr;
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u64 pal_base;
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} ia64_mca_tlb_list[NR_CPUS];
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/* Information maintained by the MC infrastructure */
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typedef struct ia64_mc_info_s {
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u64 imi_mca_handler;
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size_t imi_mca_handler_size;
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u64 imi_monarch_init_handler;
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size_t imi_monarch_init_handler_size;
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u64 imi_slave_init_handler;
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size_t imi_slave_init_handler_size;
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u8 imi_rendez_checkin[NR_CPUS];
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} ia64_mc_info_t;
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typedef struct ia64_mca_sal_to_os_state_s {
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u64 imsto_os_gp; /* GP of the os registered with the SAL */
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u64 imsto_pal_proc; /* PAL_PROC entry point - physical addr */
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u64 imsto_sal_proc; /* SAL_PROC entry point - physical addr */
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u64 imsto_sal_gp; /* GP of the SAL - physical */
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u64 imsto_rendez_state; /* Rendez state information */
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u64 imsto_sal_check_ra; /* Return address in SAL_CHECK while going
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* back to SAL from OS after MCA handling.
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*/
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u64 pal_min_state; /* from PAL in r17 */
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u64 proc_state_param; /* from PAL in r18. See SDV 2:268 11.3.2.1 */
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} ia64_mca_sal_to_os_state_t;
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enum {
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IA64_MCA_CORRECTED = 0x0, /* Error has been corrected by OS_MCA */
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IA64_MCA_WARM_BOOT = -1, /* Warm boot of the system need from SAL */
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IA64_MCA_COLD_BOOT = -2, /* Cold boot of the system need from SAL */
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IA64_MCA_HALT = -3 /* System to be halted by SAL */
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};
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enum {
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IA64_MCA_SAME_CONTEXT = 0x0, /* SAL to return to same context */
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IA64_MCA_NEW_CONTEXT = -1 /* SAL to return to new context */
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};
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typedef struct ia64_mca_os_to_sal_state_s {
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u64 imots_os_status; /* OS status to SAL as to what happened
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* with the MCA handling.
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*/
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u64 imots_sal_gp; /* GP of the SAL - physical */
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u64 imots_context; /* 0 if return to same context
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1 if return to new context */
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u64 *imots_new_min_state; /* Pointer to structure containing
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* new values of registers in the min state
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* save area.
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*/
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u64 imots_sal_check_ra; /* Return address in SAL_CHECK while going
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* back to SAL from OS after MCA handling.
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*/
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} ia64_mca_os_to_sal_state_t;
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extern void ia64_mca_init(void);
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extern void ia64_os_mca_dispatch(void);
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extern void ia64_os_mca_dispatch_end(void);
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extern void ia64_mca_ucmc_handler(void);
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extern void ia64_monarch_init_handler(void);
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extern void ia64_slave_init_handler(void);
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extern void ia64_mca_cmc_vector_setup(void);
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#endif /* !__ASSEMBLY__ */
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#endif /* _ASM_IA64_MCA_H */
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