1 |
1275 |
phoenix |
#ifndef _ASM_IA64_SAL_H
|
2 |
|
|
#define _ASM_IA64_SAL_H
|
3 |
|
|
|
4 |
|
|
/*
|
5 |
|
|
* System Abstraction Layer definitions.
|
6 |
|
|
*
|
7 |
|
|
* This is based on version 2.5 of the manual "IA-64 System
|
8 |
|
|
* Abstraction Layer".
|
9 |
|
|
*
|
10 |
|
|
* Copyright (C) 2001 Intel
|
11 |
|
|
* Copyright (C) 2002 Jenna Hall <jenna.s.hall@intel.com>
|
12 |
|
|
* Copyright (C) 2001 Fred Lewis <frederick.v.lewis@intel.com>
|
13 |
|
|
* Copyright (C) 1998, 1999, 2001, 2003 Hewlett-Packard Co
|
14 |
|
|
* David Mosberger-Tang <davidm@hpl.hp.com>
|
15 |
|
|
* Copyright (C) 1999 Srinivasa Prasad Thirumalachar <sprasad@sprasad.engr.sgi.com>
|
16 |
|
|
*
|
17 |
|
|
* 02/01/04 J. Hall Updated Error Record Structures to conform to July 2001
|
18 |
|
|
* revision of the SAL spec.
|
19 |
|
|
* 01/01/03 fvlewis Updated Error Record Structures to conform with Nov. 2000
|
20 |
|
|
* revision of the SAL spec.
|
21 |
|
|
* 99/09/29 davidm Updated for SAL 2.6.
|
22 |
|
|
* 00/03/29 cfleck Updated SAL Error Logging info for processor (SAL 2.6)
|
23 |
|
|
* (plus examples of platform error info structures from smariset @ Intel)
|
24 |
|
|
*/
|
25 |
|
|
|
26 |
|
|
#define IA64_SAL_PLATFORM_FEATURE_BUS_LOCK_BIT 0
|
27 |
|
|
#define IA64_SAL_PLATFORM_FEATURE_IRQ_REDIR_HINT_BIT 1
|
28 |
|
|
#define IA64_SAL_PLATFORM_FEATURE_IPI_REDIR_HINT_BIT 2
|
29 |
|
|
#define IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT_BIT 3
|
30 |
|
|
|
31 |
|
|
#define IA64_SAL_PLATFORM_FEATURE_BUS_LOCK (1<<IA64_SAL_PLATFORM_FEATURE_BUS_LOCK_BIT)
|
32 |
|
|
#define IA64_SAL_PLATFORM_FEATURE_IRQ_REDIR_HINT (1<<IA64_SAL_PLATFORM_FEATURE_IRQ_REDIR_HINT_BIT)
|
33 |
|
|
#define IA64_SAL_PLATFORM_FEATURE_IPI_REDIR_HINT (1<<IA64_SAL_PLATFORM_FEATURE_IPI_REDIR_HINT_BIT)
|
34 |
|
|
#define IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT (1<<IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT_BIT)
|
35 |
|
|
|
36 |
|
|
#ifndef __ASSEMBLY__
|
37 |
|
|
|
38 |
|
|
#include <linux/spinlock.h>
|
39 |
|
|
#include <linux/efi.h>
|
40 |
|
|
|
41 |
|
|
#include <asm/pal.h>
|
42 |
|
|
#include <asm/system.h>
|
43 |
|
|
#include <asm/fpu.h>
|
44 |
|
|
|
45 |
|
|
extern spinlock_t sal_lock;
|
46 |
|
|
|
47 |
|
|
/* SAL spec _requires_ eight args for each call. */
|
48 |
|
|
#define __SAL_CALL(result,a0,a1,a2,a3,a4,a5,a6,a7) \
|
49 |
|
|
result = (*ia64_sal)(a0,a1,a2,a3,a4,a5,a6,a7)
|
50 |
|
|
|
51 |
|
|
# define SAL_CALL(result,args...) do { \
|
52 |
|
|
unsigned long __ia64_sc_flags; \
|
53 |
|
|
struct ia64_fpreg __ia64_sc_fr[6]; \
|
54 |
|
|
ia64_save_scratch_fpregs(__ia64_sc_fr); \
|
55 |
|
|
spin_lock_irqsave(&sal_lock, __ia64_sc_flags); \
|
56 |
|
|
__SAL_CALL(result, args); \
|
57 |
|
|
spin_unlock_irqrestore(&sal_lock, __ia64_sc_flags); \
|
58 |
|
|
ia64_load_scratch_fpregs(__ia64_sc_fr); \
|
59 |
|
|
} while (0)
|
60 |
|
|
|
61 |
|
|
# define SAL_CALL_NOLOCK(result,args...) do { \
|
62 |
|
|
unsigned long __ia64_scn_flags; \
|
63 |
|
|
struct ia64_fpreg __ia64_scn_fr[6]; \
|
64 |
|
|
ia64_save_scratch_fpregs(__ia64_scn_fr); \
|
65 |
|
|
local_irq_save(__ia64_scn_flags); \
|
66 |
|
|
__SAL_CALL(result, args); \
|
67 |
|
|
local_irq_restore(__ia64_scn_flags); \
|
68 |
|
|
ia64_load_scratch_fpregs(__ia64_scn_fr); \
|
69 |
|
|
} while (0)
|
70 |
|
|
|
71 |
|
|
# define SAL_CALL_REENTRANT(result,args...) do { \
|
72 |
|
|
struct ia64_fpreg __ia64_scs_fr[6]; \
|
73 |
|
|
ia64_save_scratch_fpregs(__ia64_scs_fr); \
|
74 |
|
|
__SAL_CALL(result, args); \
|
75 |
|
|
ia64_load_scratch_fpregs(__ia64_scs_fr); \
|
76 |
|
|
} while (0)
|
77 |
|
|
|
78 |
|
|
#define SAL_SET_VECTORS 0x01000000
|
79 |
|
|
#define SAL_GET_STATE_INFO 0x01000001
|
80 |
|
|
#define SAL_GET_STATE_INFO_SIZE 0x01000002
|
81 |
|
|
#define SAL_CLEAR_STATE_INFO 0x01000003
|
82 |
|
|
#define SAL_MC_RENDEZ 0x01000004
|
83 |
|
|
#define SAL_MC_SET_PARAMS 0x01000005
|
84 |
|
|
#define SAL_REGISTER_PHYSICAL_ADDR 0x01000006
|
85 |
|
|
|
86 |
|
|
#define SAL_CACHE_FLUSH 0x01000008
|
87 |
|
|
#define SAL_CACHE_INIT 0x01000009
|
88 |
|
|
#define SAL_PCI_CONFIG_READ 0x01000010
|
89 |
|
|
#define SAL_PCI_CONFIG_WRITE 0x01000011
|
90 |
|
|
#define SAL_FREQ_BASE 0x01000012
|
91 |
|
|
|
92 |
|
|
#define SAL_UPDATE_PAL 0x01000020
|
93 |
|
|
|
94 |
|
|
struct ia64_sal_retval {
|
95 |
|
|
/*
|
96 |
|
|
* A zero status value indicates call completed without error.
|
97 |
|
|
* A negative status value indicates reason of call failure.
|
98 |
|
|
* A positive status value indicates success but an
|
99 |
|
|
* informational value should be printed (e.g., "reboot for
|
100 |
|
|
* change to take effect").
|
101 |
|
|
*/
|
102 |
|
|
s64 status;
|
103 |
|
|
u64 v0;
|
104 |
|
|
u64 v1;
|
105 |
|
|
u64 v2;
|
106 |
|
|
};
|
107 |
|
|
|
108 |
|
|
typedef struct ia64_sal_retval (*ia64_sal_handler) (u64, ...);
|
109 |
|
|
|
110 |
|
|
enum {
|
111 |
|
|
SAL_FREQ_BASE_PLATFORM = 0,
|
112 |
|
|
SAL_FREQ_BASE_INTERVAL_TIMER = 1,
|
113 |
|
|
SAL_FREQ_BASE_REALTIME_CLOCK = 2
|
114 |
|
|
};
|
115 |
|
|
|
116 |
|
|
/*
|
117 |
|
|
* The SAL system table is followed by a variable number of variable
|
118 |
|
|
* length descriptors. The structure of these descriptors follows
|
119 |
|
|
* below.
|
120 |
|
|
* The defininition follows SAL specs from July 2000
|
121 |
|
|
*/
|
122 |
|
|
struct ia64_sal_systab {
|
123 |
|
|
u8 signature[4]; /* should be "SST_" */
|
124 |
|
|
u32 size; /* size of this table in bytes */
|
125 |
|
|
u8 sal_rev_minor;
|
126 |
|
|
u8 sal_rev_major;
|
127 |
|
|
u16 entry_count; /* # of entries in variable portion */
|
128 |
|
|
u8 checksum;
|
129 |
|
|
u8 reserved1[7];
|
130 |
|
|
u8 sal_a_rev_minor;
|
131 |
|
|
u8 sal_a_rev_major;
|
132 |
|
|
u8 sal_b_rev_minor;
|
133 |
|
|
u8 sal_b_rev_major;
|
134 |
|
|
/* oem_id & product_id: terminating NUL is missing if string is exactly 32 bytes long. */
|
135 |
|
|
u8 oem_id[32];
|
136 |
|
|
u8 product_id[32]; /* ASCII product id */
|
137 |
|
|
u8 reserved2[8];
|
138 |
|
|
};
|
139 |
|
|
|
140 |
|
|
enum sal_systab_entry_type {
|
141 |
|
|
SAL_DESC_ENTRY_POINT = 0,
|
142 |
|
|
SAL_DESC_MEMORY = 1,
|
143 |
|
|
SAL_DESC_PLATFORM_FEATURE = 2,
|
144 |
|
|
SAL_DESC_TR = 3,
|
145 |
|
|
SAL_DESC_PTC = 4,
|
146 |
|
|
SAL_DESC_AP_WAKEUP = 5
|
147 |
|
|
};
|
148 |
|
|
|
149 |
|
|
/*
|
150 |
|
|
* Entry type: Size:
|
151 |
|
|
* 0 48
|
152 |
|
|
* 1 32
|
153 |
|
|
* 2 16
|
154 |
|
|
* 3 32
|
155 |
|
|
* 4 16
|
156 |
|
|
* 5 16
|
157 |
|
|
*/
|
158 |
|
|
#define SAL_DESC_SIZE(type) "\060\040\020\040\020\020"[(unsigned) type]
|
159 |
|
|
|
160 |
|
|
typedef struct ia64_sal_desc_entry_point {
|
161 |
|
|
u8 type;
|
162 |
|
|
u8 reserved1[7];
|
163 |
|
|
u64 pal_proc;
|
164 |
|
|
u64 sal_proc;
|
165 |
|
|
u64 gp;
|
166 |
|
|
u8 reserved2[16];
|
167 |
|
|
}ia64_sal_desc_entry_point_t;
|
168 |
|
|
|
169 |
|
|
typedef struct ia64_sal_desc_memory {
|
170 |
|
|
u8 type;
|
171 |
|
|
u8 used_by_sal; /* needs to be mapped for SAL? */
|
172 |
|
|
u8 mem_attr; /* current memory attribute setting */
|
173 |
|
|
u8 access_rights; /* access rights set up by SAL */
|
174 |
|
|
u8 mem_attr_mask; /* mask of supported memory attributes */
|
175 |
|
|
u8 reserved1;
|
176 |
|
|
u8 mem_type; /* memory type */
|
177 |
|
|
u8 mem_usage; /* memory usage */
|
178 |
|
|
u64 addr; /* physical address of memory */
|
179 |
|
|
u32 length; /* length (multiple of 4KB pages) */
|
180 |
|
|
u32 reserved2;
|
181 |
|
|
u8 oem_reserved[8];
|
182 |
|
|
} ia64_sal_desc_memory_t;
|
183 |
|
|
|
184 |
|
|
typedef struct ia64_sal_desc_platform_feature {
|
185 |
|
|
u8 type;
|
186 |
|
|
u8 feature_mask;
|
187 |
|
|
u8 reserved1[14];
|
188 |
|
|
} ia64_sal_desc_platform_feature_t;
|
189 |
|
|
|
190 |
|
|
typedef struct ia64_sal_desc_tr {
|
191 |
|
|
u8 type;
|
192 |
|
|
u8 tr_type; /* 0 == instruction, 1 == data */
|
193 |
|
|
u8 regnum; /* translation register number */
|
194 |
|
|
u8 reserved1[5];
|
195 |
|
|
u64 addr; /* virtual address of area covered */
|
196 |
|
|
u64 page_size; /* encoded page size */
|
197 |
|
|
u8 reserved2[8];
|
198 |
|
|
} ia64_sal_desc_tr_t;
|
199 |
|
|
|
200 |
|
|
typedef struct ia64_sal_desc_ptc {
|
201 |
|
|
u8 type;
|
202 |
|
|
u8 reserved1[3];
|
203 |
|
|
u32 num_domains; /* # of coherence domains */
|
204 |
|
|
u64 domain_info; /* physical address of domain info table */
|
205 |
|
|
} ia64_sal_desc_ptc_t;
|
206 |
|
|
|
207 |
|
|
typedef struct ia64_sal_ptc_domain_info {
|
208 |
|
|
u64 proc_count; /* number of processors in domain */
|
209 |
|
|
u64 proc_list; /* physical address of LID array */
|
210 |
|
|
} ia64_sal_ptc_domain_info_t;
|
211 |
|
|
|
212 |
|
|
typedef struct ia64_sal_ptc_domain_proc_entry {
|
213 |
|
|
u64 id : 8; /* id of processor */
|
214 |
|
|
u64 eid : 8; /* eid of processor */
|
215 |
|
|
} ia64_sal_ptc_domain_proc_entry_t;
|
216 |
|
|
|
217 |
|
|
|
218 |
|
|
#define IA64_SAL_AP_EXTERNAL_INT 0
|
219 |
|
|
|
220 |
|
|
typedef struct ia64_sal_desc_ap_wakeup {
|
221 |
|
|
u8 type;
|
222 |
|
|
u8 mechanism; /* 0 == external interrupt */
|
223 |
|
|
u8 reserved1[6];
|
224 |
|
|
u64 vector; /* interrupt vector in range 0x10-0xff */
|
225 |
|
|
} ia64_sal_desc_ap_wakeup_t ;
|
226 |
|
|
|
227 |
|
|
extern ia64_sal_handler ia64_sal;
|
228 |
|
|
extern struct ia64_sal_desc_ptc *ia64_ptc_domain_info;
|
229 |
|
|
|
230 |
|
|
extern const char *ia64_sal_strerror (long status);
|
231 |
|
|
extern void ia64_sal_init (struct ia64_sal_systab *sal_systab);
|
232 |
|
|
|
233 |
|
|
/* SAL information type encodings */
|
234 |
|
|
enum {
|
235 |
|
|
SAL_INFO_TYPE_MCA = 0, /* Machine check abort information */
|
236 |
|
|
SAL_INFO_TYPE_INIT = 1, /* Init information */
|
237 |
|
|
SAL_INFO_TYPE_CMC = 2, /* Corrected machine check information */
|
238 |
|
|
SAL_INFO_TYPE_CPE = 3 /* Corrected platform error information */
|
239 |
|
|
};
|
240 |
|
|
|
241 |
|
|
/* Encodings for machine check parameter types */
|
242 |
|
|
enum {
|
243 |
|
|
SAL_MC_PARAM_RENDEZ_INT = 1, /* Rendezvous interrupt */
|
244 |
|
|
SAL_MC_PARAM_RENDEZ_WAKEUP = 2, /* Wakeup */
|
245 |
|
|
SAL_MC_PARAM_CPE_INT = 3 /* Corrected Platform Error Int */
|
246 |
|
|
};
|
247 |
|
|
|
248 |
|
|
/* Encodings for rendezvous mechanisms */
|
249 |
|
|
enum {
|
250 |
|
|
SAL_MC_PARAM_MECHANISM_INT = 1, /* Use interrupt */
|
251 |
|
|
SAL_MC_PARAM_MECHANISM_MEM = 2 /* Use memory synchronization variable*/
|
252 |
|
|
};
|
253 |
|
|
|
254 |
|
|
/* Encodings for vectors which can be registered by the OS with SAL */
|
255 |
|
|
enum {
|
256 |
|
|
SAL_VECTOR_OS_MCA = 0,
|
257 |
|
|
SAL_VECTOR_OS_INIT = 1,
|
258 |
|
|
SAL_VECTOR_OS_BOOT_RENDEZ = 2
|
259 |
|
|
};
|
260 |
|
|
|
261 |
|
|
/* Encodings for mca_opt parameter sent to SAL_MC_SET_PARAMS */
|
262 |
|
|
#define SAL_MC_PARAM_RZ_ALWAYS 0x1
|
263 |
|
|
#define SAL_MC_PARAM_BINIT_ESCALATE 0x10
|
264 |
|
|
|
265 |
|
|
/*
|
266 |
|
|
* Definition of the SAL Error Log from the SAL spec
|
267 |
|
|
*/
|
268 |
|
|
|
269 |
|
|
/* SAL Error Record Section GUID Definitions */
|
270 |
|
|
#define SAL_PROC_DEV_ERR_SECT_GUID \
|
271 |
|
|
EFI_GUID(0xe429faf1, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
|
272 |
|
|
#define SAL_PLAT_MEM_DEV_ERR_SECT_GUID \
|
273 |
|
|
EFI_GUID(0xe429faf2, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
|
274 |
|
|
#define SAL_PLAT_SEL_DEV_ERR_SECT_GUID \
|
275 |
|
|
EFI_GUID(0xe429faf3, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
|
276 |
|
|
#define SAL_PLAT_PCI_BUS_ERR_SECT_GUID \
|
277 |
|
|
EFI_GUID(0xe429faf4, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
|
278 |
|
|
#define SAL_PLAT_SMBIOS_DEV_ERR_SECT_GUID \
|
279 |
|
|
EFI_GUID(0xe429faf5, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
|
280 |
|
|
#define SAL_PLAT_PCI_COMP_ERR_SECT_GUID \
|
281 |
|
|
EFI_GUID(0xe429faf6, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
|
282 |
|
|
#define SAL_PLAT_SPECIFIC_ERR_SECT_GUID \
|
283 |
|
|
EFI_GUID(0xe429faf7, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
|
284 |
|
|
#define SAL_PLAT_HOST_CTLR_ERR_SECT_GUID \
|
285 |
|
|
EFI_GUID(0xe429faf8, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
|
286 |
|
|
#define SAL_PLAT_BUS_ERR_SECT_GUID \
|
287 |
|
|
EFI_GUID(0xe429faf9, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
|
288 |
|
|
|
289 |
|
|
#define MAX_CACHE_ERRORS 6
|
290 |
|
|
#define MAX_TLB_ERRORS 6
|
291 |
|
|
#define MAX_BUS_ERRORS 1
|
292 |
|
|
|
293 |
|
|
/* Definition of version according to SAL spec for logging purposes */
|
294 |
|
|
typedef struct sal_log_revision {
|
295 |
|
|
u8 minor; /* BCD (0..99) */
|
296 |
|
|
u8 major; /* BCD (0..99) */
|
297 |
|
|
} sal_log_revision_t;
|
298 |
|
|
|
299 |
|
|
/* Definition of timestamp according to SAL spec for logging purposes */
|
300 |
|
|
typedef struct sal_log_timestamp {
|
301 |
|
|
u8 slh_second; /* Second (0..59) */
|
302 |
|
|
u8 slh_minute; /* Minute (0..59) */
|
303 |
|
|
u8 slh_hour; /* Hour (0..23) */
|
304 |
|
|
u8 slh_reserved;
|
305 |
|
|
u8 slh_day; /* Day (1..31) */
|
306 |
|
|
u8 slh_month; /* Month (1..12) */
|
307 |
|
|
u8 slh_year; /* Year (00..99) */
|
308 |
|
|
u8 slh_century; /* Century (19, 20, 21, ...) */
|
309 |
|
|
} sal_log_timestamp_t;
|
310 |
|
|
|
311 |
|
|
/* Definition of log record header structures */
|
312 |
|
|
typedef struct sal_log_record_header {
|
313 |
|
|
u64 id; /* Unique monotonically increasing ID */
|
314 |
|
|
sal_log_revision_t revision; /* Major and Minor revision of header */
|
315 |
|
|
u16 severity; /* Error Severity */
|
316 |
|
|
u32 len; /* Length of this error log in bytes */
|
317 |
|
|
sal_log_timestamp_t timestamp; /* Timestamp */
|
318 |
|
|
efi_guid_t platform_guid; /* Unique OEM Platform ID */
|
319 |
|
|
} sal_log_record_header_t;
|
320 |
|
|
|
321 |
|
|
/* Definition of log section header structures */
|
322 |
|
|
typedef struct sal_log_sec_header {
|
323 |
|
|
efi_guid_t guid; /* Unique Section ID */
|
324 |
|
|
sal_log_revision_t revision; /* Major and Minor revision of Section */
|
325 |
|
|
u16 reserved;
|
326 |
|
|
u32 len; /* Section length */
|
327 |
|
|
} sal_log_section_hdr_t;
|
328 |
|
|
|
329 |
|
|
typedef struct sal_log_mod_error_info {
|
330 |
|
|
struct {
|
331 |
|
|
u64 check_info : 1,
|
332 |
|
|
requestor_identifier : 1,
|
333 |
|
|
responder_identifier : 1,
|
334 |
|
|
target_identifier : 1,
|
335 |
|
|
precise_ip : 1,
|
336 |
|
|
reserved : 59;
|
337 |
|
|
} valid;
|
338 |
|
|
u64 check_info;
|
339 |
|
|
u64 requestor_identifier;
|
340 |
|
|
u64 responder_identifier;
|
341 |
|
|
u64 target_identifier;
|
342 |
|
|
u64 precise_ip;
|
343 |
|
|
} sal_log_mod_error_info_t;
|
344 |
|
|
|
345 |
|
|
typedef struct sal_processor_static_info {
|
346 |
|
|
struct {
|
347 |
|
|
u64 minstate : 1,
|
348 |
|
|
br : 1,
|
349 |
|
|
cr : 1,
|
350 |
|
|
ar : 1,
|
351 |
|
|
rr : 1,
|
352 |
|
|
fr : 1,
|
353 |
|
|
reserved : 58;
|
354 |
|
|
} valid;
|
355 |
|
|
pal_min_state_area_t min_state_area;
|
356 |
|
|
u64 br[8];
|
357 |
|
|
u64 cr[128];
|
358 |
|
|
u64 ar[128];
|
359 |
|
|
u64 rr[8];
|
360 |
|
|
struct ia64_fpreg fr[128];
|
361 |
|
|
} sal_processor_static_info_t;
|
362 |
|
|
|
363 |
|
|
struct sal_cpuid_info {
|
364 |
|
|
u64 regs[5];
|
365 |
|
|
u64 reserved;
|
366 |
|
|
};
|
367 |
|
|
|
368 |
|
|
typedef struct sal_log_processor_info {
|
369 |
|
|
sal_log_section_hdr_t header;
|
370 |
|
|
struct {
|
371 |
|
|
u64 proc_error_map : 1,
|
372 |
|
|
proc_state_param : 1,
|
373 |
|
|
proc_cr_lid : 1,
|
374 |
|
|
psi_static_struct : 1,
|
375 |
|
|
num_cache_check : 4,
|
376 |
|
|
num_tlb_check : 4,
|
377 |
|
|
num_bus_check : 4,
|
378 |
|
|
num_reg_file_check : 4,
|
379 |
|
|
num_ms_check : 4,
|
380 |
|
|
cpuid_info : 1,
|
381 |
|
|
reserved1 : 39;
|
382 |
|
|
} valid;
|
383 |
|
|
u64 proc_error_map;
|
384 |
|
|
u64 proc_state_parameter;
|
385 |
|
|
u64 proc_cr_lid;
|
386 |
|
|
/*
|
387 |
|
|
* The rest of this structure consists of variable-length arrays, which can't be
|
388 |
|
|
* expressed in C.
|
389 |
|
|
*/
|
390 |
|
|
sal_log_mod_error_info_t info[0];
|
391 |
|
|
/*
|
392 |
|
|
* This is what the rest looked like if C supported variable-length arrays:
|
393 |
|
|
*
|
394 |
|
|
* sal_log_mod_error_info_t cache_check_info[.valid.num_cache_check];
|
395 |
|
|
* sal_log_mod_error_info_t tlb_check_info[.valid.num_tlb_check];
|
396 |
|
|
* sal_log_mod_error_info_t bus_check_info[.valid.num_bus_check];
|
397 |
|
|
* sal_log_mod_error_info_t reg_file_check_info[.valid.num_reg_file_check];
|
398 |
|
|
* sal_log_mod_error_info_t ms_check_info[.valid.num_ms_check];
|
399 |
|
|
* struct sal_cpuid_info cpuid_info;
|
400 |
|
|
* sal_processor_static_info_t processor_static_info;
|
401 |
|
|
*/
|
402 |
|
|
} sal_log_processor_info_t;
|
403 |
|
|
|
404 |
|
|
/* Given a sal_log_processor_info_t pointer, return a pointer to the processor_static_info: */
|
405 |
|
|
#define SAL_LPI_PSI_INFO(l) \
|
406 |
|
|
({ sal_log_processor_info_t *_l = (l); \
|
407 |
|
|
((sal_processor_static_info_t *) \
|
408 |
|
|
((char *) _l->info + ((_l->valid.num_cache_check + _l->valid.num_tlb_check \
|
409 |
|
|
+ _l->valid.num_bus_check + _l->valid.num_reg_file_check \
|
410 |
|
|
+ _l->valid.num_ms_check) * sizeof(sal_log_mod_error_info_t) \
|
411 |
|
|
+ sizeof(struct sal_cpuid_info)))); \
|
412 |
|
|
})
|
413 |
|
|
|
414 |
|
|
/* platform error log structures */
|
415 |
|
|
|
416 |
|
|
typedef struct sal_log_mem_dev_err_info {
|
417 |
|
|
sal_log_section_hdr_t header;
|
418 |
|
|
struct {
|
419 |
|
|
u64 error_status : 1,
|
420 |
|
|
physical_addr : 1,
|
421 |
|
|
addr_mask : 1,
|
422 |
|
|
node : 1,
|
423 |
|
|
card : 1,
|
424 |
|
|
module : 1,
|
425 |
|
|
bank : 1,
|
426 |
|
|
device : 1,
|
427 |
|
|
row : 1,
|
428 |
|
|
column : 1,
|
429 |
|
|
bit_position : 1,
|
430 |
|
|
requestor_id : 1,
|
431 |
|
|
responder_id : 1,
|
432 |
|
|
target_id : 1,
|
433 |
|
|
bus_spec_data : 1,
|
434 |
|
|
oem_id : 1,
|
435 |
|
|
oem_data : 1,
|
436 |
|
|
reserved : 47;
|
437 |
|
|
} valid;
|
438 |
|
|
u64 error_status;
|
439 |
|
|
u64 physical_addr;
|
440 |
|
|
u64 addr_mask;
|
441 |
|
|
u16 node;
|
442 |
|
|
u16 card;
|
443 |
|
|
u16 module;
|
444 |
|
|
u16 bank;
|
445 |
|
|
u16 device;
|
446 |
|
|
u16 row;
|
447 |
|
|
u16 column;
|
448 |
|
|
u16 bit_position;
|
449 |
|
|
u64 requestor_id;
|
450 |
|
|
u64 responder_id;
|
451 |
|
|
u64 target_id;
|
452 |
|
|
u64 bus_spec_data;
|
453 |
|
|
u8 oem_id[16];
|
454 |
|
|
u8 oem_data[1]; /* Variable length data */
|
455 |
|
|
} sal_log_mem_dev_err_info_t;
|
456 |
|
|
|
457 |
|
|
typedef struct sal_log_sel_dev_err_info {
|
458 |
|
|
sal_log_section_hdr_t header;
|
459 |
|
|
struct {
|
460 |
|
|
u64 record_id : 1,
|
461 |
|
|
record_type : 1,
|
462 |
|
|
generator_id : 1,
|
463 |
|
|
evm_rev : 1,
|
464 |
|
|
sensor_type : 1,
|
465 |
|
|
sensor_num : 1,
|
466 |
|
|
event_dir : 1,
|
467 |
|
|
event_data1 : 1,
|
468 |
|
|
event_data2 : 1,
|
469 |
|
|
event_data3 : 1,
|
470 |
|
|
reserved : 54;
|
471 |
|
|
} valid;
|
472 |
|
|
u16 record_id;
|
473 |
|
|
u8 record_type;
|
474 |
|
|
u8 timestamp[4];
|
475 |
|
|
u16 generator_id;
|
476 |
|
|
u8 evm_rev;
|
477 |
|
|
u8 sensor_type;
|
478 |
|
|
u8 sensor_num;
|
479 |
|
|
u8 event_dir;
|
480 |
|
|
u8 event_data1;
|
481 |
|
|
u8 event_data2;
|
482 |
|
|
u8 event_data3;
|
483 |
|
|
} sal_log_sel_dev_err_info_t;
|
484 |
|
|
|
485 |
|
|
typedef struct sal_log_pci_bus_err_info {
|
486 |
|
|
sal_log_section_hdr_t header;
|
487 |
|
|
struct {
|
488 |
|
|
u64 err_status : 1,
|
489 |
|
|
err_type : 1,
|
490 |
|
|
bus_id : 1,
|
491 |
|
|
bus_address : 1,
|
492 |
|
|
bus_data : 1,
|
493 |
|
|
bus_cmd : 1,
|
494 |
|
|
requestor_id : 1,
|
495 |
|
|
responder_id : 1,
|
496 |
|
|
target_id : 1,
|
497 |
|
|
oem_data : 1,
|
498 |
|
|
reserved : 54;
|
499 |
|
|
} valid;
|
500 |
|
|
u64 err_status;
|
501 |
|
|
u16 err_type;
|
502 |
|
|
u16 bus_id;
|
503 |
|
|
u32 reserved;
|
504 |
|
|
u64 bus_address;
|
505 |
|
|
u64 bus_data;
|
506 |
|
|
u64 bus_cmd;
|
507 |
|
|
u64 requestor_id;
|
508 |
|
|
u64 responder_id;
|
509 |
|
|
u64 target_id;
|
510 |
|
|
u8 oem_data[1]; /* Variable length data */
|
511 |
|
|
} sal_log_pci_bus_err_info_t;
|
512 |
|
|
|
513 |
|
|
typedef struct sal_log_smbios_dev_err_info {
|
514 |
|
|
sal_log_section_hdr_t header;
|
515 |
|
|
struct {
|
516 |
|
|
u64 event_type : 1,
|
517 |
|
|
length : 1,
|
518 |
|
|
time_stamp : 1,
|
519 |
|
|
data : 1,
|
520 |
|
|
reserved1 : 60;
|
521 |
|
|
} valid;
|
522 |
|
|
u8 event_type;
|
523 |
|
|
u8 length;
|
524 |
|
|
u8 time_stamp[6];
|
525 |
|
|
u8 data[1]; /* data of variable length, length == slsmb_length */
|
526 |
|
|
} sal_log_smbios_dev_err_info_t;
|
527 |
|
|
|
528 |
|
|
typedef struct sal_log_pci_comp_err_info {
|
529 |
|
|
sal_log_section_hdr_t header;
|
530 |
|
|
struct {
|
531 |
|
|
u64 err_status : 1,
|
532 |
|
|
comp_info : 1,
|
533 |
|
|
num_mem_regs : 1,
|
534 |
|
|
num_io_regs : 1,
|
535 |
|
|
reg_data_pairs : 1,
|
536 |
|
|
oem_data : 1,
|
537 |
|
|
reserved : 58;
|
538 |
|
|
} valid;
|
539 |
|
|
u64 err_status;
|
540 |
|
|
struct {
|
541 |
|
|
u16 vendor_id;
|
542 |
|
|
u16 device_id;
|
543 |
|
|
u8 class_code[3];
|
544 |
|
|
u8 func_num;
|
545 |
|
|
u8 dev_num;
|
546 |
|
|
u8 bus_num;
|
547 |
|
|
u8 seg_num;
|
548 |
|
|
u8 reserved[5];
|
549 |
|
|
} comp_info;
|
550 |
|
|
u32 num_mem_regs;
|
551 |
|
|
u32 num_io_regs;
|
552 |
|
|
u64 reg_data_pairs[1];
|
553 |
|
|
/*
|
554 |
|
|
* array of address/data register pairs is num_mem_regs + num_io_regs elements
|
555 |
|
|
* long. Each array element consists of a u64 address followed by a u64 data
|
556 |
|
|
* value. The oem_data array immediately follows the reg_data_pairs array
|
557 |
|
|
*/
|
558 |
|
|
u8 oem_data[1]; /* Variable length data */
|
559 |
|
|
} sal_log_pci_comp_err_info_t;
|
560 |
|
|
|
561 |
|
|
typedef struct sal_log_plat_specific_err_info {
|
562 |
|
|
sal_log_section_hdr_t header;
|
563 |
|
|
struct {
|
564 |
|
|
u64 err_status : 1,
|
565 |
|
|
guid : 1,
|
566 |
|
|
oem_data : 1,
|
567 |
|
|
reserved : 61;
|
568 |
|
|
} valid;
|
569 |
|
|
u64 err_status;
|
570 |
|
|
efi_guid_t guid;
|
571 |
|
|
u8 oem_data[1]; /* platform specific variable length data */
|
572 |
|
|
} sal_log_plat_specific_err_info_t;
|
573 |
|
|
|
574 |
|
|
typedef struct sal_log_host_ctlr_err_info {
|
575 |
|
|
sal_log_section_hdr_t header;
|
576 |
|
|
struct {
|
577 |
|
|
u64 err_status : 1,
|
578 |
|
|
requestor_id : 1,
|
579 |
|
|
responder_id : 1,
|
580 |
|
|
target_id : 1,
|
581 |
|
|
bus_spec_data : 1,
|
582 |
|
|
oem_data : 1,
|
583 |
|
|
reserved : 58;
|
584 |
|
|
} valid;
|
585 |
|
|
u64 err_status;
|
586 |
|
|
u64 requestor_id;
|
587 |
|
|
u64 responder_id;
|
588 |
|
|
u64 target_id;
|
589 |
|
|
u64 bus_spec_data;
|
590 |
|
|
u8 oem_data[1]; /* Variable length OEM data */
|
591 |
|
|
} sal_log_host_ctlr_err_info_t;
|
592 |
|
|
|
593 |
|
|
typedef struct sal_log_plat_bus_err_info {
|
594 |
|
|
sal_log_section_hdr_t header;
|
595 |
|
|
struct {
|
596 |
|
|
u64 err_status : 1,
|
597 |
|
|
requestor_id : 1,
|
598 |
|
|
responder_id : 1,
|
599 |
|
|
target_id : 1,
|
600 |
|
|
bus_spec_data : 1,
|
601 |
|
|
oem_data : 1,
|
602 |
|
|
reserved : 58;
|
603 |
|
|
} valid;
|
604 |
|
|
u64 err_status;
|
605 |
|
|
u64 requestor_id;
|
606 |
|
|
u64 responder_id;
|
607 |
|
|
u64 target_id;
|
608 |
|
|
u64 bus_spec_data;
|
609 |
|
|
u8 oem_data[1]; /* Variable length OEM data */
|
610 |
|
|
} sal_log_plat_bus_err_info_t;
|
611 |
|
|
|
612 |
|
|
/* Overall platform error section structure */
|
613 |
|
|
typedef union sal_log_platform_err_info {
|
614 |
|
|
sal_log_mem_dev_err_info_t mem_dev_err;
|
615 |
|
|
sal_log_sel_dev_err_info_t sel_dev_err;
|
616 |
|
|
sal_log_pci_bus_err_info_t pci_bus_err;
|
617 |
|
|
sal_log_smbios_dev_err_info_t smbios_dev_err;
|
618 |
|
|
sal_log_pci_comp_err_info_t pci_comp_err;
|
619 |
|
|
sal_log_plat_specific_err_info_t plat_specific_err;
|
620 |
|
|
sal_log_host_ctlr_err_info_t host_ctlr_err;
|
621 |
|
|
sal_log_plat_bus_err_info_t plat_bus_err;
|
622 |
|
|
} sal_log_platform_err_info_t;
|
623 |
|
|
|
624 |
|
|
/* SAL log over-all, multi-section error record structure (processor+platform) */
|
625 |
|
|
typedef struct err_rec {
|
626 |
|
|
sal_log_record_header_t sal_elog_header;
|
627 |
|
|
sal_log_processor_info_t proc_err;
|
628 |
|
|
sal_log_platform_err_info_t plat_err;
|
629 |
|
|
u8 oem_data_pad[1024];
|
630 |
|
|
} ia64_err_rec_t;
|
631 |
|
|
|
632 |
|
|
/*
|
633 |
|
|
* Now define a couple of inline functions for improved type checking
|
634 |
|
|
* and convenience.
|
635 |
|
|
*/
|
636 |
|
|
static inline long
|
637 |
|
|
ia64_sal_freq_base (unsigned long which, unsigned long *ticks_per_second,
|
638 |
|
|
unsigned long *drift_info)
|
639 |
|
|
{
|
640 |
|
|
struct ia64_sal_retval isrv;
|
641 |
|
|
|
642 |
|
|
SAL_CALL(isrv, SAL_FREQ_BASE, which, 0, 0, 0, 0, 0, 0);
|
643 |
|
|
*ticks_per_second = isrv.v0;
|
644 |
|
|
*drift_info = isrv.v1;
|
645 |
|
|
return isrv.status;
|
646 |
|
|
}
|
647 |
|
|
|
648 |
|
|
/* Flush all the processor and platform level instruction and/or data caches */
|
649 |
|
|
static inline s64
|
650 |
|
|
ia64_sal_cache_flush (u64 cache_type)
|
651 |
|
|
{
|
652 |
|
|
struct ia64_sal_retval isrv;
|
653 |
|
|
SAL_CALL(isrv, SAL_CACHE_FLUSH, cache_type, 0, 0, 0, 0, 0, 0);
|
654 |
|
|
return isrv.status;
|
655 |
|
|
}
|
656 |
|
|
|
657 |
|
|
|
658 |
|
|
/* Initialize all the processor and platform level instruction and data caches */
|
659 |
|
|
static inline s64
|
660 |
|
|
ia64_sal_cache_init (void)
|
661 |
|
|
{
|
662 |
|
|
struct ia64_sal_retval isrv;
|
663 |
|
|
SAL_CALL(isrv, SAL_CACHE_INIT, 0, 0, 0, 0, 0, 0, 0);
|
664 |
|
|
return isrv.status;
|
665 |
|
|
}
|
666 |
|
|
|
667 |
|
|
/*
|
668 |
|
|
* Clear the processor and platform information logged by SAL with respect to the machine
|
669 |
|
|
* state at the time of MCA's, INITs, CMCs, or CPEs.
|
670 |
|
|
*/
|
671 |
|
|
static inline s64
|
672 |
|
|
ia64_sal_clear_state_info (u64 sal_info_type)
|
673 |
|
|
{
|
674 |
|
|
struct ia64_sal_retval isrv;
|
675 |
|
|
SAL_CALL_REENTRANT(isrv, SAL_CLEAR_STATE_INFO, sal_info_type, 0,
|
676 |
|
|
0, 0, 0, 0, 0);
|
677 |
|
|
return isrv.status;
|
678 |
|
|
}
|
679 |
|
|
|
680 |
|
|
|
681 |
|
|
/* Get the processor and platform information logged by SAL with respect to the machine
|
682 |
|
|
* state at the time of the MCAs, INITs, CMCs, or CPEs.
|
683 |
|
|
*/
|
684 |
|
|
static inline u64
|
685 |
|
|
ia64_sal_get_state_info (u64 sal_info_type, u64 *sal_info)
|
686 |
|
|
{
|
687 |
|
|
struct ia64_sal_retval isrv;
|
688 |
|
|
SAL_CALL_REENTRANT(isrv, SAL_GET_STATE_INFO, sal_info_type, 0,
|
689 |
|
|
sal_info, 0, 0, 0, 0);
|
690 |
|
|
if (isrv.status)
|
691 |
|
|
return 0;
|
692 |
|
|
|
693 |
|
|
return isrv.v0;
|
694 |
|
|
}
|
695 |
|
|
|
696 |
|
|
/*
|
697 |
|
|
* Get the maximum size of the information logged by SAL with respect to the machine state
|
698 |
|
|
* at the time of MCAs, INITs, CMCs, or CPEs.
|
699 |
|
|
*/
|
700 |
|
|
static inline u64
|
701 |
|
|
ia64_sal_get_state_info_size (u64 sal_info_type)
|
702 |
|
|
{
|
703 |
|
|
struct ia64_sal_retval isrv;
|
704 |
|
|
SAL_CALL_REENTRANT(isrv, SAL_GET_STATE_INFO_SIZE, sal_info_type, 0,
|
705 |
|
|
0, 0, 0, 0, 0);
|
706 |
|
|
if (isrv.status)
|
707 |
|
|
return 0;
|
708 |
|
|
return isrv.v0;
|
709 |
|
|
}
|
710 |
|
|
|
711 |
|
|
/*
|
712 |
|
|
* Causes the processor to go into a spin loop within SAL where SAL awaits a wakeup from
|
713 |
|
|
* the monarch processor. Must not lock, because it will not return on any cpu until the
|
714 |
|
|
* monarch processor sends a wake up.
|
715 |
|
|
*/
|
716 |
|
|
static inline s64
|
717 |
|
|
ia64_sal_mc_rendez (void)
|
718 |
|
|
{
|
719 |
|
|
struct ia64_sal_retval isrv;
|
720 |
|
|
SAL_CALL_NOLOCK(isrv, SAL_MC_RENDEZ, 0, 0, 0, 0, 0, 0, 0);
|
721 |
|
|
return isrv.status;
|
722 |
|
|
}
|
723 |
|
|
|
724 |
|
|
/*
|
725 |
|
|
* Allow the OS to specify the interrupt number to be used by SAL to interrupt OS during
|
726 |
|
|
* the machine check rendezvous sequence as well as the mechanism to wake up the
|
727 |
|
|
* non-monarch processor at the end of machine check processing.
|
728 |
|
|
* Returns the complete ia64_sal_retval because some calls return more than just a status
|
729 |
|
|
* value.
|
730 |
|
|
*/
|
731 |
|
|
static inline struct ia64_sal_retval
|
732 |
|
|
ia64_sal_mc_set_params (u64 param_type, u64 i_or_m, u64 i_or_m_val, u64 timeout, u64 rz_always)
|
733 |
|
|
{
|
734 |
|
|
struct ia64_sal_retval isrv;
|
735 |
|
|
SAL_CALL(isrv, SAL_MC_SET_PARAMS, param_type, i_or_m, i_or_m_val,
|
736 |
|
|
timeout, rz_always, 0, 0);
|
737 |
|
|
return isrv;
|
738 |
|
|
}
|
739 |
|
|
|
740 |
|
|
/* Read from PCI configuration space */
|
741 |
|
|
static inline s64
|
742 |
|
|
ia64_sal_pci_config_read (u64 pci_config_addr, u64 size, u64 *value)
|
743 |
|
|
{
|
744 |
|
|
struct ia64_sal_retval isrv;
|
745 |
|
|
SAL_CALL(isrv, SAL_PCI_CONFIG_READ, pci_config_addr, size, 0, 0, 0, 0, 0);
|
746 |
|
|
if (value)
|
747 |
|
|
*value = isrv.v0;
|
748 |
|
|
return isrv.status;
|
749 |
|
|
}
|
750 |
|
|
|
751 |
|
|
/* Write to PCI configuration space */
|
752 |
|
|
static inline s64
|
753 |
|
|
ia64_sal_pci_config_write (u64 pci_config_addr, u64 size, u64 value)
|
754 |
|
|
{
|
755 |
|
|
struct ia64_sal_retval isrv;
|
756 |
|
|
SAL_CALL(isrv, SAL_PCI_CONFIG_WRITE, pci_config_addr, size, value,
|
757 |
|
|
0, 0, 0, 0);
|
758 |
|
|
return isrv.status;
|
759 |
|
|
}
|
760 |
|
|
|
761 |
|
|
/*
|
762 |
|
|
* Register physical addresses of locations needed by SAL when SAL procedures are invoked
|
763 |
|
|
* in virtual mode.
|
764 |
|
|
*/
|
765 |
|
|
static inline s64
|
766 |
|
|
ia64_sal_register_physical_addr (u64 phys_entry, u64 phys_addr)
|
767 |
|
|
{
|
768 |
|
|
struct ia64_sal_retval isrv;
|
769 |
|
|
SAL_CALL(isrv, SAL_REGISTER_PHYSICAL_ADDR, phys_entry, phys_addr,
|
770 |
|
|
0, 0, 0, 0, 0);
|
771 |
|
|
return isrv.status;
|
772 |
|
|
}
|
773 |
|
|
|
774 |
|
|
/*
|
775 |
|
|
* Register software dependent code locations within SAL. These locations are handlers or
|
776 |
|
|
* entry points where SAL will pass control for the specified event. These event handlers
|
777 |
|
|
* are for the bott rendezvous, MCAs and INIT scenarios.
|
778 |
|
|
*/
|
779 |
|
|
static inline s64
|
780 |
|
|
ia64_sal_set_vectors (u64 vector_type,
|
781 |
|
|
u64 handler_addr1, u64 gp1, u64 handler_len1,
|
782 |
|
|
u64 handler_addr2, u64 gp2, u64 handler_len2)
|
783 |
|
|
{
|
784 |
|
|
struct ia64_sal_retval isrv;
|
785 |
|
|
SAL_CALL(isrv, SAL_SET_VECTORS, vector_type,
|
786 |
|
|
handler_addr1, gp1, handler_len1,
|
787 |
|
|
handler_addr2, gp2, handler_len2);
|
788 |
|
|
|
789 |
|
|
return isrv.status;
|
790 |
|
|
}
|
791 |
|
|
|
792 |
|
|
/* Update the contents of PAL block in the non-volatile storage device */
|
793 |
|
|
static inline s64
|
794 |
|
|
ia64_sal_update_pal (u64 param_buf, u64 scratch_buf, u64 scratch_buf_size,
|
795 |
|
|
u64 *error_code, u64 *scratch_buf_size_needed)
|
796 |
|
|
{
|
797 |
|
|
struct ia64_sal_retval isrv;
|
798 |
|
|
SAL_CALL(isrv, SAL_UPDATE_PAL, param_buf, scratch_buf, scratch_buf_size,
|
799 |
|
|
0, 0, 0, 0);
|
800 |
|
|
if (error_code)
|
801 |
|
|
*error_code = isrv.v0;
|
802 |
|
|
if (scratch_buf_size_needed)
|
803 |
|
|
*scratch_buf_size_needed = isrv.v1;
|
804 |
|
|
return isrv.status;
|
805 |
|
|
}
|
806 |
|
|
|
807 |
|
|
extern unsigned long sal_platform_features;
|
808 |
|
|
|
809 |
|
|
extern int (*salinfo_platform_oemdata)(const u8 *, u8 **, u64 *);
|
810 |
|
|
|
811 |
|
|
#endif /* __ASSEMBLY__ */
|
812 |
|
|
|
813 |
|
|
#endif /* _ASM_IA64_SAL_H */
|