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[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [include/] [asm-ia64/] [sn/] [driver.h] - Blame information for rev 1765

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1 1275 phoenix
/* $Id: driver.h,v 1.1.1.1 2004-04-15 02:42:30 phoenix Exp $
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 *
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 * This file is subject to the terms and conditions of the GNU General Public
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 * License.  See the file "COPYING" in the main directory of this archive
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 * for more details.
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 *
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 * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved.
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 */
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#ifndef _ASM_IA64_SN_DRIVER_H
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#define _ASM_IA64_SN_DRIVER_H
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#include <asm/sn/sgi.h>
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#include <asm/types.h>
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/*
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** Interface for device driver handle management.
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**
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** These functions are mostly for use by the loadable driver code, and
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** for use by I/O bus infrastructure code.
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*/
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typedef struct device_driver_s *device_driver_t;
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/* == Driver thread priority support == */
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typedef int ilvl_t;
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#ifdef __cplusplus
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extern "C" {
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#endif
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struct eframe_s;
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struct piomap;
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struct dmamap;
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typedef __psunsigned_t iobush_t;
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/* interrupt function */
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typedef void           *intr_arg_t;
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typedef void            intr_func_f(intr_arg_t);
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typedef intr_func_f    *intr_func_t;
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#define INTR_ARG(n)     ((intr_arg_t)(__psunsigned_t)(n))
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/* system interrupt resource handle -- returned from intr_alloc */
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typedef struct intr_s *intr_t;
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#define INTR_HANDLE_NONE ((intr_t)0)
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/*
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 * restore interrupt level value, returned from intr_block_level
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 * for use with intr_unblock_level.
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 */
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typedef void *rlvl_t;
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/*
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 * A basic, platform-independent description of I/O requirements for
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 * a device. This structure is usually formed by lboot based on information
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 * in configuration files.  It contains information about PIO, DMA, and
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 * interrupt requirements for a specific instance of a device.
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 *
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 * The pio description is currently unused.
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 *
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 * The dma description describes bandwidth characteristics and bandwidth
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 * allocation requirements. (TBD)
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 *
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 * The Interrupt information describes the priority of interrupt, desired
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 * destination, policy (TBD), whether this is an error interrupt, etc.
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 * For now, interrupts are targeted to specific CPUs.
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 */
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typedef struct device_desc_s {
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        /* pio description (currently none) */
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        /* dma description */
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        /* TBD: allocated badwidth requirements */
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        /* interrupt description */
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        vertex_hdl_t    intr_target;    /* Hardware locator string */
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        int             intr_policy;    /* TBD */
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        ilvl_t          intr_swlevel;   /* software level for blocking intr */
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        char            *intr_name;     /* name of interrupt, if any */
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        int             flags;
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} *device_desc_t;
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/* flag values */
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#define D_INTR_ISERR    0x1             /* interrupt is for error handling */
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#define D_IS_ASSOC      0x2             /* descriptor is associated with a dev */
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#define D_INTR_NOTHREAD 0x4             /* Interrupt handler isn't threaded. */
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#define INTR_SWLEVEL_NOTHREAD_DEFAULT   0        /* Default
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                                                 * Interrupt level in case of
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                                                 * non-threaded interrupt
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                                                 * handlers
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                                                 */
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#endif /* _ASM_IA64_SN_DRIVER_H */

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