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phoenix |
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2000-2003 Silicon Graphics, Inc. All Rights Reserved.
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* Copyright (C) 2000 Ralf Baechle
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*/
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#ifndef _ASM_IA64_SN_IO_H
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#define _ASM_IA64_SN_IO_H
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#include <linux/config.h>
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#include <asm/sn/addrs.h>
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extern int numionodes;
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/* Because we only have PCI I/O ports. */
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#define IIO_ITTE_BASE 0x400160 /* base of translation table entries */
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#define IIO_ITTE(bigwin) (IIO_ITTE_BASE + 8*(bigwin))
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#define IIO_ITTE_OFFSET_BITS 5 /* size of offset field */
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#define IIO_ITTE_OFFSET_MASK ((1<<IIO_ITTE_OFFSET_BITS)-1)
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#define IIO_ITTE_OFFSET_SHIFT 0
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#define IIO_ITTE_WIDGET_BITS 4 /* size of widget field */
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#define IIO_ITTE_WIDGET_MASK ((1<<IIO_ITTE_WIDGET_BITS)-1)
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#define IIO_ITTE_WIDGET_SHIFT 8
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#define IIO_ITTE_IOSP 1 /* I/O Space bit */
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#define IIO_ITTE_IOSP_MASK 1
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#define IIO_ITTE_IOSP_SHIFT 12
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#define HUB_PIO_MAP_TO_MEM 0
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#define HUB_PIO_MAP_TO_IO 1
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#define IIO_ITTE_INVALID_WIDGET 3 /* an invalid widget */
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#define IIO_ITTE_PUT(nasid, bigwin, io_or_mem, widget, addr) \
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REMOTE_HUB_S((nasid), IIO_ITTE(bigwin), \
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(((((addr) >> BWIN_SIZE_BITS) & \
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IIO_ITTE_OFFSET_MASK) << IIO_ITTE_OFFSET_SHIFT) | \
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(io_or_mem << IIO_ITTE_IOSP_SHIFT) | \
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(((widget) & IIO_ITTE_WIDGET_MASK) << IIO_ITTE_WIDGET_SHIFT)))
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#define IIO_ITTE_DISABLE(nasid, bigwin) \
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IIO_ITTE_PUT((nasid), HUB_PIO_MAP_TO_MEM, \
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(bigwin), IIO_ITTE_INVALID_WIDGET, 0)
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#define IIO_ITTE_GET(nasid, bigwin) REMOTE_HUB_ADDR((nasid), IIO_ITTE(bigwin))
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/*
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* Macro which takes the widget number, and returns the
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* IO PRB address of that widget.
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* value _x is expected to be a widget number in the range
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* 0, 8 - 0xF
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*/
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#define IIO_IOPRB(_x) (IIO_IOPRB_0 + ( ( (_x) < HUB_WIDGET_ID_MIN ? \
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(_x) : \
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(_x) - (HUB_WIDGET_ID_MIN-1)) << 3) )
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#include <asm/sn/sn2/shub.h>
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#include <asm/sn/sn2/shubio.h>
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/*
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* Used to ensure write ordering (like mb(), but for I/O space)
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*/
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extern void sn_mmiob(void);
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#endif /* _ASM_IA64_SN_IO_H */
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