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phoenix |
/* $Id: iograph.h,v 1.1.1.1 2004-04-15 02:42:46 phoenix Exp $
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1992-1997,2000-2003 Silicon Graphics, Inc. All rights reserved.
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*/
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#ifndef _ASM_IA64_SN_IOGRAPH_H
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#define _ASM_IA64_SN_IOGRAPH_H
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/*
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* During initialization, platform-dependent kernel code establishes some
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* basic elements of the hardware graph. This file contains edge and
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* info labels that are used across various platforms -- it serves as an
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* ad-hoc registry.
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*/
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/* edges names */
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#define EDGE_LBL_BUS "bus"
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#define EDGE_LBL_CONN ".connection"
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#define EDGE_LBL_ECP "ecp" /* EPP/ECP plp */
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#define EDGE_LBL_ECPP "ecpp"
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#define EDGE_LBL_GUEST ".guest" /* For IOC3 */
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#define EDGE_LBL_HOST ".host" /* For IOC3 */
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#define EDGE_LBL_PERFMON "mon"
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#define EDGE_LBL_USRPCI "usrpci"
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#define EDGE_LBL_VME "vmebus"
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#define EDGE_LBL_BLOCK "block"
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#define EDGE_LBL_BOARD "board"
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#define EDGE_LBL_CHAR "char"
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#define EDGE_LBL_CONTROLLER "controller"
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#define EDGE_LBL_CPU "cpu"
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#define EDGE_LBL_CPUNUM "cpunum"
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#define EDGE_LBL_DIRECT "direct"
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#define EDGE_LBL_DISABLED "disabled"
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#define EDGE_LBL_DISK "disk"
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#define EDGE_LBL_DMA_ENGINE "dma_engine" /* Only available on
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VMEbus now */
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#define EDGE_LBL_NET "net" /* all nw. devs */
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#define EDGE_LBL_EF "ef" /* For if_ef ethernet */
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#define EDGE_LBL_ET "et" /* For if_ee ethernet */
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#define EDGE_LBL_EC "ec" /* For if_ec2 ether */
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#define EDGE_LBL_ECF "ec" /* For if_ecf enet */
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#define EDGE_LBL_EM "ec" /* For O2 ether */
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#define EDGE_LBL_IPG "ipg" /* For IPG FDDI */
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#define EDGE_LBL_XPI "xpi" /* For IPG FDDI */
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#define EDGE_LBL_HIP "hip" /* For HIPPI */
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#define EDGE_LBL_GSN "gsn" /* For GSN */
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#define EDGE_LBL_ATM "atm" /* For ATM */
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#define EDGE_LBL_FXP "fxp" /* For FXP ether */
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#define EDGE_LBL_EP "ep" /* For eplex ether */
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#define EDGE_LBL_VFE "vfe" /* For VFE ether */
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#define EDGE_LBL_GFE "gfe" /* For GFE ether */
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#define EDGE_LBL_RNS "rns" /* RNS PCI FDDI card */
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#define EDGE_LBL_MTR "mtr" /* MTR PCI 802.5 card */
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#define EDGE_LBL_FV "fv" /* FV VME 802.5 card */
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#define EDGE_LBL_GTR "gtr" /* GTR GIO 802.5 card */
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#define EDGE_LBL_ISDN "isdn" /* Digi PCI ISDN-BRI card */
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#define EDGE_LBL_EISA "eisa"
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#define EDGE_LBL_ENET "ethernet"
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#define EDGE_LBL_FLOPPY "floppy"
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#define EDGE_LBL_PFD "pfd" /* For O2 pfd floppy */
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#define EDGE_LBL_FOP "fop" /* Fetchop pseudo device */
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#define EDGE_LBL_GIO "gio"
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#define EDGE_LBL_HEART "heart" /* For RACER */
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#define EDGE_LBL_HPC "hpc"
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#define EDGE_LBL_GFX "gfx"
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#define EDGE_LBL_HUB "hub" /* For SN0 */
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#define EDGE_LBL_ICE "ice" /* For TIO */
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#define EDGE_LBL_HW "hw"
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#define EDGE_LBL_SYNERGY "synergy" /* For SNIA only */
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#define EDGE_LBL_IBUS "ibus" /* For EVEREST */
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#define EDGE_LBL_INTERCONNECT "link"
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#define EDGE_LBL_IO "io"
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#define EDGE_LBL_IO4 "io4" /* For EVEREST */
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#define EDGE_LBL_IOC3 "ioc3"
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#define EDGE_LBL_IOC4 "ioc4"
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#define EDGE_LBL_LUN "lun"
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#define EDGE_LBL_LINUX "linux"
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#define EDGE_LBL_LINUX_BUS EDGE_LBL_LINUX "/bus/pci-x"
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#define EDGE_LBL_MACE "mace" /* O2 mace */
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#define EDGE_LBL_MACHDEP "machdep" /* Platform depedent devices */
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#define EDGE_LBL_MASTER ".master"
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#define EDGE_LBL_MEMORY "memory"
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#define EDGE_LBL_META_ROUTER "metarouter"
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#define EDGE_LBL_MIDPLANE "midplane"
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#define EDGE_LBL_MODULE "module"
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#define EDGE_LBL_NODE "node"
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#define EDGE_LBL_NODENUM "nodenum"
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#define EDGE_LBL_NVRAM "nvram"
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#define EDGE_LBL_PARTITION "partition"
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#define EDGE_LBL_PCI "pci"
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#define EDGE_LBL_PCIX "pci-x"
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#define EDGE_LBL_PCIX_0 EDGE_LBL_PCIX "/0"
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#define EDGE_LBL_PCIX_1 EDGE_LBL_PCIX "/1"
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#define EDGE_LBL_AGP "agp"
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#define EDGE_LBL_AGP_0 EDGE_LBL_AGP "/0"
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#define EDGE_LBL_AGP_1 EDGE_LBL_AGP "/1"
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#define EDGE_LBL_PORT "port"
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#define EDGE_LBL_PROM "prom"
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#define EDGE_LBL_RACK "rack"
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#define EDGE_LBL_RDISK "rdisk"
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#define EDGE_LBL_REPEATER_ROUTER "repeaterrouter"
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#define EDGE_LBL_ROUTER "router"
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#define EDGE_LBL_RPOS "bay" /* Position in rack */
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#define EDGE_LBL_SCSI "scsi"
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#define EDGE_LBL_SCSI_CTLR "scsi_ctlr"
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#define EDGE_LBL_SLOT "slot"
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#define EDGE_LBL_TAPE "tape"
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#define EDGE_LBL_TARGET "target"
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#define EDGE_LBL_UNKNOWN "unknown"
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#define EDGE_LBL_VOLUME "volume"
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#define EDGE_LBL_VOLUME_HEADER "volume_header"
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#define EDGE_LBL_XBOW "xbow"
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#define EDGE_LBL_XIO "xio"
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#define EDGE_LBL_XSWITCH ".xswitch"
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#define EDGE_LBL_XTALK "xtalk"
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#define EDGE_LBL_CORETALK "coretalk"
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#define EDGE_LBL_XWIDGET "xwidget"
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#define EDGE_LBL_ELSC "elsc"
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#define EDGE_LBL_L1 "L1"
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#define EDGE_LBL_MADGE_TR "Madge-tokenring"
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#define EDGE_LBL_XPLINK "xplink" /* Cross partition */
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#define EDGE_LBL_XPLINK_NET "net" /* XP network devs */
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#define EDGE_LBL_XPLINK_RAW "raw" /* XP Raw devs */
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#define EDGE_LBL_SLAB "slab" /* Slab of a module */
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#define EDGE_LBL_XPLINK_KERNEL "kernel" /* XP kernel devs */
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#define EDGE_LBL_XPLINK_ADMIN "admin" /* Partition admin */
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#define EDGE_LBL_KAIO "kaio" /* Kernel async i/o poll */
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#define EDGE_LBL_RPS "rps" /* redundant power supply */
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#define EDGE_LBL_XBOX_RPS "xbox_rps" /* redundant power supply for xbox unit */
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#define EDGE_LBL_IOBRICK "iobrick"
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#define EDGE_LBL_PBRICK "Pbrick"
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#define EDGE_LBL_PEBRICK "PEbrick"
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#define EDGE_LBL_PXBRICK "PXbrick"
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#define EDGE_LBL_OPUSBRICK "onboardio"
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#define EDGE_LBL_IXBRICK "IXbrick"
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#define EDGE_LBL_IBRICK "Ibrick"
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#define EDGE_LBL_XBRICK "Xbrick"
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#define EDGE_LBL_CGBRICK "CGbrick"
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#define EDGE_LBL_CPUBUS "cpubus" /* CPU Interfaces (SysAd) */
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/* vertex info labels in hwgraph */
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#define INFO_LBL_CNODEID "_cnodeid"
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#define INFO_LBL_CONTROLLER_NAME "_controller_name"
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#define INFO_LBL_CPUBUS "_cpubus"
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#define INFO_LBL_CPUID "_cpuid"
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#define INFO_LBL_CPU_INFO "_cpu"
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#define INFO_LBL_DETAIL_INVENT "_detail_invent" /* inventory data*/
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#define INFO_LBL_DEVICE_DESC "_device_desc"
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#define INFO_LBL_DIAGVAL "_diag_reason" /* Reason disabled */
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#define INFO_LBL_DKIOTIME "_dkiotime"
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#define INFO_LBL_DRIVER "_driver" /* points to attached device_driver_t */
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#define INFO_LBL_ELSC "_elsc"
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#define INFO_LBL_SUBCH "_subch" /* system controller subchannel */
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#define INFO_LBL_L1SCP "_l1scp" /* points to l1sc_t */
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#define INFO_LBL_FC_PORTNAME "_fc_portname"
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#define INFO_LBL_GIOIO "_gioio"
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#define INFO_LBL_GFUNCS "_gioio_ops" /* ops vector for gio providers */
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#define INFO_LBL_HUB_INFO "_hubinfo"
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#define INFO_LBL_HWGFSLIST "_hwgfs_list"
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#define INFO_LBL_TRAVERSE "_hwg_traverse" /* hwgraph traverse function */
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#define INFO_LBL_INVENT "_invent" /* inventory data */
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#define INFO_LBL_MLRESET "_mlreset" /* present if device preinitialized */
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#define INFO_LBL_MODULE_INFO "_module" /* module data ptr */
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#define INFO_LBL_MONDATA "_mon" /* monitor data ptr */
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#define INFO_LBL_MDPERF_DATA "_mdperf" /* mdperf monitoring*/
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#define INFO_LBL_NIC "_nic"
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#define INFO_LBL_NODE_INFO "_node"
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#define INFO_LBL_PCIBR_HINTS "_pcibr_hints"
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#define INFO_LBL_PCIIO "_pciio"
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#define INFO_LBL_PFUNCS "_pciio_ops" /* ops vector for gio providers */
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#define INFO_LBL_PERMISSIONS "_permissions" /* owner, uid, gid */
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#define INFO_LBL_ROUTER_INFO "_router"
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#define INFO_LBL_SUBDEVS "_subdevs" /* subdevice enable bits */
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#define INFO_LBL_VME_FUNCS "_vmeio_ops" /* ops vector for VME providers */
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#define INFO_LBL_XSWITCH "_xswitch"
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#define INFO_LBL_XSWITCH_ID "_xswitch_id"
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#define INFO_LBL_XSWITCH_VOL "_xswitch_volunteer"
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#define INFO_LBL_XFUNCS "_xtalk_ops" /* ops vector for gio providers */
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#define INFO_LBL_XWIDGET "_xwidget"
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#define INFO_LBL_GRIO_DSK "_grio_disk" /* guaranteed rate I/O */
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#define INFO_LBL_ASYNC_ATTACH "_async_attach" /* parallel attachment */
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#define INFO_LBL_GFXID "_gfxid" /* gfx pipe ID #s */
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/* Device/Driver Admin directive labels */
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#define ADMIN_LBL_INTR_TARGET "INTR_TARGET" /* Target cpu for device interrupts*/
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#define ADMIN_LBL_INTR_SWLEVEL "INTR_SWLEVEL" /* Priority level of the ithread */
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#define ADMIN_LBL_DMATRANS_NODE "PCIBUS_DMATRANS_NODE" /* Node used for
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* 32-bit Direct
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* Mapping I/O
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*/
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#define ADMIN_LBL_DISABLED "DISABLE" /* Device has been disabled */
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#define ADMIN_LBL_DETACH "DETACH" /* Device has been detached */
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#define ADMIN_LBL_THREAD_PRI "thread_priority"
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/* Driver adminstrator
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* hint parameter for
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* thread priority
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*/
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#define ADMIN_LBL_THREAD_CLASS "thread_class"
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/* Driver adminstrator
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* hint parameter for
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* thread priority
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* default class
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*/
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/* Special reserved info labels (also hwgfs attributes) */
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#define _DEVNAME_ATTR "_devname" /* device name */
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#define _DRIVERNAME_ATTR "_drivername" /* driver name */
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#define _INVENT_ATTR "_inventory" /* device inventory data */
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#define _MASTERNODE_ATTR "_masternode" /* node that "controls" device */
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/* Info labels that begin with '_' cannot be overwritten by an attr_set call */
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#define INFO_LBL_RESERVED(name) ((name)[0] == '_')
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#if defined(__KERNEL__)
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void init_all_devices(void);
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#endif /* __KERNEL__ */
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#include <asm/sn/xtalk/xbow.h> /* For get MAX_PORT_NUM */
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int io_brick_map_widget(int, int);
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int io_path_map_widget(vertex_hdl_t);
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/*
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* Map a brick's widget number to a meaningful int
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*/
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struct io_brick_map_s {
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int ibm_type; /* brick type */
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int ibm_map_wid[MAX_PORT_NUM]; /* wid to int map */
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};
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#endif /* _ASM_IA64_SN_IOGRAPH_H */
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