OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [include/] [asm-ia64/] [sn/] [klclock.h] - Blame information for rev 1765

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 1275 phoenix
/*
2
 * This file is subject to the terms and conditions of the GNU General Public
3
 * License.  See the file "COPYING" in the main directory of this archive
4
 * for more details.
5
 *
6
 * Copyright (C) 1996, 2001-2003 Silicon Graphics, Inc. All rights reserved.
7
 * Copyright (C) 2001 by Ralf Baechle
8
 */
9
#ifndef _ASM_IA64_SN_KLCLOCK_H
10
#define _ASM_IA64_SN_KLCLOCK_H
11
 
12
#include <asm/sn/ioc3.h>
13
#include <asm/sn/ioc4.h>
14
 
15
#define RTC_BASE_ADDR           (unsigned char *)(nvram_base)
16
 
17
/* Defines for the SGS-Thomson M48T35 clock */
18
#define RTC_SGS_WRITE_ENABLE    0x80
19
#define RTC_SGS_READ_PROTECT    0x40
20
#define RTC_SGS_YEAR_ADDR       (RTC_BASE_ADDR + 0x7fffL)
21
#define RTC_SGS_MONTH_ADDR      (RTC_BASE_ADDR + 0x7ffeL)
22
#define RTC_SGS_DATE_ADDR       (RTC_BASE_ADDR + 0x7ffdL)
23
#define RTC_SGS_DAY_ADDR        (RTC_BASE_ADDR + 0x7ffcL)
24
#define RTC_SGS_HOUR_ADDR       (RTC_BASE_ADDR + 0x7ffbL)
25
#define RTC_SGS_MIN_ADDR        (RTC_BASE_ADDR + 0x7ffaL)
26
#define RTC_SGS_SEC_ADDR        (RTC_BASE_ADDR + 0x7ff9L)
27
#define RTC_SGS_CONTROL_ADDR    (RTC_BASE_ADDR + 0x7ff8L)
28
 
29
/* Defines for the Dallas DS1386 */
30
#define RTC_DAL_UPDATE_ENABLE   0x80
31
#define RTC_DAL_UPDATE_DISABLE  0x00
32
#define RTC_DAL_YEAR_ADDR       (RTC_BASE_ADDR + 0xaL)
33
#define RTC_DAL_MONTH_ADDR      (RTC_BASE_ADDR + 0x9L)
34
#define RTC_DAL_DATE_ADDR       (RTC_BASE_ADDR + 0x8L)
35
#define RTC_DAL_DAY_ADDR        (RTC_BASE_ADDR + 0x6L)
36
#define RTC_DAL_HOUR_ADDR       (RTC_BASE_ADDR + 0x4L)
37
#define RTC_DAL_MIN_ADDR        (RTC_BASE_ADDR + 0x2L)
38
#define RTC_DAL_SEC_ADDR        (RTC_BASE_ADDR + 0x1L)
39
#define RTC_DAL_CONTROL_ADDR    (RTC_BASE_ADDR + 0xbL)
40
#define RTC_DAL_USER_ADDR       (RTC_BASE_ADDR + 0xeL)
41
 
42
/* Defines for the Dallas DS1742 */
43
#define RTC_DS1742_WRITE_ENABLE    0x80
44
#define RTC_DS1742_READ_ENABLE     0x40
45
#define RTC_DS1742_UPDATE_DISABLE  0x00
46
#define RTC_DS1742_YEAR_ADDR       (RTC_BASE_ADDR + 0x7ffL)
47
#define RTC_DS1742_MONTH_ADDR      (RTC_BASE_ADDR + 0x7feL)
48
#define RTC_DS1742_DATE_ADDR       (RTC_BASE_ADDR + 0x7fdL)
49
#define RTC_DS1742_DAY_ADDR        (RTC_BASE_ADDR + 0x7fcL)
50
#define RTC_DS1742_HOUR_ADDR       (RTC_BASE_ADDR + 0x7fbL)
51
#define RTC_DS1742_MIN_ADDR        (RTC_BASE_ADDR + 0x7faL)
52
#define RTC_DS1742_SEC_ADDR        (RTC_BASE_ADDR + 0x7f9L)
53
#define RTC_DS1742_CONTROL_ADDR    (RTC_BASE_ADDR + 0x7f8L)
54
#define RTC_DS1742_USER_ADDR       (RTC_BASE_ADDR + 0x0L)
55
 
56
#define BCD_TO_INT(x) (((x>>4) * 10) + (x & 0xf))
57
#define INT_TO_BCD(x) (((x / 10)<<4) + (x % 10))
58
 
59
#define YRREF   1970 
60
 
61
#endif /* _ASM_IA64_SN_KLCLOCK_H  */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.