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[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [include/] [asm-m68k/] [atomic.h] - Blame information for rev 1765

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1 1276 phoenix
#ifndef __ARCH_M68K_ATOMIC__
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#define __ARCH_M68K_ATOMIC__
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/*
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 * Atomic operations that C can't guarantee us.  Useful for
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 * resource counting etc..
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 */
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/*
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 * We do not have SMP m68k systems, so we don't have to deal with that.
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 */
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typedef struct { int counter; } atomic_t;
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#define ATOMIC_INIT(i)  { (i) }
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#define atomic_read(v)          ((v)->counter)
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#define atomic_set(v, i)        (((v)->counter) = i)
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static __inline__ void atomic_add(int i, atomic_t *v)
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{
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        __asm__ __volatile__("addl %1,%0" : "=m" (*v) : "id" (i), "0" (*v));
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}
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static __inline__ void atomic_sub(int i, atomic_t *v)
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{
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        __asm__ __volatile__("subl %1,%0" : "=m" (*v) : "id" (i), "0" (*v));
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}
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static __inline__ void atomic_inc(volatile atomic_t *v)
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{
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        __asm__ __volatile__("addql #1,%0" : "=m" (*v): "0" (*v));
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}
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static __inline__ void atomic_dec(volatile atomic_t *v)
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{
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        __asm__ __volatile__("subql #1,%0" : "=m" (*v): "0" (*v));
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}
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static __inline__ int atomic_dec_and_test(volatile atomic_t *v)
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{
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        char c;
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        __asm__ __volatile__("subql #1,%1; seq %0" : "=d" (c), "=m" (*v): "1" (*v));
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        return c != 0;
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}
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#define atomic_clear_mask(mask, v) \
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        __asm__ __volatile__("andl %1,%0" : "=m" (*v) : "id" (~(mask)),"0"(*v))
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#define atomic_set_mask(mask, v) \
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        __asm__ __volatile__("orl %1,%0" : "=m" (*v) : "id" (mask),"0"(*v))
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/* Atomic operations are already serializing */
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#define smp_mb__before_atomic_dec()     barrier()
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#define smp_mb__after_atomic_dec()      barrier()
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#define smp_mb__before_atomic_inc()     barrier()
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#define smp_mb__after_atomic_inc()      barrier()
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#endif /* __ARCH_M68K_ATOMIC __ */

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