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1276 |
phoenix |
/*
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* asmmacro.h: Assembler macros to make things easier to read.
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*
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* Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
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* Copyright (C) 1998 Ralf Baechle
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*/
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#ifndef _ASM_ASMMACRO_H
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#define _ASM_ASMMACRO_H
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#include <linux/config.h>
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#include <asm/offset.h>
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#ifdef CONFIG_CPU_SB1
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#define FPU_ENABLE_HAZARD \
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.set push; \
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.set noreorder; \
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.set mips2; \
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SSNOP; \
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bnezl $0, .+4; \
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SSNOP; \
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.set pop
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#else
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#define FPU_ENABLE_HAZARD
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#endif
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#define FPU_SAVE_DOUBLE(thread, tmp) \
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cfc1 tmp, fcr31; \
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sdc1 $f0, (THREAD_FPU + 0x000)(thread); \
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sdc1 $f2, (THREAD_FPU + 0x010)(thread); \
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sdc1 $f4, (THREAD_FPU + 0x020)(thread); \
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sdc1 $f6, (THREAD_FPU + 0x030)(thread); \
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sdc1 $f8, (THREAD_FPU + 0x040)(thread); \
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sdc1 $f10, (THREAD_FPU + 0x050)(thread); \
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sdc1 $f12, (THREAD_FPU + 0x060)(thread); \
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sdc1 $f14, (THREAD_FPU + 0x070)(thread); \
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sdc1 $f16, (THREAD_FPU + 0x080)(thread); \
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sdc1 $f18, (THREAD_FPU + 0x090)(thread); \
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sdc1 $f20, (THREAD_FPU + 0x0a0)(thread); \
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sdc1 $f22, (THREAD_FPU + 0x0b0)(thread); \
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sdc1 $f24, (THREAD_FPU + 0x0c0)(thread); \
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sdc1 $f26, (THREAD_FPU + 0x0d0)(thread); \
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sdc1 $f28, (THREAD_FPU + 0x0e0)(thread); \
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sdc1 $f30, (THREAD_FPU + 0x0f0)(thread); \
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sw tmp, (THREAD_FPU + 0x100)(thread)
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#if defined (__MIPSEL__)
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#define FPU_SAVE_SINGLE(thread,tmp) \
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cfc1 tmp, fcr31; \
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swc1 $f0, (THREAD_FPU + 0x000)(thread); \
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swc1 $f1, (THREAD_FPU + 0x004)(thread); \
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swc1 $f2, (THREAD_FPU + 0x010)(thread); \
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swc1 $f3, (THREAD_FPU + 0x014)(thread); \
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swc1 $f4, (THREAD_FPU + 0x020)(thread); \
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swc1 $f5, (THREAD_FPU + 0x024)(thread); \
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swc1 $f6, (THREAD_FPU + 0x030)(thread); \
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swc1 $f7, (THREAD_FPU + 0x034)(thread); \
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swc1 $f8, (THREAD_FPU + 0x040)(thread); \
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swc1 $f9, (THREAD_FPU + 0x044)(thread); \
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swc1 $f10, (THREAD_FPU + 0x050)(thread); \
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swc1 $f11, (THREAD_FPU + 0x054)(thread); \
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swc1 $f12, (THREAD_FPU + 0x060)(thread); \
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swc1 $f13, (THREAD_FPU + 0x064)(thread); \
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swc1 $f14, (THREAD_FPU + 0x070)(thread); \
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swc1 $f15, (THREAD_FPU + 0x074)(thread); \
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swc1 $f16, (THREAD_FPU + 0x080)(thread); \
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swc1 $f17, (THREAD_FPU + 0x084)(thread); \
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swc1 $f18, (THREAD_FPU + 0x090)(thread); \
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swc1 $f19, (THREAD_FPU + 0x094)(thread); \
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swc1 $f20, (THREAD_FPU + 0x0a0)(thread); \
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swc1 $f21, (THREAD_FPU + 0x0a4)(thread); \
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swc1 $f22, (THREAD_FPU + 0x0b0)(thread); \
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swc1 $f23, (THREAD_FPU + 0x0b4)(thread); \
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swc1 $f24, (THREAD_FPU + 0x0c0)(thread); \
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swc1 $f25, (THREAD_FPU + 0x0c4)(thread); \
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swc1 $f26, (THREAD_FPU + 0x0d0)(thread); \
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swc1 $f27, (THREAD_FPU + 0x0d4)(thread); \
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swc1 $f28, (THREAD_FPU + 0x0e0)(thread); \
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swc1 $f29, (THREAD_FPU + 0x0e4)(thread); \
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swc1 $f30, (THREAD_FPU + 0x0f0)(thread); \
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swc1 $f31, (THREAD_FPU + 0x0f4)(thread); \
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sw tmp, (THREAD_FPU + 0x100)(thread)
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#elif defined (__MIPSEB__)
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#define FPU_SAVE_SINGLE(thread,tmp) \
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cfc1 tmp, fcr31; \
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swc1 $f0, (THREAD_FPU + 0x004)(thread); \
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swc1 $f1, (THREAD_FPU + 0x000)(thread); \
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swc1 $f2, (THREAD_FPU + 0x014)(thread); \
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swc1 $f3, (THREAD_FPU + 0x010)(thread); \
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swc1 $f4, (THREAD_FPU + 0x024)(thread); \
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swc1 $f5, (THREAD_FPU + 0x020)(thread); \
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swc1 $f6, (THREAD_FPU + 0x034)(thread); \
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swc1 $f7, (THREAD_FPU + 0x030)(thread); \
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swc1 $f8, (THREAD_FPU + 0x044)(thread); \
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swc1 $f9, (THREAD_FPU + 0x040)(thread); \
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swc1 $f10, (THREAD_FPU + 0x054)(thread); \
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swc1 $f11, (THREAD_FPU + 0x050)(thread); \
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swc1 $f12, (THREAD_FPU + 0x064)(thread); \
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swc1 $f13, (THREAD_FPU + 0x060)(thread); \
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swc1 $f14, (THREAD_FPU + 0x074)(thread); \
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swc1 $f15, (THREAD_FPU + 0x070)(thread); \
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swc1 $f16, (THREAD_FPU + 0x084)(thread); \
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swc1 $f17, (THREAD_FPU + 0x080)(thread); \
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swc1 $f18, (THREAD_FPU + 0x094)(thread); \
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swc1 $f19, (THREAD_FPU + 0x090)(thread); \
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swc1 $f20, (THREAD_FPU + 0x0a4)(thread); \
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swc1 $f21, (THREAD_FPU + 0x0a0)(thread); \
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swc1 $f22, (THREAD_FPU + 0x0b4)(thread); \
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swc1 $f23, (THREAD_FPU + 0x0b0)(thread); \
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swc1 $f24, (THREAD_FPU + 0x0c4)(thread); \
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swc1 $f25, (THREAD_FPU + 0x0c0)(thread); \
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swc1 $f26, (THREAD_FPU + 0x0d4)(thread); \
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swc1 $f27, (THREAD_FPU + 0x0d0)(thread); \
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swc1 $f28, (THREAD_FPU + 0x0e4)(thread); \
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swc1 $f29, (THREAD_FPU + 0x0e0)(thread); \
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swc1 $f30, (THREAD_FPU + 0x0f4)(thread); \
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swc1 $f31, (THREAD_FPU + 0x0f0)(thread); \
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sw tmp, (THREAD_FPU + 0x100)(thread)
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#else
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#error "MIPS, but neither __MIPSEB__, nor __MIPSEL__???"
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#endif
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#define FPU_RESTORE_DOUBLE(thread, tmp) \
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lw tmp, (THREAD_FPU + 0x100)(thread); \
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ldc1 $f0, (THREAD_FPU + 0x000)(thread); \
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ldc1 $f2, (THREAD_FPU + 0x010)(thread); \
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ldc1 $f4, (THREAD_FPU + 0x020)(thread); \
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ldc1 $f6, (THREAD_FPU + 0x030)(thread); \
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ldc1 $f8, (THREAD_FPU + 0x040)(thread); \
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ldc1 $f10, (THREAD_FPU + 0x050)(thread); \
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ldc1 $f12, (THREAD_FPU + 0x060)(thread); \
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ldc1 $f14, (THREAD_FPU + 0x070)(thread); \
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ldc1 $f16, (THREAD_FPU + 0x080)(thread); \
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ldc1 $f18, (THREAD_FPU + 0x090)(thread); \
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ldc1 $f20, (THREAD_FPU + 0x0a0)(thread); \
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ldc1 $f22, (THREAD_FPU + 0x0b0)(thread); \
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ldc1 $f24, (THREAD_FPU + 0x0c0)(thread); \
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ldc1 $f26, (THREAD_FPU + 0x0d0)(thread); \
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ldc1 $f28, (THREAD_FPU + 0x0e0)(thread); \
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ldc1 $f30, (THREAD_FPU + 0x0f0)(thread); \
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ctc1 tmp, fcr31
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#if defined (__MIPSEL__)
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#define FPU_RESTORE_SINGLE(thread,tmp) \
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lw tmp, (THREAD_FPU + 0x100)(thread); \
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lwc1 $f0, (THREAD_FPU + 0x000)(thread); \
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lwc1 $f1, (THREAD_FPU + 0x004)(thread); \
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lwc1 $f2, (THREAD_FPU + 0x010)(thread); \
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lwc1 $f3, (THREAD_FPU + 0x014)(thread); \
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lwc1 $f4, (THREAD_FPU + 0x020)(thread); \
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lwc1 $f5, (THREAD_FPU + 0x024)(thread); \
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lwc1 $f6, (THREAD_FPU + 0x030)(thread); \
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lwc1 $f7, (THREAD_FPU + 0x034)(thread); \
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lwc1 $f8, (THREAD_FPU + 0x040)(thread); \
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lwc1 $f9, (THREAD_FPU + 0x044)(thread); \
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lwc1 $f10, (THREAD_FPU + 0x050)(thread); \
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lwc1 $f11, (THREAD_FPU + 0x054)(thread); \
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lwc1 $f12, (THREAD_FPU + 0x060)(thread); \
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lwc1 $f13, (THREAD_FPU + 0x064)(thread); \
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lwc1 $f14, (THREAD_FPU + 0x070)(thread); \
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lwc1 $f15, (THREAD_FPU + 0x074)(thread); \
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lwc1 $f16, (THREAD_FPU + 0x080)(thread); \
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lwc1 $f17, (THREAD_FPU + 0x084)(thread); \
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lwc1 $f18, (THREAD_FPU + 0x090)(thread); \
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lwc1 $f19, (THREAD_FPU + 0x094)(thread); \
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lwc1 $f20, (THREAD_FPU + 0x0a0)(thread); \
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lwc1 $f21, (THREAD_FPU + 0x0a4)(thread); \
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lwc1 $f22, (THREAD_FPU + 0x0b0)(thread); \
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lwc1 $f23, (THREAD_FPU + 0x0b4)(thread); \
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lwc1 $f24, (THREAD_FPU + 0x0c0)(thread); \
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lwc1 $f25, (THREAD_FPU + 0x0c4)(thread); \
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lwc1 $f26, (THREAD_FPU + 0x0d0)(thread); \
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lwc1 $f27, (THREAD_FPU + 0x0d4)(thread); \
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lwc1 $f28, (THREAD_FPU + 0x0e0)(thread); \
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lwc1 $f29, (THREAD_FPU + 0x0e4)(thread); \
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lwc1 $f30, (THREAD_FPU + 0x0f0)(thread); \
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lwc1 $f31, (THREAD_FPU + 0x0f4)(thread); \
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ctc1 tmp, fcr31
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#elif defined (__MIPSEB__)
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#define FPU_RESTORE_SINGLE(thread,tmp) \
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lw tmp, (THREAD_FPU + 0x100)(thread); \
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lwc1 $f0, (THREAD_FPU + 0x004)(thread); \
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lwc1 $f1, (THREAD_FPU + 0x000)(thread); \
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lwc1 $f2, (THREAD_FPU + 0x014)(thread); \
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lwc1 $f3, (THREAD_FPU + 0x010)(thread); \
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lwc1 $f4, (THREAD_FPU + 0x024)(thread); \
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lwc1 $f5, (THREAD_FPU + 0x020)(thread); \
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| 187 |
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lwc1 $f6, (THREAD_FPU + 0x034)(thread); \
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lwc1 $f7, (THREAD_FPU + 0x030)(thread); \
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| 189 |
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lwc1 $f8, (THREAD_FPU + 0x044)(thread); \
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| 190 |
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lwc1 $f9, (THREAD_FPU + 0x040)(thread); \
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| 191 |
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lwc1 $f10, (THREAD_FPU + 0x054)(thread); \
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| 192 |
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lwc1 $f11, (THREAD_FPU + 0x050)(thread); \
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| 193 |
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lwc1 $f12, (THREAD_FPU + 0x064)(thread); \
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| 194 |
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lwc1 $f13, (THREAD_FPU + 0x060)(thread); \
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| 195 |
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lwc1 $f14, (THREAD_FPU + 0x074)(thread); \
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| 196 |
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lwc1 $f15, (THREAD_FPU + 0x070)(thread); \
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| 197 |
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lwc1 $f16, (THREAD_FPU + 0x084)(thread); \
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| 198 |
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lwc1 $f17, (THREAD_FPU + 0x080)(thread); \
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| 199 |
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lwc1 $f18, (THREAD_FPU + 0x094)(thread); \
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| 200 |
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lwc1 $f19, (THREAD_FPU + 0x090)(thread); \
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| 201 |
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lwc1 $f20, (THREAD_FPU + 0x0a4)(thread); \
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| 202 |
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lwc1 $f21, (THREAD_FPU + 0x0a0)(thread); \
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| 203 |
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lwc1 $f22, (THREAD_FPU + 0x0b4)(thread); \
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| 204 |
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lwc1 $f23, (THREAD_FPU + 0x0b0)(thread); \
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| 205 |
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lwc1 $f24, (THREAD_FPU + 0x0c4)(thread); \
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| 206 |
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lwc1 $f25, (THREAD_FPU + 0x0c0)(thread); \
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| 207 |
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lwc1 $f26, (THREAD_FPU + 0x0d4)(thread); \
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| 208 |
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lwc1 $f27, (THREAD_FPU + 0x0d0)(thread); \
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| 209 |
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lwc1 $f28, (THREAD_FPU + 0x0e4)(thread); \
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| 210 |
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lwc1 $f29, (THREAD_FPU + 0x0e0)(thread); \
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| 211 |
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lwc1 $f30, (THREAD_FPU + 0x0f4)(thread); \
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| 212 |
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lwc1 $f31, (THREAD_FPU + 0x0f0)(thread); \
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| 213 |
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ctc1 tmp, fcr31
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| 214 |
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#else
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| 215 |
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#error "MIPS, but neither __MIPSEB__, nor __MIPSEL__???"
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| 216 |
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#endif
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| 217 |
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| 218 |
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#define CPU_SAVE_NONSCRATCH(thread) \
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| 219 |
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sw s0, THREAD_REG16(thread); \
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| 220 |
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sw s1, THREAD_REG17(thread); \
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| 221 |
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sw s2, THREAD_REG18(thread); \
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| 222 |
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sw s3, THREAD_REG19(thread); \
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| 223 |
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sw s4, THREAD_REG20(thread); \
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| 224 |
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sw s5, THREAD_REG21(thread); \
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| 225 |
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sw s6, THREAD_REG22(thread); \
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| 226 |
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sw s7, THREAD_REG23(thread); \
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| 227 |
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sw sp, THREAD_REG29(thread); \
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| 228 |
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sw fp, THREAD_REG30(thread)
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| 229 |
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| 230 |
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#define CPU_RESTORE_NONSCRATCH(thread) \
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| 231 |
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lw s0, THREAD_REG16(thread); \
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| 232 |
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lw s1, THREAD_REG17(thread); \
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| 233 |
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lw s2, THREAD_REG18(thread); \
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| 234 |
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lw s3, THREAD_REG19(thread); \
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| 235 |
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lw s4, THREAD_REG20(thread); \
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| 236 |
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lw s5, THREAD_REG21(thread); \
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| 237 |
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lw s6, THREAD_REG22(thread); \
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| 238 |
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lw s7, THREAD_REG23(thread); \
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| 239 |
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lw sp, THREAD_REG29(thread); \
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| 240 |
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lw fp, THREAD_REG30(thread); \
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| 241 |
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lw ra, THREAD_REG31(thread)
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| 242 |
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| 243 |
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#endif /* _ASM_ASMMACRO_H */
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