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phoenix |
/*
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* include/asm-mips/dec/ecc.h
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*
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* ECC handling logic definitions common to DECstation/DECsystem
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* 5000/200 (KN02), 5000/240 (KN03), 5000/260 (KN05) and
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* DECsystem 5900 (KN03), 5900/260 (KN05) systems.
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*
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* Copyright (C) 2003 Maciej W. Rozycki
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#ifndef __ASM_MIPS_DEC_ECC_H
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#define __ASM_MIPS_DEC_ECC_H
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/*
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* Error Address Register bits.
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* The register is r/wc -- any write clears it.
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*/
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#define KN0X_EAR_VALID (1<<31) /* error data valid, bus IRQ */
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#define KN0X_EAR_CPU (1<<30) /* CPU/DMA transaction */
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#define KN0X_EAR_WRITE (1<<29) /* write/read transaction */
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#define KN0X_EAR_ECCERR (1<<28) /* ECC/timeout or overrun */
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#define KN0X_EAR_RES_27 (1<<27) /* unused */
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#define KN0X_EAR_ADDRESS (0x7ffffff<<0) /* address involved */
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/*
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* Error Syndrome Register bits.
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* The register is frozen when EAR.VALID is set, otherwise it records bits
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* from the last memory read. The register is r/wc -- any write clears it.
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*/
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#define KN0X_ESR_VLDHI (1<<31) /* error data valid hi word */
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#define KN0X_ESR_CHKHI (0x7f<<24) /* check bits read from mem */
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#define KN0X_ESR_SNGHI (1<<23) /* single/double bit error */
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#define KN0X_ESR_SYNHI (0x7f<<16) /* syndrome from ECC logic */
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#define KN0X_ESR_VLDLO (1<<15) /* error data valid lo word */
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#define KN0X_ESR_CHKLO (0x7f<<8) /* check bits read from mem */
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#define KN0X_ESR_SNGLO (1<<7) /* single/double bit error */
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#define KN0X_ESR_SYNLO (0x7f<<0) /* syndrome from ECC logic */
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#ifndef __ASSEMBLY__
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struct pt_regs;
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extern void dec_ecc_be_init(void);
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extern int dec_ecc_be_handler(struct pt_regs *regs, int is_fixup);
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extern void dec_ecc_be_interrupt(int irq, void *dev_id, struct pt_regs *regs);
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#endif
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#endif /* __ASM_MIPS_DEC_ECC_H */
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