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phoenix |
/*
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* Carsten Langgaard, carstenl@mips.com
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* Copyright (C) 1999 MIPS Technologies, Inc. All rights reserved.
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*
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* ########################################################################
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*
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* This program is free software; you can distribute it and/or modify it
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* under the terms of the GNU General Public License (Version 2) as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
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*
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* ########################################################################
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*
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* Defines for the Atlas interrupt controller.
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*
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*/
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#ifndef _MIPS_ATLASINT_H
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#define _MIPS_ATLASINT_H
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/* Number of IRQ supported on hw interrupt 0. */
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#define ATLASINT_UART 0
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#define ATLASINT_END 32
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/*
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* Atlas registers are memory mapped on 64-bit aligned boundaries and
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* only word access are allowed.
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*/
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struct atlas_ictrl_regs {
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volatile unsigned long intraw;
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long dummy1;
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volatile unsigned long intseten;
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long dummy2;
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volatile unsigned long intrsten;
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long dummy3;
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volatile unsigned long intenable;
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long dummy4;
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volatile unsigned long intstatus;
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long dummy5;
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};
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extern void atlasint_init(void);
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#endif /* !(_MIPS_ATLASINT_H) */
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