OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [include/] [asm-mips/] [mips-boards/] [bonito64.h] - Blame information for rev 1765

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 1276 phoenix
/*
2
 * Bonito Register Map
3
 *
4
 * This file is the original bonito.h from Algorithmics with minor changes
5
 * to fit into linux.
6
 *
7
 * Copyright (c) 1999 Algorithmics Ltd
8
 *
9
 * Carsten Langgaard, carstenl@mips.com
10
 * Copyright (C) 2001 MIPS Technologies, Inc.  All rights reserved.
11
 *
12
 * Algorithmics gives permission for anyone to use and modify this file
13
 * without any obligation or license condition except that you retain
14
 * this copyright message in any source redistribution in whole or part.
15
 *
16
 * Updated copies of this and other files can be found at
17
 * ftp://ftp.algor.co.uk/pub/bonito/
18
 *
19
 * Users of the Bonito controller are warmly recommended to contribute
20
 * any useful changes back to Algorithmics (mail to bonito@algor.co.uk).
21
 */
22
 
23
/* Revision 1.48 autogenerated on 08/17/99 15:20:01 */
24
/* This bonito64 version editted from bonito.h Revision 1.48 on 11/09/00 */
25
 
26
#ifndef _ASM_MIPS_BOARDS_BONITO64_H
27
#define _ASM_MIPS_BOARDS_BONITO64_H
28
 
29
#ifdef __ASSEMBLY__
30
 
31
/* offsets from base register */
32
#define BONITO(x)       (x)
33
 
34
#else /* !__ASSEMBLY__ */
35
 
36
/* offsets from base pointer, this construct allows optimisation */
37
/* static char * const _bonito = PA_TO_KVA1(BONITO_BASE); */
38
 
39
/*
40
 * Algorithmics Bonito64 system controller register base.
41
 */
42
extern char * const _bonito;
43
 
44
#define BONITO(x)               *(volatile u32 *)(_bonito + (x))
45
 
46
#endif /* __ASSEMBLY__ */
47
 
48
 
49
#define BONITO_BOOT_BASE                0x1fc00000
50
#define BONITO_BOOT_SIZE                0x00100000
51
#define BONITO_BOOT_TOP                 (BONITO_BOOT_BASE+BONITO_BOOT_SIZE-1)
52
#define BONITO_FLASH_BASE               0x1c000000
53
#define BONITO_FLASH_SIZE               0x03000000
54
#define BONITO_FLASH_TOP                (BONITO_FLASH_BASE+BONITO_FLASH_SIZE-1)
55
#define BONITO_SOCKET_BASE              0x1f800000
56
#define BONITO_SOCKET_SIZE              0x00400000
57
#define BONITO_SOCKET_TOP               (BONITO_SOCKET_BASE+BONITO_SOCKET_SIZE-1)
58
#define BONITO_REG_BASE                 0x1fe00000
59
#define BONITO_REG_SIZE                 0x00040000
60
#define BONITO_REG_TOP                  (BONITO_REG_BASE+BONITO_REG_SIZE-1)
61
#define BONITO_DEV_BASE                 0x1ff00000
62
#define BONITO_DEV_SIZE                 0x00100000
63
#define BONITO_DEV_TOP                  (BONITO_DEV_BASE+BONITO_DEV_SIZE-1)
64
#define BONITO_PCILO_BASE               0x10000000
65
#define BONITO_PCILO_SIZE               0x0c000000
66
#define BONITO_PCILO_TOP                (BONITO_PCILO_BASE+BONITO_PCILO_SIZE-1)
67
#define BONITO_PCILO0_BASE              0x10000000
68
#define BONITO_PCILO1_BASE              0x14000000
69
#define BONITO_PCILO2_BASE              0x18000000
70
#define BONITO_PCIHI_BASE               0x20000000
71
#define BONITO_PCIHI_SIZE               0x20000000
72
#define BONITO_PCIHI_TOP                (BONITO_PCIHI_BASE+BONITO_PCIHI_SIZE-1)
73
#define BONITO_PCIIO_BASE               0x1fd00000
74
#define BONITO_PCIIO_SIZE               0x00100000
75
#define BONITO_PCIIO_TOP                (BONITO_PCIIO_BASE+BONITO_PCIIO_SIZE-1)
76
#define BONITO_PCICFG_BASE              0x1fe80000
77
#define BONITO_PCICFG_SIZE              0x00080000
78
#define BONITO_PCICFG_TOP               (BONITO_PCICFG_BASE+BONITO_PCICFG_SIZE-1)
79
 
80
 
81
/* Bonito Register Bases */
82
 
83
#define BONITO_PCICONFIGBASE            0x00
84
#define BONITO_REGBASE                  0x100
85
 
86
 
87
/* PCI Configuration  Registers */
88
 
89
#define BONITO_PCI_REG(x)               BONITO(BONITO_PCICONFIGBASE + (x))
90
#define BONITO_PCIDID                   BONITO_PCI_REG(0x00)
91
#define BONITO_PCICMD                   BONITO_PCI_REG(0x04)
92
#define BONITO_PCICLASS                 BONITO_PCI_REG(0x08)
93
#define BONITO_PCILTIMER                BONITO_PCI_REG(0x0c)
94
#define BONITO_PCIBASE0                 BONITO_PCI_REG(0x10)
95
#define BONITO_PCIBASE1                 BONITO_PCI_REG(0x14)
96
#define BONITO_PCIBASE2                 BONITO_PCI_REG(0x18)
97
#define BONITO_PCIEXPRBASE              BONITO_PCI_REG(0x30)
98
#define BONITO_PCIINT                   BONITO_PCI_REG(0x3c)
99
 
100
#define BONITO_PCICMD_PERR_CLR          0x80000000
101
#define BONITO_PCICMD_SERR_CLR          0x40000000
102
#define BONITO_PCICMD_MABORT_CLR        0x20000000
103
#define BONITO_PCICMD_MTABORT_CLR       0x10000000
104
#define BONITO_PCICMD_TABORT_CLR        0x08000000
105
#define BONITO_PCICMD_MPERR_CLR         0x01000000
106
#define BONITO_PCICMD_PERRRESPEN        0x00000040
107
#define BONITO_PCICMD_ASTEPEN           0x00000080
108
#define BONITO_PCICMD_SERREN            0x00000100
109
#define BONITO_PCILTIMER_BUSLATENCY     0x0000ff00
110
#define BONITO_PCILTIMER_BUSLATENCY_SHIFT       8
111
 
112
 
113
 
114
 
115
/* 1. Bonito h/w Configuration */
116
/* Power on register */
117
 
118
#define BONITO_BONPONCFG                BONITO(BONITO_REGBASE + 0x00)
119
 
120
#define BONITO_BONPONCFG_SYSCONTROLLERRD        0x00040000
121
#define BONITO_BONPONCFG_ROMCS1SAMP     0x00020000
122
#define BONITO_BONPONCFG_ROMCS0SAMP     0x00010000
123
#define BONITO_BONPONCFG_CPUBIGEND      0x00004000
124
/* Added by RPF 11-9-00 */
125
#define BONITO_BONPONCFG_BURSTORDER     0x00001000
126
/* --- */
127
#define BONITO_BONPONCFG_CPUPARITY      0x00002000
128
#define BONITO_BONPONCFG_CPUTYPE        0x00000007
129
#define BONITO_BONPONCFG_CPUTYPE_SHIFT  0
130
#define BONITO_BONPONCFG_PCIRESET_OUT   0x00000008
131
#define BONITO_BONPONCFG_IS_ARBITER     0x00000010
132
#define BONITO_BONPONCFG_ROMBOOT        0x000000c0
133
#define BONITO_BONPONCFG_ROMBOOT_SHIFT  6
134
 
135
#define BONITO_BONPONCFG_ROMBOOT_FLASH  (0x0<<BONITO_BONPONCFG_ROMBOOT_SHIFT)
136
#define BONITO_BONPONCFG_ROMBOOT_SOCKET (0x1<<BONITO_BONPONCFG_ROMBOOT_SHIFT)
137
#define BONITO_BONPONCFG_ROMBOOT_SDRAM  (0x2<<BONITO_BONPONCFG_ROMBOOT_SHIFT)
138
#define BONITO_BONPONCFG_ROMBOOT_CPURESET       (0x3<<BONITO_BONPONCFG_ROMBOOT_SHIFT)
139
 
140
#define BONITO_BONPONCFG_ROMCS0WIDTH    0x00000100
141
#define BONITO_BONPONCFG_ROMCS1WIDTH    0x00000200
142
#define BONITO_BONPONCFG_ROMCS0FAST     0x00000400
143
#define BONITO_BONPONCFG_ROMCS1FAST     0x00000800
144
#define BONITO_BONPONCFG_CONFIG_DIS     0x00000020
145
 
146
 
147
/* Other Bonito configuration */
148
 
149
#define BONITO_BONGENCFG_OFFSET         0x4
150
#define BONITO_BONGENCFG                BONITO(BONITO_REGBASE + BONITO_BONGENCFG_OFFSET)
151
 
152
#define BONITO_BONGENCFG_DEBUGMODE      0x00000001
153
#define BONITO_BONGENCFG_SNOOPEN        0x00000002
154
#define BONITO_BONGENCFG_CPUSELFRESET   0x00000004
155
 
156
#define BONITO_BONGENCFG_FORCE_IRQA     0x00000008
157
#define BONITO_BONGENCFG_IRQA_ISOUT     0x00000010
158
#define BONITO_BONGENCFG_IRQA_FROM_INT1 0x00000020
159
#define BONITO_BONGENCFG_BYTESWAP       0x00000040
160
 
161
#define BONITO_BONGENCFG_UNCACHED       0x00000080
162
#define BONITO_BONGENCFG_PREFETCHEN     0x00000100
163
#define BONITO_BONGENCFG_WBEHINDEN      0x00000200
164
#define BONITO_BONGENCFG_CACHEALG       0x00000c00
165
#define BONITO_BONGENCFG_CACHEALG_SHIFT 10
166
#define BONITO_BONGENCFG_PCIQUEUE       0x00001000
167
#define BONITO_BONGENCFG_CACHESTOP      0x00002000
168
#define BONITO_BONGENCFG_MSTRBYTESWAP   0x00004000
169
#define BONITO_BONGENCFG_BUSERREN       0x00008000
170
#define BONITO_BONGENCFG_NORETRYTIMEOUT 0x00010000
171
#define BONITO_BONGENCFG_SHORTCOPYTIMEOUT       0x00020000
172
 
173
/* 2. IO & IDE configuration */
174
 
175
#define BONITO_IODEVCFG                 BONITO(BONITO_REGBASE + 0x08)
176
 
177
/* 3. IO & IDE configuration */
178
 
179
#define BONITO_SDCFG                    BONITO(BONITO_REGBASE + 0x0c)
180
 
181
/* 4. PCI address map control */
182
 
183
#define BONITO_PCIMAP                   BONITO(BONITO_REGBASE + 0x10)
184
#define BONITO_PCIMEMBASECFG            BONITO(BONITO_REGBASE + 0x14)
185
#define BONITO_PCIMAP_CFG               BONITO(BONITO_REGBASE + 0x18)
186
 
187
/* 5. ICU & GPIO regs */
188
 
189
/* GPIO Regs - r/w */
190
 
191
#define BONITO_GPIODATA_OFFSET          0x1c
192
#define BONITO_GPIODATA                 BONITO(BONITO_REGBASE + BONITO_GPIODATA_OFFSET)
193
#define BONITO_GPIOIE                   BONITO(BONITO_REGBASE + 0x20)
194
 
195
/* ICU Configuration Regs - r/w */
196
 
197
#define BONITO_INTEDGE                  BONITO(BONITO_REGBASE + 0x24)
198
#define BONITO_INTSTEER                 BONITO(BONITO_REGBASE + 0x28)
199
#define BONITO_INTPOL                   BONITO(BONITO_REGBASE + 0x2c)
200
 
201
/* ICU Enable Regs - IntEn & IntISR are r/o. */
202
 
203
#define BONITO_INTENSET                 BONITO(BONITO_REGBASE + 0x30)
204
#define BONITO_INTENCLR                 BONITO(BONITO_REGBASE + 0x34)
205
#define BONITO_INTEN                    BONITO(BONITO_REGBASE + 0x38)
206
#define BONITO_INTISR                   BONITO(BONITO_REGBASE + 0x3c)
207
 
208
/* PCI mail boxes */
209
 
210
#define BONITO_PCIMAIL0_OFFSET          0x40
211
#define BONITO_PCIMAIL1_OFFSET          0x44
212
#define BONITO_PCIMAIL2_OFFSET          0x48
213
#define BONITO_PCIMAIL3_OFFSET          0x4c
214
#define BONITO_PCIMAIL0                 BONITO(BONITO_REGBASE + 0x40)
215
#define BONITO_PCIMAIL1                 BONITO(BONITO_REGBASE + 0x44)
216
#define BONITO_PCIMAIL2                 BONITO(BONITO_REGBASE + 0x48)
217
#define BONITO_PCIMAIL3                 BONITO(BONITO_REGBASE + 0x4c)
218
 
219
 
220
/* 6. PCI cache */
221
 
222
#define BONITO_PCICACHECTRL             BONITO(BONITO_REGBASE + 0x50)
223
#define BONITO_PCICACHETAG              BONITO(BONITO_REGBASE + 0x54)
224
 
225
#define BONITO_PCIBADADDR               BONITO(BONITO_REGBASE + 0x58)
226
#define BONITO_PCIMSTAT                 BONITO(BONITO_REGBASE + 0x5c)
227
 
228
 
229
/*
230
#define BONITO_PCIRDPOST                BONITO(BONITO_REGBASE + 0x60)
231
#define BONITO_PCIDATA                  BONITO(BONITO_REGBASE + 0x64)
232
*/
233
 
234
/* 7. IDE DMA & Copier */
235
 
236
#define BONITO_CONFIGBASE               0x000
237
#define BONITO_BONITOBASE               0x100
238
#define BONITO_LDMABASE                 0x200
239
#define BONITO_COPBASE                  0x300
240
#define BONITO_REG_BLOCKMASK            0x300
241
 
242
#define BONITO_LDMACTRL                 BONITO(BONITO_LDMABASE + 0x0)
243
#define BONITO_LDMASTAT                 BONITO(BONITO_LDMABASE + 0x0)
244
#define BONITO_LDMAADDR                 BONITO(BONITO_LDMABASE + 0x4)
245
#define BONITO_LDMAGO                   BONITO(BONITO_LDMABASE + 0x8)
246
#define BONITO_LDMADATA                 BONITO(BONITO_LDMABASE + 0xc)
247
 
248
#define BONITO_COPCTRL                  BONITO(BONITO_COPBASE + 0x0)
249
#define BONITO_COPSTAT                  BONITO(BONITO_COPBASE + 0x0)
250
#define BONITO_COPPADDR                 BONITO(BONITO_COPBASE + 0x4)
251
#define BONITO_COPDADDR                 BONITO(BONITO_COPBASE + 0x8)
252
#define BONITO_COPGO                    BONITO(BONITO_COPBASE + 0xc)
253
 
254
 
255
/* ###### Bit Definitions for individual Registers #### */
256
 
257
/* Gen DMA. */
258
 
259
#define BONITO_IDECOPDADDR_DMA_DADDR    0x0ffffffc
260
#define BONITO_IDECOPDADDR_DMA_DADDR_SHIFT      2
261
#define BONITO_IDECOPPADDR_DMA_PADDR    0xfffffffc
262
#define BONITO_IDECOPPADDR_DMA_PADDR_SHIFT      2
263
#define BONITO_IDECOPGO_DMA_SIZE        0x0000fffe
264
#define BONITO_IDECOPGO_DMA_SIZE_SHIFT  0
265
#define BONITO_IDECOPGO_DMA_WRITE       0x00010000
266
#define BONITO_IDECOPGO_DMAWCOUNT       0x000f0000
267
#define BONITO_IDECOPGO_DMAWCOUNT_SHIFT 16
268
 
269
#define BONITO_IDECOPCTRL_DMA_STARTBIT  0x80000000
270
#define BONITO_IDECOPCTRL_DMA_RSTBIT    0x40000000
271
 
272
/* DRAM - sdCfg */
273
 
274
#define BONITO_SDCFG_AROWBITS           0x00000003
275
#define BONITO_SDCFG_AROWBITS_SHIFT     0
276
#define BONITO_SDCFG_ACOLBITS           0x0000000c
277
#define BONITO_SDCFG_ACOLBITS_SHIFT     2
278
#define BONITO_SDCFG_ABANKBIT           0x00000010
279
#define BONITO_SDCFG_ASIDES             0x00000020
280
#define BONITO_SDCFG_AABSENT            0x00000040
281
#define BONITO_SDCFG_AWIDTH64           0x00000080
282
 
283
#define BONITO_SDCFG_BROWBITS           0x00000300
284
#define BONITO_SDCFG_BROWBITS_SHIFT     8
285
#define BONITO_SDCFG_BCOLBITS           0x00000c00
286
#define BONITO_SDCFG_BCOLBITS_SHIFT     10
287
#define BONITO_SDCFG_BBANKBIT           0x00001000
288
#define BONITO_SDCFG_BSIDES             0x00002000
289
#define BONITO_SDCFG_BABSENT            0x00004000
290
#define BONITO_SDCFG_BWIDTH64           0x00008000
291
 
292
#define BONITO_SDCFG_EXTRDDATA          0x00010000
293
#define BONITO_SDCFG_EXTRASCAS          0x00020000
294
#define BONITO_SDCFG_EXTPRECH           0x00040000
295
#define BONITO_SDCFG_EXTRASWIDTH        0x00180000
296
#define BONITO_SDCFG_EXTRASWIDTH_SHIFT  19
297
/* Changed by RPF 11-9-00 */
298
#define BONITO_SDCFG_DRAMMODESET        0x00200000
299
/* --- */
300
#define BONITO_SDCFG_DRAMEXTREGS        0x00400000
301
#define BONITO_SDCFG_DRAMPARITY         0x00800000
302
/* Added by RPF 11-9-00 */
303
#define BONITO_SDCFG_DRAMBURSTLEN       0x03000000
304
#define BONITO_SDCFG_DRAMBURSTLEN_SHIFT 24
305
#define BONITO_SDCFG_DRAMMODESET_DONE   0x80000000
306
/* --- */
307
 
308
/* PCI Cache - pciCacheCtrl */
309
 
310
#define BONITO_PCICACHECTRL_CACHECMD    0x00000007
311
#define BONITO_PCICACHECTRL_CACHECMD_SHIFT      0
312
#define BONITO_PCICACHECTRL_CACHECMDLINE        0x00000018
313
#define BONITO_PCICACHECTRL_CACHECMDLINE_SHIFT  3
314
#define BONITO_PCICACHECTRL_CMDEXEC     0x00000020
315
 
316
#define BONITO_IODEVCFG_BUFFBIT_CS0     0x00000001
317
#define BONITO_IODEVCFG_SPEEDBIT_CS0    0x00000002
318
#define BONITO_IODEVCFG_MOREABITS_CS0   0x00000004
319
 
320
#define BONITO_IODEVCFG_BUFFBIT_CS1     0x00000008
321
#define BONITO_IODEVCFG_SPEEDBIT_CS1    0x00000010
322
#define BONITO_IODEVCFG_MOREABITS_CS1   0x00000020
323
 
324
#define BONITO_IODEVCFG_BUFFBIT_CS2     0x00000040
325
#define BONITO_IODEVCFG_SPEEDBIT_CS2    0x00000080
326
#define BONITO_IODEVCFG_MOREABITS_CS2   0x00000100
327
 
328
#define BONITO_IODEVCFG_BUFFBIT_CS3     0x00000200
329
#define BONITO_IODEVCFG_SPEEDBIT_CS3    0x00000400
330
#define BONITO_IODEVCFG_MOREABITS_CS3   0x00000800
331
 
332
#define BONITO_IODEVCFG_BUFFBIT_IDE     0x00001000
333
#define BONITO_IODEVCFG_SPEEDBIT_IDE    0x00002000
334
#define BONITO_IODEVCFG_WORDSWAPBIT_IDE 0x00004000
335
#define BONITO_IODEVCFG_MODEBIT_IDE     0x00008000
336
#define BONITO_IODEVCFG_DMAON_IDE       0x001f0000
337
#define BONITO_IODEVCFG_DMAON_IDE_SHIFT 16
338
#define BONITO_IODEVCFG_DMAOFF_IDE      0x01e00000
339
#define BONITO_IODEVCFG_DMAOFF_IDE_SHIFT        21
340
#define BONITO_IODEVCFG_EPROMSPLIT      0x02000000
341
/* Added by RPF 11-9-00 */
342
#define BONITO_IODEVCFG_CPUCLOCKPERIOD  0xfc000000
343
#define BONITO_IODEVCFG_CPUCLOCKPERIOD_SHIFT 26
344
/* --- */
345
 
346
/* gpio */
347
#define BONITO_GPIO_GPIOW               0x000003ff
348
#define BONITO_GPIO_GPIOW_SHIFT         0
349
#define BONITO_GPIO_GPIOR               0x01ff0000
350
#define BONITO_GPIO_GPIOR_SHIFT         16
351
#define BONITO_GPIO_GPINR               0xfe000000
352
#define BONITO_GPIO_GPINR_SHIFT         25
353
#define BONITO_GPIO_IOW(N)              (1<<(BONITO_GPIO_GPIOW_SHIFT+(N)))
354
#define BONITO_GPIO_IOR(N)              (1<<(BONITO_GPIO_GPIOR_SHIFT+(N)))
355
#define BONITO_GPIO_INR(N)              (1<<(BONITO_GPIO_GPINR_SHIFT+(N)))
356
 
357
/* ICU */
358
#define BONITO_ICU_MBOXES               0x0000000f
359
#define BONITO_ICU_MBOXES_SHIFT         0
360
#define BONITO_ICU_DMARDY               0x00000010
361
#define BONITO_ICU_DMAEMPTY             0x00000020
362
#define BONITO_ICU_COPYRDY              0x00000040
363
#define BONITO_ICU_COPYEMPTY            0x00000080
364
#define BONITO_ICU_COPYERR              0x00000100
365
#define BONITO_ICU_PCIIRQ               0x00000200
366
#define BONITO_ICU_MASTERERR            0x00000400
367
#define BONITO_ICU_SYSTEMERR            0x00000800
368
#define BONITO_ICU_DRAMPERR             0x00001000
369
#define BONITO_ICU_RETRYERR             0x00002000
370
#define BONITO_ICU_GPIOS                0x01ff0000
371
#define BONITO_ICU_GPIOS_SHIFT          16
372
#define BONITO_ICU_GPINS                0x7e000000
373
#define BONITO_ICU_GPINS_SHIFT          25
374
#define BONITO_ICU_MBOX(N)              (1<<(BONITO_ICU_MBOXES_SHIFT+(N)))
375
#define BONITO_ICU_GPIO(N)              (1<<(BONITO_ICU_GPIOS_SHIFT+(N)))
376
#define BONITO_ICU_GPIN(N)              (1<<(BONITO_ICU_GPINS_SHIFT+(N)))
377
 
378
/* pcimap */
379
 
380
#define BONITO_PCIMAP_PCIMAP_LO0        0x0000003f
381
#define BONITO_PCIMAP_PCIMAP_LO0_SHIFT  0
382
#define BONITO_PCIMAP_PCIMAP_LO1        0x00000fc0
383
#define BONITO_PCIMAP_PCIMAP_LO1_SHIFT  6
384
#define BONITO_PCIMAP_PCIMAP_LO2        0x0003f000
385
#define BONITO_PCIMAP_PCIMAP_LO2_SHIFT  12
386
#define BONITO_PCIMAP_PCIMAP_2          0x00040000
387
#define BONITO_PCIMAP_WIN(WIN,ADDR)     ((((ADDR)>>26) & BONITO_PCIMAP_PCIMAP_LO0) << ((WIN)*6))
388
 
389
#define BONITO_PCIMAP_WINSIZE           (1<<26)
390
#define BONITO_PCIMAP_WINOFFSET(ADDR)   ((ADDR) & (BONITO_PCIMAP_WINSIZE - 1))
391
#define BONITO_PCIMAP_WINBASE(ADDR)     ((ADDR) << 26)
392
 
393
/* pcimembaseCfg */
394
 
395
#define BONITO_PCIMEMBASECFG_MASK               0xf0000000
396
#define BONITO_PCIMEMBASECFG_MEMBASE0_MASK      0x0000001f
397
#define BONITO_PCIMEMBASECFG_MEMBASE0_MASK_SHIFT        0
398
#define BONITO_PCIMEMBASECFG_MEMBASE0_TRANS     0x000003e0
399
#define BONITO_PCIMEMBASECFG_MEMBASE0_TRANS_SHIFT       5
400
#define BONITO_PCIMEMBASECFG_MEMBASE0_CACHED    0x00000400
401
#define BONITO_PCIMEMBASECFG_MEMBASE0_IO        0x00000800
402
 
403
#define BONITO_PCIMEMBASECFG_MEMBASE1_MASK      0x0001f000
404
#define BONITO_PCIMEMBASECFG_MEMBASE1_MASK_SHIFT        12
405
#define BONITO_PCIMEMBASECFG_MEMBASE1_TRANS     0x003e0000
406
#define BONITO_PCIMEMBASECFG_MEMBASE1_TRANS_SHIFT       17
407
#define BONITO_PCIMEMBASECFG_MEMBASE1_CACHED    0x00400000
408
#define BONITO_PCIMEMBASECFG_MEMBASE1_IO        0x00800000
409
 
410
#define BONITO_PCIMEMBASECFG_ASHIFT     23
411
#define BONITO_PCIMEMBASECFG_AMASK              0x007fffff
412
#define BONITO_PCIMEMBASECFGSIZE(WIN,SIZE)      (((~((SIZE)-1))>>(BONITO_PCIMEMBASECFG_ASHIFT-BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT)) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK)
413
#define BONITO_PCIMEMBASECFGBASE(WIN,BASE)      (((BASE)>>(BONITO_PCIMEMBASECFG_ASHIFT-BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS_SHIFT)) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS)
414
 
415
#define BONITO_PCIMEMBASECFG_SIZE(WIN,CFG)  (((((~(CFG)) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK)) << (BONITO_PCIMEMBASECFG_ASHIFT - BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT)) | BONITO_PCIMEMBASECFG_AMASK)
416
 
417
 
418
#define BONITO_PCIMEMBASECFG_ADDRMASK(WIN,CFG)  ((((CFG) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK) >> BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT) << BONITO_PCIMEMBASECFG_ASHIFT)
419
#define BONITO_PCIMEMBASECFG_ADDRMASK(WIN,CFG)  ((((CFG) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK) >> BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT) << BONITO_PCIMEMBASECFG_ASHIFT)
420
#define BONITO_PCIMEMBASECFG_ADDRTRANS(WIN,CFG) ((((CFG) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS) >> BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS_SHIFT) << BONITO_PCIMEMBASECFG_ASHIFT)
421
 
422
#define BONITO_PCITOPHYS(WIN,ADDR,CFG)          ( \
423
                                                  (((ADDR) & (~(BONITO_PCIMEMBASECFG_MASK))) & (~(BONITO_PCIMEMBASECFG_ADDRMASK(WIN,CFG)))) | \
424
                                                  (BONITO_PCIMEMBASECFG_ADDRTRANS(WIN,CFG)) \
425
                                                )
426
 
427
/* PCICmd */
428
 
429
#define BONITO_PCICMD_MEMEN             0x00000002
430
#define BONITO_PCICMD_MSTREN            0x00000004
431
 
432
 
433
#endif /* _ASM_MIPS_BOARDS_BONITO64_H */

powered by: WebSVN 2.1.0

© copyright 1999-2025 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.