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[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [include/] [asm-mips/] [pgtable-32.h] - Blame information for rev 1774

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1 1276 phoenix
#ifndef _MIPS_PGTABLE_32_H
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#define _MIPS_PGTABLE_32_H
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/*
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 * traditional mips two-level paging structure:
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 */
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#ifdef CONFIG_64BIT_PHYS_ADDR
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#define PGD_ORDER       1
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#define PTE_ORDER       0
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#else
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#define PGD_ORDER       0
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#define PTE_ORDER       0
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#endif
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#define PMD_SHIFT       (2 * PAGE_SHIFT - PTE_T_LOG2)
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#if !defined (_LANGUAGE_ASSEMBLY)
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#ifdef CONFIG_64BIT_PHYS_ADDR
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#define pte_ERROR(e) \
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        printk("%s:%d: bad pte %016Lx.\n", __FILE__, __LINE__, pte_val(e))
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#else
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#define pte_ERROR(e) \
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        printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, (e).pte_low)
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#endif
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#define pmd_ERROR(e) \
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        printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
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#define pgd_ERROR(e) \
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        printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
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static inline int pte_none(pte_t pte)    { return !(pte_val(pte) & ~_PAGE_GLOBAL); }
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static inline pte_t pte_wrprotect(pte_t pte)
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{
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        pte_val(pte) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
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        return pte;
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}
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static inline pte_t pte_rdprotect(pte_t pte)
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{
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        pte_val(pte) &= ~(_PAGE_READ | _PAGE_SILENT_READ);
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        return pte;
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}
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static inline pte_t pte_mkclean(pte_t pte)
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{
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        pte_val(pte) &= ~(_PAGE_MODIFIED|_PAGE_SILENT_WRITE);
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        return pte;
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}
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static inline pte_t pte_mkold(pte_t pte)
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{
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        pte_val(pte) &= ~(_PAGE_ACCESSED|_PAGE_SILENT_READ);
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        return pte;
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}
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static inline pte_t pte_mkwrite(pte_t pte)
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{
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        pte_val(pte) |= _PAGE_WRITE;
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        if (pte_val(pte) & _PAGE_MODIFIED)
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                pte_val(pte) |= _PAGE_SILENT_WRITE;
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        return pte;
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}
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static inline pte_t pte_mkread(pte_t pte)
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{
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        pte_val(pte) |= _PAGE_READ;
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        if (pte_val(pte) & _PAGE_ACCESSED)
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                pte_val(pte) |= _PAGE_SILENT_READ;
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        return pte;
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}
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static inline pte_t pte_mkdirty(pte_t pte)
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{
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        pte_val(pte) |= _PAGE_MODIFIED;
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        if (pte_val(pte) & _PAGE_WRITE)
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                pte_val(pte) |= _PAGE_SILENT_WRITE;
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        return pte;
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}
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/*
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 * Macro to make mark a page protection value as "uncacheable".  Note
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 * that "protection" is really a misnomer here as the protection value
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 * contains the memory attribute bits, dirty bits, and various other
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 * bits as well.
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 */
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#define pgprot_noncached pgprot_noncached
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static inline pgprot_t pgprot_noncached(pgprot_t _prot)
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{
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        unsigned long prot = pgprot_val(_prot);
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        prot = (prot & ~_CACHE_MASK) | _CACHE_UNCACHED;
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        return __pgprot(prot);
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}
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static inline pte_t pte_mkyoung(pte_t pte)
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{
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        pte_val(pte) |= _PAGE_ACCESSED;
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        if (pte_val(pte) & _PAGE_READ)
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                pte_val(pte) |= _PAGE_SILENT_READ;
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        return pte;
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}
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/*
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 * Conversion functions: convert a page and protection to a page entry,
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 * and a page entry and page directory to the page they refer to.
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 */
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#ifdef CONFIG_CPU_VR41XX
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#define mk_pte(page, pgprot)                                            \
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({                                                                      \
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        pte_t   __pte;                                                  \
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                                                                        \
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        pte_val(__pte) = ((phys_t)(page - mem_map) << (PAGE_SHIFT + 2)) | \
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                         pgprot_val(pgprot);                            \
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                                                                        \
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        __pte;                                                          \
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})
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#else
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#define mk_pte(page, pgprot)                                            \
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({                                                                      \
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        pte_t   __pte;                                                  \
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                                                                        \
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        pte_val(__pte) = ((phys_t)(page - mem_map) << PAGE_SHIFT) | \
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                         pgprot_val(pgprot);                            \
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                                                                        \
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        __pte;                                                          \
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})
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#endif
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static inline pte_t mk_pte_phys(phys_t physpage, pgprot_t pgprot)
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{
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#ifdef CONFIG_CPU_VR41XX
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        return __pte((physpage << 2) | pgprot_val(pgprot));
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#else
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        return __pte(physpage | pgprot_val(pgprot));
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#endif
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}
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static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
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{
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        return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot));
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}
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/* Certain architectures need to do special things when pte's
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 * within a page table are directly modified.  Thus, the following
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 * hook is made available.
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 */
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static inline void set_pte(pte_t *ptep, pte_t pteval)
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{
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        *ptep = pteval;
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#if !defined(CONFIG_CPU_R3000) && !defined(CONFIG_CPU_TX39XX)
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        if (pte_val(pteval) & _PAGE_GLOBAL) {
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                pte_t *buddy = ptep_buddy(ptep);
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                /*
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                 * Make sure the buddy is global too (if it's !none,
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                 * it better already be global)
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                 */
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                if (pte_none(*buddy))
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                        pte_val(*buddy) = pte_val(*buddy) | _PAGE_GLOBAL;
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        }
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#endif
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}
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static inline void pte_clear(pte_t *ptep)
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{
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#if !defined(CONFIG_CPU_R3000) && !defined(CONFIG_CPU_TX39XX)
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        /* Preserve global status for the pair */
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        if (pte_val(*ptep_buddy(ptep)) & _PAGE_GLOBAL)
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                set_pte(ptep, __pte(_PAGE_GLOBAL));
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        else
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#endif
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                set_pte(ptep, __pte(0));
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}
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#ifdef CONFIG_CPU_VR41XX
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#define pte_page(x)  (mem_map+((unsigned long)(((x).pte_low >> (PAGE_SHIFT+2)))))
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#define __mk_pte(page_nr,pgprot) __pte(((page_nr) << (PAGE_SHIFT+2)) | pgprot_val(pgprot))
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#else
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#define pte_page(x)  (mem_map+((unsigned long)(((x).pte_low >> PAGE_SHIFT))))
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#define __mk_pte(page_nr,pgprot) __pte(((page_nr) << PAGE_SHIFT) | pgprot_val(pgprot))
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#endif
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#endif
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#endif /* _MIPS_PGTABLE_32_H */

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