OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [include/] [asm-mips/] [spinlock.h] - Blame information for rev 1765

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 1276 phoenix
/*
2
 * This file is subject to the terms and conditions of the GNU General Public
3
 * License.  See the file "COPYING" in the main directory of this archive
4
 * for more details.
5
 *
6
 * Copyright (C) 1999, 2000 by Ralf Baechle
7
 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
8
 */
9
#ifndef _ASM_SPINLOCK_H
10
#define _ASM_SPINLOCK_H
11
 
12
/*
13
 * Your basic SMP spinlocks, allowing only a single CPU anywhere
14
 */
15
 
16
typedef struct {
17
        volatile unsigned int lock;
18
} spinlock_t;
19
 
20
#define SPIN_LOCK_UNLOCKED (spinlock_t) { 0 }
21
 
22
#define spin_lock_init(x)       do { (x)->lock = 0; } while(0)
23
 
24
#define spin_is_locked(x)       ((x)->lock != 0)
25
#define spin_unlock_wait(x)     do { barrier(); } while ((x)->lock)
26
 
27
/*
28
 * Simple spin lock operations.  There are two variants, one clears IRQ's
29
 * on the local processor, one does not.
30
 *
31
 * We make no fairness assumptions.  They have a cost.
32
 */
33
 
34
static inline void spin_lock(spinlock_t *lock)
35
{
36
        unsigned int tmp;
37
 
38
        __asm__ __volatile__(
39
        ".set\tnoreorder\t\t\t# spin_lock\n"
40
        "1:\tll\t%1, %2\n\t"
41
        "bnez\t%1, 1b\n\t"
42
        " li\t%1, 1\n\t"
43
        "sc\t%1, %0\n\t"
44
        "beqz\t%1, 1b\n\t"
45
        " sync\n\t"
46
        ".set\treorder"
47
        : "=m" (lock->lock), "=&r" (tmp)
48
        : "m" (lock->lock)
49
        : "memory");
50
}
51
 
52
static inline void spin_unlock(spinlock_t *lock)
53
{
54
        __asm__ __volatile__(
55
        ".set\tnoreorder\t\t\t# spin_unlock\n\t"
56
        "sync\n\t"
57
        "sw\t$0, %0\n\t"
58
        ".set\treorder"
59
        : "=m" (lock->lock)
60
        : "m" (lock->lock)
61
        : "memory");
62
}
63
 
64
#define spin_trylock(lock) (!test_and_set_bit(0,(lock)))
65
 
66
/*
67
 * Read-write spinlocks, allowing multiple readers but only one writer.
68
 *
69
 * NOTE! it is quite common to have readers in interrupts but no interrupt
70
 * writers. For those circumstances we can "mix" irq-safe locks - any writer
71
 * needs to get a irq-safe write-lock, but readers can get non-irqsafe
72
 * read-locks.
73
 */
74
 
75
typedef struct {
76
        volatile unsigned int lock;
77
} rwlock_t;
78
 
79
#define RW_LOCK_UNLOCKED (rwlock_t) { 0 }
80
 
81
#define rwlock_init(x)  do { *(x) = RW_LOCK_UNLOCKED; } while(0)
82
 
83
static inline void read_lock(rwlock_t *rw)
84
{
85
        unsigned int tmp;
86
 
87
        __asm__ __volatile__(
88
        ".set\tnoreorder\t\t\t# read_lock\n"
89
        "1:\tll\t%1, %2\n\t"
90
        "bltz\t%1, 1b\n\t"
91
        " addu\t%1, 1\n\t"
92
        "sc\t%1, %0\n\t"
93
        "beqz\t%1, 1b\n\t"
94
        " sync\n\t"
95
        ".set\treorder"
96
        : "=m" (rw->lock), "=&r" (tmp)
97
        : "m" (rw->lock)
98
        : "memory");
99
}
100
 
101
/* Note the use of sub, not subu which will make the kernel die with an
102
   overflow exception if we ever try to unlock an rwlock that is already
103
   unlocked or is being held by a writer.  */
104
static inline void read_unlock(rwlock_t *rw)
105
{
106
        unsigned int tmp;
107
 
108
        __asm__ __volatile__(
109
        ".set\tnoreorder\t\t\t# read_unlock\n"
110
        "1:\tll\t%1, %2\n\t"
111
        "sub\t%1, 1\n\t"
112
        "sc\t%1, %0\n\t"
113
        "beqz\t%1, 1b\n\t"
114
        " sync\n\t"
115
        ".set\treorder"
116
        : "=m" (rw->lock), "=&r" (tmp)
117
        : "m" (rw->lock)
118
        : "memory");
119
}
120
 
121
static inline void write_lock(rwlock_t *rw)
122
{
123
        unsigned int tmp;
124
 
125
        __asm__ __volatile__(
126
        ".set\tnoreorder\t\t\t# write_lock\n"
127
        "1:\tll\t%1, %2\n\t"
128
        "bnez\t%1, 1b\n\t"
129
        " lui\t%1, 0x8000\n\t"
130
        "sc\t%1, %0\n\t"
131
        "beqz\t%1, 1b\n\t"
132
        " sync\n\t"
133
        ".set\treorder"
134
        : "=m" (rw->lock), "=&r" (tmp)
135
        : "m" (rw->lock)
136
        : "memory");
137
}
138
 
139
static inline void write_unlock(rwlock_t *rw)
140
{
141
        __asm__ __volatile__(
142
        ".set\tnoreorder\t\t\t# write_unlock\n\t"
143
        "sync\n\t"
144
        "sw\t$0, %0\n\t"
145
        ".set\treorder"
146
        : "=m" (rw->lock)
147
        : "m" (rw->lock)
148
        : "memory");
149
}
150
 
151
#endif /* _ASM_SPINLOCK_H */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.