OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [include/] [asm-mips64/] [softirq.h] - Blame information for rev 1765

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 1275 phoenix
/*
2
 * This file is subject to the terms and conditions of the GNU General Public
3
 * License.  See the file "COPYING" in the main directory of this archive
4
 * for more details.
5
 *
6
 * Copyright (C) 1997, 1998, 1999, 2000, 2001 by Ralf Baechle
7
 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
8
 * Copyright (C) 2001 MIPS Technologies, Inc.
9
 */
10
#ifndef _ASM_SOFTIRQ_H
11
#define _ASM_SOFTIRQ_H
12
 
13
#include <asm/atomic.h>
14
#include <asm/hardirq.h>
15
 
16
static inline void cpu_bh_disable(int cpu)
17
{
18
        local_bh_count(cpu)++;
19
        barrier();
20
}
21
 
22
static inline void __cpu_bh_enable(int cpu)
23
{
24
        barrier();
25
        local_bh_count(cpu)--;
26
}
27
 
28
#define local_bh_disable()      cpu_bh_disable(smp_processor_id())
29
#define __local_bh_enable()     __cpu_bh_enable(smp_processor_id())
30
#define local_bh_enable()                                       \
31
do {                                                            \
32
        int cpu;                                                \
33
                                                                \
34
        barrier();                                              \
35
        cpu = smp_processor_id();                               \
36
        if (!--local_bh_count(cpu) && softirq_pending(cpu))     \
37
                do_softirq();                                   \
38
} while (0)
39
 
40
#define in_softirq() (local_bh_count(smp_processor_id()) != 0)
41
 
42
#endif /* _ASM_SOFTIRQ_H */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.