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1275 |
phoenix |
/*
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* Copyright (C) 1999 Hewlett-Packard (Frank Rowand)
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* Copyright (C) 1999 Philipp Rumpf <prumpf@tux.org>
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* Copyright (C) 1999 SuSE GmbH
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#ifndef _PARISC_ASSEMBLY_H
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#define _PARISC_ASSEMBLY_H
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#if defined(__LP64__) && defined(__ASSEMBLY__)
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/* the 64-bit pa gnu assembler unfortunately defaults to .level 1.1 or 2.0 so
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* work around that for now... */
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.level 2.0w
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#endif
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#include <asm/offset.h>
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#include <asm/page.h>
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#include <asm/asmregs.h>
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sp = 30
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gp = 27
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ipsw = 22
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/*
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* We provide two versions of each macro to convert from physical
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* to virtual and vice versa. The "_r1" versions take one argument
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* register, but trashes r1 to do the conversion. The other
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* version takes two arguments: a src and destination register.
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* However, the source and destination registers can not be
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* the same register.
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*/
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.macro tophys grvirt, grphys
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ldil L%(__PAGE_OFFSET), \grphys
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sub \grvirt, \grphys, \grphys
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.endm
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.macro tovirt grphys, grvirt
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ldil L%(__PAGE_OFFSET), \grvirt
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add \grphys, \grvirt, \grvirt
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.endm
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.macro tophys_r1 gr
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ldil L%(__PAGE_OFFSET), %r1
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sub \gr, %r1, \gr
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.endm
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.macro tovirt_r1 gr
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ldil L%(__PAGE_OFFSET), %r1
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add \gr, %r1, \gr
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.endm
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.macro delay value
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ldil L%\value, 1
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ldo R%\value(1), 1
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addib,UV,n -1,1,.
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addib,NUV,n -1,1,.+8
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nop
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.endm
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.macro debug value
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.endm
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/* Shift Left - note the r and t can NOT be the same! */
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.macro shl r, sa, t
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dep,z \r, 31-\sa, 32-\sa, \t
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.endm
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/* The PA 2.0 shift left */
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.macro shlw r, sa, t
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depw,z \r, 31-\sa, 32-\sa, \t
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.endm
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/* And the PA 2.0W shift left */
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.macro shld r, sa, t
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depd,z \r, 63-\sa, 64-\sa, \t
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.endm
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/* load 32-bit 'value' into 'reg' compensating for the ldil
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* sign-extension when running in wide mode.
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* WARNING!! neither 'value' nor 'reg' can be expressions
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* containing '.'!!!! */
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.macro load32 value, reg
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ldil L%\value, \reg
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ldo R%\value(\reg), \reg
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.endm
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#ifdef __LP64__
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#define LDREG ldd
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#define STREG std
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#define RP_OFFSET 16
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#else
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#define LDREG ldw
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#define STREG stw
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#define RP_OFFSET 20
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#endif
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.macro loadgp
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#ifdef __LP64__
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ldil L%__gp, %r27
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ldo R%__gp(%r27), %r27
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#else
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ldil L%$global$, %r27
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ldo R%$global$(%r27), %r27
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#endif
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.endm
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#define SAVE_SP(r, where) mfsp r, %r1 ! STREG %r1, where
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#define REST_SP(r, where) LDREG where, %r1 ! mtsp %r1, r
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#define SAVE_CR(r, where) mfctl r, %r1 ! STREG %r1, where
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#define REST_CR(r, where) LDREG where, %r1 ! mtctl %r1, r
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.macro save_general regs
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STREG %r1, PT_GR1 (\regs)
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STREG %r2, PT_GR2 (\regs)
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STREG %r3, PT_GR3 (\regs)
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STREG %r4, PT_GR4 (\regs)
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STREG %r5, PT_GR5 (\regs)
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STREG %r6, PT_GR6 (\regs)
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STREG %r7, PT_GR7 (\regs)
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STREG %r8, PT_GR8 (\regs)
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STREG %r9, PT_GR9 (\regs)
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STREG %r10, PT_GR10(\regs)
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STREG %r11, PT_GR11(\regs)
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STREG %r12, PT_GR12(\regs)
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STREG %r13, PT_GR13(\regs)
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STREG %r14, PT_GR14(\regs)
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STREG %r15, PT_GR15(\regs)
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STREG %r16, PT_GR16(\regs)
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STREG %r17, PT_GR17(\regs)
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STREG %r18, PT_GR18(\regs)
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STREG %r19, PT_GR19(\regs)
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STREG %r20, PT_GR20(\regs)
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STREG %r21, PT_GR21(\regs)
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STREG %r22, PT_GR22(\regs)
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STREG %r23, PT_GR23(\regs)
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STREG %r24, PT_GR24(\regs)
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STREG %r25, PT_GR25(\regs)
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/* r26 is saved in get_stack and used to preserve a value across virt_map */
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STREG %r27, PT_GR27(\regs)
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STREG %r28, PT_GR28(\regs)
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/* r29 is saved in get_stack and used to point to saved registers */
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/* r30 stack pointer saved in get_stack */
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STREG %r31, PT_GR31(\regs)
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.endm
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.macro rest_general regs
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/* r1 used as a temp in rest_stack and is restored there */
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LDREG PT_GR2 (\regs), %r2
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LDREG PT_GR3 (\regs), %r3
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LDREG PT_GR4 (\regs), %r4
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LDREG PT_GR5 (\regs), %r5
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LDREG PT_GR6 (\regs), %r6
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LDREG PT_GR7 (\regs), %r7
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LDREG PT_GR8 (\regs), %r8
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LDREG PT_GR9 (\regs), %r9
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LDREG PT_GR10(\regs), %r10
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LDREG PT_GR11(\regs), %r11
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LDREG PT_GR12(\regs), %r12
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LDREG PT_GR13(\regs), %r13
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LDREG PT_GR14(\regs), %r14
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LDREG PT_GR15(\regs), %r15
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LDREG PT_GR16(\regs), %r16
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LDREG PT_GR17(\regs), %r17
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LDREG PT_GR18(\regs), %r18
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LDREG PT_GR19(\regs), %r19
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LDREG PT_GR20(\regs), %r20
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LDREG PT_GR21(\regs), %r21
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LDREG PT_GR22(\regs), %r22
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LDREG PT_GR23(\regs), %r23
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LDREG PT_GR24(\regs), %r24
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LDREG PT_GR25(\regs), %r25
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LDREG PT_GR26(\regs), %r26
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LDREG PT_GR27(\regs), %r27
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LDREG PT_GR28(\regs), %r28
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/* r29 points to register save area, and is restored in rest_stack */
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/* r30 stack pointer restored in rest_stack */
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LDREG PT_GR31(\regs), %r31
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.endm
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.macro save_fp regs
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fstd,ma %fr0, 8(\regs)
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fstd,ma %fr1, 8(\regs)
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fstd,ma %fr2, 8(\regs)
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fstd,ma %fr3, 8(\regs)
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fstd,ma %fr4, 8(\regs)
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fstd,ma %fr5, 8(\regs)
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fstd,ma %fr6, 8(\regs)
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fstd,ma %fr7, 8(\regs)
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fstd,ma %fr8, 8(\regs)
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fstd,ma %fr9, 8(\regs)
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fstd,ma %fr10, 8(\regs)
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fstd,ma %fr11, 8(\regs)
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fstd,ma %fr12, 8(\regs)
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fstd,ma %fr13, 8(\regs)
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fstd,ma %fr14, 8(\regs)
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fstd,ma %fr15, 8(\regs)
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fstd,ma %fr16, 8(\regs)
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fstd,ma %fr17, 8(\regs)
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fstd,ma %fr18, 8(\regs)
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fstd,ma %fr19, 8(\regs)
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fstd,ma %fr20, 8(\regs)
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fstd,ma %fr21, 8(\regs)
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fstd,ma %fr22, 8(\regs)
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fstd,ma %fr23, 8(\regs)
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fstd,ma %fr24, 8(\regs)
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fstd,ma %fr25, 8(\regs)
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fstd,ma %fr26, 8(\regs)
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fstd,ma %fr27, 8(\regs)
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fstd,ma %fr28, 8(\regs)
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fstd,ma %fr29, 8(\regs)
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fstd,ma %fr30, 8(\regs)
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fstd %fr31, 0(\regs)
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.endm
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.macro rest_fp regs
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fldd 0(\regs), %fr31
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fldd,mb -8(\regs), %fr30
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fldd,mb -8(\regs), %fr29
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fldd,mb -8(\regs), %fr28
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fldd,mb -8(\regs), %fr27
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fldd,mb -8(\regs), %fr26
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fldd,mb -8(\regs), %fr25
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| 240 |
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fldd,mb -8(\regs), %fr24
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| 241 |
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fldd,mb -8(\regs), %fr23
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| 242 |
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fldd,mb -8(\regs), %fr22
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fldd,mb -8(\regs), %fr21
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| 244 |
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fldd,mb -8(\regs), %fr20
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| 245 |
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fldd,mb -8(\regs), %fr19
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| 246 |
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fldd,mb -8(\regs), %fr18
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| 247 |
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fldd,mb -8(\regs), %fr17
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| 248 |
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fldd,mb -8(\regs), %fr16
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| 249 |
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fldd,mb -8(\regs), %fr15
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| 250 |
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fldd,mb -8(\regs), %fr14
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fldd,mb -8(\regs), %fr13
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| 252 |
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fldd,mb -8(\regs), %fr12
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| 253 |
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fldd,mb -8(\regs), %fr11
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| 254 |
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fldd,mb -8(\regs), %fr10
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| 255 |
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fldd,mb -8(\regs), %fr9
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| 256 |
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fldd,mb -8(\regs), %fr8
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| 257 |
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fldd,mb -8(\regs), %fr7
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| 258 |
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fldd,mb -8(\regs), %fr6
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| 259 |
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fldd,mb -8(\regs), %fr5
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| 260 |
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fldd,mb -8(\regs), %fr4
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| 261 |
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fldd,mb -8(\regs), %fr3
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| 262 |
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fldd,mb -8(\regs), %fr2
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| 263 |
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fldd,mb -8(\regs), %fr1
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| 264 |
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fldd,mb -8(\regs), %fr0
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| 265 |
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.endm
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| 266 |
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| 267 |
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#ifdef __LP64__
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| 268 |
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.macro callee_save
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| 269 |
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std,ma %r3, 144(%r30)
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| 270 |
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mfctl %cr27, %r3
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| 271 |
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std %r4, -136(%r30)
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| 272 |
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std %r5, -128(%r30)
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| 273 |
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std %r6, -120(%r30)
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| 274 |
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std %r7, -112(%r30)
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| 275 |
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std %r8, -104(%r30)
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| 276 |
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std %r9, -96(%r30)
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| 277 |
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std %r10, -88(%r30)
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| 278 |
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std %r11, -80(%r30)
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| 279 |
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std %r12, -72(%r30)
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| 280 |
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std %r13, -64(%r30)
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| 281 |
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std %r14, -56(%r30)
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| 282 |
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std %r15, -48(%r30)
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| 283 |
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std %r16, -40(%r30)
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| 284 |
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std %r17, -32(%r30)
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| 285 |
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std %r18, -24(%r30)
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| 286 |
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std %r3, -16(%r30)
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| 287 |
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.endm
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| 288 |
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| 289 |
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.macro callee_rest
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| 290 |
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ldd -16(%r30), %r3
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| 291 |
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ldd -24(%r30), %r18
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| 292 |
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ldd -32(%r30), %r17
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| 293 |
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ldd -40(%r30), %r16
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| 294 |
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ldd -48(%r30), %r15
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| 295 |
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ldd -56(%r30), %r14
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| 296 |
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ldd -64(%r30), %r13
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| 297 |
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ldd -72(%r30), %r12
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| 298 |
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ldd -80(%r30), %r11
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| 299 |
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ldd -88(%r30), %r10
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| 300 |
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ldd -96(%r30), %r9
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| 301 |
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ldd -104(%r30), %r8
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| 302 |
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ldd -112(%r30), %r7
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| 303 |
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ldd -120(%r30), %r6
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| 304 |
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ldd -128(%r30), %r5
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| 305 |
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ldd -136(%r30), %r4
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| 306 |
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mtctl %r3, %cr27
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| 307 |
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ldd,mb -144(%r30), %r3
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| 308 |
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.endm
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| 309 |
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| 310 |
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#else /* ! __LP64__ */
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| 311 |
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|
| 312 |
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.macro callee_save
|
| 313 |
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|
stw,ma %r3, 128(%r30)
|
| 314 |
|
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mfctl %cr27, %r3
|
| 315 |
|
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stw %r4, -124(%r30)
|
| 316 |
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stw %r5, -120(%r30)
|
| 317 |
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stw %r6, -116(%r30)
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| 318 |
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stw %r7, -112(%r30)
|
| 319 |
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stw %r8, -108(%r30)
|
| 320 |
|
|
stw %r9, -104(%r30)
|
| 321 |
|
|
stw %r10, -100(%r30)
|
| 322 |
|
|
stw %r11, -96(%r30)
|
| 323 |
|
|
stw %r12, -92(%r30)
|
| 324 |
|
|
stw %r13, -88(%r30)
|
| 325 |
|
|
stw %r14, -84(%r30)
|
| 326 |
|
|
stw %r15, -80(%r30)
|
| 327 |
|
|
stw %r16, -76(%r30)
|
| 328 |
|
|
stw %r17, -72(%r30)
|
| 329 |
|
|
stw %r18, -68(%r30)
|
| 330 |
|
|
stw %r3, -64(%r30)
|
| 331 |
|
|
.endm
|
| 332 |
|
|
|
| 333 |
|
|
.macro callee_rest
|
| 334 |
|
|
ldw -64(%r30), %r3
|
| 335 |
|
|
ldw -68(%r30), %r18
|
| 336 |
|
|
ldw -72(%r30), %r17
|
| 337 |
|
|
ldw -76(%r30), %r16
|
| 338 |
|
|
ldw -80(%r30), %r15
|
| 339 |
|
|
ldw -84(%r30), %r14
|
| 340 |
|
|
ldw -88(%r30), %r13
|
| 341 |
|
|
ldw -92(%r30), %r12
|
| 342 |
|
|
ldw -96(%r30), %r11
|
| 343 |
|
|
ldw -100(%r30), %r10
|
| 344 |
|
|
ldw -104(%r30), %r9
|
| 345 |
|
|
ldw -108(%r30), %r8
|
| 346 |
|
|
ldw -112(%r30), %r7
|
| 347 |
|
|
ldw -116(%r30), %r6
|
| 348 |
|
|
ldw -120(%r30), %r5
|
| 349 |
|
|
ldw -124(%r30), %r4
|
| 350 |
|
|
mtctl %r3, %cr27
|
| 351 |
|
|
ldw,mb -128(%r30), %r3
|
| 352 |
|
|
.endm
|
| 353 |
|
|
#endif /* ! __LP64__ */
|
| 354 |
|
|
|
| 355 |
|
|
.macro save_specials regs
|
| 356 |
|
|
|
| 357 |
|
|
SAVE_SP (%sr0, PT_SR0 (\regs))
|
| 358 |
|
|
SAVE_SP (%sr1, PT_SR1 (\regs))
|
| 359 |
|
|
SAVE_SP (%sr2, PT_SR2 (\regs))
|
| 360 |
|
|
SAVE_SP (%sr3, PT_SR3 (\regs))
|
| 361 |
|
|
SAVE_SP (%sr4, PT_SR4 (\regs))
|
| 362 |
|
|
SAVE_SP (%sr5, PT_SR5 (\regs))
|
| 363 |
|
|
SAVE_SP (%sr6, PT_SR6 (\regs))
|
| 364 |
|
|
SAVE_SP (%sr7, PT_SR7 (\regs))
|
| 365 |
|
|
|
| 366 |
|
|
SAVE_CR (%cr17, PT_IASQ0(\regs))
|
| 367 |
|
|
mtctl %r0, %cr17
|
| 368 |
|
|
SAVE_CR (%cr17, PT_IASQ1(\regs))
|
| 369 |
|
|
|
| 370 |
|
|
SAVE_CR (%cr18, PT_IAOQ0(\regs))
|
| 371 |
|
|
mtctl %r0, %cr18
|
| 372 |
|
|
SAVE_CR (%cr18, PT_IAOQ1(\regs))
|
| 373 |
|
|
|
| 374 |
|
|
#ifdef __LP64__
|
| 375 |
|
|
/* cr11 (sar) is a funny one. 5 bits on PA1.1 and 6 bit on PA2.0
|
| 376 |
|
|
* For PA2.0 mtsar or mtctl always write 6 bits, but mfctl only
|
| 377 |
|
|
* reads 5 bits. Use mfctl,w to read all six bits. Otherwise
|
| 378 |
|
|
* we loose the 6th bit on a save/restore over interrupt.
|
| 379 |
|
|
*/
|
| 380 |
|
|
mfctl,w %cr11, %r1
|
| 381 |
|
|
STREG %r1, PT_SAR (\regs)
|
| 382 |
|
|
#else
|
| 383 |
|
|
SAVE_CR (%cr11, PT_SAR (\regs))
|
| 384 |
|
|
#endif
|
| 385 |
|
|
SAVE_CR (%cr19, PT_IIR (\regs))
|
| 386 |
|
|
|
| 387 |
|
|
/*
|
| 388 |
|
|
* Code immediately following this macro (in intr_save) relies
|
| 389 |
|
|
* on r8 containing ipsw.
|
| 390 |
|
|
*/
|
| 391 |
|
|
mfctl %cr22, %r8
|
| 392 |
|
|
STREG %r8, PT_PSW(\regs)
|
| 393 |
|
|
.endm
|
| 394 |
|
|
|
| 395 |
|
|
.macro rest_specials regs
|
| 396 |
|
|
|
| 397 |
|
|
REST_SP (%sr0, PT_SR0 (\regs))
|
| 398 |
|
|
REST_SP (%sr1, PT_SR1 (\regs))
|
| 399 |
|
|
REST_SP (%sr2, PT_SR2 (\regs))
|
| 400 |
|
|
REST_SP (%sr3, PT_SR3 (\regs))
|
| 401 |
|
|
REST_SP (%sr4, PT_SR4 (\regs))
|
| 402 |
|
|
REST_SP (%sr5, PT_SR5 (\regs))
|
| 403 |
|
|
REST_SP (%sr6, PT_SR6 (\regs))
|
| 404 |
|
|
REST_SP (%sr7, PT_SR7 (\regs))
|
| 405 |
|
|
|
| 406 |
|
|
REST_CR (%cr17, PT_IASQ0(\regs))
|
| 407 |
|
|
REST_CR (%cr17, PT_IASQ1(\regs))
|
| 408 |
|
|
|
| 409 |
|
|
REST_CR (%cr18, PT_IAOQ0(\regs))
|
| 410 |
|
|
REST_CR (%cr18, PT_IAOQ1(\regs))
|
| 411 |
|
|
|
| 412 |
|
|
REST_CR (%cr11, PT_SAR (\regs))
|
| 413 |
|
|
|
| 414 |
|
|
REST_CR (%cr22, PT_PSW (\regs))
|
| 415 |
|
|
.endm
|
| 416 |
|
|
|
| 417 |
|
|
#endif
|
