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1275 |
phoenix |
/*
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** This file is private to iosapic driver.
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** If stuff needs to be used by another driver, move it to a common file.
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**
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** WARNING: fields most data structures here are ordered to make sure
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** they pack nicely for 64-bit compilation. (ie sizeof(long) == 8)
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*/
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/*
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** I/O SAPIC init function
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** Caller knows where an I/O SAPIC is. LBA has an integrated I/O SAPIC.
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** Call setup as part of per instance initialization.
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** (ie *not* init_module() function unless only one is present.)
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** fixup_irq is to initialize PCI IRQ line support and
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** virtualize pcidev->irq value. To be called by pci_fixup_bus().
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*/
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extern void *iosapic_register(unsigned long hpa);
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extern int iosapic_fixup_irq(void *obj, struct pci_dev *pcidev);
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#ifdef __IA64__
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/*
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** PA: PIB (Processor Interrupt Block) is handled by Runway bus adapter.
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** and is hardcoded to 0xfeeNNNN0 where NNNN is id_eid field.
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**
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** IA64: PIB is handled by "Local SAPIC" (integrated in the processor).
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*/
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struct local_sapic_info {
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struct local_sapic_info *lsi_next; /* point to next CPU info */
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int *lsi_cpu_id; /* point to logical CPU id */
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unsigned long *lsi_id_eid; /* point to IA-64 CPU id */
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int *lsi_status; /* point to CPU status */
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void *lsi_private; /* point to special info */
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};
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/*
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** "root" data structure which ties everything together.
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** Should always be able to start with sapic_root and locate
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** the desired information.
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*/
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struct sapic_info {
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struct sapic_info *si_next; /* info is per cell */
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int si_cellid; /* cell id */
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unsigned int si_status; /* status */
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char *si_pib_base; /* intr blk base address */
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local_sapic_info_t *si_local_info;
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io_sapic_info_t *si_io_info;
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extint_info_t *si_extint_info;/* External Intr info */
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};
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#endif /* IA64 */
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