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1275 |
phoenix |
#ifndef __PARISC_SPINLOCK_T_H
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#define __PARISC_SPINLOCK_T_H
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/* LDCW, the only atomic read-write operation PA-RISC has. *sigh*.
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*
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* Note that PA-RISC has to use `1' to mean unlocked and `0' to mean locked
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* since it only has load-and-zero.
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*/
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#ifdef CONFIG_PA20
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/*
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> From: "Jim Hull" <jim.hull of hp.com>
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> Delivery-date: Wed, 29 Jan 2003 13:57:05 -0500
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> I've attached a summary of the change, but basically, for PA 2.0, as
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> long as the ",CO" (coherent operation) completer is specified, then the
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> 16-byte alignment requirement for ldcw and ldcd is relaxed, and instead
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> they only require "natural" alignment (4-byte for ldcw, 8-byte for
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> ldcd).
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*/
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#define __ldcw(a) ({ \
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unsigned __ret; \
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__asm__ __volatile__("ldcw,co 0(%1),%0" : "=r" (__ret) : "r" (a)); \
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__ret; \
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})
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#else
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#define __ldcw(a) ({ \
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unsigned __ret; \
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__asm__ __volatile__("ldcw 0(%1),%0" : "=r" (__ret) : "r" (a)); \
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__ret; \
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})
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#endif
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/*
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* Your basic SMP spinlocks, allowing only a single CPU anywhere
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*/
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typedef struct {
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#ifdef CONFIG_PA20
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volatile unsigned int lock;
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#else
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volatile unsigned int __attribute__((aligned(16))) lock;
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#endif
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#ifdef CONFIG_DEBUG_SPINLOCK
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volatile unsigned long owner_pc;
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volatile unsigned long owner_cpu;
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#endif
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} spinlock_t;
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#ifndef CONFIG_DEBUG_SPINLOCK
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#define SPIN_LOCK_UNLOCKED (spinlock_t) { 1 }
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/* Define 6 spinlock primitives that don't depend on anything else. */
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#define spin_lock_init(x) do { (x)->lock = 1; } while(0)
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#define spin_is_locked(x) ((x)->lock == 0)
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#define spin_trylock(x) (__ldcw(&(x)->lock) != 0)
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/*
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* PA2.0 is not strongly ordered. PA1.X is strongly ordered.
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* ldcw enforces ordering and we need to make sure ordering is
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* enforced on the unlock too.
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* "stw,ma" with Zero index is an alias for "stw,o".
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* But PA 1.x can assemble the "stw,ma" while it doesn't know about "stw,o".
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* And PA 2.0 will generate the right insn using either form.
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* Thanks to John David Anglin for this cute trick.
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*
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* Writing this with asm also ensures that the unlock doesn't
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* get reordered
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*/
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#define spin_unlock(x) \
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__asm__ __volatile__ ("stw,ma %%sp,0(%0)" : : "r" (&(x)->lock) : "memory" )
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#define spin_unlock_wait(x) do { barrier(); } while(((volatile spinlock_t *)(x))->lock == 0)
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#define spin_lock(x) do { \
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while (__ldcw (&(x)->lock) == 0) \
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while ((x)->lock == 0) ; \
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} while (0)
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#else
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#define SPIN_LOCK_UNLOCKED (spinlock_t) { 1, 0, 0 }
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/* Define 6 spinlock primitives that don't depend on anything else. */
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#define spin_lock_init(x) do { (x)->lock = 1; (x)->owner_cpu = 0; (x)->owner_pc = 0; } while(0)
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#define spin_is_locked(x) ((x)->lock == 0)
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void spin_lock(spinlock_t *lock);
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int spin_trylock(spinlock_t *lock);
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void spin_unlock(spinlock_t *lock);
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#define spin_unlock_wait(x) do { barrier(); } while(((volatile spinlock_t *)(x))->lock == 0)
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#endif
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#endif /* __PARISC_SPINLOCK_T_H */
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